URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
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- This comparison shows the changes necessary to convert path
/sdhc-sc-core/trunk/src/grpStrobesClocks/unitStrobeGen
- from Rev 105 to Rev 121
- ↔ Reverse comparison
Rev 105 → Rev 121
/src/StrobeGen-Rtl-a.vhdl
14,25 → 14,31
------------------------------------------------------------------------------- |
architecture Rtl of StrobeGen is |
|
constant max : natural := gClkFrequency/(1 sec/ gStrobeCycleTime); |
constant cBitWidth : natural := LogDualis(max); -- Bitwidth |
signal Counter : unsigned (cBitWidth - 1 downto 0) := (others => '0'); |
constant max : natural := gClkFrequency/(1 sec/ gStrobeCycleTime); |
constant cBitWidth : natural := LogDualis(max); -- Bitwidth |
signal Counter : unsigned (cBitWidth - 1 downto 0) := (others => '0'); |
|
begin -- architecture Rtl |
|
StateReg : process (iClk, inResetAsync) is |
begin -- process StateReg |
if inResetAsync = cnActivated then -- asynchronous reset (active low) |
Counter <= (others => '0'); |
oStrobe <= cInactivated; |
elsif iClk'event and iClk = cActivated then -- rising clock edge |
Counter <= Counter + 1; |
if Counter < max - 1 then |
oStrobe <= cInactivated; |
else |
oStrobe <= cActivated; |
Counter <= TO_UNSIGNED(0, cBitWidth); |
end if; |
end if; |
end process StateReg; |
StateReg : process (iClk, inResetAsync) is |
begin -- process StateReg |
if inResetAsync = cnActivated then -- asynchronous reset (active low) |
Counter <= (others => '0'); |
oStrobe <= cInactivated; |
elsif iClk'event and iClk = cActivated then -- rising clock edge |
if (iRstSync = cActivated) then |
Counter <= (others => '0'); |
oStrobe <= cInactivated; |
|
else |
Counter <= Counter + 1; |
if Counter < max - 1 then |
oStrobe <= cInactivated; |
else |
oStrobe <= cActivated; |
Counter <= TO_UNSIGNED(0, cBitWidth); |
end if; |
end if; |
end if; |
end process StateReg; |
end architecture Rtl; |
/src/StrobeGen-e.vhdl
29,8 → 29,9
|
port ( |
-- Sequential logic inside this unit |
iClk : in std_ulogic; |
inResetAsync : in std_ulogic; |
iClk : in std_ulogic; |
inResetAsync : in std_ulogic := '1'; |
iRstSync : in std_ulogic := '0'; |
|
-- Strobe with the above given cycle time |
oStrobe : out std_ulogic); |