URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdhc-sc-core/trunk/src/grpStrobesClocks
- from Rev 170 to Rev 178
- ↔ Reverse comparison
Rev 170 → Rev 178
/unitTimeoutGenerator/src/tbTimeoutGenerator-Bhv-ea.vhdl
48,7 → 48,7
constant cResetTime : time := 4 * cClkPeriod; |
constant cTimeoutTime : time := 10 us; |
signal Clk : std_ulogic := '1'; |
signal nResetAsync : std_ulogic := cnActivated; |
signal ResetSync : std_ulogic := cActivated; |
signal Done : std_ulogic := cInactivated; |
signal Timeout : std_ulogic; |
signal Enable : std_ulogic := cInactivated; |
55,8 → 55,8
|
begin |
|
Clk <= not Clk after (cClkPeriod / 2) when Done = cInactivated else '0'; |
nResetAsync <= cnInactivated after cResetTime; |
Clk <= not Clk after (cClkPeriod / 2) when Done = cInactivated else '0'; |
ResetSync <= cInactivated after cResetTime; |
|
DUT : entity work.TimeoutGenerator |
generic map ( |
64,11 → 64,11
gTimeoutTime => cTimeoutTime |
) |
port map ( |
iClk => Clk, |
inResetAsync => nResetAsync, |
iDisable => cInactivated, |
iEnable => Enable, |
oTimeout => Timeout |
iClk => Clk, |
iRstSync => ResetSync, |
iDisable => cInactivated, |
iEnable => Enable, |
oTimeout => Timeout |
); |
|
Stimuli : process |
/unitTimeoutGenerator/sim/wave.do
1,7 → 1,7
onerror {resume} |
quietly WaveActivateNextPane {} 0 |
add wave -noupdate -format Logic /tbtimeoutgenerator/clk |
add wave -noupdate -format Logic /tbtimeoutgenerator/nresetasync |
add wave -noupdate -format Logic /tbtimeoutgenerator/resetsync |
add wave -noupdate -format Logic /tbtimeoutgenerator/done |
add wave -noupdate -format Logic /tbtimeoutgenerator/timeout |
add wave -noupdate -format Logic /tbtimeoutgenerator/enable |