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URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

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  • This comparison shows the changes necessary to convert path
    /sdhc-sc-core/trunk/src/grpWishbone
    from Rev 18 to Rev 19
    Reverse comparison

Rev 18 → Rev 19

/unitWbSlave/src/WbSlave-Rtl-ea.vhdl
36,11 → 36,13
-- write cycle
 
-- Data
iAdr : std_ulogic_vector(gPortSize-1 downto log2(gPortGranularity) - 1);
iAdr : std_ulogic_vector(gPortSize-1 downto integer(log2(
real(gPortGranularity) )) - 1);
iDat : std_ulogic_vector(gPortSize-1 downto 0); -- Data input
oDat : std_ulogic_vector(gPortSize-1 downto 0); -- Data output
oDat : std_ulogic_vector(gPortSize-1 downto 0) -- Data output
 
-- Tags are currently not supported
);
 
begin
 
48,8 → 50,7
64) report "gPortSize is invalid." severity failure;
 
assert (gPortGranularity = 8 or gPortGranularity = 16 or
gPortGranularity = 32 or gPortGranularity = 64) report "gPortGranularity
is invalid." severity failure;
gPortGranularity = 32 or gPortGranularity = 64) report "gPortGranularity is invalid." severity failure;
 
assert (gMaximumOperandSize = 8 or gMaximumOperandSize = 16 or
gMaximumOperandSize = 32 or gMaximumOperandSize = 64) report

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