URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
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- This comparison shows the changes necessary to convert path
/sdhc-sc-core/trunk
- from Rev 59 to Rev 60
- ↔ Reverse comparison
Rev 59 → Rev 60
/src/grpSd/unitSdCardModel/src/SdCardModel.sv
108,7 → 108,27
ocr = new(CCS, cSdVoltageWindow); |
acmd41response = new(ocr); |
acmd41response.send(ICmd); |
|
// expect CMD55 with default RCA |
recv(); |
assert(recvcmd.id == cSdCmdNextIsACMD); |
assert(recvcmd.arg == 0); |
state.recvCMD55(); |
|
// respond with R1 |
response = new(cSdCmdNextIsACMD, state); |
response.send(ICmd); |
|
// expect ACMD41 with HCS = 1 |
recv(); |
assert(recvcmd.id == cSdCmdACMD41); |
assert(recvcmd.arg == cSdArgACMD41HCS); |
|
// respond with R3 |
ocr.setBusy(cOCRDone); |
acmd41response = new(ocr); |
acmd41response.send(ICmd); |
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-> InitDone; |
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endtask |
/src/grpSd/pkgSd/src/Sd-p.vhdl
109,8 → 109,40
constant cSdArgAppCmdPos : natural := 5; |
|
constant cSdCmdACMD41 : aSdCmdId := std_ulogic_vector(to_unsigned(41, cSdCmdIdHigh)); |
constant cVoltageWindow : std_ulogic_vector(23 downto 0) := |
"111111111000000000000000"; |
|
|
subtype aVoltageWindow is std_ulogic_vector(23 downto 15); |
constant cVoltageWindow : aVoltageWindow := (others => '1'); |
constant cSdR3Id : aSdCmdId := (others => '1'); |
|
type aSdRegOCR is record |
voltagewindow : aVoltageWindow; |
ccs : std_ulogic; |
nBusy : std_ulogic; |
end record aSdRegOCR; |
|
function OCRToArg (ocr : in aSdRegOCR) return aSdCmdArg; |
function ArgToOcr (arg : in aSdCmdArg) return aSdRegOCR; |
|
end package Sd; |
|
package body Sd is |
|
function OCRToArg (ocr : in aSdRegOCR) return aSdCmdArg is |
variable temp : aSdCmdArg; |
begin |
temp := ocr.nBusy & ocr.ccs & "000000" & ocr.voltagewindow & |
"000000000000000"; |
return temp; |
end function OCRtoArg; |
|
function ArgToOcr (arg : in aSdCmdArg) return aSdRegOCR is |
variable ocr : aSdRegOCR; |
begin |
ocr.nBusy := arg(31); |
ocr.ccs := arg(30); |
ocr.voltagewindow := arg(23 downto 15); |
return ocr; |
end function ArgToOcr; |
|
end package body Sd; |
|
/src/grpSd/unitSdVerificationTestbench/sim/modelsim.ini
438,7 → 438,6
CoverageFEC = 0 |
CoverageShortCircuit = 0 |
CoverOpt = 3 |
OptionFile = /home/draugdel/SD-CORE/src/grpSd/unitSdCmd/sim/vlog.opt |
Quiet = 0 |
Show_source = 0 |
Protect = 0 |
/src/grpSd/unitSdController/src/SdController-Rtl-ea.vhdl
26,7 → 26,7
architecture Rtl of SdController is |
|
type aSdControllerState is (CMD0, CMD8Ws, CMD8, CMD8Response, CMD55, |
CMD55Response, ACMD41, ACMD41Response, idle, |
CMD55Response, ACMD41, ACMD41Response, CMD2, idle, |
invalidCard); |
constant cDefaultControllerState : aSdControllerState := CMD0; |
constant cDefaultoSdCmd : aSdCmdFromController := ((id => (others => '0'), |
57,6 → 57,8
end process Regs; |
|
Comb : process (iSdCmd, State, Reg) |
variable ocr : aSdRegOCR; |
variable arg : aSdCmdArg; |
begin |
-- default assignments |
oSdCmd <= cDefaultoSdCmd; |
122,10 → 124,10
|
when ACMD41 => |
oSdCmd.Content.id <= cSdCmdACMD41; |
oSdCmd.Content.arg(31) <= '0'; |
oSdCmd.Content.arg(30) <= Reg.HCS; |
oSdCmd.Content.arg(29 downto 24) <= (others => '0'); |
oSdCmd.Content.arg(23 downto 0) <= cVoltageWindow; |
ocr.nBusy := cnActivated; |
ocr.ccs := Reg.HCS; |
ocr.voltagewindow := cVoltageWindow; |
oSdCmd.Content.arg <= OCRToArg(ocr); |
oSdCmd.Valid <= cActivated; |
if (iSdCmd.Ack = cActivated) then |
NextState <= ACMD41Response; |
132,8 → 134,21
end if; |
|
when ACMD41Response => |
null; -- TODO |
if (iSdCmd.Valid = cActivated) then |
NextState <= CMD55; |
if (iSdCmd.Content.id = cSdR3Id) then |
ocr := ArgToOcr(iSdCmd.Content.arg); |
if (ocr.nBusy = cnInactivated) then |
-- TODO: check voltage |
NextReg.CCS <= ocr.ccs; |
NextState <= CMD2; |
end if; |
end if; |
end if; |
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when CMD2 => |
null; |
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when others => |
report "SdController: State not handled" severity error; |
end case; |