URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdhc-sc-core
- from Rev 146 to Rev 147
- ↔ Reverse comparison
Rev 146 → Rev 147
/trunk/src/grpSd/unitSdCardModel/src/SdData.sv
123,6 → 123,21
end |
endtask |
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task sendBusy(virtual ISdCard.card ICmd); |
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@ICmd.cb; |
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// 10 busy cycles |
ICmd.cb.Data[0] <= 0; |
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repeat (10) @ICmd.cb; |
ICmd.cb.Data[0] <= 1; |
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@ICmd.cb; |
ICmd.cb.Data <= 'z; |
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endtask |
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endclass |
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`endif |
/trunk/src/grpSd/unitSdCardModel/src/SdCardModel.sv
286,6 → 286,9
end |
end |
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repeat (8) @ICard.cb; |
sddata.sendBusy(ICard); |
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$display("Ram at write address: %h", ram[addr]); |
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endtask |
/trunk/src/grpSd/unitSdData/src/SdData-Rtl-a.vhdl
9,7 → 9,7
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architecture Rtl of SdData is |
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type aState is (idle, send, receive); -- overall states |
type aState is (idle, send, receive, checkbusy); -- overall states |
type aRegion is (startbit, data, crc, endbit); -- regions in send and receive state |
subtype aCounter is unsigned(LogDualis(512*8)-1 downto 0); -- bit counter |
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251,9 → 251,13
case R.State is |
when idle => |
-- check if card signals that it is busy (the controller has to enable this check) |
if (iSdDataFromController.CheckBusy = cActivated and iData.Data(0) = cInactivated) then |
NextR.Controller.Busy <= cActivated; |
if (iSdDataFromController.CheckBusy = cActivated) then |
if (iData.Data(0) = cInactivated) then |
-- NextR.Controller.Busy <= cActivated; |
end if; |
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NextR.State <= checkbusy; |
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elsif (R.Mode = wide and iData.Data = cSdStartBits) or (R.Mode = standard and iData.Data(0) = cSdStartBit) then |
-- start receiving |
NextR.Region <= data; |
295,6 → 299,14
NextR.Mode <= iSdDataFromController.Mode; |
end if; |
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when checkbusy => |
NextR.Controller.Busy <= cActivated; |
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if (iData.Data(0) = cActivated) then |
NextR.Controller.Valid <= cActivated; |
NextR.State <= idle; |
end if; |
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when send => |
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-- Handle the data enable signal |
/trunk/src/grpSd/unitSdVerificationTestbench/sim/wave.do
33,9 → 33,11
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/ireadfifo |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/r |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/nxr |
add wave -noupdate -divider topsignals |
add wave -noupdate -format Logic /Testbed/top/osclk |
add wave -noupdate -format Logic /Testbed/top/iocmd |
add wave -noupdate -format Literal /Testbed/top/iodata |
add wave -noupdate -divider sdcard |
add wave -noupdate -format Logic /Testbed/CardInterface/Clk |
add wave -noupdate -format Logic /Testbed/CardInterface/nResetAsync |
add wave -noupdate -format Logic /Testbed/CardInterface/Cmd |
add wave -noupdate -format Logic /Testbed/CardInterface/SClk |
add wave -noupdate -format Literal -radix hexadecimal /Testbed/CardInterface/Data |
46,10 → 48,6
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/idisable |
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/osdstrobe |
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/osdcardclk |
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/sdclk |
add wave -noupdate -format Literal /Testbed/top/sdclockmaster_inst/counter |
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/sdstrobe25mhz |
add wave -noupdate -format Logic /Testbed/top/sdclockmaster_inst/sdstrobe50mhz |
add wave -noupdate -divider sddata |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/iclk |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/inresetasync |
86,7 → 84,7
add wave -noupdate -format Logic /Testbed/top/sdcontroller_inst/timeout |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/timeoutmax |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {1150621 ns} 0} {{Cursor 2} {10084945 ns} 0} {{Cursor 3} {10085095 ns} 0} |
WaveRestoreCursors {{Cursor 1} {1132238 ns} 0} {{Cursor 2} {10084945 ns} 0} {{Cursor 3} {10085095 ns} 0} |
configure wave -namecolwidth 150 |
configure wave -valuecolwidth 100 |
configure wave -justifyvalue left |
101,4 → 99,4
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {1149954 ns} {1155829 ns} |
WaveRestoreZoom {1131644 ns} {1137519 ns} |
/trunk/src/grpSd/unitSdController/src/SdController-Rtl-a.vhdl
637,8 → 637,14
elsif (Timeout = cActivated) then |
NextR.State <= invalidCard; |
end if; |
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when senddata => |
NextRegion := checkbusy; |
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when senddata => |
when checkbusy => |
null; |
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when receivedata => |
NextRegion := waitstatedata; |
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when waitstatedata => |
761,8 → 767,13
end if; |
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when checkbusy => |
null; |
NextR.ToSdData.CheckBusy <= cActivated; |
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if (iSdData.Busy = cActivated) then |
NextR.Region <= receivedata; |
NextR.ToSdData.CheckBusy <= cInactivated; |
end if; |
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when receivedata => |
TimeoutEnable <= cActivated; |
TimeoutMax <= cReadTimeout; |