URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdhc-sc-core
- from Rev 160 to Rev 161
- ↔ Reverse comparison
Rev 160 → Rev 161
/trunk/src/grpSd/unitSdCardModel/src/SdBFM-impl.sv
178,12 → 178,29
Log.error("recvStandardDataBlock not implemented"); |
endtask |
|
function void SdBFM::compareCrc16(aCrc16 actual, aCrc16 expected); |
assert(actual == expected) else begin |
string msg; |
$swrite(msg, "Data CRC error: %h %h", actual, expected); |
Log.error(msg); |
end |
endfunction |
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task SdBFM::recvWideDataBlock(output SdDataBlock block); |
aCrc16 crc[4]; |
logic dat0[$]; |
logic dat1[$]; |
logic dat2[$]; |
logic dat3[$]; |
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block = new(); |
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for (int j = 0; j < 512*2; j++) begin |
@ICard.cb; |
dat0.push_back(ICard.cb.Data[0]); |
dat1.push_back(ICard.cb.Data[1]); |
dat2.push_back(ICard.cb.Data[2]); |
dat3.push_back(ICard.cb.Data[3]); |
for(int i = 3; i >= 0; i--) begin |
block.data.push_back(ICard.cb.Data[i]); |
end |
193,11 → 210,14
for (int j = 0; j < 16; j++) begin |
@ICard.cb; |
for(int i = 3; i >= 0; i--) begin |
crc[i] = ICard.cb.Data[i]; |
crc[i][15-j] = ICard.cb.Data[i]; |
end |
end |
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Log.warning("TODO: Check crc in recvWideDataBlock"); |
compareCrc16(crc[0], calcCrc16(dat0)); |
compareCrc16(crc[1], calcCrc16(dat1)); |
compareCrc16(crc[2], calcCrc16(dat2)); |
compareCrc16(crc[3], calcCrc16(dat3)); |
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// end bits |
@ICard.cb; |
/trunk/src/grpSd/unitSdCardModel/src/SdBFM.sv
48,6 → 48,7
extern local task recv(output SdBusTransToken token); |
extern local task receiveOrSend(); |
extern local task run(); |
extern local function void compareCrc16(aCrc16 actual, aCrc16 expected); |
|
local semaphore Sem; |
local Logger Log; |
/trunk/src/grpSd/unitSdVerificationTestbench/sim/wave.do
14,32 → 14,29
add wave -noupdate -format Literal -radix hexadecimal /Testbed/IWbBus/DAT_O |
add wave -noupdate -format Logic /Testbed/IWbBus/STB_O |
add wave -noupdate -format Logic /Testbed/IWbBus/WE_O |
add wave -noupdate -format Logic /Testbed/top/sdcontroller_inst/iclk |
add wave -noupdate -format Logic /Testbed/top/sdcontroller_inst/inresetasync |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/isdcmd |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/osdcmd |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/isddata |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/osddata |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/isdwbslave |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/osdwbslave |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/r |
add wave -noupdate -format Literal /Testbed/top/sdcontroller_inst/nextr |
add wave -noupdate -format Logic /Testbed/top/sdwbslave_inst/iclk |
add wave -noupdate -format Logic /Testbed/top/sdwbslave_inst/irstsync |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/iwbctrl |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/owbctrl |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/iwbdat |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/owbdat |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/icontroller |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/ocontroller |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/owritefifo |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/iwritefifo |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/oreadfifo |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/ireadfifo |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/r |
add wave -noupdate -format Literal /Testbed/top/sdwbslave_inst/nxr |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/iclk |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/inresetasync |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/istrobe |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/isddatafromcontroller |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/osddatatocontroller |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/idata |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/odata |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/ireadwritefifo |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/oreadwritefifo |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/iwritereadfifo |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/owritereadfifo |
add wave -noupdate -format Logic /Testbed/top/sddata_inst/odisablesdclk |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/crcin |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/crcout |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/crcdatain |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/r |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/nextr |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/rbitinwordc |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/rwordc |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/rbytec |
add wave -noupdate -format Literal /Testbed/top/sddata_inst/rbitc |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {2496665 ns} 0} {{Cursor 2} {6033878 ns} 0} {{Cursor 3} {19999903 ns} 0} |
WaveRestoreCursors {{Cursor 1} {2496665 ns} 0} {{Cursor 2} {6033878 ns} 0} {{Cursor 3} {18655442 ns} 0} |
configure wave -namecolwidth 150 |
configure wave -valuecolwidth 100 |
configure wave -justifyvalue left |
54,4 → 51,4
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {2005 us} {4105 us} |
WaveRestoreZoom {0 ns} {21 ms} |
/trunk/src/grpSdVerification/unitSdCoreTransactionBFM/src/SdCoreTransactionBFM.sv
33,7 → 33,6
SdCoreTransaction::readSingleBlock: |
begin |
int j = 0; |
string msg; |
WbTransactionSequenceReadSingleBlock tmp = new(trans.startAddr, trans.endAddr); |
assert (tmp.randomize()) else Log.error("Randomizing WbTransactionSequence seq failed."); |
seq = tmp; |
40,8 → 39,6
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trans.data = new[1]; |
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Log.note(msg); |
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foreach(seq.transactions[i]) begin |
WbTransaction tr; |
|