URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdhc-sc-core
- from Rev 186 to Rev 187
- ↔ Reverse comparison
Rev 186 → Rev 187
/trunk/grpSd/unitSdData/syn/Makefile
1,6 → 1,6
# Makefile for synthesizing crcs |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: SdDatasyn.syn |
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/trunk/grpSd/unitTbdSd/syn/Makefile
1,6 → 1,6
# Makefile for synthesizing crcs |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: TbdSdsyn.syn |
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/trunk/grpSd/unitSdTop/syn/Makefile
1,6 → 1,6
# Makefile for synthesizing crcs |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: SdTopsyn.syn |
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/trunk/grpSd/unitSdClockMaster/sim/Makefile
1,4 → 1,4
include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: SdClockMaster-unattended.sim |
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/trunk/grpCrc/unitCrc/sim/Makefile
1,6 → 1,6
# Makefile for simulating crcs |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: tbcrc-unattended.sim |
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/trunk/grpCrc/unitCrc/syn/Makefile
1,6 → 1,6
# Makefile for synthesizing crcs |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: CRCsyn.syn |
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/trunk/libaltera_mf/sim/Makefile
1,6 → 1,6
# Makefile for simulating crcs |
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include ../../../Makefile.rules |
include ../../Makefile.rules |
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all: lib.sim |
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/trunk/grpSdVerification/unitSdCardModel/sim/Makefile
1,4 → 1,4
include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: SDCardModel-unattended.sim |
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/trunk/grpSdVerification/unitSdVerificationTestbench/sim/Makefile
1,4 → 1,4
include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: SdVerificationTestbench-unattended.sim |
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/trunk/grpRs232/unitRs232Tx/sim/Makefile
1,6 → 1,6
# Makefile for simulating wishbone slaves |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: Rs232Tx-unattended.sim |
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/trunk/grpStrobesClocks/unitTimeoutGenerator/sim/Makefile
1,6 → 1,6
# Makefile for simulating wishbone slaves |
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include ../../../../Makefile.rules |
include ../../../Makefile.rules |
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all: tbTimeoutGenerator-unattended.sim |
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/trunk/libcycloneii/sim/Makefile
1,6 → 1,6
# Makefile for simulating crcs |
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include ../../../Makefile.rules |
include ../../Makefile.rules |
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all: lib.sim |
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