URL
https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk
Subversion Repositories sdr_ctrl
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdr_ctrl/trunk/verif/run
- from Rev 43 to Rev 45
- ↔ Reverse comparison
Rev 43 → Rev 45
/read.me
1,10 → 1,29
1. To run SDRM 16 Bit Test |
run_modelsim SDR_16BITa |
run_modelsim top SDR_16BITa |
Note: All the logs will be prefixed with SDR_16BBIT |
2. To run SDRAM 32 Bit Test |
run_modelsim SDR_32BIT |
|
2. To run SDRAM top 32 Bit Test |
run_modelsim top SDR_32BIT |
Note: All the logs will be prefixed with SDR_32BBIT |
3. to debug the test in modelsim |
./compile_modelsim <SDR_16BIT/SDR_32BIT> |
|
3. To run SDRM 8 Bit Test |
run_modelsim top SDR_8BIT |
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4. to debug the test in modelsim |
./compile_modelsim <top/core> <SDRA_8BIt/SDR_16BIT/SDR_32BIT> |
vsim tb_top & |
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5. to complile indipendently |
./compile_modelsim <top/core> <SDRA_8BIt/SDR_16BIT/SDR_32BIT> |
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6. To run SDRM 16 Bit Test at SDRAM Core level |
run_modelsim core SDR_16BITa |
Note: All the logs will be prefixed with SDR_16BBIT |
|
7. To run SDRAM top 32 Bit Test at SDRAM Core level |
run_modelsim core SDR_32BIT |
Note: All the logs will be prefixed with SDR_32BBIT |
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8. To run SDRM 8 Bit Test at SDRAM Core level |
run_modelsim core SDR_8BIT |
|