URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
Compare Revisions
- This comparison shows the changes necessary to convert path
/socgen/trunk/Projects/opencores.org/io/ip/io_timer/sim/testbenches/xml
- from Rev 131 to Rev 133
- ↔ Reverse comparison
Rev 131 → Rev 133
/io_timer_def_duth.design.xml
0,0 → 1,93
<?xml version="1.0" encoding="UTF-8"?> |
<!-- |
// // |
// Generated File Do Not EDIT // |
// // |
// ./tools/verilog/gen_tb -vendor opencores.org -library io -component io_timer -version def // |
// // |
--> |
<spirit:design |
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" |
xmlns:socgen="http://opencores.org" |
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" |
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009 |
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd"> |
<spirit:vendor>opencores.org</spirit:vendor> |
<spirit:library>io</spirit:library> |
<spirit:name>io_timer</spirit:name> |
<spirit:version>def_duth.design</spirit:version> |
<spirit:adHocConnections> |
|
<spirit:adHocConnection> |
<spirit:name>addr</spirit:name> |
<spirit:externalPortReference spirit:portRef="addr" spirit:left="3" spirit:right="0" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="addr" /> |
</spirit:adHocConnection> |
|
<spirit:adHocConnection> |
<spirit:name>clk</spirit:name> |
<spirit:externalPortReference spirit:portRef="clk" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="clk" /> |
</spirit:adHocConnection> |
|
<spirit:adHocConnection> |
<spirit:name>cs</spirit:name> |
<spirit:externalPortReference spirit:portRef="cs" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="cs" /> |
</spirit:adHocConnection> |
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<spirit:adHocConnection> |
<spirit:name>enable</spirit:name> |
<spirit:externalPortReference spirit:portRef="enable" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="enable" /> |
</spirit:adHocConnection> |
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<spirit:adHocConnection> |
<spirit:name>irq</spirit:name> |
<spirit:externalPortReference spirit:portRef="irq" spirit:left="TIMERS-1" spirit:right="0" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="irq" /> |
</spirit:adHocConnection> |
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<spirit:adHocConnection> |
<spirit:name>rd</spirit:name> |
<spirit:externalPortReference spirit:portRef="rd" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="rd" /> |
</spirit:adHocConnection> |
|
<spirit:adHocConnection> |
<spirit:name>rdata</spirit:name> |
<spirit:externalPortReference spirit:portRef="rdata" spirit:left="7" spirit:right="0" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="rdata" /> |
</spirit:adHocConnection> |
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<spirit:adHocConnection> |
<spirit:name>reset</spirit:name> |
<spirit:externalPortReference spirit:portRef="reset" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="reset" /> |
</spirit:adHocConnection> |
|
<spirit:adHocConnection> |
<spirit:name>wdata</spirit:name> |
<spirit:externalPortReference spirit:portRef="wdata" spirit:left="7" spirit:right="0" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="wdata" /> |
</spirit:adHocConnection> |
|
<spirit:adHocConnection> |
<spirit:name>wr</spirit:name> |
<spirit:externalPortReference spirit:portRef="wr" /> |
<spirit:internalPortReference spirit:componentRef="dut" spirit:portRef="wr" /> |
</spirit:adHocConnection> |
|
|
</spirit:adHocConnections> |
<spirit:componentInstances> |
|
<spirit:componentInstance> |
<spirit:instanceName>dut</spirit:instanceName> |
<spirit:componentRef spirit:vendor="opencores.org" spirit:library="io" spirit:name="io_timer" spirit:version="def" /> |
<spirit:configurableElementValues> |
<spirit:configurableElementValue spirit:referenceId="TIMERS">TIMERS</spirit:configurableElementValue> |
</spirit:configurableElementValues> |
</spirit:componentInstance> |
</spirit:componentInstances> |
</spirit:design> |
/io_timer_def_dut.params.xml
1,9 → 1,9
<?xml version="1.0" encoding="UTF-8"?> |
<!-- |
// // |
// Generated File Do Not EDIT // |
// // |
// // |
// regen by adding -tb to gen_verilog script // |
// // |
// // |
--> |
<spirit:component |
26,7 → 26,7
<spirit:hierarchyRef spirit:vendor="opencores.org" |
spirit:library="io" |
spirit:name="io_timer" |
spirit:version="def_dutg.design"/> |
spirit:version="def_duth.design"/> |
</spirit:view> |
</spirit:views> |
<spirit:modelParameters> |
/io_timer_def_lint.xml
41,9 → 41,46
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<spirit:componentGenerators> |
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<spirit:componentGenerator> |
<spirit:name>elab_verilog</spirit:name> |
<spirit:phase>102.1</spirit:phase> |
<spirit:apiType>none</spirit:apiType> |
<spirit:vendorExtensions><socgen:envIdentifier>:*Simulation:*</socgen:envIdentifier></spirit:vendorExtensions |
> |
<spirit:generatorExe>./tools/verilog/elab_verilog</spirit:generatorExe> |
<spirit:parameters> |
<spirit:parameter> |
<spirit:name>configuration</spirit:name> |
<spirit:value>default</spirit:value> |
</spirit:parameter> |
<spirit:parameter> |
<spirit:name>dest_dir</spirit:name> |
<spirit:value>io_ports</spirit:value> |
</spirit:parameter> |
</spirit:parameters> |
</spirit:componentGenerator> |
|
<spirit:componentGenerator> |
<spirit:name>gen_design</spirit:name> |
<spirit:phase>102.1</spirit:phase> |
<spirit:apiType>none</spirit:apiType> |
<spirit:vendorExtensions><socgen:envIdentifier>:*Simulation:*</socgen:envIdentifier></spirit:vendorExtensions |
> |
<spirit:generatorExe>./tools/verilog/gen_design</spirit:generatorExe> |
<spirit:parameters> |
<spirit:parameter> |
<spirit:name>dest_dir</spirit:name> |
<spirit:value>io_ports</spirit:value> |
</spirit:parameter> |
</spirit:parameters> |
</spirit:componentGenerator> |
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</spirit:componentGenerators> |
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<spirit:model> |
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