OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /socgen/trunk/common/opencores.org/Busdefs
    from Rev 131 to Rev 133
    Reverse comparison

Rev 131 → Rev 133

/or1k/xml/or1k_spr.busDefinition.xml
0,0 → 1,47
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<spirit:busDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>spr</spirit:version>
 
<spirit:directConnection>true</spirit:directConnection>
<spirit:isAddressable>true</spirit:isAddressable>
 
</spirit:busDefinition>
 
 
/or1k/xml/or1k_spr_rtl.abstractionDefinition.xml
0,0 → 1,142
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
 
<spirit:abstractionDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>spr_rtl</spirit:version>
 
<spirit:busType spirit:vendor="opencores.org" spirit:library="Busdefs" spirit:name="or1k" spirit:version="spr"/>
<spirit:ports>
 
<spirit:port>
<spirit:logicalName>addr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>we</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>write</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>wdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>rdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>cs</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
 
 
 
 
 
 
</spirit:ports>
</spirit:abstractionDefinition>
 
 
 
 
 
 
 
 
 
/or1k/xml/or1k_cpu.busDefinition.xml
0,0 → 1,47
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<spirit:busDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>cpu</spirit:version>
 
<spirit:directConnection>true</spirit:directConnection>
<spirit:isAddressable>true</spirit:isAddressable>
 
</spirit:busDefinition>
 
 
/or1k/xml/or1k_cpu_rtl.abstractionDefinition.xml
0,0 → 1,272
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
 
<spirit:abstractionDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>cpu_rtl</spirit:version>
 
<spirit:busType spirit:vendor="opencores.org" spirit:library="Busdefs" spirit:name="or1k" spirit:version="cpu"/>
<spirit:ports>
 
<spirit:port>
<spirit:logicalName>addr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>cycstb</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>stb</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>cyc</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>we</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>sel</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>tag_src</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
 
 
<spirit:port>
<spirit:logicalName>wdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>rdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>ack</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>cab</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>rty</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>err</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>tag_ret</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
<spirit:port>
<spirit:logicalName>caci</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>mmu_en</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
</spirit:ports>
</spirit:abstractionDefinition>
 
 
 
 
 
 
 
 
 
/or1k/xml/or1k_dbg.busDefinition.xml
0,0 → 1,47
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<spirit:busDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>dbg</spirit:version>
 
<spirit:directConnection>true</spirit:directConnection>
<spirit:isAddressable>true</spirit:isAddressable>
 
</spirit:busDefinition>
 
 
/or1k/xml/or1k_dbg_rtl.abstractionDefinition.xml
0,0 → 1,239
<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2011 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
 
<spirit:abstractionDefinition
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Busdefs</spirit:library>
<spirit:name>or1k</spirit:name>
<spirit:version>dbg_rtl</spirit:version>
 
<spirit:busType spirit:vendor="opencores.org" spirit:library="Busdefs" spirit:name="or1k" spirit:version="dbg"/>
<spirit:ports>
 
<spirit:port>
<spirit:logicalName>clk</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:onSystem>
<spirit:direction>out</spirit:direction>
</spirit:onSystem>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>rst</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>addr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>wdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>rdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
<spirit:port>
<spirit:logicalName>bp</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>wp</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>is</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>lss</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>ewt</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>stall</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
 
<spirit:port>
<spirit:logicalName>stb</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>we</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
<spirit:port>
<spirit:logicalName>ack</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
 
 
 
</spirit:ports>
</spirit:abstractionDefinition>
 
 
 
 
 
 
 
 
 
/or1k/componentCfg.xml
0,0 → 1,31
<?xml version="1.0" encoding="UTF-8"?>
<!--
 
-->
<socgen:componentConfiguration
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
 
<socgen:vendor>opencores.org</socgen:vendor>
<socgen:library>Busdefs</socgen:library>
<socgen:component>or1k</socgen:component>
 
<socgen:ip_name_depth>3</socgen:ip_name_depth>
<socgen:ip_name_vendor_sep>_</socgen:ip_name_vendor_sep>
<socgen:ip_name_library_sep>_</socgen:ip_name_library_sep>
<socgen:ip_name_version_sep>_</socgen:ip_name_version_sep>
 
 
<socgen:doc>
 
<socgen:library_path>/or1k/doc</socgen:library_path>
 
</socgen:doc>
 
 
 
 
 
</socgen:componentConfiguration>
 

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