OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /socgen/trunk/doc/src/drawing/sch
    from Rev 49 to Rev 56
    ↔ Reverse comparison
  •

Rev 49 → Rev 56

/data_fig1.sch
2,15 → 2,15
C 42500 22100 1 0 0 frame_800x600.sym
B 42900 27700 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42900 26100 1000 1900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43000 27500 9 10 1 0 0 0 1
T 43000 27200 9 10 1 0 0 0 1
LIB
T 43000 27200 9 10 1 0 0 0 1
T 43000 26900 9 10 1 0 0 0 1
BENCH
T 43000 27800 9 10 1 0 0 0 1
DOC
T 43000 26900 9 10 1 0 0 0 1
T 43000 26600 9 10 1 0 0 0 1
TARGETS
T 43000 26600 9 10 1 0 0 0 1
T 43000 27500 9 10 1 0 0 0 1
TOOLS
T 43900 25900 9 10 1 0 0 0 1
Proj #1
56,15 → 56,18
CMP #1
T 44500 22600 9 10 1 0 0 0 1
CMP #2
B 43900 26800 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44000 26900 9 10 1 0 0 0 1
B 43900 26500 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44000 26600 9 10 1 0 0 0 1
TARGET #1
B 45200 26800 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 45300 26900 9 10 1 0 0 0 1
B 45200 26500 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 45300 26600 9 10 1 0 0 0 1
TARGET #2
B 46500 26800 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 46600 26900 9 10 1 0 0 0 1
B 46500 26500 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 46600 26600 9 10 1 0 0 0 1
TARGET #3
B 47800 26800 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 47900 26900 9 10 1 0 0 0 1
B 47800 26500 1300 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 47900 26600 9 10 1 0 0 0 1
TARGET #4
B 42900 22200 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43000 22300 9 10 1 0 0 0 1
WORK
/data_fig2.sch
1,72 → 1,138
v 20100214 2
C 42600 22000 1 0 0 frame_800x600.sym
B 49500 27200 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42900 22200 6000 5800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 49500 27300 9 10 1 0 0 0 1
Serial Uart
T 49500 26700 9 10 1 0 0 0 1
VGA Display
T 49600 26200 9 10 1 0 0 0 1
PS2 Mouse
T 49600 25600 9 10 1 0 0 0 1
Switches
T 49700 25100 9 10 1 0 0 0 1
Leds
T 49500 24500 9 10 1 0 0 0 1
Push Buttons
T 49500 23900 9 10 1 0 0 0 1
7 Seg display
T 49500 23100 9 10 1 0 0 0 1
I/O connectors
B 49500 25500 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 25000 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 26600 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 26100 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 24400 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 23800 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 23000 1200 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43000 28400 9 10 1 0 0 0 1
System
T 43100 27600 9 10 1 0 0 0 1
PCA (Nexys2)
T 43400 26900 9 10 1 0 0 0 1
Targeted Component (Xilinx Spartan 3E-500 FG320)
B 43200 22600 5400 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 43500 23100 4800 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43800 26200 9 10 1 0 0 0 1
Padring
T 44100 25700 9 10 1 0 0 0 1
Core
T 44300 25200 9 10 1 0 0 0 1
Component
B 43800 23500 4200 2500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44100 23800 3600 1700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44400 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 45500 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44500 24800 9 10 1 0 0 0 1
comp
T 45600 24800 9 10 1 0 0 0 1
comp
T 46700 24800 9 10 1 0 0 0 1
comp
B 44500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 45500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46500 27400 600 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 47500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44600 27600 9 10 1 0 0 0 1
IC
T 45600 27600 9 10 1 0 0 0 1
IC
T 46600 27600 9 10 1 0 0 0 1
IC
T 47600 27600 9 10 1 0 0 0 1
IC
L 48900 27400 49500 27400 3 0 0 0 -1 -1
L 48900 26800 49500 26800 3 0 0 0 -1 -1
L 48900 26300 49500 26300 3 0 0 0 -1 -1
L 48900 25700 49500 25700 3 0 0 0 -1 -1
L 48900 25200 49500 25200 3 0 0 0 -1 -1
L 48900 24600 49500 24600 3 0 0 0 -1 -1
L 48900 24000 49500 24000 3 0 0 0 -1 -1
L 48900 23200 49500 23200 3 0 0 0 -1 -1
C 42300 22100 1 0 0 frame_800x600.sym
T 42400 28400 9 10 1 0 0 0 1
PROJECT Database
T 42600 28000 9 10 1 0 0 0 1
PROJECT
B 42800 26900 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 27000 9 10 1 0 0 0 1
PROG1
T 42700 27300 9 10 1 0 0 0 1
SW
B 42800 26600 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 26700 9 10 1 0 0 0 1
PROG2
B 42800 25900 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42800 25600 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 26000 9 10 1 0 0 0 1
CMP1
T 42700 26300 9 10 1 0 0 0 1
IP
T 42900 25700 9 10 1 0 0 0 1
CMP2
B 42800 25300 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 25400 9 10 1 0 0 0 1
CMP3
L 44300 28700 44300 22100 3 0 0 0 -1 -1
B 44700 27000 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 26700 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 26000 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 25700 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 25400 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44500 28400 9 10 1 0 0 0 1
COMPONENT Database
T 44500 28000 9 10 1 0 0 0 1
COMPONENT
T 44800 27100 9 10 1 0 0 0 1
FSM1
T 44600 27400 9 10 1 0 0 0 1
FSM
T 44800 26800 9 10 1 0 0 0 1
FSM2
T 44800 26100 9 10 1 0 0 0 1
RTL1
T 44600 26400 9 10 1 0 0 0 1
VERILOG
T 44800 25800 9 10 1 0 0 0 1
RTL2
T 44800 25500 9 10 1 0 0 0 1
RTL3
B 44700 24600 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 24300 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 24000 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44800 24700 9 10 1 0 0 0 1
VAR1
T 44600 25000 9 10 1 0 0 0 1
VARIANTS
T 44800 24400 9 10 1 0 0 0 1
VAR2
T 44800 24100 9 10 1 0 0 0 1
VAR3
T 44400 27700 9 10 1 0 0 0 1
RTL
B 44500 22400 1500 5200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42500 22600 1600 5000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 27000 1500 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 24600 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 24300 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 24000 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46300 23900 1800 3700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 46700 27100 9 10 1 0 0 0 1
VAR1_PROG2
T 46500 27400 9 10 1 0 0 0 1
RUN
T 46700 26800 9 10 1 0 0 0 1
VAR2_PROG1
T 46700 26500 9 10 1 0 0 0 1
VAR1_TST1
T 46700 26200 9 10 1 0 0 0 1
VAR2_TST1
T 46700 25900 9 10 1 0 0 0 1
VAR3_TST2
T 46700 24700 9 10 1 0 0 0 1
VAR1
T 46500 25000 9 10 1 0 0 0 1
COV
T 46700 24400 9 10 1 0 0 0 1
VAR2
T 46700 24100 9 10 1 0 0 0 1
VAR3
T 46300 27700 9 10 1 0 0 0 1
SIM
B 46600 26700 1500 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 26400 1500 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 26100 1500 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 25800 1500 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 48400 23900 1900 3700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 48400 27100 9 10 1 0 0 0 1
TRG1_VAR1_PROG2
T 48400 27700 9 10 1 0 0 0 1
SYN
T 48400 26800 9 10 1 0 0 0 1
TRG1_VAR2_PROG2
T 48400 26500 9 10 1 0 0 0 1
TRG1_VAR3_PROG2
T 48400 26200 9 10 1 0 0 0 1
TRG2_VAR1_PROG2
T 48400 25900 9 10 1 0 0 0 1
TRG2_VAR2_PROG1
B 42800 24600 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42800 24300 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 24700 9 10 1 0 0 0 1
TOOL1
T 42700 25000 9 10 1 0 0 0 1
BIN
T 42900 24400 9 10 1 0 0 0 1
TOOL2
B 44700 23300 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 23000 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44700 22700 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44800 23400 9 10 1 0 0 0 1
VAR1.xml
T 44600 23700 9 10 1 0 0 0 1
XML
T 44800 23100 9 10 1 0 0 0 1
VAR2.xml
T 44800 22800 9 10 1 0 0 0 1
VAR3.xml
B 42800 23500 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42800 23200 1000 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 42900 23600 9 10 1 0 0 0 1
PROGX
T 42700 23900 9 10 1 0 0 0 1
CHILDREN
T 42900 23300 9 10 1 0 0 0 1
PROGY
T 46300 23400 9 10 1 0 0 0 1
DOCS
B 46300 22500 2300 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
/data_fig3.sch
0,0 → 1,72
v 20100214 2
C 42600 22000 1 0 0 frame_800x600.sym
B 49500 27200 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 42900 22200 6000 5800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 49500 27300 9 10 1 0 0 0 1
Serial Uart
T 49500 26700 9 10 1 0 0 0 1
VGA Display
T 49600 26200 9 10 1 0 0 0 1
PS2 Mouse
T 49600 25600 9 10 1 0 0 0 1
Switches
T 49700 25100 9 10 1 0 0 0 1
Leds
T 49500 24500 9 10 1 0 0 0 1
Push Buttons
T 49500 23900 9 10 1 0 0 0 1
7 Seg display
T 49500 23100 9 10 1 0 0 0 1
I/O connectors
B 49500 25500 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 25000 900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 26600 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 26100 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 24400 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 23800 1100 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 49500 23000 1200 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43000 28400 9 10 1 0 0 0 1
System
T 43100 27600 9 10 1 0 0 0 1
PCA (Nexys2)
T 43400 26900 9 10 1 0 0 0 1
Targeted Component (Xilinx Spartan 3E-500 FG320)
B 43200 22600 5400 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 43500 23100 4800 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 43800 26200 9 10 1 0 0 0 1
Padring
T 44100 25700 9 10 1 0 0 0 1
Core
T 44300 25200 9 10 1 0 0 0 1
Component
B 43800 23500 4200 2500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44100 23800 3600 1700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 44400 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 45500 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46600 24200 800 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44500 24800 9 10 1 0 0 0 1
comp
T 45600 24800 9 10 1 0 0 0 1
comp
T 46700 24800 9 10 1 0 0 0 1
comp
B 44500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 45500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 46500 27400 600 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
B 47500 27400 500 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 44600 27600 9 10 1 0 0 0 1
IC
T 45600 27600 9 10 1 0 0 0 1
IC
T 46600 27600 9 10 1 0 0 0 1
IC
T 47600 27600 9 10 1 0 0 0 1
IC
L 48900 27400 49500 27400 3 0 0 0 -1 -1
L 48900 26800 49500 26800 3 0 0 0 -1 -1
L 48900 26300 49500 26300 3 0 0 0 -1 -1
L 48900 25700 49500 25700 3 0 0 0 -1 -1
L 48900 25200 49500 25200 3 0 0 0 -1 -1
L 48900 24600 49500 24600 3 0 0 0 -1 -1
L 48900 24000 49500 24000 3 0 0 0 -1 -1
L 48900 23200 49500 23200 3 0 0 0 -1 -1

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