URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
Compare Revisions
- This comparison shows the changes necessary to convert path
/socgen/trunk/doc/src
- from Rev 119 to Rev 120
- ↔ Reverse comparison
Rev 119 → Rev 120
/png/um-150_cde_jtag_rpc_sym.png
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
png/um-150_cde_jtag_rpc_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_jtag_def_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_jtag_def_sym.png
===================================================================
--- png/um-100_cde_jtag_def_sym.png (nonexistent)
+++ png/um-100_cde_jtag_def_sym.png (revision 120)
png/um-100_cde_jtag_def_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_sram_be_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_sram_be_sym.png
===================================================================
--- png/um-100_cde_sram_be_sym.png (nonexistent)
+++ png/um-100_cde_sram_be_sym.png (revision 120)
png/um-100_cde_sram_be_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/cde_pad_tri_dig.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/cde_pad_tri_dig.png
===================================================================
--- png/cde_pad_tri_dig.png (nonexistent)
+++ png/cde_pad_tri_dig.png (revision 120)
png/cde_pad_tri_dig.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_sram_def_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_sram_def_sym.png
===================================================================
--- png/um-100_cde_sram_def_sym.png (nonexistent)
+++ png/um-100_cde_sram_def_sym.png (revision 120)
png/um-100_cde_sram_def_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-150_cde_sync_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-150_cde_sync_sym.png
===================================================================
--- png/um-150_cde_sync_sym.png (nonexistent)
+++ png/um-150_cde_sync_sym.png (revision 120)
png/um-150_cde_sync_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/cde_pad_od_dig.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/cde_pad_od_dig.png
===================================================================
--- png/cde_pad_od_dig.png (nonexistent)
+++ png/cde_pad_od_dig.png (revision 120)
png/cde_pad_od_dig.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_sram_dp_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_sram_dp_sym.png
===================================================================
--- png/um-100_cde_sram_dp_sym.png (nonexistent)
+++ png/um-100_cde_sram_dp_sym.png (revision 120)
png/um-100_cde_sram_dp_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_pad_se_dig.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_pad_se_dig.png
===================================================================
--- png/um-100_cde_pad_se_dig.png (nonexistent)
+++ png/um-100_cde_pad_se_dig.png (revision 120)
png/um-100_cde_pad_se_dig.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/cde_pad_in_dig.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/cde_pad_in_dig.png
===================================================================
--- png/cde_pad_in_dig.png (nonexistent)
+++ png/cde_pad_in_dig.png (revision 120)
png/cde_pad_in_dig.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/cde_pad_out_dig.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/cde_pad_out_dig.png
===================================================================
--- png/cde_pad_out_dig.png (nonexistent)
+++ png/cde_pad_out_dig.png (revision 120)
png/cde_pad_out_dig.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-150_cde_reset_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-150_cde_reset_sym.png
===================================================================
--- png/um-150_cde_reset_sym.png (nonexistent)
+++ png/um-150_cde_reset_sym.png (revision 120)
png/um-150_cde_reset_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: png/um-100_cde_clock_sys_sym.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: png/um-100_cde_clock_sys_sym.png
===================================================================
--- png/um-100_cde_clock_sys_sym.png (nonexistent)
+++ png/um-100_cde_clock_sys_sym.png (revision 120)
png/um-100_cde_clock_sys_sym.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: drawing/sym/cde_reset_def.sym
===================================================================
--- drawing/sym/cde_reset_def.sym (nonexistent)
+++ drawing/sym/cde_reset_def.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20100214 1
+B 300 0 4700 1100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1250 5 10 1 1 0 0 1 1
+device=cde_reset_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_reset_def.sch
+T 400 1450 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=sync_reset[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=atg_asyncdisable
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=async_reset_n
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 5000 200 5300 200 4 0 1
+{
+T 4900 200 5 10 1 1 0 7 1 1
+pinnumber=reset_out[WIDTH-1:0]
+T 4900 200 5 10 0 1 0 7 1 1
+pinseq=5
+}
+P 5000 400 5300 400 4 0 1
+{
+T 4900 400 5 10 1 1 0 7 1 1
+pinnumber=reset_n_out[WIDTH-1:0]
+T 4900 400 5 10 0 1 0 7 1 1
+pinseq=6
+}
Index: drawing/sym/cde_jtag_def.sym
===================================================================
--- drawing/sym/cde_jtag_def.sym (nonexistent)
+++ drawing/sym/cde_jtag_def.sym (revision 120)
@@ -0,0 +1,127 @@
+v 20110115 2
+B 300 0 4100 2700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 2850 5 10 1 1 0 0 1
+device=cde_jtag_def
+T 400 -300 5 10 0 1 0 0 1
+source=cde_jtag_def.sch
+T 400 3050 8 10 1 1 0 0 1
+refdes=U?
+P 4400 200 4700 200 4 0 1
+{
+T 4300 200 5 10 1 1 0 7 1
+pinnumber=jtag_shift_dr
+T 4300 200 5 10 0 1 0 7 1
+pinseq=2
+}
+P 4400 400 4700 400 4 0 1
+{
+T 4300 400 5 10 1 1 0 7 1
+pinnumber=jtag_update_dr
+T 4300 400 5 10 0 1 0 7 1
+pinseq=3
+}
+P 4400 2500 4700 2500 4 0 1
+{
+T 4300 2500 5 10 1 1 0 7 1
+pinnumber=jtag_clk
+T 4300 2500 5 10 0 1 0 7 1
+pinseq=4
+}
+P 4400 2100 4700 2100 4 0 1
+{
+T 4300 2100 5 10 1 1 0 7 1
+pinnumber=user2_clk
+T 4300 2100 5 10 0 1 0 7 1
+pinseq=5
+}
+P 4400 2300 4700 2300 4 0 1
+{
+T 4300 2300 5 10 1 1 0 7 1
+pinnumber=user1_clk
+T 4300 2300 5 10 0 1 0 7 1
+pinseq=6
+}
+P 4400 1900 4700 1900 4 0 1
+{
+T 4300 1900 5 10 1 1 0 7 1
+pinnumber=jtag_tdi
+T 4300 1900 5 10 0 1 0 7 1
+pinseq=7
+}
+P 300 1700 0 1700 10 0 1
+{
+T 1415 1635 5 10 1 1 0 6 1
+pinnumber=tdo_pad_out
+T 400 1700 5 10 0 1 0 1 1
+pinseq=8
+}
+P 300 1900 0 1900 10 0 1
+{
+T 1515 1835 5 10 1 1 0 6 1
+pinnumber=trst_n_pad_in
+T 400 1900 5 10 0 1 0 1 1
+pinseq=9
+}
+P 300 2100 0 2100 10 0 1
+{
+T 1315 2035 5 10 1 1 0 6 1
+pinnumber=tms_pad_in
+T 400 2100 5 10 0 1 0 1 1
+pinseq=10
+}
+P 300 2300 0 2300 10 0 1
+{
+T 1215 2235 5 10 1 1 0 6 1
+pinnumber=tdi_pad_in
+T 400 2300 5 10 0 1 0 1 1
+pinseq=11
+}
+P 300 2500 0 2500 10 0 1
+{
+T 1315 2435 5 10 1 1 0 6 1
+pinnumber=tclk_pad_in
+T 400 2500 5 10 0 1 0 1 1
+pinseq=12
+}
+P 300 1500 0 1500 10 0 1
+{
+T 1315 1435 5 10 1 1 0 6 1
+pinnumber=tdo_pad_oe
+T 400 1500 5 10 0 1 0 1 1
+pinseq=8
+}
+P 4400 600 4700 600 4 0 1
+{
+T 4300 600 5 10 1 1 0 7 1
+pinnumber=jtag_capture_dr
+T 4300 600 5 10 0 1 0 7 1
+pinseq=3
+}
+P 4400 1500 4700 1500 4 0 1
+{
+T 4300 1500 5 10 1 1 0 7 1
+pinnumber=user2_tdo
+T 4300 1500 5 10 0 1 0 7 1
+pinseq=5
+}
+P 4400 1700 4700 1700 4 0 1
+{
+T 4300 1700 5 10 1 1 0 7 1
+pinnumber=user1_tdo
+T 4300 1700 5 10 0 1 0 7 1
+pinseq=6
+}
+P 4400 900 4700 900 4 0 1
+{
+T 4300 900 5 10 1 1 0 7 1
+pinnumber=jtag_update_dr_clk
+T 4300 900 5 10 0 1 0 7 1
+pinseq=3
+}
+P 4400 1100 4700 1100 4 0 1
+{
+T 4300 1100 5 10 1 1 0 7 1
+pinnumber=jtag_shift_capture_dr_clk
+T 4300 1100 5 10 0 1 0 7 1
+pinseq=3
+}
Index: drawing/sym/cde_pad_tri_dig.sym
===================================================================
--- drawing/sym/cde_pad_tri_dig.sym (nonexistent)
+++ drawing/sym/cde_pad_tri_dig.sym (revision 120)
@@ -0,0 +1,33 @@
+v 20110115 2
+P 100 600 300 600 4 0 0
+{
+T -698 635 5 10 0 1 0 0 1
+pinnumber=PAD_OUT
+T 402 535 5 10 0 0 0 0 1
+pinseq=1
+}
+P 100 1000 504 1000 4 0 0
+{
+T -698 1035 5 10 0 1 0 0 1
+pinnumber=PAD_OE
+T 402 935 5 10 0 0 0 0 1
+pinseq=3
+}
+T 102 218 5 10 1 1 0 0 1
+device=cde_pad_tri_dig
+T 1200 900 5 10 1 1 0 6 1
+refdes=P?
+B 1000 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1100 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 700 600 300 800 3 0 0 0 -1 -1
+L 700 600 300 400 3 0 0 0 -1 -1
+L 300 800 300 400 3 0 0 0 -1 -1
+L 1000 600 700 600 3 0 0 0 -1 -1
+L 500 700 500 1000 4 10 0 0 -1 -1
+P 1200 600 1210 600 1 0 0
+{
+T 1805 645 5 10 0 1 0 6 1
+pinnumber=PAD
+T 1200 600 5 10 0 0 0 0 1
+pinseq=0
+}
Index: drawing/sym/cde_sram_be.sym
===================================================================
--- drawing/sym/cde_sram_be.sym (nonexistent)
+++ drawing/sym/cde_sram_be.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 2800 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1850 5 10 1 1 0 0 1 1
+device=cde_sram_be
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sram_be.sch
+T 400 2050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=wdata[7:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=addr[ADDR-1:0]
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=be
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=rd
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=wr
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=cs
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 3100 200 3400 200 4 0 1
+{
+T 3000 200 5 10 1 1 0 7 1 1
+pinnumber=rdata[7:0]
+T 3000 200 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_pad_od_dig.sym
===================================================================
--- drawing/sym/cde_pad_od_dig.sym (nonexistent)
+++ drawing/sym/cde_pad_od_dig.sym (revision 120)
@@ -0,0 +1,43 @@
+v 20110115 2
+P 100 1000 504 1000 4 0 0
+{
+T -698 1035 5 10 0 1 0 0 1
+pinnumber=PAD_OE
+T 402 935 5 10 0 0 0 0 1
+pinseq=3
+}
+T 1002 118 5 10 1 1 0 0 1
+device=cde_pad_od_dig
+T 1200 900 5 10 1 1 0 6 1
+refdes=P?
+B 1000 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1100 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 700 600 300 800 3 0 0 0 -1 -1
+L 700 600 300 400 3 0 0 0 -1 -1
+L 300 800 300 400 3 0 0 0 -1 -1
+L 1000 600 700 600 3 0 0 0 -1 -1
+L 500 700 500 1000 4 10 0 0 -1 -1
+L 300 200 700 0 3 0 0 0 -1 -1
+L 300 200 700 400 3 0 0 0 -1 -1
+L 700 400 700 0 3 0 0 0 -1 -1
+P 100 200 300 200 4 0 0
+{
+T -598 235 5 10 0 1 0 0 1
+pinnumber=PAD_IN
+T 402 135 5 10 0 0 0 0 1
+pinseq=2
+}
+L 700 200 800 200 3 0 0 0 -1 -1
+L 800 600 800 200 3 0 0 0 -1 -1
+P 1200 600 1210 600 1 0 0
+{
+T 1805 645 5 10 0 1 0 6 1
+pinnumber=PAD
+T 1200 600 5 10 0 0 0 0 1
+pinseq=0
+}
+N 300 600 100 600 4
+{
+T 0 700 5 10 1 1 0 0 1
+netname=0
+}
Index: drawing/sym/cde_prescale_def.sym
===================================================================
--- drawing/sym/cde_prescale_def.sym (nonexistent)
+++ drawing/sym/cde_prescale_def.sym (revision 120)
@@ -0,0 +1,29 @@
+v 20100214 1
+B 300 0 2300 700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 850 5 10 1 1 0 0 1 1
+device=cde_prescale_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_prescale_def.sch
+T 400 1050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 2600 200 2900 200 4 0 1
+{
+T 2500 200 5 10 1 1 0 7 1 1
+pinnumber=prescale_out
+T 2500 200 5 10 0 1 0 7 1 1
+pinseq=3
+}
Index: drawing/sym/cde_jtag_rpc_in_reg.sym
===================================================================
--- drawing/sym/cde_jtag_rpc_in_reg.sym (nonexistent)
+++ drawing/sym/cde_jtag_rpc_in_reg.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 3100 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1850 5 10 1 1 0 0 1 1
+device=cde_jtag_rpc_in_reg
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_jtag_rpc_in_reg.sch
+T 400 2050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=capture_value[BITS-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=shift_dr
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=capture_dr
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=select
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=tdi
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 3400 200 3700 200 4 0 1
+{
+T 3300 200 5 10 1 1 0 7 1 1
+pinnumber=tdo
+T 3300 200 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_jtag_classic_rpc_in_reg.sym
===================================================================
--- drawing/sym/cde_jtag_classic_rpc_in_reg.sym (nonexistent)
+++ drawing/sym/cde_jtag_classic_rpc_in_reg.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 3100 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1850 5 10 1 1 0 0 1 1
+device=cde_jtag_classic_rpc_in_reg
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_jtag_classic_rpc_in_reg.sch
+T 400 2050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=capture_value[BITS-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=shift_dr
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=capture_dr
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=select
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=tdi
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=test_logic_reset
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=shiftcapture_dr_clk
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 3400 200 3700 200 4 0 1
+{
+T 3300 200 5 10 1 1 0 7 1 1
+pinnumber=tdo
+T 3300 200 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_mult_generic.sym
===================================================================
--- drawing/sym/cde_mult_generic.sym (nonexistent)
+++ drawing/sym/cde_mult_generic.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 4200 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1650 5 10 1 1 0 0 1 1
+device=cde_mult_generic
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_mult_generic.sch
+T 400 1850 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=ex_freeze
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=alu_op_mul
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=b_in[WIDTH-1:0]
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=a_in[WIDTH-1:0]
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 4500 200 4800 200 4 0 1
+{
+T 4400 200 5 10 1 1 0 7 1 1
+pinnumber=mul_stall
+T 4400 200 5 10 0 1 0 7 1 1
+pinseq=7
+}
+P 4500 400 4800 400 4 0 1
+{
+T 4400 400 5 10 1 1 0 7 1 1
+pinnumber=mul_prod_r[2*WIDTH-1:0]
+T 4400 400 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_clock_gater.sym
===================================================================
--- drawing/sym/cde_clock_gater.sym (nonexistent)
+++ drawing/sym/cde_clock_gater.sym (revision 120)
@@ -0,0 +1,36 @@
+v 20100214 1
+B 300 0 2500 900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1050 5 10 1 1 0 0 1 1
+device=cde_clock_gater
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_clock_gater.sch
+T 400 1250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=atg_clk_mode
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=clk_in
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=enable
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 2800 200 3100 200 4 0 1
+{
+T 2700 200 5 10 1 1 0 7 1 1
+pinnumber=clk_out
+T 2700 200 5 10 0 1 0 7 1 1
+pinseq=4
+}
Index: drawing/sym/cde_pad_in_dig.sym
===================================================================
--- drawing/sym/cde_pad_in_dig.sym (nonexistent)
+++ drawing/sym/cde_pad_in_dig.sym (revision 120)
@@ -0,0 +1,25 @@
+v 20110115 2
+T 1002 18 5 10 1 1 0 0 1
+device=cde_pad_in_dig
+T 1200 800 5 10 1 1 0 6 1
+refdes=P?
+B 1000 300 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1100 400 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 1000 500 700 500 3 0 0 0 -1 -1
+L 300 500 700 300 3 0 0 0 -1 -1
+L 300 500 700 700 3 0 0 0 -1 -1
+L 700 700 700 300 3 0 0 0 -1 -1
+P 100 500 300 500 4 0 0
+{
+T -598 535 5 10 0 1 0 0 1
+pinnumber=PAD_IN
+T 402 435 5 10 0 0 0 0 1
+pinseq=2
+}
+P 1200 500 1210 500 1 0 0
+{
+T 1805 545 5 10 0 1 0 6 1
+pinnumber=PAD
+T 1200 500 5 10 0 0 0 0 1
+pinseq=0
+}
Index: drawing/sym/cde_pad_se_dig.sym
===================================================================
--- drawing/sym/cde_pad_se_dig.sym (nonexistent)
+++ drawing/sym/cde_pad_se_dig.sym (revision 120)
@@ -0,0 +1,45 @@
+v 20110115 2
+P 0 600 200 600 4 0 0
+{
+T -798 635 5 10 0 1 0 0 1
+pinnumber=PAD_OUT
+T 302 535 5 10 0 0 0 0 1
+pinseq=1
+}
+P 0 1000 404 1000 4 0 0
+{
+T -798 1035 5 10 0 1 0 0 1
+pinnumber=PAD_OE
+T 302 935 5 10 0 0 0 0 1
+pinseq=3
+}
+T 902 118 5 10 1 1 0 0 1
+device=CDE_PAD_SE_DIG
+T 1100 900 5 10 1 1 0 6 1
+refdes=P?
+B 900 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1000 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 600 600 200 800 3 0 0 0 -1 -1
+L 600 600 200 400 3 0 0 0 -1 -1
+L 200 800 200 400 3 0 0 0 -1 -1
+L 900 600 600 600 3 0 0 0 -1 -1
+L 400 700 400 1000 4 10 0 0 -1 -1
+L 200 200 600 0 3 0 0 0 -1 -1
+L 200 200 600 400 3 0 0 0 -1 -1
+L 600 400 600 0 3 0 0 0 -1 -1
+P 0 200 200 200 4 0 0
+{
+T -698 235 5 10 0 1 0 0 1
+pinnumber=PAD_IN
+T 302 135 5 10 0 0 0 0 1
+pinseq=2
+}
+L 600 200 700 200 3 0 0 0 -1 -1
+L 700 600 700 200 3 0 0 0 -1 -1
+P 1100 600 1110 600 1 1 0
+{
+T 1705 645 5 10 0 1 0 6 1
+pinnumber=PAD
+T 1100 600 5 10 0 0 0 0 1
+pinseq=0
+}
Index: drawing/sym/cde_mult_serial.sym
===================================================================
--- drawing/sym/cde_mult_serial.sym (nonexistent)
+++ drawing/sym/cde_mult_serial.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 4200 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1650 5 10 1 1 0 0 1 1
+device=cde_mult_serial
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_mult_serial.sch
+T 400 1850 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=ex_freeze
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=alu_op_mul
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=b_in[WIDTH-1:0]
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=a_in[WIDTH-1:0]
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 4500 200 4800 200 4 0 1
+{
+T 4400 200 5 10 1 1 0 7 1 1
+pinnumber=mul_stall
+T 4400 200 5 10 0 1 0 7 1 1
+pinseq=7
+}
+P 4500 400 4800 400 4 0 1
+{
+T 4400 400 5 10 1 1 0 7 1 1
+pinnumber=mul_prod_r[2*WIDTH-1:0]
+T 4400 400 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_serial_xmit.sym
===================================================================
--- drawing/sym/cde_serial_xmit.sym (nonexistent)
+++ drawing/sym/cde_serial_xmit.sym (revision 120)
@@ -0,0 +1,92 @@
+v 20100214 1
+B 300 0 3200 2300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 2450 5 10 1 1 0 0 1 1
+device=cde_serial_xmit
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_serial_xmit.sch
+T 400 2650 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=data[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=stop_value
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=start_value
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=load
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=parity_force
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=parity_type
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=parity_enable
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 300 1600 0 1600 4 0 1
+{
+T 400 1600 5 10 1 1 0 1 1 1
+pinnumber=edge_enable
+T 400 1600 5 10 0 1 0 1 1 1
+pinseq=8
+}
+P 300 1800 0 1800 4 0 1
+{
+T 400 1800 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1800 5 10 0 1 0 1 1 1
+pinseq=9
+}
+P 300 2000 0 2000 4 0 1
+{
+T 400 2000 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 2000 5 10 0 1 0 1 1 1
+pinseq=10
+}
+P 3500 200 3800 200 4 0 1
+{
+T 3400 200 5 10 1 1 0 7 1 1
+pinnumber=ser_out
+T 3400 200 5 10 0 1 0 7 1 1
+pinseq=11
+}
+P 3500 400 3800 400 4 0 1
+{
+T 3400 400 5 10 1 1 0 7 1 1
+pinnumber=buffer_empty
+T 3400 400 5 10 0 1 0 7 1 1
+pinseq=12
+}
Index: drawing/sym/cde_clock_testmux.sym
===================================================================
--- drawing/sym/cde_clock_testmux.sym (nonexistent)
+++ drawing/sym/cde_clock_testmux.sym (revision 120)
@@ -0,0 +1,36 @@
+v 20100214 1
+B 300 0 1800 900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1050 5 10 1 1 0 0 1 1
+device=cde_clock_testmux
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_clock_testmux.sch
+T 400 1250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=clk_1
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=clk_0
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=sel
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 2100 200 2400 200 4 0 1
+{
+T 2000 200 5 10 1 1 0 7 1 1
+pinnumber=clk_out
+T 2000 200 5 10 0 1 0 7 1 1
+pinseq=4
+}
Index: drawing/sym/cde_sram_dp.sym
===================================================================
--- drawing/sym/cde_sram_dp.sym (nonexistent)
+++ drawing/sym/cde_sram_dp.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 3600 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1850 5 10 1 1 0 0 1 1
+device=cde_sram_dp
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sram_dp.sch
+T 400 2050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=wdata[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=raddr[ADDR-1:0]
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=waddr[ADDR-1:0]
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=rd
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=wr
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=cs
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 3900 200 4200 200 4 0 1
+{
+T 3800 200 5 10 1 1 0 7 1 1
+pinnumber=rdata[WIDTH-1:0]
+T 3800 200 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sym/cde_jtag_rpc_reg.sym
===================================================================
--- drawing/sym/cde_jtag_rpc_reg.sym (nonexistent)
+++ drawing/sym/cde_jtag_rpc_reg.sym (revision 120)
@@ -0,0 +1,78 @@
+v 20100214 1
+B 300 0 4900 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 2050 5 10 1 1 0 0 1 1
+device=cde_jtag_rpc_reg
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_jtag_rpc_reg.sch
+T 400 2250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=capture_value[BITS-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=shift_dr
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=capture_dr
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=update_dr
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=select
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=tdi
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 300 1600 0 1600 4 0 1
+{
+T 400 1600 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1600 5 10 0 1 0 1 1 1
+pinseq=8
+}
+P 5200 200 5500 200 4 0 1
+{
+T 5100 200 5 10 1 1 0 7 1 1
+pinnumber=update_value[BITS-1:0]
+T 5100 200 5 10 0 1 0 7 1 1
+pinseq=9
+}
+P 5200 400 5500 400 4 0 1
+{
+T 5100 400 5 10 1 1 0 7 1 1
+pinnumber=tdo
+T 5100 400 5 10 0 1 0 7 1 1
+pinseq=10
+}
Index: drawing/sym/cde_sync_with_hysteresis.sym
===================================================================
--- drawing/sym/cde_sync_with_hysteresis.sym (nonexistent)
+++ drawing/sym/cde_sync_with_hysteresis.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20100214 1
+B 300 0 4200 900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1050 5 10 1 1 0 0 1 1
+device=cde_sync_with_hysteresis
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sync_with_hysteresis.sch
+T 400 1250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=data_in[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 4500 200 4800 200 4 0 1
+{
+T 4400 200 5 10 1 1 0 7 1 1
+pinnumber=data_fall[WIDTH-1:0]
+T 4400 200 5 10 0 1 0 7 1 1
+pinseq=4
+}
+P 4500 400 4800 400 4 0 1
+{
+T 4400 400 5 10 1 1 0 7 1 1
+pinnumber=data_rise[WIDTH-1:0]
+T 4400 400 5 10 0 1 0 7 1 1
+pinseq=5
+}
+P 4500 600 4800 600 4 0 1
+{
+T 4400 600 5 10 1 1 0 7 1 1
+pinnumber=data_out[WIDTH-1:0]
+T 4400 600 5 10 0 1 0 7 1 1
+pinseq=6
+}
Index: drawing/sym/cde_sync_def.sym
===================================================================
--- drawing/sym/cde_sync_def.sym (nonexistent)
+++ drawing/sym/cde_sync_def.sym (revision 120)
@@ -0,0 +1,29 @@
+v 20100214 1
+B 300 0 4100 700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 850 5 10 1 1 0 0 1 1
+device=cde_sync_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sync_def.sch
+T 400 1050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=data_in[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 4400 200 4700 200 4 0 1
+{
+T 4300 200 5 10 1 1 0 7 1 1
+pinnumber=data_out[WIDTH-1:0]
+T 4300 200 5 10 0 1 0 7 1 1
+pinseq=3
+}
Index: drawing/sym/cde_clock_multiplier.sym
===================================================================
--- drawing/sym/cde_clock_multiplier.sym (nonexistent)
+++ drawing/sym/cde_clock_multiplier.sym (revision 120)
@@ -0,0 +1,22 @@
+v 20100214 1
+B 300 0 2000 500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 650 5 10 1 1 0 0 1 1
+device=cde_clock_multiplier
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_clock_multiplier.sch
+T 400 850 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=clk_ref
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 2300 200 2600 200 4 0 1
+{
+T 2200 200 5 10 1 1 0 7 1 1
+pinnumber=clk_out
+T 2200 200 5 10 0 1 0 7 1 1
+pinseq=2
+}
Index: drawing/sym/cde_fifo_def.sym
===================================================================
--- drawing/sym/cde_fifo_def.sym (nonexistent)
+++ drawing/sym/cde_fifo_def.sym (revision 120)
@@ -0,0 +1,78 @@
+v 20100214 1
+B 300 0 3300 1300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1450 5 10 1 1 0 0 1 1
+device=cde_fifo_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_fifo_def.sch
+T 400 1650 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=din[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=pop
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=push
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 3600 200 3900 200 4 0 1
+{
+T 3500 200 5 10 1 1 0 7 1 1
+pinnumber=under_run
+T 3500 200 5 10 0 1 0 7 1 1
+pinseq=6
+}
+P 3600 400 3900 400 4 0 1
+{
+T 3500 400 5 10 1 1 0 7 1 1
+pinnumber=over_run
+T 3500 400 5 10 0 1 0 7 1 1
+pinseq=7
+}
+P 3600 600 3900 600 4 0 1
+{
+T 3500 600 5 10 1 1 0 7 1 1
+pinnumber=empty
+T 3500 600 5 10 0 1 0 7 1 1
+pinseq=8
+}
+P 3600 800 3900 800 4 0 1
+{
+T 3500 800 5 10 1 1 0 7 1 1
+pinnumber=full
+T 3500 800 5 10 0 1 0 7 1 1
+pinseq=9
+}
+P 3600 1000 3900 1000 4 0 1
+{
+T 3500 1000 5 10 1 1 0 7 1 1
+pinnumber=dout[WIDTH-1:0]
+T 3500 1000 5 10 0 1 0 7 1 1
+pinseq=10
+}
Index: drawing/sym/cde_reset_asyncdisable.sym
===================================================================
--- drawing/sym/cde_reset_asyncdisable.sym (nonexistent)
+++ drawing/sym/cde_reset_asyncdisable.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20100214 1
+B 300 0 4700 1100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1250 5 10 1 1 0 0 1 1
+device=cde_reset_asyncdisable
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_reset_asyncdisable.sch
+T 400 1450 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=sync_reset[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=atg_asyncdisable
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=reset_n
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 5000 200 5300 200 4 0 1
+{
+T 4900 200 5 10 1 1 0 7 1 1
+pinnumber=reset_out[WIDTH-1:0]
+T 4900 200 5 10 0 1 0 7 1 1
+pinseq=5
+}
+P 5000 400 5300 400 4 0 1
+{
+T 4900 400 5 10 1 1 0 7 1 1
+pinnumber=reset_n_out[WIDTH-1:0]
+T 4900 400 5 10 0 1 0 7 1 1
+pinseq=6
+}
Index: drawing/sym/cde_divider_def.sym
===================================================================
--- drawing/sym/cde_divider_def.sym (nonexistent)
+++ drawing/sym/cde_divider_def.sym (revision 120)
@@ -0,0 +1,43 @@
+v 20100214 1
+B 300 0 3600 1100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1250 5 10 1 1 0 0 1 1
+device=cde_divider_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_divider_def.sch
+T 400 1450 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=divider_in[SIZE-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=enable
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 3900 200 4200 200 4 0 1
+{
+T 3800 200 5 10 1 1 0 7 1 1
+pinnumber=divider_out
+T 3800 200 5 10 0 1 0 7 1 1
+pinseq=5
+}
Index: drawing/sym/cde_lifo_def.sym
===================================================================
--- drawing/sym/cde_lifo_def.sym (nonexistent)
+++ drawing/sym/cde_lifo_def.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20100214 1
+B 300 0 3300 1300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1450 5 10 1 1 0 0 1 1
+device=cde_lifo_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_lifo_def.sch
+T 400 1650 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=din[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=pop
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=push
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 3600 200 3900 200 4 0 1
+{
+T 3500 200 5 10 1 1 0 7 1 1
+pinnumber=dout[WIDTH-1:0]
+T 3500 200 5 10 0 1 0 7 1 1
+pinseq=6
+}
Index: drawing/sym/cde_sync_with_reset.sym
===================================================================
--- drawing/sym/cde_sync_with_reset.sym (nonexistent)
+++ drawing/sym/cde_sync_with_reset.sym (revision 120)
@@ -0,0 +1,36 @@
+v 20100214 1
+B 300 0 4100 900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1050 5 10 1 1 0 0 1 1
+device=cde_sync_with_reset
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sync_with_reset.sch
+T 400 1250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=data_in[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=reset_n
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 4400 200 4700 200 4 0 1
+{
+T 4300 200 5 10 1 1 0 7 1 1
+pinnumber=data_out[WIDTH-1:0]
+T 4300 200 5 10 0 1 0 7 1 1
+pinseq=4
+}
Index: drawing/sym/cde_serial_rcvr.sym
===================================================================
--- drawing/sym/cde_serial_rcvr.sym (nonexistent)
+++ drawing/sym/cde_serial_rcvr.sym (revision 120)
@@ -0,0 +1,106 @@
+v 20100214 1
+B 300 0 4100 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 2050 5 10 1 1 0 0 1 1
+device=cde_serial_rcvr
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_serial_rcvr.sch
+T 400 2250 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=stop_value
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=parity_force
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=ser_in
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=parity_type
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=parity_enable
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=edge_enable
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 300 1400 0 1400 4 0 1
+{
+T 400 1400 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1400 5 10 0 1 0 1 1 1
+pinseq=7
+}
+P 300 1600 0 1600 4 0 1
+{
+T 400 1600 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1600 5 10 0 1 0 1 1 1
+pinseq=8
+}
+P 4400 200 4700 200 4 0 1
+{
+T 4300 200 5 10 1 1 0 7 1 1
+pinnumber=frame_err
+T 4300 200 5 10 0 1 0 7 1 1
+pinseq=9
+}
+P 4400 400 4700 400 4 0 1
+{
+T 4300 400 5 10 1 1 0 7 1 1
+pinnumber=parity_samp
+T 4300 400 5 10 0 1 0 7 1 1
+pinseq=10
+}
+P 4400 600 4700 600 4 0 1
+{
+T 4300 600 5 10 1 1 0 7 1 1
+pinnumber=parity_calc
+T 4300 600 5 10 0 1 0 7 1 1
+pinseq=11
+}
+P 4400 800 4700 800 4 0 1
+{
+T 4300 800 5 10 1 1 0 7 1 1
+pinnumber=last_cnt
+T 4300 800 5 10 0 1 0 7 1 1
+pinseq=12
+}
+P 4400 1000 4700 1000 4 0 1
+{
+T 4300 1000 5 10 1 1 0 7 1 1
+pinnumber=stop_cnt
+T 4300 1000 5 10 0 1 0 7 1 1
+pinseq=13
+}
+P 4400 1200 4700 1200 4 0 1
+{
+T 4300 1200 5 10 1 1 0 7 1 1
+pinnumber=shift_buffer[WIDTH-1:0]
+T 4300 1200 5 10 0 1 0 7 1 1
+pinseq=14
+}
Index: drawing/sym/cde_clock_diff_testmux.sym
===================================================================
--- drawing/sym/cde_clock_diff_testmux.sym (nonexistent)
+++ drawing/sym/cde_clock_diff_testmux.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20100214 1
+B 300 0 2200 1100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1250 5 10 1 1 0 0 1 1
+device=cde_clock_diff_testmux
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_clock_diff_testmux.sch
+T 400 1450 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=clk_1
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=clk_0_n
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=clk_0
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=sel
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 2500 200 2800 200 4 0 1
+{
+T 2400 200 5 10 1 1 0 7 1 1
+pinnumber=clk_out_n
+T 2400 200 5 10 0 1 0 7 1 1
+pinseq=5
+}
+P 2500 400 2800 400 4 0 1
+{
+T 2400 400 5 10 1 1 0 7 1 1
+pinnumber=clk_out
+T 2400 400 5 10 0 1 0 7 1 1
+pinseq=6
+}
Index: drawing/sym/cde_pad_out_dig.sym
===================================================================
--- drawing/sym/cde_pad_out_dig.sym (nonexistent)
+++ drawing/sym/cde_pad_out_dig.sym (revision 120)
@@ -0,0 +1,25 @@
+v 20110115 2
+P 0 600 200 600 4 0 0
+{
+T -798 635 5 10 0 1 0 0 1
+pinnumber=PAD_OUT
+T 302 535 5 10 0 0 0 0 1
+pinseq=1
+}
+T 902 118 5 10 1 1 0 0 1
+device=cde_pad_out_dig
+T 1100 900 5 10 1 1 0 6 1
+refdes=P?
+B 900 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1000 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 600 600 200 800 3 0 0 0 -1 -1
+L 600 600 200 400 3 0 0 0 -1 -1
+L 200 800 200 400 3 0 0 0 -1 -1
+L 900 600 600 600 3 0 0 0 -1 -1
+P 1100 600 1110 600 1 0 0
+{
+T 1705 645 5 10 0 1 0 6 1
+pinnumber=PAD
+T 1100 600 5 10 0 0 0 0 1
+pinseq=0
+}
Index: drawing/sym/cde_sram_def.sym
===================================================================
--- drawing/sym/cde_sram_def.sym (nonexistent)
+++ drawing/sym/cde_sram_def.sym (revision 120)
@@ -0,0 +1,57 @@
+v 20100214 1
+B 300 0 3600 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1650 5 10 1 1 0 0 1 1
+device=cde_sram_def
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_sram_def.sch
+T 400 1850 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=wdata[WIDTH-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=addr[ADDR-1:0]
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=rd
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=wr
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=cs
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 3900 200 4200 200 4 0 1
+{
+T 3800 200 5 10 1 1 0 7 1 1
+pinnumber=rdata[WIDTH-1:0]
+T 3800 200 5 10 0 1 0 7 1 1
+pinseq=7
+}
Index: drawing/sym/io_pad.sym
===================================================================
--- drawing/sym/io_pad.sym (nonexistent)
+++ drawing/sym/io_pad.sym (revision 120)
@@ -0,0 +1,45 @@
+v 20110115 2
+P 800 600 1000 600 4 0 0
+{
+T 2 635 5 10 1 1 0 0 1
+pinnumber=PAD_OUT
+T 1102 535 5 10 0 0 0 0 1
+pinseq=1
+}
+P 800 1000 1204 1000 4 0 0
+{
+T 2 1035 5 10 1 1 0 0 1
+pinnumber=PAD_OE
+T 1102 935 5 10 0 0 0 0 1
+pinseq=3
+}
+T 1702 118 5 10 1 1 0 0 1
+device=CDE_PAD_SE_DIG
+T 1900 900 5 10 1 1 0 6 1
+refdes=P?
+B 1700 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 1800 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 1400 600 1000 800 3 0 0 0 -1 -1
+L 1400 600 1000 400 3 0 0 0 -1 -1
+L 1000 800 1000 400 3 0 0 0 -1 -1
+L 1700 600 1400 600 3 0 0 0 -1 -1
+L 1200 700 1200 1000 4 10 0 0 -1 -1
+L 1000 200 1400 0 3 0 0 0 -1 -1
+L 1000 200 1400 400 3 0 0 0 -1 -1
+L 1400 400 1400 0 3 0 0 0 -1 -1
+P 800 200 1000 200 4 0 0
+{
+T 102 235 5 10 1 1 0 0 1
+pinnumber=PAD_IN
+T 1102 135 5 10 0 0 0 0 1
+pinseq=2
+}
+L 1400 200 1500 200 3 0 0 0 -1 -1
+L 1500 600 1500 200 3 0 0 0 -1 -1
+P 1900 600 1910 600 1 0 0
+{
+T 2505 645 5 10 1 1 0 6 1
+pinnumber=PAD
+T 1900 600 5 10 0 0 0 0 1
+pinseq=0
+}
Index: drawing/sym/cde_jtag_classic_rpc_reg.sym
===================================================================
--- drawing/sym/cde_jtag_classic_rpc_reg.sym (nonexistent)
+++ drawing/sym/cde_jtag_classic_rpc_reg.sym (revision 120)
@@ -0,0 +1,29 @@
+v 20100214 1
+B 300 0 4900 700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 850 5 10 1 1 0 0 1 1
+device=cde_jtag_classic_rpc_reg
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_jtag_classic_rpc_reg.sch
+T 400 1050 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=capture_value[BITS-1:0]
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 10 1 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=jtag__jtag
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 5200 200 5500 200 4 0 1
+{
+T 5100 200 5 10 1 1 0 7 1 1
+pinnumber=update_value[BITS-1:0]
+T 5100 200 5 10 0 1 0 7 1 1
+pinseq=3
+}
Index: drawing/sym/cde_clock_sys.sym
===================================================================
--- drawing/sym/cde_clock_sys.sym (nonexistent)
+++ drawing/sym/cde_clock_sys.sym (revision 120)
@@ -0,0 +1,50 @@
+v 20110115 2
+B 300 0 2900 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1650 5 10 1 1 0 0 1
+device=cde_clock_sys
+T 400 -300 5 10 0 1 0 0 1
+source=cde_clock_sys.sch
+T 400 1850 8 10 1 1 0 0 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1
+pinnumber=pwron_pad_in
+T 400 200 5 10 0 1 0 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1
+pinnumber=b_clk_pad_in
+T 400 400 5 10 0 1 0 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1
+pinnumber=a_clk_pad_in
+T 400 600 5 10 0 1 0 1 1
+pinseq=3
+}
+P 3200 400 3500 400 4 0 1
+{
+T 3100 400 5 10 1 1 0 7 1
+pinnumber=reset
+T 3100 400 5 10 0 1 0 7 1
+pinseq=4
+}
+P 3200 700 3500 700 4 0 1
+{
+T 3100 700 5 10 1 1 0 7 1
+pinnumber=one_usec
+T 3100 700 5 10 0 1 0 7 1
+pinseq=5
+}
+P 3200 1000 3500 1000 4 0 1
+{
+T 3100 1000 5 10 1 1 0 7 1
+pinnumber=div_clk_out
+T 3100 1000 5 10 0 1 0 7 1
+pinseq=6
+}
Index: drawing/sym/cde_mult_ord_r4.sym
===================================================================
--- drawing/sym/cde_mult_ord_r4.sym (nonexistent)
+++ drawing/sym/cde_mult_ord_r4.sym (revision 120)
@@ -0,0 +1,64 @@
+v 20100214 1
+B 300 0 4200 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1650 5 10 1 1 0 0 1 1
+device=cde_mult_ord_r4
+T 400 -300 5 10 0 1 0 0 1 1
+source=cde_mult_ord_r4.sch
+T 400 1850 8 10 1 1 0 0 1 1
+refdes=U?
+P 300 200 0 200 4 0 1
+{
+T 400 200 5 10 1 1 0 1 1 1
+pinnumber=ex_freeze
+T 400 200 5 10 0 1 0 1 1 1
+pinseq=1
+}
+P 300 400 0 400 4 0 1
+{
+T 400 400 5 10 1 1 0 1 1 1
+pinnumber=alu_op_mul
+T 400 400 5 10 0 1 0 1 1 1
+pinseq=2
+}
+P 300 600 0 600 4 0 1
+{
+T 400 600 5 10 1 1 0 1 1 1
+pinnumber=b_in[WIDTH-1:0]
+T 400 600 5 10 0 1 0 1 1 1
+pinseq=3
+}
+P 300 800 0 800 4 0 1
+{
+T 400 800 5 10 1 1 0 1 1 1
+pinnumber=a_in[WIDTH-1:0]
+T 400 800 5 10 0 1 0 1 1 1
+pinseq=4
+}
+P 300 1000 0 1000 4 0 1
+{
+T 400 1000 5 10 1 1 0 1 1 1
+pinnumber=reset
+T 400 1000 5 10 0 1 0 1 1 1
+pinseq=5
+}
+P 300 1200 0 1200 4 0 1
+{
+T 400 1200 5 10 1 1 0 1 1 1
+pinnumber=clk
+T 400 1200 5 10 0 1 0 1 1 1
+pinseq=6
+}
+P 4500 200 4800 200 4 0 1
+{
+T 4400 200 5 10 1 1 0 7 1 1
+pinnumber=mul_stall
+T 4400 200 5 10 0 1 0 7 1 1
+pinseq=7
+}
+P 4500 400 4800 400 4 0 1
+{
+T 4400 400 5 10 1 1 0 7 1 1
+pinnumber=mul_prod_r[2*WIDTH-1:0]
+T 4400 400 5 10 0 1 0 7 1 1
+pinseq=8
+}
Index: drawing/sch/Busdef_guide_1.sch
===================================================================
--- drawing/sch/Busdef_guide_1.sch (nonexistent)
+++ drawing/sch/Busdef_guide_1.sch (revision 120)
@@ -0,0 +1,48 @@
+v 20110115 2
+C 4500 6100 1 0 0 frame_800x600.sym
+T 5600 9700 9 10 1 0 0 0 1
+.FOO_1_PHY(FOO_1_LOG)
+B 4500 6100 3400 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 6100 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 8600 5800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4600 10600 9 10 1 0 0 0 2
+CMP_2
+U1
+T 4600 12000 9 10 1 0 0 0 1
+CMP_1
+T 4600 9700 9 10 1 0 0 0 2
+CMP_3
+U2
+T 4800 7500 9 10 1 0 0 0 6
+busInterface
+name FOO_1
+abstractor VLNV
+Port
+logical LOG
+physical FOO_1_PHY
+L 6700 9900 6700 10600 3 0 0 0 -1 -1
+L 6700 10600 6600 10400 3 0 0 0 -1 -1
+L 6700 10600 6800 10400 3 0 0 0 -1 -1
+T 5600 10700 9 10 1 0 0 0 1
+.FOO_1_LOG(FOO_1_LOG)
+T 5600 12000 9 10 1 0 0 0 1
+.FOO_1_LOG()
+L 6700 10900 6700 11900 3 0 0 0 -1 -1
+L 6700 11900 6600 11700 3 0 0 0 -1 -1
+L 6700 11900 6800 11700 3 0 0 0 -1 -1
+T 8300 7600 9 10 1 0 0 0 4
+hierConnection
+name FOO_1
+compinstance U2
+busRef FOO_1
+T 11000 7600 9 10 1 0 0 0 4
+hierConnection
+name FOO_1
+compinstance U1
+busRef FOO_1
+T 4700 6200 9 10 1 0 0 0 1
+LEAF CELL
+T 8200 6200 9 10 1 0 0 0 1
+HIER LEVEL
+T 10900 6200 9 10 1 0 0 0 1
+HIER LEVEL
Index: drawing/sch/Busdef_guide_2.sch
===================================================================
--- drawing/sch/Busdef_guide_2.sch (nonexistent)
+++ drawing/sch/Busdef_guide_2.sch (revision 120)
@@ -0,0 +1,48 @@
+v 20110115 2
+C 4500 6100 1 0 0 frame_800x600.sym
+T 5600 9700 9 10 1 0 0 0 1
+.FOO_1_PHY(U2_FOO_1_LOG)
+B 4500 6100 3400 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 6100 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 8600 5800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4600 10700 9 10 1 0 0 0 2
+CMP_2
+U1
+T 4600 12000 9 10 1 0 0 0 1
+CMP_1
+T 4600 9700 9 10 1 0 0 0 2
+CMP_3
+U2
+T 4800 7500 9 10 1 0 0 0 6
+busInterface
+name FOO_1
+abstractor VLNV
+Port
+logical LOG
+physical FOO_1_PHY
+L 6700 9900 6700 10600 3 0 0 0 -1 -1
+L 6700 10600 6600 10400 3 0 0 0 -1 -1
+L 6700 10600 6800 10400 3 0 0 0 -1 -1
+T 5600 10700 9 10 1 0 0 0 1
+.U2_FOO_1_LOG(U1_U2_FOO_1_LOG)
+T 5600 12000 9 10 1 0 0 0 1
+.U1_U2_FOO_1_LOG()
+L 6700 10900 6700 11900 3 0 0 0 -1 -1
+L 6700 11900 6600 11700 3 0 0 0 -1 -1
+L 6700 11900 6800 11700 3 0 0 0 -1 -1
+T 8300 7600 9 10 1 0 0 0 4
+hierConnection
+name U2_FOO_1
+compinstance U2
+busRef FOO_1
+T 10700 7600 9 10 1 0 0 0 4
+hierConnection
+name U1_U2_FOO_1
+compinstance U1
+busRef U2_FOO_1
+T 4700 6200 9 10 1 0 0 0 1
+LEAF CELL
+T 8200 6200 9 10 1 0 0 0 1
+HIER LEVEL
+T 10900 6200 9 10 1 0 0 0 1
+HIER LEVEL
Index: drawing/sch/Busdef_guide_3.sch
===================================================================
--- drawing/sch/Busdef_guide_3.sch (nonexistent)
+++ drawing/sch/Busdef_guide_3.sch (revision 120)
@@ -0,0 +1,68 @@
+v 20110115 2
+C 4500 6100 1 0 0 frame_800x600.sym
+T 5600 9700 9 10 1 0 0 0 1
+.FOO_1_PHY(FOO_1_PHY)
+B 4500 6100 3400 3500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 6100 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 4500 6100 8600 5800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4600 10600 9 10 1 0 0 0 2
+CMP_2
+U1
+T 4600 12000 9 10 1 0 0 0 1
+CMP_1
+T 4600 9700 9 10 1 0 0 0 2
+CMP_3
+U2
+T 4800 8300 9 10 1 0 0 0 6
+busInterface
+name FOO_1
+abstractor VLNV
+Port
+logical LOG
+physical FOO_1_PHY
+L 6700 9900 6700 10600 3 0 0 0 -1 -1
+L 6700 10600 6600 10400 3 0 0 0 -1 -1
+L 6700 10600 6800 10400 3 0 0 0 -1 -1
+L 6700 10900 6700 11900 3 0 0 0 -1 -1
+L 6700 11900 6600 11700 3 0 0 0 -1 -1
+L 6700 11900 6800 11700 3 0 0 0 -1 -1
+T 8300 7300 9 10 1 0 0 0 8
+interconnection
+name FOO_1
+compinstance U2
+busRef FOO_1
+portmap
+logical LOG
+physical FOO_1_PHY
+
+T 4700 6200 9 10 1 0 0 0 1
+LEAF CELL
+T 8200 6200 9 10 1 0 0 0 1
+HIER LEVEL
+T 10900 6200 9 10 1 0 0 0 1
+HIER LEVEL
+T 8300 9300 9 10 1 0 0 0 5
+busInterface
+name FOO_1
+abstractor VLNV
+Port logical LOG
+physical FOO_1_PHY
+T 10800 9400 9 10 1 0 0 0 5
+busInterface
+name FOO_1
+abstractor VLNV
+Port logical LOG
+physical FOO_1_PHY
+T 5700 10700 9 10 1 0 0 0 1
+.FOO_1_PHY(FOO_1_PHY)
+T 5700 12000 9 10 1 0 0 0 1
+.FOO_1_PHY()
+T 10800 7300 9 10 1 0 0 0 8
+interconnection
+name FOO_1
+compinstance U1
+busRef FOO_1
+portmap
+logical LOG
+physical FOO_1_PHY
+
Index: drawing/sch/um-100_cde_sram_be_sym.sch
===================================================================
--- drawing/sch/um-100_cde_sram_be_sym.sch (nonexistent)
+++ drawing/sch/um-100_cde_sram_be_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 49300 44400 1 0 0 cde_sram_be.sym
+{
+T 49700 46250 5 10 1 1 0 0 1
+device=cde_sram_be
+T 49700 46450 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/um-100_cde_sram_def_sym.sch
===================================================================
--- drawing/sch/um-100_cde_sram_def_sym.sch (nonexistent)
+++ drawing/sch/um-100_cde_sram_def_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 49200 44500 1 0 0 cde_sram_def.sym
+{
+T 49600 46350 5 10 1 1 0 0 1
+device=cde_sram_def
+T 49600 46550 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/um-100_cde_sram_dp_sym.sch
===================================================================
--- drawing/sch/um-100_cde_sram_dp_sym.sch (nonexistent)
+++ drawing/sch/um-100_cde_sram_dp_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 49300 44300 1 0 0 cde_sram_dp.sym
+{
+T 49700 46150 5 10 1 1 0 0 1
+device=cde_sram_dp
+T 49700 46350 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/um-150_cde_reset_sym.sch
===================================================================
--- drawing/sch/um-150_cde_reset_sym.sch (nonexistent)
+++ drawing/sch/um-150_cde_reset_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 48400 44900 1 0 0 cde_reset_def.sym
+{
+T 48800 46150 5 10 1 1 0 0 1
+device=cde_reset_def
+T 48800 46350 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/cde_pad_out_dig.sch
===================================================================
--- drawing/sch/cde_pad_out_dig.sch (nonexistent)
+++ drawing/sch/cde_pad_out_dig.sch (revision 120)
@@ -0,0 +1,21 @@
+v 20110115 2
+C 4100 2600 1 0 0 in_port.sym
+{
+T 4100 2600 5 10 1 1 0 6 1
+refdes=pad_out
+}
+C 7900 2600 1 0 1 io_port_v.sym
+{
+T 7900 2600 5 10 1 1 0 0 1
+refdes=PAD
+}
+N 5300 2700 5000 2700 4
+U 6900 2700 6400 2700 10 0
+B 2800 600 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 5300 2100 1 0 0 cde_pad_out_dig.sym
+{
+T 6202 2218 5 10 1 1 0 0 1
+device=cde_pad_out_dig
+T 6400 3000 5 10 1 1 0 6 1
+refdes=P?
+}
Index: drawing/sch/um-150_cde_jtag_rpc_sym.sch
===================================================================
--- drawing/sch/um-150_cde_jtag_rpc_sym.sch (nonexistent)
+++ drawing/sch/um-150_cde_jtag_rpc_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 48200 44600 1 0 0 cde_jtag_rpc_reg.sym
+{
+T 48600 46650 5 10 1 1 0 0 1
+device=cde_jtag_rpc_reg
+T 48600 46850 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/fund_reset_fig1.sch
===================================================================
--- drawing/sch/fund_reset_fig1.sch (nonexistent)
+++ drawing/sch/fund_reset_fig1.sch (revision 120)
@@ -0,0 +1,275 @@
+v 20110115 2
+C 56000 51800 1 0 0 reg_rst.sym
+{
+T 57800 53600 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 57300 53800 5 10 1 1 0 6 1
+refdes=U?
+}
+B 56000 48800 1300 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 62400 49000 9 10 1 0 0 0 2
+ACTIVE LOW
+RESET
+B 53200 41500 21200 13100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54600 45600 1 0 0 high-1.sym
+{
+T 54900 45900 5 10 0 1 0 0 1
+device=HIGH
+T 54800 45800 5 10 1 1 0 0 1
+refdes=H?
+}
+C 56100 43400 1 0 0 low-1.sym
+{
+T 56500 43400 5 10 0 1 0 0 1
+device=LOW
+T 56400 43600 5 10 1 1 0 0 1
+refdes=G?
+}
+C 53800 49900 1 0 0 pullup-1.sym
+{
+T 54000 50000 5 10 1 1 0 0 1
+refdes=H?
+}
+C 53800 50700 1 0 0 pulldown-1.sym
+{
+T 54000 50800 5 10 1 1 0 0 1
+refdes=G?
+}
+C 54400 51500 1 0 0 ipad-1.sym
+{
+T 54484 51721 5 10 0 1 0 0 1
+device=IPAD
+T 54400 51800 5 10 1 1 0 0 1
+refdes=TRST_n
+}
+N 53900 51000 53900 51600 4
+N 53900 51600 54400 51600 4
+N 55300 51600 56800 51600 4
+N 56800 51600 56800 51800 4
+C 54500 49500 1 0 0 ipad-1.sym
+{
+T 54584 49721 5 10 0 1 0 0 1
+device=IPAD
+T 54500 49800 5 10 1 1 0 0 1
+refdes=CLK_RST_n
+}
+N 55400 49600 56000 49600 4
+N 53900 49200 53900 49900 4
+N 53900 49600 54500 49600 4
+T 56100 49300 9 10 1 0 0 0 3
+Metastable
+ filter
+ inv
+C 56500 43700 1 90 0 asic-cap-2.sym
+{
+T 56100 44700 5 8 0 0 90 0 1
+device=CAPACITOR
+T 56100 43800 5 10 1 1 90 0 1
+refdes=C?
+T 56100 44300 5 10 1 1 90 0 1
+value=1n
+}
+C 54100 48300 1 90 0 asic-cap-2.sym
+{
+T 53700 49300 5 8 0 0 90 0 1
+device=CAPACITOR
+T 53700 48400 5 10 1 1 90 0 1
+refdes=C?
+T 53700 48900 5 10 1 1 90 0 1
+value=1n
+}
+C 53700 48000 1 0 0 low-1.sym
+{
+T 54100 48000 5 10 0 1 0 0 1
+device=LOW
+T 54000 48200 5 10 1 1 0 0 1
+refdes=G?
+}
+C 56200 45300 1 0 0 pullup-1.sym
+{
+T 56400 45400 5 10 1 1 0 0 1
+refdes=H?
+}
+N 56300 44600 56300 45300 4
+N 56300 45000 57200 45000 4
+C 57200 44900 1 0 0 ipad-1.sym
+{
+T 57284 45121 5 10 0 1 0 0 1
+device=IPAD
+T 57200 45200 5 10 1 1 0 0 1
+refdes=PWR_ON
+}
+C 58200 49600 1 0 0 or2-1.sym
+{
+T 58600 49500 5 10 1 1 0 2 1
+refdes=U?
+T 58600 49700 5 8 0 0 0 0 1
+device=or
+}
+N 58200 49700 57300 49700 4
+N 57600 53400 58200 53400 4
+N 58200 53400 58200 50100 4
+C 54500 43700 1 0 0 low-1.sym
+{
+T 54900 43700 5 10 0 1 0 0 1
+device=LOW
+T 54800 43900 5 10 1 1 0 0 1
+refdes=G?
+}
+B 54100 44000 1300 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 54400 44800 9 10 1 0 0 0 2
+ Power
+Monitor
+N 56300 45000 55400 45000 4
+B 58400 44200 1300 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 58500 44700 9 10 1 0 0 0 3
+Metastable
+ filter
+ inv
+N 60300 49900 59500 49900 4
+N 60300 49500 59900 49500 4
+N 59900 49500 59900 45000 4
+N 59900 45000 59700 45000 4
+N 59900 49900 59900 53600 4
+N 59900 53600 62200 53600 4
+T 60800 53700 9 20 1 0 0 0 1
+clkdiv_reset
+C 60300 49400 1 0 0 nor2-1.sym
+{
+T 60700 49300 5 10 1 1 0 2 1
+refdes=U?
+T 60700 49500 5 8 0 0 0 0 1
+device=nor
+}
+C 62800 49800 1 0 0 reg_rst.sym
+{
+T 64600 51600 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 64100 51800 5 10 1 1 0 6 1
+refdes=U?
+}
+C 64800 49800 1 0 0 reg_rst.sym
+{
+T 66600 51600 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 66100 51800 5 10 1 1 0 6 1
+refdes=U?
+}
+C 66700 49800 1 0 0 reg_rst.sym
+{
+T 68500 51600 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 68000 51800 5 10 1 1 0 6 1
+refdes=U?
+}
+C 68500 49800 1 0 0 reg_rst.sym
+{
+T 70300 51600 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 69800 51800 5 10 1 1 0 6 1
+refdes=U?
+}
+C 70400 48900 1 0 0 and2-1.sym
+{
+T 70800 48800 5 10 1 1 0 2 1
+refdes=U?
+T 70800 49000 5 8 0 0 0 0 1
+device=and
+}
+C 71700 47600 1 0 0 reg_rst.sym
+{
+T 73500 49400 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 73000 49600 5 10 1 1 0 6 1
+refdes=U?
+}
+C 70400 46700 1 0 0 and2-1.sym
+{
+T 70800 46600 5 10 1 1 0 2 1
+refdes=U?
+T 70800 46800 5 8 0 0 0 0 1
+device=and
+}
+C 71700 45400 1 0 0 reg_rst.sym
+{
+T 73500 47200 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 73000 47400 5 10 1 1 0 6 1
+refdes=U?
+}
+V 62000 49700 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 61800 49600 9 10 1 0 0 0 1
+DFT
+N 69300 49800 69300 49700 4
+N 69300 49700 62400 49700 4
+N 63600 49800 63600 49700 4
+N 65600 49800 65600 49700 4
+N 64800 51400 64400 51400 4
+N 66700 51400 66400 51400 4
+N 68500 51400 68300 51400 4
+N 70100 47200 70100 51400 4
+N 70100 49400 70400 49400 4
+N 70400 47200 70100 47200 4
+N 70400 49000 69200 49000 4
+N 70400 46800 69200 46800 4
+N 72500 47600 63600 47600 4
+N 63600 45400 63600 49700 4
+N 72500 45400 63600 45400 4
+C 62700 51400 1 0 0 high-1.sym
+{
+T 63000 51700 5 10 0 1 0 0 1
+device=HIGH
+T 62700 51900 5 10 1 1 0 0 1
+refdes=H?
+}
+C 67600 47400 1 0 0 reg.sym
+{
+T 69400 49200 5 10 0 0 0 0 1
+device=REGISTER
+T 68900 49400 5 10 1 1 0 6 1
+refdes=U?
+}
+C 67600 45200 1 0 0 reg.sym
+{
+T 69400 47000 5 10 0 0 0 0 1
+device=REGISTER
+T 68900 47200 5 10 1 1 0 6 1
+refdes=U?
+}
+N 67500 49800 67500 49700 4
+T 72800 44900 9 10 1 0 0 0 3
+ACTIVE LOW
+RESETS TO
+COMPONENTS
+N 73300 49200 74100 49200 4
+N 73300 47000 74100 47000 4
+T 62900 52300 9 25 1 0 0 0 1
+Synchronous Reset Distribution Tree
+T 67400 44300 9 25 1 0 0 0 2
+Soft Reset
+ Sources
+T 53400 52600 9 25 1 0 0 0 2
+JTAG RPC
+CONTROL
+T 54900 47800 9 25 1 0 0 0 2
+SIM/TEST
+ RESET
+T 64500 42100 9 40 1 0 0 0 1
+Modern ASIC Reset System
+C 58100 42900 1 0 1 out_port.sym
+{
+T 57798 43118 5 10 0 1 0 6 1
+device=OPAD
+T 57200 43200 5 10 1 1 0 0 1
+refdes=PWR_ON
+}
+N 57000 45000 57000 43000 4
+N 57000 43000 57200 43000 4
+B 58400 42400 1300 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+N 58100 43000 58400 43000 4
+T 58600 43100 9 10 1 0 0 0 1
+WatchDog
+N 58100 45000 58400 45000 4
+T 53600 42000 9 25 1 0 0 0 2
+PCA PWR
+ RESET
Index: drawing/sch/um-100_cde_jtag_def_sym.sch
===================================================================
--- drawing/sch/um-100_cde_jtag_def_sym.sch (nonexistent)
+++ drawing/sch/um-100_cde_jtag_def_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 48500 43800 1 0 0 cde_jtag_def.sym
+{
+T 48900 46650 5 10 1 1 0 0 1
+device=cde_jtag_def
+T 48900 46850 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/fund_reset_fig2.sch
===================================================================
--- drawing/sch/fund_reset_fig2.sch (nonexistent)
+++ drawing/sch/fund_reset_fig2.sch (revision 120)
@@ -0,0 +1,33 @@
+v 20110115 2
+B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54300 42300 1 0 0 reg_rst.sym
+{
+T 56100 44100 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 55600 44300 5 10 1 1 0 6 1
+refdes=U?
+}
+V 57100 43900 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 56900 43800 9 10 1 0 0 0 1
+DFT
+T 54400 44700 9 10 1 0 0 0 3
+ACTIVE LOW
+RESET TO
+COMPONENT
+N 55900 43900 56700 43900 4
+T 53900 45400 9 25 1 0 0 0 1
+Soft Reset
+C 57800 46000 1 0 0 reg_rst.sym
+{
+T 59600 47800 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 59100 48000 5 10 1 1 0 6 1
+refdes=U?
+}
+N 55100 42300 55100 41900 4
+N 55100 41900 53700 41900 4
+N 58600 46000 58600 43900 4
+N 58600 43900 57500 43900 4
+T 61100 43200 9 25 1 0 0 0 2
+Reset Style #1
+Asynchronous
Index: drawing/sch/fund_reset_fig3.sch
===================================================================
--- drawing/sch/fund_reset_fig3.sch (nonexistent)
+++ drawing/sch/fund_reset_fig3.sch (revision 120)
@@ -0,0 +1,40 @@
+v 20110115 2
+B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54300 42300 1 0 0 reg_rst.sym
+{
+T 56100 44100 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 55600 44300 5 10 1 1 0 6 1
+refdes=U?
+}
+T 54400 44700 9 10 1 0 0 0 3
+ACTIVE LOW
+RESET TO
+COMPONENT
+N 55900 43900 57700 43900 4
+T 53900 45400 9 25 1 0 0 0 1
+Soft Reset
+N 55100 42300 55100 41900 4
+N 55100 41900 53700 41900 4
+T 61100 43200 9 25 1 0 0 0 2
+Reset Style #2
+Synchronous
+C 59800 45100 1 0 0 reg.sym
+{
+T 61600 46900 5 10 0 0 0 0 1
+device=REGISTER
+T 61100 47100 5 10 1 1 0 6 1
+refdes=U?
+}
+C 58300 46400 1 0 0 and2-1.sym
+{
+T 58700 46300 5 10 1 1 0 2 1
+refdes=U?
+T 58700 46500 5 8 0 0 0 0 1
+device=and
+}
+N 58300 46500 57700 46500 4
+N 57700 46500 57700 43900 4
+N 59600 46700 59800 46700 4
+N 61400 46700 62300 46700 4
+N 58300 46900 56300 46900 4
Index: drawing/sch/fund_reset_fig4.sch
===================================================================
--- drawing/sch/fund_reset_fig4.sch (nonexistent)
+++ drawing/sch/fund_reset_fig4.sch (revision 120)
@@ -0,0 +1,38 @@
+v 20110115 2
+B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54300 42300 1 0 0 reg_rst.sym
+{
+T 56100 44100 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 55600 44300 5 10 1 1 0 6 1
+refdes=U?
+}
+T 54400 44700 9 10 1 0 0 0 3
+ACTIVE LOW
+RESET TO
+COMPONENT
+N 55900 43900 56300 43900 4
+T 53900 45400 9 25 1 0 0 0 1
+Soft Reset
+C 57800 46000 1 0 0 reg_rst.sym
+{
+T 59600 47800 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 59100 48000 5 10 1 1 0 6 1
+refdes=U?
+}
+N 55100 42300 55100 41900 4
+N 53700 41900 58600 41900 4
+N 58600 46000 58600 41900 4
+T 61100 43200 9 25 1 0 0 0 2
+Reset Style #3
+Both
+C 56300 47300 1 0 0 and2-1.sym
+{
+T 56700 47200 5 10 1 1 0 2 1
+refdes=U?
+T 56700 47400 5 8 0 0 0 0 1
+device=and
+}
+N 57800 47600 57600 47600 4
+N 56300 47400 56300 43900 4
Index: drawing/sch/fund_reset_fig5.sch
===================================================================
--- drawing/sch/fund_reset_fig5.sch (nonexistent)
+++ drawing/sch/fund_reset_fig5.sch (revision 120)
@@ -0,0 +1,47 @@
+v 20110115 2
+B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54300 42300 1 0 0 reg_rst.sym
+{
+T 56100 44100 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 55600 44300 5 10 1 1 0 6 1
+refdes=U?
+}
+T 54400 44700 9 10 1 0 0 0 3
+ACTIVE LOW
+RESET TO
+COMPONENT
+N 55900 43900 61400 43900 4
+T 53900 45400 9 25 1 0 0 0 1
+Soft Reset
+N 55100 42300 55100 41900 4
+N 55100 41900 53700 41900 4
+T 60900 42100 9 25 1 0 0 0 2
+Reset Style #4
+Sync with Backup
+C 59200 46200 1 0 0 reg.sym
+{
+T 61000 48000 5 10 0 0 0 0 1
+device=REGISTER
+T 60500 48200 5 10 1 1 0 6 1
+refdes=U?
+}
+C 57200 47500 1 0 0 and2-1.sym
+{
+T 57600 47400 5 10 1 1 0 2 1
+refdes=U?
+T 57600 47600 5 8 0 0 0 0 1
+device=and
+}
+C 61400 47300 1 0 0 and2-1.sym
+{
+T 61800 47200 5 10 1 1 0 2 1
+refdes=U?
+T 61800 47400 5 8 0 0 0 0 1
+device=and
+}
+N 60800 47800 61400 47800 4
+N 59200 47800 58500 47800 4
+N 57200 47600 57100 47600 4
+N 57100 43900 57100 47600 4
+N 61400 47400 61400 43900 4
Index: drawing/sch/fund_reset_fig6.sch
===================================================================
--- drawing/sch/fund_reset_fig6.sch (nonexistent)
+++ drawing/sch/fund_reset_fig6.sch (revision 120)
@@ -0,0 +1,27 @@
+v 20110115 2
+B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54300 42300 1 0 0 reg_rst.sym
+{
+T 56100 44100 5 10 0 0 0 0 1
+device=REGISTER_RST
+T 55600 44300 5 10 1 1 0 6 1
+refdes=U?
+}
+T 54400 44700 9 10 1 0 0 0 3
+ACTIVE LOW
+RESET TO
+COMPONENT
+T 53900 45400 9 25 1 0 0 0 1
+Soft Reset
+N 55100 42300 55100 41900 4
+N 55100 41900 53700 41900 4
+T 61100 43200 9 25 1 0 0 0 2
+Reset Style #5
+None
+C 58300 45600 1 0 0 reg.sym
+{
+T 60100 47400 5 10 0 0 0 0 1
+device=REGISTER
+T 59600 47600 5 10 1 1 0 6 1
+refdes=U?
+}
Index: drawing/sch/cde_pad_tri_dig.sch
===================================================================
--- drawing/sch/cde_pad_tri_dig.sch (nonexistent)
+++ drawing/sch/cde_pad_tri_dig.sch (revision 120)
@@ -0,0 +1,27 @@
+v 20110115 2
+C 4100 3000 1 0 0 in_port.sym
+{
+T 4100 3000 5 10 1 1 0 6 1
+refdes=pad_oe
+}
+C 4100 2600 1 0 0 in_port.sym
+{
+T 4100 2600 5 10 1 1 0 6 1
+refdes=pad_out
+}
+C 7900 2600 1 0 1 io_port_v.sym
+{
+T 7900 2600 5 10 1 1 0 0 1
+refdes=PAD
+}
+N 5300 3100 5000 3100 4
+N 5300 2700 5000 2700 4
+U 6900 2700 6400 2700 10 0
+B 2800 600 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 5200 2100 1 0 0 cde_pad_tri_dig.sym
+{
+T 5302 2318 5 10 1 1 0 0 1
+device=cde_pad_tri_dig
+T 6400 3000 5 10 1 1 0 6 1
+refdes=P?
+}
Index: drawing/sch/um-150_cde_sync_sym.sch
===================================================================
--- drawing/sch/um-150_cde_sync_sym.sch (nonexistent)
+++ drawing/sch/um-150_cde_sync_sym.sch (revision 120)
@@ -0,0 +1,23 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 48600 46200 1 0 0 cde_sync_def.sym
+{
+T 49000 47050 5 10 1 1 0 0 1
+device=cde_sync_def
+T 49000 47250 5 10 1 1 0 0 1
+refdes=U?
+}
+C 48600 44700 1 0 0 cde_sync_with_reset.sym
+{
+T 49000 45750 5 10 1 1 0 0 1
+device=cde_sync_with_reset
+T 49000 45950 5 10 1 1 0 0 1
+refdes=U?
+}
+C 48600 43100 1 0 0 cde_sync_with_hysteresis.sym
+{
+T 49000 44150 5 10 1 1 0 0 1
+device=cde_sync_with_hysteresis
+T 49000 44350 5 10 1 1 0 0 1
+refdes=U?
+}
Index: drawing/sch/cde_pad_od_dig.sch
===================================================================
--- drawing/sch/cde_pad_od_dig.sch (nonexistent)
+++ drawing/sch/cde_pad_od_dig.sch (revision 120)
@@ -0,0 +1,27 @@
+v 20110115 2
+C 4300 2900 1 0 0 in_port.sym
+{
+T 4300 2900 5 10 1 1 0 6 1
+refdes=pad_oe
+}
+C 8100 2500 1 0 1 io_port_v.sym
+{
+T 8100 2500 5 10 1 1 0 0 1
+refdes=PAD
+}
+C 5200 2100 1 0 1 out_port.sym
+{
+T 4200 2100 5 10 1 1 0 6 1
+refdes=pad_in
+}
+N 5500 3000 5200 3000 4
+N 5500 2200 5200 2200 4
+U 7100 2600 6600 2600 10 0
+B 3000 500 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 5400 2000 1 0 0 cde_pad_od_dig.sym
+{
+T 6402 2118 5 10 1 1 0 0 1
+device=cde_pad_od_dig
+T 6600 2900 5 10 1 1 0 6 1
+refdes=P?
+}
Index: drawing/sch/cde_pad_in_dig.sch
===================================================================
--- drawing/sch/cde_pad_in_dig.sch (nonexistent)
+++ drawing/sch/cde_pad_in_dig.sch (revision 120)
@@ -0,0 +1,21 @@
+v 20110115 2
+C 7000 2500 1 0 1 io_port_v.sym
+{
+T 7000 2500 5 10 1 1 0 0 1
+refdes=PAD
+}
+C 4100 2500 1 0 1 out_port.sym
+{
+T 3100 2500 5 10 1 1 0 6 1
+refdes=pad_in
+}
+N 4400 2600 4100 2600 4
+U 6000 2600 5500 2600 10 0
+B 1900 500 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 4300 2100 1 0 0 cde_pad_in_dig.sym
+{
+T 5302 2118 5 10 1 1 0 0 1
+device=cde_pad_in_dig
+T 5500 2900 5 10 1 1 0 6 1
+refdes=P?
+}
Index: drawing/sch/cde_pad_se_dig.sch
===================================================================
--- drawing/sch/cde_pad_se_dig.sch (nonexistent)
+++ drawing/sch/cde_pad_se_dig.sch (revision 120)
@@ -0,0 +1,33 @@
+v 20110115 2
+C 4100 3000 1 0 0 in_port.sym
+{
+T 4100 3000 5 10 1 1 0 6 1
+refdes=pad_oe
+}
+C 4100 2600 1 0 0 in_port.sym
+{
+T 4100 2600 5 10 1 1 0 6 1
+refdes=pad_out
+}
+C 7900 2600 1 0 1 io_port_v.sym
+{
+T 7900 2600 5 10 1 1 0 0 1
+refdes=PAD
+}
+C 5000 2200 1 0 1 out_port.sym
+{
+T 4000 2200 5 10 1 1 0 6 1
+refdes=pad_in
+}
+C 5300 2100 1 0 0 cde_pad_se_dig.sym
+{
+T 6202 2218 5 10 1 1 0 0 1
+device=cde_pad_se_dig
+T 6400 3000 5 10 1 1 0 6 1
+refdes=P?
+}
+N 5300 3100 5000 3100 4
+N 5300 2700 5000 2700 4
+N 5300 2300 5000 2300 4
+U 6900 2700 6400 2700 10 0
+B 2800 600 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
Index: drawing/sch/um-100_cde_clock_sys_sym.sch
===================================================================
--- drawing/sch/um-100_cde_clock_sys_sym.sch (nonexistent)
+++ drawing/sch/um-100_cde_clock_sys_sym.sch (revision 120)
@@ -0,0 +1,9 @@
+v 20110115 2
+B 48000 43000 6000 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 49300 44500 1 0 0 cde_clock_sys.sym
+{
+T 49700 46150 5 10 1 1 0 0 1
+device=cde_clock_sys
+T 49700 46350 5 10 1 1 0 0 1
+refdes=U?
+}