OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /socgen/trunk/tools/bin
    from Rev 82 to Rev 83
    ↔ Reverse comparison
  •

Rev 82 → Rev 83

/build_verilog
0,0 → 1,319
eval 'exec `which perl` -S $0 ${1+"$@"}'
if 0;
 
#/**********************************************************************/
#/* */
#/* ------- */
#/* / SOC \ */
#/* / GEN \ */
#/* / TOOL \ */
#/* ============== */
#/* | | */
#/* |____________| */
#/* */
#/* builds verilog rtl from a ip-xact component file for a leaf cell */
#/* */
#/* */
#/* Author(s): */
#/* - John Eaton, jt_eaton@opencores.org */
#/* */
#/**********************************************************************/
#/* */
#/* Copyright (C) <2010> <Ouabache Design Works> */
#/* */
#/* This source file may be used and distributed without */
#/* restriction provided that this copyright statement is not */
#/* removed from the file and that any derivative work contains */
#/* the original copyright notice and the associated disclaimer. */
#/* */
#/* This source file is free software; you can redistribute it */
#/* and/or modify it under the terms of the GNU Lesser General */
#/* Public License as published by the Free Software Foundation; */
#/* either version 2.1 of the License, or (at your option) any */
#/* later version. */
#/* */
#/* This source is distributed in the hope that it will be */
#/* useful, but WITHOUT ANY WARRANTY; without even the implied */
#/* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR */
#/* PURPOSE. See the GNU Lesser General Public License for more */
#/* details. */
#/* */
#/* You should have received a copy of the GNU Lesser General */
#/* Public License along with this source; if not, download it */
#/* from http://www.opencores.org/lgpl.shtml */
#/* */
#/**********************************************************************/
 
# ToDO: add handling unaligned words
 
 
############################################################################
# General PERL config
############################################################################
use Getopt::Long;
use English;
use File::Basename;
 
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
 
 
############################################################################
### Process the options
############################################################################
 
Getopt::Long::config("require_order", "prefix=-");
GetOptions("h"
) || die "(use '$program_name -h' for help)";
 
 
##############################################################################
## Help option
##############################################################################
if ( ($opt_h eq "1") )
{ print "\n type test filename ( no extension)";
print "\n";
exit 1;
}
 
 
##############################################################################
##
##############################################################################
 
use Cwd;
use XML::LibXML;
 
$home = cwd();
 
 
 
 
 
#############################################################################
##
##
#############################################################################
 
my $prefix = $ARGV[0];
my $component = $ARGV[1];
my $variant = $ARGV[2];
my $destination = $ARGV[3];
 
 
 
print " Building $destination for $prefix $component $variant \n" ;
 
 
my $parser = XML::LibXML->new();
my $doc = $parser->parse_file("${home}/${prefix}/ip/${component}/rtl/xml/${variant}.xml");
foreach my $comp ($doc->findnodes('//spirit:component'))
{
my($vendor) = $comp->findnodes('./spirit:vendor/text()')->to_literal ;
my($library) = $comp->findnodes('./spirit:library/text()')->to_literal ;
my($name) = $comp->findnodes('./spirit:name/text()')->to_literal ;
my($version) = $comp->findnodes('./spirit:version/text()')->to_literal ;
 
 
 
#/**********************************************************************/
#/* */
#/* Every hier cell is constructed from the ipxact file with seperate */
#/* versions for simulation and synthesys */
#/* */
#/* */
#/**********************************************************************/
 
 
 
 
print "BUILD design $prefix\n $component $variant\n";
print "CREATING verilog for Proj $project Comp $component Name $name Var $variant \n";
my $outfile ="${home}/${prefix}/ip/${component}/rtl/xml/${destination}";
open DEST_FILE,">$outfile" or die "unable to open $outfile";
my $name = $variant;
print DEST_FILE "\n module \n\n $variant \n ";
 
my $first = 1;
foreach my $i_name ($doc->findnodes('//spirit:model/spirit:modelParameters/spirit:modelParameter/spirit:value/@spirit:id'))
{
my($parameter_name) = $i_name ->to_literal;
my($parameter_default) = $i_name ->findnodes('../text()')->to_literal ;
if($first)
{
print DEST_FILE " #( parameter ${parameter_name}=${parameter_default}";
$first=0;
}
else
{
print DEST_FILE ",\n parameter ${parameter_name}=${parameter_default}";
}
}
 
if($first == 0)
{
print DEST_FILE ")\n";
}
 
print DEST_FILE "\n ( \n";
$first = 1;
 
foreach my $i_name ($doc->findnodes("//spirit:component/spirit:model/spirit:ports/spirit:port/name"))
{
my($port_name) = $i_name ->findnodes('./text()')->to_literal ;
my($direction) = $i_name ->findnodes('../spirit:wire/spirit:direction/text()')->to_literal ;
my($left) = $i_name ->findnodes('../spirit:wire/spirit:vector/spirit:left/text()')->to_literal ;
my($right) = $i_name ->findnodes('../spirit:wire/spirit:vector/spirit:right/text()')->to_literal ;
my($type) = $i_name ->findnodes('../spirit:vendorExtensions/type/text()')->to_literal ;
my $width = " ";
if($left) {$width = "[${left}:${right}]"}
 
 
if($first)
{
print DEST_FILE "$direction $type $width $port_name";
$first=0;
}
else
{
print DEST_FILE ",\n$direction $type $width $port_name";
}
}
print DEST_FILE ");\n\n\n\n";
 
foreach my $i_name ($doc->findnodes("//spirit:component/nodes/node/name"))
{
my($node_name) = $i_name ->findnodes('./text()')->to_literal ;
my($width) = $i_name ->findnodes('../width/text()')->to_literal ;
my($type) = $i_name ->findnodes('../spirit:vendorExtensions/type/text()')->to_literal ;
print DEST_FILE "$type $width $node_name;\n";
}
 
print DEST_FILE "\n\n\n";
 
foreach my $i_name ($doc->findnodes("//spirit:component/spirit:componentInstances/spirit:componentInstance/spirit:instanceName"))
{
my($instance_name) = $i_name ->findnodes('./text()')->to_literal ;
my($component_name) = $i_name ->findnodes('../spirit:componentRef/spirit:name/text()')->to_literal ;
my($version_name) = $i_name ->findnodes('../spirit:componentRef/spirit:version/text()')->to_literal ;
 
my $variant_name = "";
if($version_name) {$variant_name = "${component_name}_${version_name}";}
else {$variant_name = "${component_name}";}
 
 
print DEST_FILE "$variant_name\n";
$first = 1;
foreach my $i_parameter ($doc->findnodes("//spirit:componentInstance[spirit:instanceName/text() = '$instance_name']/parameters/parameter/name"))
{
my($foo_name) = $i_parameter ->findnodes('./text()')->to_literal ;
my($foo_value) = $i_parameter ->findnodes('../value/text()')->to_literal ;
if($first)
{
print DEST_FILE "#( .${foo_name} (${foo_value})";
$first = 0;
}
else
{
print DEST_FILE ",\n .${foo_name} (${foo_value})";
}
}
 
if($first == 0)
{
print DEST_FILE ")\n";
}
 
print DEST_FILE "$instance_name \n (\n ";
$first = 1;
 
foreach my $i_xame ($doc->findnodes('//spirit:adHocConnections/spirit:adHocConnection/spirit:internalPortReference/@spirit:componentRef'))
{
my($comp_name) = $i_xame ->to_literal;
my($int_value) = $i_xame ->findnodes('../../spirit:name/text()')->to_literal ;
my($int_name) = $i_xame ->findnodes('../@spirit:portRef')->to_literal ;
my($vec_left) = $i_xame ->findnodes('../@spirit:left')->to_literal ;
my($vec_right) = $i_xame ->findnodes('../@spirit:right')->to_literal ;
 
if($instance_name eq $comp_name )
{
if($vec_left ne "")
{
my $vecs = "";
if($vec_left ne $vec_right ){$vecs ="[${vec_left}:${vec_right}]";}
else {$vecs ="[${vec_right}]";}
 
if($first)
{
print DEST_FILE " .${int_name} (${int_value}${vecs})";
$first =0;
}
else
{
print DEST_FILE ",\n .${int_name} (${int_value}${vecs})";
}
}
else
{
if($first)
{
print DEST_FILE " .${int_name} (${int_value})";
$first =0;
}
else
{
print DEST_FILE ",\n .${int_name} (${int_value})";
}
}
}
 
}
print DEST_FILE ");\n\n";
}
 
 
 
 
 
# foreach my $i_name ($doc->findnodes("//spirit:component/rtl"))
# {
# my($rtl_file) = $i_name ->findnodes('./name/text()')->to_literal ;
# print "CCC $rtl_file\n";
# $SRCFILE ="${home}/${prefix}/ip/${component}/rtl/xml/${rtl_file}";
# open(SRCFILE) or die("Could not open src file.");
# foreach $line (<SRCFILE>)
# {
# chomp($line); # remove the newline from $line.
# # do line-by-line processing.
# print DEST_FILE "${line}\n";
# }
# }
 
 
foreach my $i_name ($doc->findnodes("//spirit:component/spirit:fileSets/spirit:fileSet/spirit:file"))
{
my($rtl_file) = $i_name ->findnodes('./spirit:name/text()')->to_literal;
my($file_type) = $i_name ->findnodes('./spirit:fileType/text()')->to_literal;
 
if($file_type eq "verilogFragment")
{
$SRCFILE ="${home}/${prefix}/ip/${component}/rtl/xml/${rtl_file}";
open(SRCFILE) or die("Could not open src file.");
foreach $line (<SRCFILE>)
{
chomp($line);
print DEST_FILE "${line}\n";
}
}
}
 
 
print DEST_FILE "\n\n\n endmodule\n\n";
 
}
 
 
1
 
build_verilog Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: build_leaf =================================================================== --- build_leaf (revision 82) +++ build_leaf (revision 83) @@ -143,9 +143,9 @@ #/* */ #/* build a fileset */ #/* */ +#/* include files first, then top and then all the rest */ #/* */ #/* */ -#/* */ #/**********************************************************************/ my $outfile ="${home}/${prefix}/ip/${component}/rtl/gen/filelist"; @@ -165,8 +165,17 @@ { my($file_name) = $i_name ->findnodes('./text()')->to_literal ; my($file_type) = $i_name ->findnodes('../spirit:fileType/text()')->to_literal ; - if($file_type eq "verilogSource"){ print FILELIST " ${home}/${prefix}/ip/${component}/rtl/xml/${file_name}\n"}; + if($file_type eq "verilogSourceTop"){ print FILELIST " ${home}/${prefix}/ip/${component}/rtl/xml/${file_name}\n"}; } + + + foreach my $i_name ($doc->findnodes("//spirit:fileSets/spirit:fileSet/spirit:file/spirit:name")) + { + my($file_name) = $i_name ->findnodes('./text()')->to_literal ; + my($file_type) = $i_name ->findnodes('../spirit:fileType/text()')->to_literal ; + if($file_type eq "verilogSource") { print FILELIST " ${home}/${prefix}/ip/${component}/rtl/xml/${file_name}\n"}; + } + #/**********************************************************************/
/soc_builder
73,6 → 73,27
foreach my $component (@components)
{
chomp($component);
my $filename= "${home}/work/${project}/ip/${component}/soc/design.soc";
my $parser = XML::LibXML->new();
my $doc = $parser->parse_file($filename);
foreach my $i_name ($doc->findnodes("//module/name"))
{
my($child) = $i_name ->findnodes('./text()')->to_literal ;
my($child_family) = $i_name ->findnodes('../project/text()')->to_literal ;
my($child_parent) = $i_name ->findnodes('../component/text()')->to_literal ;
 
#/**********************************************************************/
#/* */
#/* Any module from within the same project is already entered so we */
#/* only need the ones from other projects to be set up as children */
#/* */
#/* The cde library has already been processed */
#/* */
#/**********************************************************************/
if(($project ne $child_family) & ("cde" ne $child_family) )
{push @kids , "work/${project}/children/${child_family}/ip/${child_parent}/rtl/xml/${child}.xml";}
}
my @xml_files = qx(ls ${home}/work/${project}/ip/${component}/rtl/xml );
foreach my $xml_file (@xml_files)
{
82,7 → 103,6
my $doc = $parser->parse_file($filename);
foreach my $comp ($doc->findnodes('//spirit:component'))
{
# push @kids , "work/${project}/ip/${component}/rtl/xml/${xml_file}";
 
my($vendor) = $comp->findnodes('./spirit:vendor/text()')->to_literal ;
my($library) = $comp->findnodes('./spirit:library/text()')->to_literal ;
93,63 → 113,11
if($version) {$variant = "${name}_${version}"}
else {$variant = "${name}"}
 
$cmd ="./tools/bin/setup_cov $project $component /n";
if (system($cmd)) {}
 
$cmd ="./tools/bin/build_filelists $project $component $variant /n";
if (system($cmd)) {}
 
 
 
 
 
 
 
 
 
 
# foreach my $i_name ($doc->findnodes("//spirit:component/spirit:componentInstances/spirit:componentInstance/spirit:instanceName"))
# {
# my($instance_name) = $i_name ->findnodes('./text()')->to_literal ;
# my($library_name) = $i_name ->findnodes('../spirit:componentRef/spirit:library/text()')->to_literal ;
# my($component_name) = $i_name ->findnodes('../spirit:componentRef/spirit:name/text()')->to_literal ;
# my($version_name) = $i_name ->findnodes('../spirit:componentRef/spirit:version/text()')->to_literal ;
#
# my $variant_name = "";
# if($version_name) {$variant_name = "${component_name}_${version_name}";}
# else {$variant_name = "${component_name}";}
#
#
# print "$library_name $component_name $version_name $variant_name \n";
#
#/**********************************************************************/
#/* */
#/* Any module from within the same project is already entered so we */
#/* only need the ones from other projects to be set up as children */
#/* */
#/* The cde library has already been processed */
#/* */
#/**********************************************************************/
# if(($project ne $library_name) & ("cde" ne $library_name) )
# {push @kids , "work/${project}/children/${library_name}/ip/${component_name}/rtl/xml/${variant_name}.xml";}
#
# }
 
 
foreach my $i_name ($doc->findnodes("//module/name"))
{
my($child) = $i_name ->findnodes('./text()')->to_literal ;
my($child_family) = $i_name ->findnodes('../project/text()')->to_literal ;
my($child_parent) = $i_name ->findnodes('../component/text()')->to_literal ;
 
#/**********************************************************************/
#/* */
#/* Any module from within the same project is already entered so we */
#/* only need the ones from other projects to be set up as children */
#/* */
#/* The cde library has already been processed */
#/* */
#/**********************************************************************/
if(($project ne $child_family) & ("cde" ne $child_family) )
{push @kids , "work/${project}/children/${child_family}/ip/${child_parent}/rtl/xml/${child}.xml";}
}
}
}
}
/Makefile.root
24,6 → 24,7
lint:
echo "################################################################################"; \
echo; \
rm -r TB.v;\
chmod 755 filelist.ver ;\
./filelist.ver ;\
verilator --cc TB.v --exe ../../bench/verilator/sim_main.cpp -top-module TB -Wno-WIDTH 2> lint.log;\
178,7 → 179,7
PHONY: fpga
fpga:
(\
rm -r xilinx;\
rm -f -r xilinx;\
mkdir xilinx;\
cd xilinx;\
cp ../target/filelist ../filelist;\
/soc_link
72,15 → 72,16
 
#/*********************************************************************************************/
#/ */
#/ Each project is given access to the system tools by giving each of them a link. */
#/ Each project is given access to the system tools by giving each of them a link to the */
#/ Master Makefiles in tools/bin */
#/ */
#/ Every component is given access to the system testbench/models and CDE library files */
#/ via links */
#/ Every component in a project is given access to the system testbench/models and CDE */
#/ library files via symbolic links */
#/ */
#/*********************************************************************************************/
 
 
@projects = qx(ls $home/work );
@projects = qx(ls ${home}/work );
print "Linking testbench \n" ;
 
foreach my $project (@projects)
89,7 → 90,9
symlink( "${home}/tools/bin/Makefile.root", "${home}/work/${project}/bin/Makefile.root");
symlink( "${home}/tools/bin/Makefile", "${home}/work/${project}/bin/Makefile");
 
my $prefix = "work/${project}";
 
 
my @components = qx(ls ${home}/work/${project}/ip );
foreach my $component (@components)
{
100,6 → 103,27
$root = "lib";
$dest = "work/${project}/ip/${component}/sim/lib";
&link_sub( $root,$root, $dest );
 
#/*********************************************************************************************/
#/ */
#/ Every component needs a rtl/verilog,gen/sim and /gen/syn subdirectory */
#/ */
#/*********************************************************************************************/
 
my $path = "${home}/${prefix}/ip/${component}/rtl/verilog";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen/sim";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen/syn";
mkdir $path,0755 unless( -e $path );
 
 
 
}
}
 
128,50 → 152,22
print "Start component $component \n";
my $prefix = "work/${project}";
 
my @xml_files = qx(ls ${home}/${prefix}/ip/${component}/rtl/xml );
foreach my $xml_file (@xml_files)
my $parser = XML::LibXML->new();
my $doc = $parser->parse_file("${home}/${prefix}/ip/${component}/soc/design.soc");
foreach my $comp ($doc->findnodes('//components/component'))
{
chomp($xml_file);
my $filename= "${home}/${prefix}/ip/${component}/rtl/xml/${xml_file}";
 
print "Start variant $filename \n";
my($name) = $comp->findnodes('./name/text()')->to_literal ;
my($variant) = $comp->findnodes('./variant/text()')->to_literal ;
 
my $parser = XML::LibXML->new();
my $doc = $parser->parse_file($filename);
print " directories for $project - $component $name - $variant \n";
 
foreach my $comp ($doc->findnodes('//spirit:component'))
{
my($name) = $comp->findnodes('./spirit:name/text()')->to_literal ;
my($version) = $comp->findnodes('./spirit:version/text()')->to_literal ;
my($vendor) = $comp->findnodes('./spirit:vendor/text()')->to_literal ;
my($library) = $comp->findnodes('./spirit:library/text()')->to_literal ;
 
my $variant = "";
if($version){ $variant = "${name}_${version}"}
else { $variant = "${name}"}
 
print "rtl/gen directories for $project - $component $xml_file VLNV $vendor - $library - $name - $variant \n";
{
 
if( $project ne $library) {print "Error: $project is not $library \n";exit 1}
if( $component ne $name) {print "Error: $component is not $name \n";exit 1}
if( $xml_file ne "${variant}.xml") {print "Error: $xml_file is not ${variant}.xml \n";exit 1}
 
#/*********************************************************************************************/
#/ */
#/ Every component needs a rtl/gen/sim and a rtl/gen/syn subdirectory */
#/ */
#/*********************************************************************************************/
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen/sim";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/rtl/gen/syn";
mkdir $path,0755 unless( -e $path );
 
#/*********************************************************************************************/
#/ link chip files */
#/ */
#/ */
181,7 → 177,7
#/*********************************************************************************************/
 
print "Linking targets for $project $component $name\n";
foreach my $i_name ($doc->findnodes("//spirit:component/chips/chip/name"))
foreach my $i_name ($doc->findnodes("//chips/chip/name"))
{
my($chip) = $i_name ->findnodes('./text()')->to_literal ;
my($chip_target) = $i_name ->findnodes('../target/text()')->to_literal ;
295,19 → 291,11
 
 
 
if($new_proj eq "cde" )
{
}
elsif($new_proj eq $project )
{
}
else
{
&link_child( $project,$new_comp, $new_proj );
if($new_proj eq "cde" ) {}
elsif($new_proj eq $project ) {}
else { &link_child( $project,$new_comp, $new_proj ); }
 
}
 
 
}
 
 
/setup_cov
0,0 → 1,247
eval 'exec `which perl` -S $0 ${1+"$@"}'
if 0;
 
#/**********************************************************************/
#/* */
#/* ------- */
#/* / SOC \ */
#/* / GEN \ */
#/* / TOOL \ */
#/* ============== */
#/* | | */
#/* |____________| */
#/* */
#/* builds verilog rtl from a ip-xact component file for a leaf cell */
#/* */
#/* */
#/* Author(s): */
#/* - John Eaton, jt_eaton@opencores.org */
#/* */
#/**********************************************************************/
#/* */
#/* Copyright (C) <2010> <Ouabache Design Works> */
#/* */
#/* This source file may be used and distributed without */
#/* restriction provided that this copyright statement is not */
#/* removed from the file and that any derivative work contains */
#/* the original copyright notice and the associated disclaimer. */
#/* */
#/* This source file is free software; you can redistribute it */
#/* and/or modify it under the terms of the GNU Lesser General */
#/* Public License as published by the Free Software Foundation; */
#/* either version 2.1 of the License, or (at your option) any */
#/* later version. */
#/* */
#/* This source is distributed in the hope that it will be */
#/* useful, but WITHOUT ANY WARRANTY; without even the implied */
#/* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR */
#/* PURPOSE. See the GNU Lesser General Public License for more */
#/* details. */
#/* */
#/* You should have received a copy of the GNU Lesser General */
#/* Public License along with this source; if not, download it */
#/* from http://www.opencores.org/lgpl.shtml */
#/* */
#/**********************************************************************/
 
# ToDO: add handling unaligned words
 
 
############################################################################
# General PERL config
############################################################################
use Getopt::Long;
use English;
use File::Basename;
 
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
 
 
############################################################################
### Process the options
############################################################################
 
Getopt::Long::config("require_order", "prefix=-");
GetOptions("h"
) || die "(use '$program_name -h' for help)";
 
 
##############################################################################
## Help option
##############################################################################
if ( ($opt_h eq "1") )
{ print "\n type test filename ( no extension)";
print "\n";
exit 1;
}
 
 
##############################################################################
##
##############################################################################
 
use Cwd;
use XML::LibXML;
 
$home = cwd();
 
$cde="cde";
 
 
#############################################################################
##
## open intel hex file and read into array
##
#############################################################################
 
my $project = $ARGV[0];
my $component = $ARGV[1];
my $prefix = "work/${project}";
 
 
 
 
 
#############################################################################
##
##
#############################################################################
 
 
 
 
 
my $kid = "${home}/${prefix}/ip/${component}/soc/design.soc" ;
 
print " Building Coverage for $prefix $component \n" ;
 
 
my $parser = XML::LibXML->new();
my $doc = $parser->parse_file($kid);
 
 
 
 
 
foreach my $comp ($doc->findnodes('//components/component'))
{
 
my($name) = $comp->findnodes('./name/text()')->to_literal ;
my($version) = $comp->findnodes('./version/text()')->to_literal ;
 
my $variant = "";
if($version) {$variant = "${name}_${version}"}
else {$variant = "${name}"}
 
print "rtl/gen directories for $project - $component . ${version}. $name - $variant \n";
 
 
 
 
 
 
#/*********************************************************************************************/
#/ */
#/ */
#/ */
#/ */
#/ */
#/ */
#/*********************************************************************************************/
 
 
my $path = "${home}/${prefix}/ip/${component}/sim/cov";
mkdir $path,0755 unless( -e $path );
 
my $path = "${home}/${prefix}/ip/${component}/sim/cov/${variant}";
mkdir $path,0755 unless( -e $path );
 
 
my $outfile ="${home}/${prefix}/ip/${component}/sim/cov/${variant}/Makefile";
open MAKCOVFILE,">$outfile" or die "unable to open $outfile";
print MAKCOVFILE "SHELL=/bin/sh \n";
print MAKCOVFILE "MAKE=make \n";
print MAKCOVFILE " \n";
print MAKCOVFILE " \n";
print MAKCOVFILE ".PHONY build_cdd:\n";
print MAKCOVFILE "build_cdd:\n";
 
 
foreach my $i_name ($doc->findnodes("//component[variant/text() = '$variant']/code_coverage/cover/name"))
{
my($cover_name) = $i_name ->findnodes('./text()')->to_literal ;
my($cover_inst) = $i_name ->findnodes('../componentInstance/text()')->to_literal ;
print MAKCOVFILE "\tcovered score -f filelist.cov -i $cover_inst -t $cover_name -I ./ -v ./coverage.v -o ${cover_name}.cdd 2> cov.log | tee >> cov.log ;\\\n";
}
 
print MAKCOVFILE " \n";
print MAKCOVFILE ".PHONY score_cov:\n";
print MAKCOVFILE "score_cov:\n";
 
foreach my $i_name ($doc->findnodes("//component[variant/text() = '$variant']/code_coverage/cover/name"))
{
my($cover_name) = $i_name ->findnodes('./text()')->to_literal ;
my($cover_inst) = $i_name ->findnodes('../componentInstance/text()')->to_literal ;
print MAKCOVFILE "\tcovered score -cdd ${cover_name}.cdd -vcd ../../run/\$(TEST)/TestBench.vcd 2>> ${cover_name}_sco_cov.log | tee >> ${cover_name}_sco_cov.log ;\\\n";
}
 
print MAKCOVFILE " \n";
print MAKCOVFILE ".PHONY report_cov:\n";
print MAKCOVFILE "report_cov:\n";
 
foreach my $i_name ($doc->findnodes("//component[variant/text() = '$variant']/code_coverage/cover/name"))
{
my($cover_name) = $i_name ->findnodes('./text()')->to_literal ;
my($cover_inst) = $i_name ->findnodes('../componentInstance/text()')->to_literal ;
print MAKCOVFILE "\tcovered report -cdd ${cover_name}.cdd 2> ${cover_name}_rep_cov.log | tee >> ${cover_name}_rep_cov.log ;\\\n";
}
 
 
 
 
$path = "${home}/${prefix}/ip/${component}/sim/lint";
mkdir $path,0755 unless( -e $path );
 
$path = "${home}/${prefix}/ip/${component}/sim/lint/${variant}";
mkdir $path,0755 unless( -e $path );
 
symlink( "${home}/tools/bin/Makefile.lint",
"${home}/${prefix}/ip/${component}/sim/lint/${variant}/Makefile");
 
 
}
 
 
 
#/*********************************************************************************************/
#/ */
#/ */
#/ */
#/ */
#/ */
#/ */
#/*********************************************************************************************/
 
sub trim_sort {
my @output_files = @_;
my %trim = ();
foreach $descriptor (@output_files) { $trim{$descriptor} = 1; }
my @k = keys %trim;
@output_files = sort(sort @k);
return(@output_files);
}
eval 'exec `which perl` -S $0 ${1+"$@"}'
if 0;
 
 
 
 
 
 
 
 
 
 
 
setup_cov Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: build_filelists =================================================================== --- build_filelists (revision 82) +++ build_filelists (revision 83) @@ -140,9 +140,6 @@ $new_variant = $3; } - print "XXXX $prefix $component $variant --- $new_proj $new_comp $new_variant \n" ; - - if($new_proj eq "cde" ) { push(@filelist_cov,"-v ../../lib/${new_comp}/${new_variant}.v\n"); @@ -164,8 +161,6 @@ push(@filelist_sim,"../../../../../children/${new_proj}/ip/${new_comp}/rtl/gen/sim/${new_variant}.v\n"); push(@filelist_syn,"verilog work ../../../../../children/${new_proj}/ip/${new_comp}/rtl/gen/syn/${new_variant}.v\n"); } - - } @@ -177,16 +172,9 @@ ## ############################################################################# - - - -my $kid = "${home}/${prefix}/ip/${component}/rtl/xml/${variant}.xml" ; - print " Building RTL for $prefix $component $variant \n" ; - - my $parser = XML::LibXML->new(); -my $doc = $parser->parse_file($kid); +my $doc = $parser->parse_file("${home}/${prefix}/ip/${component}/rtl/xml/${variant}.xml"); foreach my $comp ($doc->findnodes('//spirit:component')) { @@ -215,10 +203,10 @@ my @parameter_order = (); - foreach my $i_name ($doc->findnodes('//spirit:model/parameters/parameter/@referenceId')) + foreach my $i_name ($doc->findnodes('//spirit:model/spirit:modelParameters/spirit:modelParameter/spirit:value/@spirit:id')) { my($parameter_name) = $i_name ->to_literal; - my($parameter_default) = $i_name ->findnodes('../value/text()')->to_literal ; + my($parameter_default) = $i_name ->findnodes('../text()')->to_literal ; $default_parameters{$parameter_name} = $parameter_default; push @parameter_order ,$parameter_name ; } @@ -232,16 +220,11 @@ - push(@filelist_ver,"cp ../../bench/verilator/TestBench TB.v\n"); + push(@filelist_ver,"cat ../../bench/verilator/TestBench >> TB.v\n"); print "CREATING componentRef filelists for $project $component $name $variant \n"; -# push(@filelist_cov,"-v ../../../../${component}/rtl/gen/syn/${variant}.v\n"); -# push(@filelist_ver,"cat ../../../../${component}/rtl/gen/syn/${variant}.v >> TB.v\n"); -# push(@filelist_sim,"../../../../${component}/rtl/gen/sim/${variant}.v\n"); -# push(@filelist_syn,"verilog work ../../../../${component}/rtl/gen/syn/${variant}.v\n"); - foreach my $i_name ($doc->findnodes("//spirit:component/spirit:componentInstances/spirit:componentInstance/spirit:instanceName")) { my($instance_name) = $i_name ->findnodes('./text()')->to_literal ; @@ -257,41 +240,11 @@ print "$library_name $component_name $version_name $variant_name \n"; - # if($library_name eq "cde" ) - # { - # push(@filelist_cov,"-v ../../lib/${component_name}/${variant_name}.v\n"); - # push(@filelist_ver,"cat ../../lib/${component_name}/${variant_name}.v >> TB.v\n"); - # push(@filelist_sim,"../../lib/${component_name}/${variant_name}.v\n"); - # push(@filelist_syn,"verilog work ./target/lib/syn/${component_name}/${variant_name}.v\n"); - # } - # elsif($library_name eq $project ) - # { - # push(@filelist_cov,"-v ../../../../${component_name}/rtl/gen/syn/${variant_name}.v\n"); - # push(@filelist_ver,"cat ../../../../${component_name}/rtl/gen/syn/${variant_name}.v >> TB.v\n"); - # push(@filelist_sim,"../../../../${component_name}/rtl/gen/sim/${variant_name}.v\n"); - # push(@filelist_syn,"verilog work ../../../../${component_name}/rtl/gen/syn/${variant_name}.v\n"); - # } - # else - # { - # push(@filelist_cov,"-v ../../../../../children/${library_name}/ip/${component_name}/rtl/gen/syn/${variant_name}.v\n"); - # push(@filelist_ver,"cat ../../../../../children/${library_name}/ip/${component_name}/rtl/gen/syn/${variant_name}.v >> TB.v\n"); - # push(@filelist_sim,"../../../../../children/${library_name}/ip/${component_name}/rtl/gen/sim/${variant_name}.v\n"); - # push(@filelist_syn,"verilog work ../../../../../children/${library_name}/ip/${component_name}/rtl/gen/syn/${variant_name}.v\n"); - # } - } - - - - - - - - print "CREATING filelists for $project $component $name $variant \n"; @@ -330,12 +283,6 @@ } - - - - - - @filelist_cov = trim_sort(@filelist_cov); @filelist_ver = trim_sort(@filelist_ver); @filelist_sim = trim_sort(@filelist_sim); @@ -355,54 +302,49 @@ #/*********************************************************************************************/ - my $path = "${home}/${prefix}/ip/${component}/sim/cov"; - mkdir $path,0755 unless( -e $path ); - my $path = "${home}/${prefix}/ip/${component}/sim/cov/${variant}"; - mkdir $path,0755 unless( -e $path ); - my $outfile ="${home}/${prefix}/ip/${component}/sim/cov/${variant}/filelist.cov"; open COVFILE,">$outfile" or die "unable to open $outfile"; foreach my $i_line (@filelist_cov) {print COVFILE "$i_line";} - my $outfile ="${home}/${prefix}/ip/${component}/sim/cov/${variant}/Makefile"; - open MAKCOVFILE,">$outfile" or die "unable to open $outfile"; +# my $outfile ="${home}/${prefix}/ip/${component}/sim/cov/${variant}/Makefile"; +# open MAKCOVFILE,">$outfile" or die "unable to open $outfile"; - print MAKCOVFILE "SHELL=/bin/sh \n"; - print MAKCOVFILE "MAKE=make \n"; - print MAKCOVFILE " \n"; - print MAKCOVFILE " \n"; - print MAKCOVFILE ".PHONY build_cdd:\n"; - print MAKCOVFILE "build_cdd:\n"; +# print MAKCOVFILE "SHELL=/bin/sh \n"; +# print MAKCOVFILE "MAKE=make \n"; +# print MAKCOVFILE " \n"; +# print MAKCOVFILE " \n"; +# print MAKCOVFILE ".PHONY build_cdd:\n"; +# print MAKCOVFILE "build_cdd:\n"; - foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) - { - my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; - my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; - print MAKCOVFILE "\tcovered score -f filelist.cov -i $cover_inst -t $cover_name -I ./ -v ./coverage.v -o ${cover_name}.cdd 2> cov.log | tee >> cov.log ;\\\n"; - } +# foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) +# { +# my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; +# my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; +# print MAKCOVFILE "\tcovered score -f filelist.cov -i $cover_inst -t $cover_name -I ./ -v ./coverage.v -o ${cover_name}.cdd 2> cov.log | tee >> cov.log ;\\\n"; +# } - print MAKCOVFILE " \n"; - print MAKCOVFILE ".PHONY score_cov:\n"; - print MAKCOVFILE "score_cov:\n"; +# print MAKCOVFILE " \n"; +# print MAKCOVFILE ".PHONY score_cov:\n"; +# print MAKCOVFILE "score_cov:\n"; - foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) - { - my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; - my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; - print MAKCOVFILE "\tcovered score -cdd ${cover_name}.cdd -vcd ../../run/\$(TEST)/TestBench.vcd 2>> ${cover_name}_sco_cov.log | tee >> ${cover_name}_sco_cov.log ;\\\n"; - } +# foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) +# { +# my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; +# my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; +# print MAKCOVFILE "\tcovered score -cdd ${cover_name}.cdd -vcd ../../run/\$(TEST)/TestBench.vcd 2>> ${cover_name}_sco_cov.log | tee >> ${cover_name}_sco_cov.log ;\\\n"; +# } - print MAKCOVFILE " \n"; - print MAKCOVFILE ".PHONY report_cov:\n"; - print MAKCOVFILE "report_cov:\n"; +# print MAKCOVFILE " \n"; +# print MAKCOVFILE ".PHONY report_cov:\n"; +# print MAKCOVFILE "report_cov:\n"; - foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) - { - my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; - my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; - print MAKCOVFILE "\tcovered report -cdd ${cover_name}.cdd 2> ${cover_name}_rep_cov.log | tee >> ${cover_name}_rep_cov.log ;\\\n"; - } +# foreach my $i_name ($doc->findnodes("//spirit:component/code_coverage/cover/name")) +# { +# my($cover_name) = $i_name ->findnodes('./text()')->to_literal ; +# my($cover_inst) = $i_name ->findnodes('../spirit:componentInstance/text()')->to_literal ; +# print MAKCOVFILE "\tcovered report -cdd ${cover_name}.cdd 2> ${cover_name}_rep_cov.log | tee >> ${cover_name}_rep_cov.log ;\\\n"; +# } #/*********************************************************************************************/ #/ */ @@ -415,15 +357,7 @@ #/*********************************************************************************************/ - $path = "${home}/${prefix}/ip/${component}/sim/lint"; - mkdir $path,0755 unless( -e $path ); - $path = "${home}/${prefix}/ip/${component}/sim/lint/${variant}"; - mkdir $path,0755 unless( -e $path ); - - symlink( "${home}/tools/bin/Makefile.lint", - "${home}/${prefix}/ip/${component}/sim/lint/${variant}/Makefile"); - $outfile ="${home}/${prefix}/ip/${component}/sim/lint/${variant}/params.ver"; open VER_PARM_FILE,">$outfile" or die "unable to open $outfile"; @@ -452,7 +386,7 @@ @wire_inst = ( ); - foreach my $i_name ($doc->findnodes("//spirit:component/spirit:model/ports/port/name")) + foreach my $i_name ($doc->findnodes("//spirit:component/spirit:model/spirit:ports/spirit:port/name")) { my($port_name) = $i_name ->findnodes('./text()')->to_literal ; my($left) = $i_name ->findnodes('../spirit:wire/spirit:vector/spirit:left/text()')->to_literal ; @@ -482,7 +416,7 @@ push(@wire_inst," dut \n ( \n"); $first = 1; - foreach my $i_name ($doc->findnodes("//spirit:component/spirit:model/ports/port/name")) + foreach my $i_name ($doc->findnodes("//spirit:component/spirit:model/spirit:ports/spirit:port/name")) { my($port_name) = $i_name ->findnodes('./text()')->to_literal ; if($first) @@ -520,10 +454,32 @@ print "CREATING sim files for $project $component $chip $name $variant \n"; - foreach my $i_name ($doc->findnodes("//spirit:component/sims/sim/name")) + + + + + + #/*********************************************************************************************/ + #/ */ + #/ Make synthesys filelist */ + #/ */ + #/ */ + #/ */ + #/ */ + #/*********************************************************************************************/ + + + + + my $parser = XML::LibXML->new(); + my $doc = $parser->parse_file("${home}/${prefix}/ip/${component}/soc/design.soc"); + + + foreach my $i_name ($doc->findnodes("//components/component/sims/sim[variant/text() = '$variant']")) { - my($simulation) = $i_name ->findnodes('./text()')->to_literal ; - my($configuration) = $i_name ->findnodes('../configuration/text()')->to_literal ; + my($simulation) = $i_name ->findnodes('name/text()')->to_literal ; + my($configuration) = $i_name ->findnodes('configuration/text()')->to_literal ; + print " sim files for $project $component $variant $simulation $configuration \n"; my $outfile ="${home}/${prefix}/ip/${component}/sim/run/${simulation}/Makefile"; open MAKSIMFILE,">$outfile" or die "unable to open $outfile"; @@ -608,47 +564,52 @@ } print SIM_MODEL_FILE "///////////////////////////////////////////////////////////////////////////////\n"; + + + + } - #/*********************************************************************************************/ - #/ */ - #/ Make synthesys filelist */ - #/ */ - #/ */ - #/ */ - #/ */ - #/*********************************************************************************************/ - print "Linking targets for $project $component $name\n"; - foreach my $i_name ($doc->findnodes("//spirit:component/chips/chip/name")) + + print " Building synthesis filelist for $prefix $project $component $variant \n" ; + + + + + + foreach my $i_name ($doc->findnodes("//chips/chip[variant/text() = '$variant']")) { - my($chip) = $i_name ->findnodes('./text()')->to_literal ; - my($chip_target) = $i_name ->findnodes('../target/text()')->to_literal ; - my($configuration) = $i_name ->findnodes('../configuration/text()')->to_literal ; + my($chip) = $i_name ->findnodes('name/text()')->to_literal ; + my($chip_target) = $i_name ->findnodes('target/text()')->to_literal ; + my($configuration) = $i_name ->findnodes('configuration/text()')->to_literal ; + my($chip_variant) = $i_name ->findnodes('variant/text()')->to_literal ; + + + print " $chip $chip_target $configration $chip_variant \n" ; + $outfile ="${home}/${prefix}/ip/${component}/syn/${chip}/filelist.syn"; open SYNFILE,">$outfile" or die "unable to open $outfile"; foreach my $i_line (@filelist_syn){print SYNFILE "$i_line";} - foreach my $i_name ($doc->findnodes("//chip[name/text() = '$chip']/brothers/module/name")) - { - my($child) = $i_name ->findnodes('./text()')->to_literal ; - my($child_parent) = $i_name ->findnodes('../component/text()')->to_literal ; - print SYNFILE "verilog work ../../../../${child_parent}/rtl/gen/syn/${child}.v\n"; - } - foreach my $i_name ($doc->findnodes("//chip[name/text() = '$chip']/children/module/name")) { my($child) = $i_name ->findnodes('./text()')->to_literal ; my($child_parent) = $i_name ->findnodes('../component/text()')->to_literal ; my($child_family) = $i_name ->findnodes('../project/text()')->to_literal ; - print SYNFILE "verilog work ../../../../../children/${child_family}/ip/${child_parent}/rtl/gen/syn/${child}.v\n"; + + if( $child_family eq "cde") { print SYNFILE "verilog work ./target/lib/syn/${child_parent}/${child}.v\n"; } + elsif( $child_family eq "local" ) { print SYNFILE "verilog work ${child}\n"; } + elsif( $child_family eq $project ) { print SYNFILE "verilog work ../../../../${child_parent}/rtl/gen/syn/${child}.v\n"; } + else { print SYNFILE "verilog work ../../../../../children/${child_family}/ip/${child_parent}/rtl/gen/syn/${child}.v\n";} } + foreach my $i_name ($doc->findnodes("//chip[name/text() = '$chip']/extra/local")) { my($local) = $i_name ->findnodes('./text()')->to_literal ; @@ -699,6 +660,10 @@ + + + + #/*********************************************************************************************/ #/ */ #/ */

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