URL
https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk
Subversion Repositories spacewiresystemc
Compare Revisions
- This comparison shows the changes necessary to convert path
/spacewiresystemc/trunk/vpi
- from Rev 21 to Rev 40
- ↔ Reverse comparison
Rev 21 → Rev 40
/vpi_test_stress/env_global_spw.cpp
47,10 → 47,15
#define SEND_TIME_CODE 0 |
#define WAIT_500_CYCLES 1 |
|
unsigned int LOOPBACK_VLOG_EN = 0; |
|
unsigned int state_test=0; |
unsigned int state_test_tx_timec=0; |
unsigned int timecode=0; |
|
unsigned int data_rx_received_cnt=0; |
unsigned int fct_send_cnt=0; |
|
unsigned int state_test_rx=0; |
|
unsigned int counter_null=0; |
/vpi_test_stress/global_init.h
6,8 → 6,8
vpiHandle TX_TICK = vpi_handle_by_name("module_tb.TOP_TX_TICK",NULL); |
vpiHandle TX_TIME = vpi_handle_by_name("module_tb.TOP_TX_TIME",NULL); |
|
vpiHandle CREDITERRORRX = vpi_handle_by_name("module_tb.CREDIT_ERROR_RX",NULL); |
vpiHandle TOPSENDFCTNOW = vpi_handle_by_name("module_tb.TOP_SEND_FCT_NOW",NULL); |
vpiHandle BUFFER_READ = vpi_handle_by_name("module_tb.BUFFER_READ",NULL); |
//vpiHandle TOPSENDFCTNOW = vpi_handle_by_name("module_tb.TOP_SEND_FCT_NOW",NULL); |
|
vpiHandle LINKSTART = vpi_handle_by_name("module_tb.LINK_START",NULL); |
vpiHandle LINKDISABLE = vpi_handle_by_name("module_tb.LINK_DISABLE",NULL); |
52,8 → 52,8
vpi_put_value(LINKDISABLE, &dout_value, NULL, vpiNoDelay); |
vpi_put_value(AUTOSTART, &dout_value, NULL ,vpiNoDelay); |
|
vpi_put_value(CREDITERRORRX, &dout_value, NULL , vpiNoDelay); |
vpi_put_value(TOPSENDFCTNOW, &dout_value, NULL , vpiNoDelay); |
//vpi_put_value(CREDITERRORRX, &dout_value, NULL , vpiNoDelay); |
vpi_put_value(BUFFER_READ, &dout_value, NULL, vpiNoDelay); |
|
vpi_put_value(TX_DATA, &dout_value, NULL , vpiNoDelay); |
vpi_put_value(TX_WRITE, &dout_value, NULL, vpiNoDelay); |
/vpi_test_stress/global_reset.h
9,7 → 9,7
reset.value.integer = 0; |
vpi_put_value(RESETnSPWUL, &reset, NULL, vpiNoDelay); |
state_test = 0; |
state_test_rx=1; |
state_test_rx=0; |
position = counter = 0; |
SC_TOP->end_tx_test(); |
}else |
/vpi_test_stress/receive_rx_data_spw_ultra_light.h
1,34 → 1,77
static int receive_rx_data_spw_ultra_light_calltf(char*user_data) |
{ |
vpiHandle CREDIT_ERROR_RX = vpi_handle_by_name("module_tb.CREDIT_ERROR_RX",NULL); |
vpiHandle SEND_FCT_NOW = vpi_handle_by_name("module_tb.TOP_SEND_FCT_NOW",NULL); |
vpiHandle DATARX_FLAG = vpi_handle_by_name("module_tb.DATARX_FLAG",NULL); |
vpiHandle BUFFER_READ = vpi_handle_by_name("module_tb.BUFFER_READ",NULL); |
vpiHandle F_FULL_RX = vpi_handle_by_name("module_tb.F_FULL_RX",NULL); |
vpiHandle F_EMPTY_RX = vpi_handle_by_name("module_tb.F_EMPTY_RX",NULL); |
vpiHandle COUNTER_FIFO_RX = vpi_handle_by_name("module_tb.COUNTER_FIFO_RX",NULL); |
|
vpiHandle DATARX_FLAG = vpi_handle_by_name("module_tb.DATARX_FLAG",NULL); |
vpiHandle BUFFER_WRITE = vpi_handle_by_name("module_tb.BUFFER_WRITE",NULL); |
|
value_to_rx.format = vpiIntVal; |
|
if(SC_TOP->reset_set()) |
{ |
|
value_to_rx.value.integer = 0; |
vpi_put_value(SEND_FCT_NOW, &value_to_rx, NULL, vpiNoDelay); |
|
vpi_get_value(DATARX_FLAG, &value_to_rx); |
SC_TOP->data_o(value_to_rx.value.integer,data_rx_received_cnt); |
//printf("state: %d\n",state_test_rx); |
|
switch(state_test_rx) |
{ |
case 0: |
vpi_get_value(F_EMPTY_RX, &value_to_rx); |
if(value_to_rx.value.integer == 1) |
state_test_rx = 1; |
break; |
case 1: |
value_to_rx.value.integer = 0; |
vpi_put_value(BUFFER_READ, &value_to_rx, NULL, vpiNoDelay); |
state_test_rx = 2; |
break; |
case 2: |
value_to_rx.value.integer = 0; |
vpi_get_value(COUNTER_FIFO_RX, &value_to_rx); |
if(value_to_rx.value.integer > 0) |
{ |
state_test_rx = 3; |
} |
break; |
case 3: |
|
if(LOOPBACK_VLOG_EN == 0) |
{ |
vpi_get_value(DATARX_FLAG, &value_to_rx); |
SC_TOP->data_o(value_to_rx.value.integer,data_rx_received_cnt); |
|
data_rx_received_cnt++; |
data_rx_received_cnt++; |
|
if(data_rx_received_cnt == 100) |
data_rx_received_cnt = 0; |
if(data_rx_received_cnt == SC_TOP->size_data_test_sc()) |
data_rx_received_cnt = 0; |
} |
|
fct_send_cnt++; |
if(LOOPBACK_VLOG_EN == 1) |
{ |
vpi_get_value(DATARX_FLAG, &value_to_rx); |
SC_TOP->data_rx_vlog_loopback_o(value_to_rx.value.integer,data_rx_received_cnt); |
|
data_rx_received_cnt++; |
|
if(fct_send_cnt == 7) |
{ |
value_to_rx.value.integer = 1; |
vpi_put_value(SEND_FCT_NOW, &value_to_rx, NULL, vpiNoDelay); |
fct_send_cnt = 0; |
if(data_rx_received_cnt == SC_TOP->size_data_test_vlog()) |
data_rx_received_cnt = 0; |
} |
|
state_test_rx = 4; |
break; |
case 4: |
value_to_rx.value.integer = 1; |
vpi_put_value(BUFFER_READ, &value_to_rx, NULL, vpiNoDelay); |
state_test_rx = 5; |
break; |
case 5: |
value_to_rx.value.integer = 0; |
vpi_put_value(BUFFER_READ, &value_to_rx, NULL, vpiNoDelay); |
|
vpi_get_value(F_EMPTY_RX, &value_to_rx); |
if(value_to_rx.value.integer == 1) |
state_test_rx = 1; |
break; |
} |
|
} |
/vpi_test_stress/run_sim.h
1,10 → 1,12
static int run_sim_calltf(char*user_data) |
{ |
vpiHandle DOUT = vpi_handle_by_name("module_tb.TOP_DOUT", NULL); |
vpiHandle SOUT = vpi_handle_by_name("module_tb.TOP_SOUT", NULL); |
vpiHandle DIN = vpi_handle_by_name("module_tb.TOP_DIN", NULL); |
vpiHandle SIN = vpi_handle_by_name("module_tb.TOP_SIN", NULL); |
|
#ifndef LOOPBACK_VLOG |
#define LOOPBACK_VLOG |
vpiHandle DOUT = vpi_handle_by_name("module_tb.TOP_DOUT", NULL); |
vpiHandle SOUT = vpi_handle_by_name("module_tb.TOP_SOUT", NULL); |
vpiHandle DIN = vpi_handle_by_name("module_tb.TOP_DIN", NULL); |
vpiHandle SIN = vpi_handle_by_name("module_tb.TOP_SIN", NULL); |
#endif |
vpiHandle DTA = vpi_handle_by_name("module_tb.SPW_SC_FSM", NULL); |
//vpiHandle TX_CLOCK_OUT = vpi_handle_by_name("module_tb.TX_CLOCK_OUT", NULL); |
|
33,28 → 35,36
} |
else |
{ |
|
|
SC_TOP->run_sim(); |
|
sin_value.value.integer = SC_TOP->get_value_sout(); |
din_value.value.integer = SC_TOP->get_value_dout(); |
vpi_put_value(DIN, &din_value, NULL, vpiNoDelay); |
vpi_put_value(SIN, &sin_value, NULL, vpiNoDelay); |
if(LOOPBACK_VLOG_EN == 0) |
{ |
sin_value.value.integer = SC_TOP->get_value_sout(); |
din_value.value.integer = SC_TOP->get_value_dout(); |
vpi_put_value(DIN, &din_value, NULL, vpiNoDelay); |
vpi_put_value(SIN, &sin_value, NULL, vpiNoDelay); |
|
vpi_get_value(SOUT, &sout_value); |
vpi_get_value(DOUT, &dout_value); |
SC_TOP->set_rx_sin(sout_value.value.integer); |
SC_TOP->set_rx_din(dout_value.value.integer); |
vpi_get_value(SOUT, &sout_value); |
vpi_get_value(DOUT, &dout_value); |
|
fsm_value.value.integer = SC_TOP->get_spw_fsm(); |
vpi_put_value(DTA, &fsm_value, NULL, vpiNoDelay); |
SC_TOP->set_rx_sin(sout_value.value.integer); |
SC_TOP->set_rx_din(dout_value.value.integer); |
|
vpi_get_value(tx_clock, &sout_value); |
fsm_value.value.integer = SC_TOP->get_spw_fsm(); |
vpi_put_value(DTA, &fsm_value, NULL, vpiNoDelay); |
|
vpi_get_value(tx_clock, &sout_value); |
|
} |
|
if(sout_value.value.integer != SC_TOP->verilog_frequency()) |
{ |
sin_value.value.integer = SC_TOP->verilog_frequency(); |
vpi_put_value(tx_clock, &sin_value, NULL, vpiNoDelay); |
} |
|
//fsm_value.value.integer = SC_TOP->clock_tx(); |
//vpi_put_value(TX_CLOCK_OUT, &fsm_value, NULL, vpiNoDelay); |
|
/vpi_test_stress/write_tx_data_spw_ultra_light.h
2,15 → 2,19
{ |
vpiHandle TX_DATA = vpi_handle_by_name("module_tb.TOP_TX_DATA",NULL); |
vpiHandle TX_WRITE = vpi_handle_by_name("module_tb.TOP_TX_WRITE",NULL); |
vpiHandle TX_READY = vpi_handle_by_name("module_tb.TOP_TX_READY",NULL); |
vpiHandle F_FULL = vpi_handle_by_name("module_tb.F_FULL",NULL); |
vpiHandle F_EMPTY = vpi_handle_by_name("module_tb.F_EMPTY",NULL); |
vpiHandle COUNTER_FIFO_TX = vpi_handle_by_name("module_tb.COUNTER_FIFO_TX",NULL); |
|
value_to_tx.format = vpiIntVal; |
|
if(SC_TOP->reset_set()) |
{ |
|
if(SC_TOP->start_tx_test()) |
{ |
|
//printf("state: %d\n",state_test); |
|
switch(state_test) |
{ |
case SEND_DATA: |
17,47 → 21,53
|
value_to_tx.value.integer = 0; |
vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
|
value_to_tx.value.integer = SC_TOP->take_data(position); |
vpi_put_value(TX_DATA, &value_to_tx, NULL, vpiNoDelay); |
|
state_test = 59; |
break; |
case 59: |
|
value_to_tx.value.integer = SC_TOP->take_data(position); |
vpi_put_value(TX_DATA, &value_to_tx, NULL, vpiNoDelay); |
|
vpi_get_value(TX_READY, &value_to_tx); |
vpi_get_value(COUNTER_FIFO_TX, &value_to_tx); |
|
if(value_to_tx.value.integer == 0) |
if(value_to_tx.value.integer < 63 ) |
{ |
value_to_tx.value.integer =1; |
value_to_tx.value.integer = 1; |
vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
state_test = WAIT_DATA; |
position = position + 1; |
} |
else |
{ |
|
|
} |
|
break; |
case WAIT_DATA: |
|
value_to_tx.value.integer = 0; |
vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
|
//vpi_get_value(F_FULL, &value_to_tx); |
|
vpi_get_value(TX_READY, &value_to_tx); |
|
if(value_to_tx.value.integer == 1) |
state_test = SEND_DATA; |
|
if(position < SC_TOP->size_data_test_vlog()) |
{ |
state_test = SEND_DATA; |
position = position + 1; |
|
if(position > SC_TOP->size_data_test()) |
{ |
value_to_tx.value.integer = 0; |
vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
state_test = 60; |
} |
else |
{ |
value_to_tx.value.integer = 0; |
vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
} |
//value_to_tx.value.integer = 0; |
//vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
state_test = SEND_DATA; |
} |
else |
{ |
} |
//value_to_tx.value.integer = 0; |
//vpi_put_value(TX_WRITE, &value_to_tx, NULL, vpiNoDelay); |
state_test = 60; |
printf("value is %d\n",position); |
} |
|
break; |
case 60: |
SC_TOP->end_tx_test(); |
69,6 → 79,7
{ |
position = 0; |
} |
|
} |
|
return 0; |
/vpi_test_suit/receive_rx_spw.h
52,7 → 52,7
value_to_rx.value.integer = 0; |
vpi_put_value(RD_DATA, &value_to_rx, NULL, vpiNoDelay); |
|
if(data_iteration_vlog > SC_TOP->size_data_test()) |
if(data_iteration_vlog > SC_TOP->size_data_test_sc()) |
data_iteration_vlog = 0; |
break; |
} |
/vpi_test_suit/write_tx_spw.h
26,7 → 26,7
value_to_tx.value.integer = 0; |
vpi_put_value(WR_DATA, &value_to_tx, NULL, vpiNoDelay); |
|
if(position <= SC_TOP->size_data_test()) |
if(position <= SC_TOP->size_data_test_vlog()) |
{ |
vpi_get_value(TX_FULL, &value_to_tx); |
if(value_to_tx.value.integer == 1) |
39,7 → 39,7
position = position + 1; |
} |
} |
if(position > SC_TOP->size_data_test()) |
if(position > SC_TOP->size_data_test_vlog()) |
{ |
state_test = 60; |
} |