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URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

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  • This comparison shows the changes necessary to convert path
    /spi/tags/rel_7/sim/run
    from Rev 24 to Rev 27
    Reverse comparison

Rev 24 → Rev 27

/sim
0,0 → 1,14
ncprep \
../../bench/verilog/tb_spi_top.v \
../../bench/verilog/wb_master_model.v \
../../bench/verilog/spi_slave_model.v \
../../rtl/verilog/spi_top.v \
../../rtl/verilog/spi_clgen.v \
../../rtl/verilog/spi_shift.v \
+incdir+../../rtl/verilog/ \
+mess \
+access+r \
+notimingchecks \
+overwrite \
+ncsimargs+"-errormax 10" \
+tcl+"./tcl.scr"
sim Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: tcl.scr =================================================================== --- tcl.scr (nonexistent) +++ tcl.scr (revision 27) @@ -0,0 +1,5 @@ +database -open waves -into ../out/wave/spi -default +probe -create -shm tb_spi_top -all -variables -depth 8 +stop -create -time 25000000 -relative +run +quit

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