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URL https://opencores.org/ocsvn/sqmusic/sqmusic/trunk

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    /sqmusic/trunk/sqm
    from Rev 3 to Rev 4
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Rev 3 → Rev 4

/sqm_pwm.v
0,0 → 1,158
/*
SQmusic
logarithmic PWM controller to use with SQMUSIC
Version 0.1, tested on simulation only with Capcom's 1942
 
(c) Jose Tejada Gomez, 11th May 2013
You can use this file following the GNU GENERAL PUBLIC LICENSE version 3
Read the details of the license in:
http://www.gnu.org/licenses/gpl.txt
Send comments to: jose.tejada@ieee.org
 
*/
`timescale 1ns / 1ps
module SQM_PWM(
input clk, // VHF clock (>33 MHz)
input reset_n,
input [3:0]A, input [3:0]B, input [3:0]C, // input channels
output Y
);
 
 
SQM_PWM_1 apwm( .clk(clk), .reset_n(reset_n), .din(A), .pwm(y_a) );
SQM_PWM_1 bpwm( .clk(clk), .reset_n(reset_n), .din(B), .pwm(y_b) );
SQM_PWM_1 cpwm( .clk(clk), .reset_n(reset_n), .din(C), .pwm(y_c) );
 
assign Y=y_a | y_b | y_c;
endmodule
 
////////////////////////////////////////////////////
// 1 channel only
module SQM_PWM_1(
input clk, // VHF clock (>33 MHz)
input reset_n,
input [3:0]din,
output reg pwm
);
 
reg [7:0] count, last0, last1;
wire [7:0]rep0, rep1;
 
SQM_PWM_LOG dec( .din(din), .rep0(rep0), .rep1(rep1), .zero(zero) );
 
always @(posedge clk or negedge reset_n) begin
if( !reset_n ) begin
count=0;
last0=0;
last1=1;
end
else
if( zero ) begin
pwm=0;
count=0;
end
else if( last0!=rep0 || last1!=rep1 ) begin
last0 <= rep0;
last1 <= rep1;
count = 0;
pwm=0;
end
else if( last0==1 && last1==1 ) begin
pwm=clk;
count=0;
end
else begin
if( pwm && count==last1-1 ) begin
count=0;
pwm=0;
end
else if( !pwm && count==last0-1 ) begin
count=0;
pwm=1;
end
else begin
count<=count+1;
pwm<=pwm;
end
end
end
endmodule
 
module SQM_PWM_LOG(
input [3:0]din,
output reg [7:0] rep0, // "L" repetition
output reg [7:0] rep1, // "H" repetition
output zero
);
 
assign zero = din==0;
 
always @(din)
case (din)
1: begin
rep0=64;
rep1=1;
end
2: begin
rep0=61;
rep1=1;
end
3: begin
rep0=32;
rep1=1;
end
4: begin
rep0=61;
rep1=2;
end
5: begin
rep0=16;
rep1=1;
end
6: begin
rep0=61;
rep1=4;
end
7: begin
rep0=8;
rep1=1;
end
8: begin
rep0=61;
rep1=8;
end
9: begin
rep0=61;
rep1=16;
end
10: begin
rep0=61;
rep1=8;
end
11: begin
rep0=2;
rep1=1;
end
12: begin
rep0=61;
rep1=32;
end
13: begin
rep0=1;
rep1=1;
end
14: begin
rep0=61;
rep1=64;
end
15: begin
rep0=1;
rep1=1;
end
default: begin
rep0=1;
rep1=1;
end
endcase
endmodule
/sqmusic.v
17,7 → 17,9
provides a 2-byte memory map as expected by Capcom games
*/
`timescale 1ns / 1ps
module AY_3_8910_capcom(
module AY_3_8910_capcom
#( parameter dump_writes=0, parameter id=0 )
(
input reset_n,
input clk, // CPU clock
input sound_clk, // normally slower than the CPU clock
57,17 → 59,19
end
end
 
SQMUSIC core( .reset_n(reset_n), .clk(sound_clk), .data_in(latches[1]),
SQMUSIC #(dump_writes, id) core( .reset_n(reset_n), .clk(sound_clk), .data_in(latches[1]),
.adr( latches[0][3:0] ), .rd(1'b0), .wr(core_wr), .A(A), .B(B), .C(C) );
endmodule
 
/* The AY core does
*/
module SQMUSIC( // pins are not multiplexed
module SQMUSIC
#( parameter dump_writes=0, parameter id=0 ) // set to 1 to dump register writes
( // note that input ports are not multiplexed
input reset_n,
input clk,
input [7:0] data_in,
output reg [7:0] data_out, // read functionality not implemented yet
output reg [7:0] data_out,
input [3:0] adr,
input rd, // read
input wr, // write
124,7 → 128,12
else begin
if( rd )
data_out=regarray[ adr ];
else if( wr ) regarray[adr]=data_in;
else if( wr ) begin
regarray[adr]=data_in;
if( dump_writes ) begin
$display("#%d, %t, %d, %d", id, $realtime, adr, data_in );
end
end
end
end
 
/sqm_pwm_1_tb.v
0,0 → 1,44
/*
SQmusic
logarithmic PWM controller to use with SQMUSIC
Version 0.1, tested on simulation only with Capcom's 1942
 
(c) Jose Tejada Gomez, 11th May 2013
You can use this file following the GNU GENERAL PUBLIC LICENSE version 3
Read the details of the license in:
http://www.gnu.org/licenses/gpl.txt
Send comments to: jose.tejada@ieee.org
 
*/
 
// Compile with:
// iverilog sqm_pwm_1_tb.v sqm_pwm.v -s sqm_pwm_1_tb -o sqm_pwm_1_tb
 
`timescale 1ns/1ps
module sqm_pwm_1_tb;
 
reg clk;
always begin
clk=0;
#10 clk <= ~clk;
end
 
reg [3:0]A;
always begin
A=0;
#5000 A <= A+1;
end
 
reg reset_n;
initial begin
$dumpvars();
$dumpon;
reset_n=0;
#15 reset_n=1;
#80000 $finish;
end
 
SQM_PWM_1 apwm( .clk(clk), .reset_n(reset_n), .din(A), .pwm(y_a) );
 
endmodule

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