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URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

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  • This comparison shows the changes necessary to convert path
    /srdydrdy_lib/trunk/examples/bridge/env
    from Rev 22 to Rev 24
    Reverse comparison

Rev 22 → Rev 24

/gmii_driver.v
21,6 → 21,35
forever rx_clk = #4 ~rx_clk;
end
 
task gencrc32;
input [7:0] length;
output [31:0] icrc;
reg [31:0] nxt_icrc;
integer i, len;
begin
icrc = {32{1'b1}};
for (len=0; len<length; len=len+1)
begin
nxt_icrc[7:0] = icrc[7:0] ^ rxbuf[len];
nxt_icrc[31:8] = icrc[31:8];
 
for (i=0; i<8; i=i+1)
begin
if (nxt_icrc[0])
nxt_icrc = nxt_icrc[31:1] ^ 32'hEDB88320;
else
nxt_icrc = nxt_icrc[31:1];
end
 
icrc = nxt_icrc;
end // for (len=0; len<length; len=len+1)
 
icrc = ~icrc;
end
endtask
/* -----\/----- EXCLUDED -----\/-----
// Copied from: http://www.mindspring.com/~tcoonan/gencrc.v
//
// Generate a (DOCSIS) CRC32.
66,6 → 95,7
crc32_result = ~{temp[7:0], temp[15:8], temp[23:16], temp[31:24]};
end
endtask
-----/\----- EXCLUDED -----/\----- */
 
task print_packet;
input [31:0] length;
92,9 → 122,10
for (p=12; p<length; p=p+1)
rxbuf[p] = $random;
 
gencrc32 (length);
{ rxbuf[length-4], rxbuf[length-3],
rxbuf[length-2], rxbuf[length-1] } = crc32_result;
//gencrc32 (length);
gencrc32 (length, crc32_result);
{ rxbuf[length-1], rxbuf[length-2],
rxbuf[length-3], rxbuf[length-4] } = crc32_result;
 
$display ("%m : Sending packet DA=%x SA=%x of length %0d", da, sa, length);
print_packet (length);
/bridge.vf
19,6 → 19,7
../rtl/port_ring_tap.v
../rtl/sd_rx_gigmac.v
../rtl/sd_tx_gigmac.v
../rtl/mac_crc32.v
+libext+.v
-y ../../../rtl/verilog/buffers
-y ../../../rtl/verilog/closure

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