URL
https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk
Subversion Repositories srdydrdy_lib
Compare Revisions
- This comparison shows the changes necessary to convert path
/srdydrdy_lib/trunk/rtl
- from Rev 10 to Rev 11
- ↔ Reverse comparison
Rev 10 → Rev 11
/verilog/buffers/sd_fifo_s.v
37,7 → 37,7
input p_reset, |
output p_srdy, |
input p_drdy, |
output [width-1:0] p_data |
output reg [width-1:0] p_data |
); |
|
localparam asz = $clog2(depth); |
48,7 → 48,6
wire [asz:0] rdptr_tail, rdptr_tail_sync; |
wire wr_en; |
wire [asz:0] wrptr_head, wrptr_head_sync; |
reg [width-1:0] p_data; |
reg dly_rd_en; |
wire [asz-1:0] rd_addr, wr_addr; |
|
/verilog/buffers/sd_fifo_tail_b.v
131,11 → 131,11
cur_rdptr <= `SDLIB_DELAY nxt_cur_rdptr; |
end |
|
reg [asz-1:0] rdaddr_s0, rdaddr_a, rdaddr_b; |
reg [asz-1:0] nxt_com_rdptr; |
generate |
if (commit == 1) |
begin : gen_s0 |
reg [asz-1:0] rdaddr_s0, rdaddr_a, rdaddr_b; |
reg [asz-1:0] nxt_com_rdptr; |
|
always @(posedge clk) |
begin |
173,7 → 173,7
|
generate |
if (commit == 1) |
begin |
begin : gen_s2 |
wire [asz-1:0] ip_rdaddr, p_rdaddr; |
|
sd_input #(asz+width) rbuf1 |
201,7 → 201,7
end |
end // if (commit == 1) |
else |
begin |
begin : gen_ns2 |
sd_input #(width) rbuf1 |
(.clk (clk), .reset (p_abort | reset), |
.c_srdy (prev_re), |