OpenCores

/trunk/basic_system/software/bootloader/build/storm_boot_startup_code.lst

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/trunk/basic_system/software/bootloader/build/storm_boot_startup_code.S

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/trunk/basic_system/software/bootloader/build/STORMcore-ROM.ld

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/trunk/basic_system/software/bootloader/build/storm_boot_startup_code - Kopie.S

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/trunk/basic_system/software/bootloader/storm_extractor.exe Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream

/trunk/basic_system/software/bootloader/storm_extractor.exe

trunk/basic_system/software/bootloader/storm_extractor.exe Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/basic_system/software/bootloader/terminal_stuff.txt =================================================================== --- trunk/basic_system/software/bootloader/terminal_stuff.txt (nonexistent) +++ trunk/basic_system/software/bootloader/terminal_stuff.txt (revision 13) @@ -0,0 +1,101 @@ ++--------------------------------------------------------------+ +| <<< STORM Core Processor System - By Stephan Nolting >>> | ++--------------------------------------------------------------+ +| Bootloader for STORM SoC Version: 30.04.2012 | +| Contact: stnolting@googlemail.com | ++--------------------------------------------------------------+ + + < Welcome to the STORM SoC bootloader console! > + < Select an operation from the menu below or press > + < the boot key for immediate application start > + + a - Program core RAM via UART_0 + b - Core RAM dump + c - Boot from I2C EEPROM (i2c0, 0xA0) + d - Program I2C EEPROM (i2c0, 0xA0) via UART_0 + e - Show content of I2C EEPROM (i2c0, 0xA0) + r - Restart system + x - Jump to application + +Select: _ + + + + + + . . ) . . . + . * . * + . . . * + . . * . + _|___ * /\ . . + . . _|__ |# |. o / \ __ . +___ | # |_ | # | __|___ | # |__ . | #| _ + # |____| |#| | |__| # | . | # |# |___| |___| + #| # | # #|_|__|_# |# | # # |___|# | |# | # # + |# |# | # | # | |# #| #| # | #|__#| # +_#_|____|____|______|___|__|__#___|_#_|____|______|_#______ + + <<< STORM Core Processor System - By Stephan Nolting >>> +____________________________________________________________ + + a - Program core RAM via UART_0 + b - Core RAM dump + c - Boot from I2C EEPROM (i2c0, 0xA0) + d - Program I2C EEPROM (i2c0, 0xA0) via UART_0 + e - Show content of I2C EEPROM (i2c0, 0xA0) + r - Restart system + x - Jump to application +____________________________________________________________ + +Select: _ + + + + + + + + + + + + + + + + + + . . ) . . + . * . * + . . . + . . * . + * /\ . + . _|__ . . o / \ + __ | # |_ __|___ | # |__ . + # |____| |#| . __| # | | # |# |___ + #| # | # #|_|_ |# | # # |___|# | |# + |# |# | #| | |# #| #| # | #|__# + #_|____|____|___|______|__|__#___|_#_|____|______ + /'\ + / ' \ + / ' \ + / | \ + \|/ / \ + / | \ + / | \ +---------+ + / \ | HANOVER | + / | \ +---------+ + / | \ 8 + / \ 8 + / | \ 8 + / | \ .~8~.. + / | \ + / \ \|/ + / | \ + / | \ + / | \ + + + + + Index: trunk/basic_system/software/bootloader/main.map =================================================================== --- trunk/basic_system/software/bootloader/main.map (nonexistent) +++ trunk/basic_system/software/bootloader/main.map (revision 13) @@ -0,0 +1,264 @@ + +Memory Configuration + +Name Origin Length Attributes +ROM 0xfff00000 0x00002000 xr +RAM 0x00000000 0x00008000 rw +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD build/storm_boot_startup_code.o +LOAD main.o +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/be\libc.a +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/be\libm.a +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/be\libc.a +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/be\libgcc.a +START GROUP +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/be\libgcc.a +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/be\libg.a +LOAD c:/winarm/bin/../lib/gcc/arm-elf/4.1.1/../../../../arm-elf/lib/be\libc.a +END GROUP + 0x00008000 STACK_SIZE = 0x8000 + +.text 0xfff00000 0x1cd8 + *storm_startup_code.o(.text) + *(.text) + .text 0xfff00000 0x64 build/storm_boot_startup_code.o + 0xfff00058 reset + 0xfff00000 _boot + 0xfff00020 _mainCRTStartup + 0xfff00058 abort + 0xfff00020 _start + 0xfff00058 _reset + 0xfff00058 exit + 0xfff00020 start + .text 0xfff00064 0xfe0 main.o + 0xfff00274 io_spi0_disable + 0xfff00088 io_set_gpio0_pin + 0xfff000c8 io_toggle_gpio0_pin + 0xfff000e4 io_set_gpio0_port + 0xfff004e8 set_cmsr + 0xfff000a4 io_clr_gpio0_pin + 0xfff00298 io_i2c0_speed + 0xfff00214 io_spi0_speed + 0xfff00550 uart0_scanf + 0xfff00258 io_spi0_enable + 0xfff00220 io_spi0_trans + 0xfff002c4 io_i2c0_byte_transfer + 0xfff0048c set_syscpreg + 0xfff005a0 uart0_print_buffer + 0xfff00518 uart0_printf + 0xfff004e0 get_cmsr + 0xfff00634 hex_string_to_long + 0xfff00700 main + 0xfff005c4 long_to_hex_string + 0xfff000f0 io_set_pwm + 0xfff00504 io_disable_irq + 0xfff006d8 delay + 0xfff003f4 get_syscpreg + 0xfff001bc io_uart0_read_byte + 0xfff001f0 io_spi0_config + 0xfff001d4 io_uart0_send_byte + 0xfff006ac qbytes_to_long + 0xfff00064 io_read_gpio0_pin + 0xfff004f0 io_enable_irq + 0xfff0007c io_read_gpio0_port + 0xfff0016c io_get_pwm + *(.rodata) + *(.rodata*) + .rodata.str1.4 + 0xfff01044 0xc94 main.o + 0xca0 (size before relaxing) + *(.glue_7) + .glue_7 0xfff01cd8 0x0 build/storm_boot_startup_code.o + .glue_7 0xfff01cd8 0x0 main.o + *(.glue_7t) + .glue_7t 0xfff01cd8 0x0 build/storm_boot_startup_code.o + .glue_7t 0xfff01cd8 0x0 main.o + 0xfff01cd8 . = ALIGN (0x4) + +.ctors 0xfff01cd8 0x0 + 0xfff01cd8 PROVIDE (__ctors_start__, .) + *(SORT(.ctors.*)) + *(.ctors) + 0xfff01cd8 PROVIDE (__ctors_end__, .) + +.dtors 0xfff01cd8 0x0 + 0xfff01cd8 PROVIDE (__dtors_start__, .) + *(SORT(.dtors.*)) + *(.dtors) + 0xfff01cd8 PROVIDE (__dtors_end__, .) + 0xfff01cd8 . = ALIGN (0x4) + 0xfff01cd8 _etext = . + 0xfff01cd8 PROVIDE (etext, .) + +.data 0x00000000 0x0 load address 0xfff01cd8 + 0x00000000 _data = . + *(.data) + .data 0x00000000 0x0 build/storm_boot_startup_code.o + .data 0x00000000 0x0 main.o + 0x00000000 . = ALIGN (0x4) + 0x00000000 _edata = . + 0x00000000 PROVIDE (edata, .) + +.bss 0x00000000 0x0 + 0x00000000 __bss_start = . + 0x00000000 __bss_start__ = . + *(.bss) + .bss 0x00000000 0x0 build/storm_boot_startup_code.o + .bss 0x00000000 0x0 main.o + *(COMMON) + 0x00000000 . = ALIGN (0x4) + 0x00000000 . = ALIGN (0x4) + 0x00000000 __bss_end__ = . + 0x00000000 PROVIDE (__bss_end, .) + +.stack 0x00000000 0x8000 + 0x00000000 . = ALIGN (0x100) + 0x00008000 . = (. + STACK_SIZE) + *fill* 0x00000000 0x8000 00 + 0x00008000 PROVIDE (_stack, .) + 0x00008000 _end = . + 0x00008000 PROVIDE (end, .) + +.stab + *(.stab) + +.stabstr + *(.stabstr) + +.stab.excl + *(.stab.excl) + +.stab.exclstr + *(.stab.exclstr) + +.stab.index + *(.stab.index) + +.stab.indexstr + *(.stab.indexstr) + +.comment 0x00000000 0x1b + *(.comment) + .comment 0x00000000 0x1b main.o + +.debug + *(.debug) + +.line + *(.line) + +.debug_srcinfo + *(.debug_srcinfo) + +.debug_sfnames + *(.debug_sfnames) + +.debug_aranges 0x00000000 0x40 + *(.debug_aranges) + .debug_aranges + 0x00000000 0x20 build/storm_boot_startup_code.o + .debug_aranges + 0x00000020 0x20 main.o + +.debug_pubnames + 0x00000000 0x25a + *(.debug_pubnames) + .debug_pubnames + 0x00000000 0x25a main.o + +.debug_info 0x00000000 0x7cc + *(.debug_info .gnu.linkonce.wi.*) + .debug_info 0x00000000 0x83 build/storm_boot_startup_code.o + .debug_info 0x00000083 0x749 main.o + +.debug_abbrev 0x00000000 0x1db + *(.debug_abbrev) + .debug_abbrev 0x00000000 0x14 build/storm_boot_startup_code.o + .debug_abbrev 0x00000014 0x1c7 main.o + +.debug_line 0x00000000 0x354 + *(.debug_line) + .debug_line 0x00000000 0x69 build/storm_boot_startup_code.o + .debug_line 0x00000069 0x2eb main.o + +.debug_frame 0x00000000 0x268 + *(.debug_frame) + .debug_frame 0x00000000 0x268 main.o + +.debug_str 0x00000000 0x335 + *(.debug_str) + .debug_str 0x00000000 0x335 main.o + 0x35d (size before relaxing) + +.debug_loc 0x00000000 0x928 + *(.debug_loc) + .debug_loc 0x00000000 0x928 main.o + +.debug_macinfo + *(.debug_macinfo) + +.debug_weaknames + *(.debug_weaknames) + +.debug_funcnames + *(.debug_funcnames) + +.debug_typenames + *(.debug_typenames) + +.debug_varnames + *(.debug_varnames) +OUTPUT(main.elf elf32-bigarm) + +Cross Reference Table + +Symbol File +__bss_end__ build/storm_boot_startup_code.o +__bss_start build/storm_boot_startup_code.o +_boot build/storm_boot_startup_code.o +_data build/storm_boot_startup_code.o +_edata build/storm_boot_startup_code.o +_etext build/storm_boot_startup_code.o +_mainCRTStartup build/storm_boot_startup_code.o +_reset build/storm_boot_startup_code.o +_stack build/storm_boot_startup_code.o +_start build/storm_boot_startup_code.o +abort build/storm_boot_startup_code.o +delay main.o +exit build/storm_boot_startup_code.o +get_cmsr main.o +get_syscpreg main.o +hex_string_to_long main.o +io_clr_gpio0_pin main.o +io_disable_irq main.o +io_enable_irq main.o +io_get_pwm main.o +io_i2c0_byte_transfer main.o +io_i2c0_speed main.o +io_read_gpio0_pin main.o +io_read_gpio0_port main.o +io_set_gpio0_pin main.o +io_set_gpio0_port main.o +io_set_pwm main.o +io_spi0_config main.o +io_spi0_disable main.o +io_spi0_enable main.o +io_spi0_speed main.o +io_spi0_trans main.o +io_toggle_gpio0_pin main.o +io_uart0_read_byte main.o +io_uart0_send_byte main.o +long_to_hex_string main.o +main main.o + build/storm_boot_startup_code.o +qbytes_to_long main.o +reset build/storm_boot_startup_code.o +set_cmsr main.o +set_syscpreg main.o +start build/storm_boot_startup_code.o +uart0_print_buffer main.o +uart0_printf main.o +uart0_scanf main.o Index: trunk/basic_system/software/bootloader/storm_program.bin =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/basic_system/software/bootloader/storm_program.bin =================================================================== --- trunk/basic_system/software/bootloader/storm_program.bin (nonexistent) +++ trunk/basic_system/software/bootloader/storm_program.bin (revision 13)

trunk/basic_system/software/bootloader/storm_program.bin Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/basic_system/software/bootloader/main.lss =================================================================== --- trunk/basic_system/software/bootloader/main.lss (nonexistent) +++ trunk/basic_system/software/bootloader/main.lss (revision 13) @@ -0,0 +1,2821 @@ + +main.elf: file format elf32-bigarm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .text 00001cd8 fff00000 fff00000 00008000 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 1 .stack 00008000 00000000 00000000 00000074 2**0 + ALLOC + 2 .comment 0000001b 00000000 00000000 00009cd8 2**0 + CONTENTS, READONLY + 3 .debug_aranges 00000040 00000000 00000000 00009cf8 2**3 + CONTENTS, READONLY, DEBUGGING + 4 .debug_pubnames 0000025a 00000000 00000000 00009d38 2**0 + CONTENTS, READONLY, DEBUGGING + 5 .debug_info 000007cc 00000000 00000000 00009f92 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_abbrev 000001db 00000000 00000000 0000a75e 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_line 00000354 00000000 00000000 0000a939 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_frame 00000268 00000000 00000000 0000ac90 2**2 + CONTENTS, READONLY, DEBUGGING + 9 .debug_str 00000335 00000000 00000000 0000aef8 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_loc 00000928 00000000 00000000 0000b22d 2**0 + CONTENTS, READONLY, DEBUGGING +Disassembly of section .text: + +fff00000 <_boot>: + +// Runtime Interrupt Vectors +// ------------------------------------------------------------------- +Vectors: + b _start // reset - _start +fff00000: ea000006 b fff00020 <_mainCRTStartup> + b . // undefined +fff00004: eafffffe b fff00004 <_boot+0x4> + b . // SWI +fff00008: eafffffe b fff00008 <_boot+0x8> + b . // program abort +fff0000c: eafffffe b fff0000c <_boot+0xc> + b . // data abort +fff00010: eafffffe b fff00010 <_boot+0x10> + nop // reserved +fff00014: e1a00000 nop (mov r0,r0) + b . // IRQ +fff00018: eafffffe b fff00018 <_boot+0x18> + b . // FIQ +fff0001c: eafffffe b fff0001c <_boot+0x1c> + +fff00020 <_mainCRTStartup>: + + .size _boot, . - _boot + .endfunc + + +// Setup the operating mode & stack. +// ------------------------------------------------------------------- + .global _start, start, _mainCRTStartup + .func _start + +_start: +start: +_mainCRTStartup: + +// Who am I? Where am I going? + +// - Set stack location for system mode with interrupts disabled +// ------------------------------------------------------------------- + ldr r0,=_stack // Calc stack base +fff00020: e59f0034 ldr r0, [pc, #52] ; fff0005c <.text+0x5c> + mrs r1,CPSR +fff00024: e10f1000 mrs r1, CPSR + bic r1,r1,#0x7F +fff00028: e3c1107f bic r1, r1, #127 ; 0x7f + orr r1,r1,#MODE_SYS|IRQ_BIT|FIQ_BIT // Change to System Mode +fff0002c: e38110df orr r1, r1, #223 ; 0xdf + msr CPSR,r1 +fff00030: e129f001 msr CPSR_fc, r1 + mov sp,r0 // Store stack base +fff00034: e1a0d000 mov sp, r0 + + +// Call main program: main(0) +// ------------------------------------------------------------------- + mov r0,#0 // no arguments (argc = 0) +fff00038: e3a00000 mov r0, #0 ; 0x0 + mov r1,r0 +fff0003c: e1a01000 mov r1, r0 + mov r2,r0 +fff00040: e1a02000 mov r2, r0 + mov fp,r0 // null frame pointer +fff00044: e1a0b000 mov fp, r0 + mov r7,r0 // null frame pointer for thumb +fff00048: e1a07000 mov r7, r0 + ldr r10,=main +fff0004c: e59fa00c ldr sl, [pc, #12] ; fff00060 <.text+0x60> + mov lr,pc +fff00050: e1a0e00f mov lr, pc + mov pc, r10 // enter main() +fff00054: e1a0f00a mov pc, sl + +fff00058 <_reset>: + + .size _start, . - _start + .endfunc + + .global _reset, reset, exit, abort + .func _reset +_reset: +reset: +exit: +abort: + + b . // loop until reset +fff00058: eafffffe b fff00058 <_reset> +fff0005c: 00008000 andeq r8, r0, r0 +fff00060: fff00700 undefined instruction 0xfff00700 + +fff00064 : +// Read general purpose IO port + unsigned long io_read_gpio0_pin(unsigned char pin) +// ****************************************************************************** +{ + unsigned long temp = GPIO0_IN & (1<: + +// ****************************************************************************** +// Read general purpose IO port + unsigned long io_read_gpio0_port(void) +// ****************************************************************************** +{ + return GPIO0_IN; +fff0007c: e3e03a0f mvn r3, #61440 ; 0xf000 +fff00080: e5130ffb ldr r0, [r3, #-4091] +} +fff00084: e1a0f00e mov pc, lr + +fff00088 : + +// ****************************************************************************** +// Set general purpose IO port + void io_set_gpio0_pin(unsigned char pin) +// ****************************************************************************** +{ + GPIO0_OUT = GPIO0_OUT | (1<: + +// ****************************************************************************** +// Clear general purpose IO port + void io_clr_gpio0_pin(unsigned char pin) +// ****************************************************************************** +{ +fff000a4: e20000ff and r0, r0, #255 ; 0xff + GPIO0_OUT = GPIO0_OUT & ~(1<: +// ****************************************************************************** +// Set general purpose IO port + void io_toggle_gpio0_pin(unsigned char pin) +// ****************************************************************************** +{ + GPIO0_OUT = GPIO0_OUT ^ (1<: + +// ****************************************************************************** +// Clear general purpose IO port + void io_set_gpio0_port(unsigned long value) +// ****************************************************************************** +{ + GPIO0_OUT = value; +fff000e4: e3e03a0f mvn r3, #61440 ; 0xf000 +fff000e8: e5030fff str r0, [r3, #-4095] +} +fff000ec: e1a0f00e mov pc, lr + +fff000f0 : + + + +// ########################################################################################################################### +// Pulse-Width-Modulation Controller +// ########################################################################################################################### + +// ****************************************************************************** +// Set pwm value + void io_set_pwm(unsigned char port, unsigned char data) +// ****************************************************************************** +{ +fff000f0: e20000ff and r0, r0, #255 ; 0xff + unsigned long temp = 0; + + // value adjustment + if(port > 7) +fff000f4: e3500007 cmp r0, #7 ; 0x7 +fff000f8: e92d4010 stmdb sp!, {r4, lr} +fff000fc: e3a0c000 mov ip, #0 ; 0x0 +fff00100: e3e0e0ff mvn lr, #255 ; 0xff +fff00104: e20110ff and r1, r1, #255 ; 0xff +fff00108: 8a000011 bhi fff00154 + port = 0; + + if(port < 4){ + temp = PWM0_CONF0; // get working copy + temp = temp & ~(0xFF << (port*8)); // clear old value + temp = temp | (unsigned long)(data << (port*8)); // insert new value + PWM0_CONF0 = temp; + } + else{ + port = port-4; + temp = PWM0_CONF1; // get working copy + temp = temp & ~(0xFF << (port*8)); // clear old value +fff0010c: e2403004 sub r3, r0, #4 ; 0x4 +fff00110: e20330ff and r3, r3, #255 ; 0xff +fff00114: e3500003 cmp r0, #3 ; 0x3 +fff00118: e1a0e183 mov lr, r3, lsl #3 +fff0011c: e3e04a0f mvn r4, #61440 ; 0xf000 +fff00120: e1a0c180 mov ip, r0, lsl #3 +fff00124: 9a000007 bls fff00148 +fff00128: e3a030ff mov r3, #255 ; 0xff +fff0012c: e1a03e13 mov r3, r3, lsl lr +fff00130: e5142f8b ldr r2, [r4, #-3979] +fff00134: e1e03003 mvn r3, r3 +fff00138: e0022003 and r2, r2, r3 + temp = temp | (unsigned long)(data << (port*8)); // insert new value +fff0013c: e1822e11 orr r2, r2, r1, lsl lr + PWM0_CONF1 = temp; +fff00140: e5042f8b str r2, [r4, #-3979] +fff00144: e8bd8010 ldmia sp!, {r4, pc} +fff00148: e3a030ff mov r3, #255 ; 0xff +fff0014c: e1a03c13 mov r3, r3, lsl ip +fff00150: e1e0e003 mvn lr, r3 +fff00154: e3e02a0f mvn r2, #61440 ; 0xf000 +fff00158: e5123f8f ldr r3, [r2, #-3983] +fff0015c: e003300e and r3, r3, lr +fff00160: e1833c11 orr r3, r3, r1, lsl ip +fff00164: e5023f8f str r3, [r2, #-3983] +fff00168: e8bd8010 ldmia sp!, {r4, pc} + +fff0016c : + } +} + +// ****************************************************************************** +// Set pwm value + unsigned char io_get_pwm(unsigned char port) +// ****************************************************************************** +{ +fff0016c: e20000ff and r0, r0, #255 ; 0xff + unsigned long temp = 0; + + // value adjustment + if(port > 7) +fff00170: e3500007 cmp r0, #7 ; 0x7 +fff00174: e3a02000 mov r2, #0 ; 0x0 +fff00178: 8a00000a bhi fff001a8 + port = 0; + + if(port < 4) + temp = PWM0_CONF0; // get config register + else{ + port = port-4; + temp = PWM0_CONF1; // get config register +fff0017c: e2403004 sub r3, r0, #4 ; 0x4 +fff00180: e3500003 cmp r0, #3 ; 0x3 +fff00184: e20320ff and r2, r3, #255 ; 0xff +fff00188: 9a000005 bls fff001a4 +fff0018c: e3e03a0f mvn r3, #61440 ; 0xf000 +fff00190: e5130f8b ldr r0, [r3, #-3979] +fff00194: e1a02182 mov r2, r2, lsl #3 +fff00198: e1a00230 mov r0, r0, lsr r2 +fff0019c: e20000ff and r0, r0, #255 ; 0xff + } + + temp = temp >> (port*8); // only keep designated byte + + return (unsigned char)temp; +} +fff001a0: e1a0f00e mov pc, lr +fff001a4: e1a02180 mov r2, r0, lsl #3 +fff001a8: e3e03a0f mvn r3, #61440 ; 0xf000 +fff001ac: e5130f8f ldr r0, [r3, #-3983] +fff001b0: e1a00230 mov r0, r0, lsr r2 +fff001b4: e20000ff and r0, r0, #255 ; 0xff +fff001b8: e1a0f00e mov pc, lr + +fff001bc : + + + +// ########################################################################################################################### +// General Purpose UART "miniUART" (UART_0) +// ########################################################################################################################### + +// ****************************************************************************** +// Read one byte via UART 0 + int io_uart0_read_byte(void) +// ****************************************************************************** +{ + if ((UART0_SREG & (1<: + +// ****************************************************************************** +// Write one byte via UART 0 + int io_uart0_send_byte(int ch) +// ****************************************************************************** +{ +fff001d4: e3e02a0f mvn r2, #61440 ; 0xf000 + while((UART0_SREG & (1< + UART0_DATA = (ch & 0x000000FF); +fff001e4: e20030ff and r3, r0, #255 ; 0xff +fff001e8: e5023fe7 str r3, [r2, #-4071] + return ch; +} +fff001ec: e1a0f00e mov pc, lr + +fff001f0 : + + + +// ########################################################################################################################### +// Serial Peripherial Interface (SPI_CONTROLLER_0) +// ########################################################################################################################### + +// ****************************************************************************** +// Configure SPI 0 + void io_spi0_config(unsigned char auto_cs, unsigned long data_size) +// ****************************************************************************** +{ +fff001f0: e20000ff and r0, r0, #255 ; 0xff + // devices update their serial input on a rising edge of sclk, + // so we need to update the mosi output of the core before + // -> at the falling edge of sclk = set SPI_TX_NEG + if(auto_cs == 1) +fff001f4: e3500001 cmp r0, #1 ; 0x1 + SPI0_CONF = (1<: +} + +// ****************************************************************************** +// Configure SPI 0 CLK frequency -> (sys_clk/(spi_clk*2))-1 + void io_spi0_speed(unsigned long clk_divider) +// ****************************************************************************** +{ + SPI0_PRSC = clk_divider; // (sys_clk/(spi_clk*2))-1; +fff00214: e3e03a0f mvn r3, #61440 ; 0xf000 +fff00218: e5030fcb str r0, [r3, #-4043] +} +fff0021c: e1a0f00e mov pc, lr + +fff00220 : + +// ****************************************************************************** +// Sends/receives max 32 bits via SPI, CS and config must be done outside + unsigned long io_spi0_trans(unsigned long data) +// ****************************************************************************** +{ +fff00220: e3e02a0f mvn r2, #61440 ; 0xf000 + // spi transmission + while((SPI0_CONF & (1< + SPI0_DAT0 = data; +fff00230: e5020fbf str r0, [r2, #-4031] + SPI0_CONF = SPI0_CONF | (1< + + return SPI0_DAT0; +fff00250: e5120fbf ldr r0, [r2, #-4031] +} +fff00254: e1a0f00e mov pc, lr + +fff00258 : + +// ****************************************************************************** +// Controls the CS of SPI0, enables a connected CS (turns it LOW) + void io_spi0_enable(unsigned char device) +// ****************************************************************************** +{ + SPI0_SCSR = SPI0_SCSR | (1<: + +// ****************************************************************************** +// Controls the CS of SPI0, disables a connected CS (turns it HIGH) + void io_spi0_disable(unsigned char device) +// ****************************************************************************** +{ +fff00274: e20000ff and r0, r0, #255 ; 0xff + SPI0_SCSR = SPI0_SCSR & ~(1<: + + + + +// ########################################################################################################################### +// Inter Intergrated Circuit Interface (I�C_CONTROLLER_0) +// ########################################################################################################################### + +// ****************************************************************************** +// Configure SPI 0 CLK frequency -> (sys_clk/(5*i2c_clock)-1 + void io_i2c0_speed(unsigned long clk_divider) +// ****************************************************************************** +{ + I2C0_CTRL = I2C0_CTRL & ~(1<> 8; +fff002a0: e1a01420 mov r1, r0, lsr #8 +fff002a4: e3c33080 bic r3, r3, #128 ; 0x80 +fff002a8: e5023f97 str r3, [r2, #-3991] +fff002ac: e5020f9f str r0, [r2, #-3999] +fff002b0: e5021f9b str r1, [r2, #-3995] + I2C0_CTRL = I2C0_CTRL | (1<: + +// ****************************************************************************** +// Read/write byte from/to I�C slave, max 2 address bytes + int io_i2c0_byte_transfer(unsigned char rw, // 'r' read / 'w' write cycle + unsigned char id, // device ID + unsigned long data_adr, // byte address + unsigned char adr_bytes, // number of adr bytes + unsigned char data) // data byte +// ****************************************************************************** +{ +fff002c4: e92d4030 stmdb sp!, {r4, r5, lr} + // transfer slave identification address + I2C0_DATA = id & 0xFE; // device id and write + I2C0_CMD = (1< + if((I2C0_STAT & (1< + adr_bytes--; +fff00314: e24c3001 sub r3, ip, #1 ; 0x1 +fff00318: e203c0ff and ip, r3, #255 ; 0xff + if(adr_bytes == 1) +fff0031c: e35c0001 cmp ip, #1 ; 0x1 + I2C0_DATA = data_adr >> 8; // high byte +fff00320: 01a02424 moveq r2, r4, lsr #8 +fff00324: 03e03a0f mvneq r3, #61440 ; 0xf000 + else + I2C0_DATA = data_adr; // low byte +fff00328: 13e03a0f mvnne r3, #61440 ; 0xf000 +fff0032c: 05032f93 streq r2, [r3, #-3987] +fff00330: 15034f93 strne r4, [r3, #-3987] + I2C0_CMD = (1< + if((I2C0_STAT & (1< +fff00358: e3e00001 mvn r0, #1 ; 0x1 +fff0035c: e8bd8030 ldmia sp!, {r4, r5, pc} + return -2; + } + + if(rw == 'w'){ +fff00360: e3500077 cmp r0, #119 ; 0x77 +fff00364: 1a00000c bne fff0039c + // write adressed byte + I2C0_DATA = data; // send data +fff00368: e3e03a0f mvn r3, #61440 ; 0xf000 + I2C0_CMD = (1< + if((I2C0_STAT & (1< +fff003c8: e5123faf ldr r3, [r2, #-4015] +fff003cc: e3130080 tst r3, #128 ; 0x80 +fff003d0: 1affffef bne fff00394 +fff003d4: e3a03068 mov r3, #104 ; 0x68 +fff003d8: e5023faf str r3, [r2, #-4015] +fff003dc: e3e00a0f mvn r0, #61440 ; 0xf000 +fff003e0: e5103faf ldr r3, [r0, #-4015] +fff003e4: e3130002 tst r3, #2 ; 0x2 +fff003e8: 1afffffc bne fff003e0 +fff003ec: e5100f93 ldr r0, [r0, #-3987] +fff003f0: e8bd8030 ldmia sp!, {r4, r5, pc} + +fff003f4 : + + + + +// ########################################################################################################################### +// System +// ########################################################################################################################### + +// ****************************************************************************** +// read system coprocessor register x + unsigned long get_syscpreg(unsigned char index) +// ****************************************************************************** +{ +fff003f4: e20000ff and r0, r0, #255 ; 0xff + unsigned long _cp_val; + switch(index){ +fff003f8: e350000d cmp r0, #13 ; 0xd +fff003fc: 979ff100 ldrls pc, [pc, r0, lsl #2] +fff00400: ea000015 b fff0045c <.text+0x45c> +fff00404: fff0043c undefined instruction 0xfff0043c +fff00408: fff00484 undefined instruction 0xfff00484 +fff0040c: fff0047c undefined instruction 0xfff0047c +fff00410: fff0045c undefined instruction 0xfff0045c +fff00414: fff0045c undefined instruction 0xfff0045c +fff00418: fff0045c undefined instruction 0xfff0045c +fff0041c: fff00474 undefined instruction 0xfff00474 +fff00420: fff0045c undefined instruction 0xfff0045c +fff00424: fff0046c undefined instruction 0xfff0046c +fff00428: fff00464 undefined instruction 0xfff00464 +fff0042c: fff0045c undefined instruction 0xfff0045c +fff00430: fff00454 undefined instruction 0xfff00454 +fff00434: fff0044c undefined instruction 0xfff0044c +fff00438: fff00444 undefined instruction 0xfff00444 + case ID_REG_0: asm volatile ("mrc p15,0,%0, c0, c0" : "=r" (_cp_val) : /* no inputs */ ); break; +fff0043c: ee100f10 mrc 15, 0, r0, cr0, cr0, {0} +fff00440: e1a0f00e mov pc, lr + case ID_REG_1: asm volatile ("mrc p15,0,%0, c1, c1" : "=r" (_cp_val) : /* no inputs */ ); break; + case ID_REG_2: asm volatile ("mrc p15,0,%0, c2, c2" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 3: asm volatile ("mrc p15,0,%0, c3, c3" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 4: asm volatile ("mrc p15,0,%0, c4, c4" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 5: asm volatile ("mrc p15,0,%0, c5, c5" : "=r" (_cp_val) : /* no inputs */ ); break; + case SYS_CTRL_0: asm volatile ("mrc p15,0,%0, c6, c6" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 7: asm volatile ("mrc p15,0,%0, c7, c7" : "=r" (_cp_val) : /* no inputs */ ); break; + case CSTAT: asm volatile ("mrc p15,0,%0, c8, c8" : "=r" (_cp_val) : /* no inputs */ ); break; + case ADR_FB: asm volatile ("mrc p15,0,%0, c9, c9" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 10: asm volatile ("mrc p15,0,%0,c10,c10" : "=r" (_cp_val) : /* no inputs */ ); break; + case LFSR_POLY: asm volatile ("mrc p15,0,%0,c11,c11" : "=r" (_cp_val) : /* no inputs */ ); break; + case LFSR_DATA: asm volatile ("mrc p15,0,%0,c12,c12" : "=r" (_cp_val) : /* no inputs */ ); break; + case SYS_IO: asm volatile ("mrc p15,0,%0,c13,c13" : "=r" (_cp_val) : /* no inputs */ ); break; +fff00444: ee1d0f1d mrc 15, 0, r0, cr13, cr13, {0} +// case 14: asm volatile ("mrc p15,0,%0,c14,c14" : "=r" (_cp_val) : /* no inputs */ ); break; +// case 15: asm volatile ("mrc p15,0,%0,c15,c15" : "=r" (_cp_val) : /* no inputs */ ); break; + default: _cp_val = 0; break; + } + return _cp_val; +} +fff00448: e1a0f00e mov pc, lr +fff0044c: ee1c0f1c mrc 15, 0, r0, cr12, cr12, {0} +fff00450: e1a0f00e mov pc, lr +fff00454: ee1b0f1b mrc 15, 0, r0, cr11, cr11, {0} +fff00458: e1a0f00e mov pc, lr +fff0045c: e3a00000 mov r0, #0 ; 0x0 +fff00460: e1a0f00e mov pc, lr +fff00464: ee190f19 mrc 15, 0, r0, cr9, cr9, {0} +fff00468: e1a0f00e mov pc, lr +fff0046c: ee180f18 mrc 15, 0, r0, cr8, cr8, {0} +fff00470: e1a0f00e mov pc, lr +fff00474: ee160f16 mrc 15, 0, r0, cr6, cr6, {0} +fff00478: e1a0f00e mov pc, lr +fff0047c: ee120f12 mrc 15, 0, r0, cr2, cr2, {0} +fff00480: e1a0f00e mov pc, lr +fff00484: ee110f11 mrc 15, 0, r0, cr1, cr1, {0} +fff00488: e1a0f00e mov pc, lr + +fff0048c : + +// ****************************************************************************** +// write system coprocessor register x + void set_syscpreg(unsigned long _cp_val, unsigned char index) +// ****************************************************************************** +{ +fff0048c: e20110ff and r1, r1, #255 ; 0xff + switch(index){ +fff00490: e2411006 sub r1, r1, #6 ; 0x6 +fff00494: e3510007 cmp r1, #7 ; 0x7 +fff00498: 979ff101 ldrls pc, [pc, r1, lsl #2] +fff0049c: ea000008 b fff004c4 <.text+0x4c4> +fff004a0: fff004c8 undefined instruction 0xfff004c8 +fff004a4: fff004c4 undefined instruction 0xfff004c4 +fff004a8: fff004c4 undefined instruction 0xfff004c4 +fff004ac: fff004c4 undefined instruction 0xfff004c4 +fff004b0: fff004c4 undefined instruction 0xfff004c4 +fff004b4: fff004d0 undefined instruction 0xfff004d0 +fff004b8: fff004d8 undefined instruction 0xfff004d8 +fff004bc: fff004c0 undefined instruction 0xfff004c0 +// case ID_REG_0: asm volatile ("mcr p15,0,%0, c0, c0,0" : /* no outputs */ : "r" (_cp_val)); break; +// case ID_REG_1: asm volatile ("mcr p15,0,%0, c1, c1,0" : /* no outputs */ : "r" (_cp_val)); break; +// case ID_REG_2: asm volatile ("mcr p15,0,%0, c2, c2,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 3: asm volatile ("mcr p15,0,%0, c3, c3,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 4: asm volatile ("mcr p15,0,%0, c4, c4,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 5: asm volatile ("mcr p15,0,%0, c5, c5,0" : /* no outputs */ : "r" (_cp_val)); break; + case SYS_CTRL_0: asm volatile ("mcr p15,0,%0, c6, c6,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 7: asm volatile ("mcr p15,0,%0, c7, c7,0" : /* no outputs */ : "r" (_cp_val)); break; +// case CSTAT: asm volatile ("mcr p15,0,%0, c8, c8,0" : /* no outputs */ : "r" (_cp_val)); break; +// case ADR_FB: asm volatile ("mcr p15,0,%0, c9, c9,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 10: asm volatile ("mcr p15,0,%0,c10,c10,0" : /* no outputs */ : "r" (_cp_val)); break; + case LFSR_POLY: asm volatile ("mcr p15,0,%0,c11,c11,0" : /* no outputs */ : "r" (_cp_val)); break; + case LFSR_DATA: asm volatile ("mcr p15,0,%0,c12,c12,0" : /* no outputs */ : "r" (_cp_val)); break; + case SYS_IO: asm volatile ("mcr p15,0,%0,c13,c13,0" : /* no outputs */ : "r" (_cp_val)); break; +fff004c0: ee0d0f1d mcr 15, 0, r0, cr13, cr13, {0} +fff004c4: e1a0f00e mov pc, lr +fff004c8: ee060f16 mcr 15, 0, r0, cr6, cr6, {0} +fff004cc: e1a0f00e mov pc, lr +fff004d0: ee0b0f1b mcr 15, 0, r0, cr11, cr11, {0} +fff004d4: e1a0f00e mov pc, lr +fff004d8: ee0c0f1c mcr 15, 0, r0, cr12, cr12, {0} +fff004dc: e1a0f00e mov pc, lr + +fff004e0 : +// case 14: asm volatile ("mcr p15,0,%0,c14,c14,0" : /* no outputs */ : "r" (_cp_val)); break; +// case 15: asm volatile ("mcr p15,0,%0,c15,c15,0" : /* no outputs */ : "r" (_cp_val)); break; + default: break; + } +} +// ****************************************************************************** +// read CMSR value + unsigned long get_cmsr(void) +// ****************************************************************************** +{ + unsigned long _cmsr; + asm volatile (" mrs %0, cpsr" : "=r" (_cmsr) : /* no inputs */ ); +fff004e0: e10f0000 mrs r0, CPSR + return _cmsr; +} +fff004e4: e1a0f00e mov pc, lr + +fff004e8 : + +// ****************************************************************************** +// write CMSR value + void set_cmsr(unsigned long _cmsr) +// ****************************************************************************** +{ + asm volatile (" msr cpsr, %0" : /* no outputs */ : "r" (_cmsr) ); +fff004e8: e129f000 msr CPSR_fc, r0 +} +fff004ec: e1a0f00e mov pc, lr + +fff004f0 : + +// ****************************************************************************** +// Enable global IRQ + void io_enable_irq(void) +// ****************************************************************************** +{ +fff004f0: e52de004 str lr, [sp, #-4]! + unsigned long _cmsr = get_cmsr(); +fff004f4: ebfffff9 bl fff004e0 + _cmsr = _cmsr & ~(1< + +fff00504 : + +// ****************************************************************************** +// Disable global IRQ + void io_disable_irq(void) +// ****************************************************************************** +{ +fff00504: e52de004 str lr, [sp, #-4]! + unsigned long _cmsr = get_cmsr(); +fff00508: ebfffff4 bl fff004e0 + _cmsr = _cmsr | (1< + +fff00518 : +// ############################################################################################ +// Print text string via UART 0 + const char *uart0_printf(const char *string) +// ############################################################################################ +{ +fff00518: e92d4010 stmdb sp!, {r4, lr} +fff0051c: e1a04000 mov r4, r0 + char ch; + + while ((ch = *string)){ +fff00520: e5d00000 ldrb r0, [r0] +fff00524: e3500000 cmp r0, #0 ; 0x0 +fff00528: 1a000003 bne fff0053c +fff0052c: ea000005 b fff00548 +fff00530: e5f40001 ldrb r0, [r4, #1]! +fff00534: e3500000 cmp r0, #0 ; 0x0 +fff00538: 0a000002 beq fff00548 + if (io_uart0_send_byte(ch)<=0) +fff0053c: ebffff24 bl fff001d4 +fff00540: e3500000 cmp r0, #0 ; 0x0 +fff00544: cafffff9 bgt fff00530 + break; + string++; + } + return string; +} +fff00548: e1a00004 mov r0, r4 +fff0054c: e8bd8010 ldmia sp!, {r4, pc} + +fff00550 : + +// ############################################################################################ +// Read text string via UART 0 + void uart0_scanf(unsigned char *buffer, int length, unsigned char en_echo) +// ############################################################################################ +{ +fff00550: e92d4070 stmdb sp!, {r4, r5, r6, lr} + int temp = 0; + + while(length > 0){ +fff00554: e2514000 subs r4, r1, #0 ; 0x0 +fff00558: e1a05000 mov r5, r0 +fff0055c: e20260ff and r6, r2, #255 ; 0xff +fff00560: d8bd8070 ldmleia sp!, {r4, r5, r6, pc} + temp = io_uart0_read_byte(); +fff00564: ebffff14 bl fff001bc + if(temp != -1){ +fff00568: e3700001 cmn r0, #1 ; 0x1 + temp = (unsigned char)(temp & 0x000000FF); +fff0056c: e20030ff and r3, r0, #255 ; 0xff +fff00570: 0a000005 beq fff0058c + *buffer++ = temp; + if(en_echo == 1) +fff00574: e3560001 cmp r6, #1 ; 0x1 +fff00578: e5c53000 strb r3, [r5] + io_uart0_send_byte(temp); // echo +fff0057c: e1a00003 mov r0, r3 +fff00580: e2855001 add r5, r5, #1 ; 0x1 +fff00584: 0a000003 beq fff00598 + length--; +fff00588: e2444001 sub r4, r4, #1 ; 0x1 +fff0058c: e3540000 cmp r4, #0 ; 0x0 +fff00590: cafffff3 bgt fff00564 +fff00594: e8bd8070 ldmia sp!, {r4, r5, r6, pc} +fff00598: ebffff0d bl fff001d4 +fff0059c: eafffff9 b fff00588 + +fff005a0 : + } + } +} + +// ############################################################################################ +// Print character buffer via UART 0 + void uart0_print_buffer(unsigned char *buffer, int size) +// ############################################################################################ +{ +fff005a0: e92d4030 stmdb sp!, {r4, r5, lr} + unsigned char char_buffer = 0; + while(size > 0){ +fff005a4: e2514000 subs r4, r1, #0 ; 0x0 +fff005a8: e1a05000 mov r5, r0 +fff005ac: d8bd8030 ldmleia sp!, {r4, r5, pc} + char_buffer = *buffer++; + io_uart0_send_byte(char_buffer); +fff005b0: e4d50001 ldrb r0, [r5], #1 +fff005b4: ebffff06 bl fff001d4 +fff005b8: e2544001 subs r4, r4, #1 ; 0x1 +fff005bc: 1afffffb bne fff005b0 +fff005c0: e8bd8030 ldmia sp!, {r4, r5, pc} + +fff005c4 : + void long_to_hex_string(unsigned long data, // max 32 bit data word + unsigned char *buffer, // buffer to store the string + unsigned char numbers) // number of places, max 8 +// ############################################################################################ +{ +fff005c4: e92d4010 stmdb sp!, {r4, lr} +fff005c8: e20240ff and r4, r2, #255 ; 0xff + unsigned char temp_char = 0; + unsigned long temp_data = 0; + + // fit into range + if(numbers > 8) +fff005cc: e3540008 cmp r4, #8 ; 0x8 +fff005d0: 83a04008 movhi r4, #8 ; 0x8 +fff005d4: 8a000001 bhi fff005e0 + numbers = 8; + if(numbers < 1) +fff005d8: e3540000 cmp r4, #0 ; 0x0 + numbers = 1; + + while(numbers > 0){ + // isolate one 4-bit value + if(numbers > 1) + temp_data = data >> ((numbers-1)*4); + else + temp_data = data; + temp_data = temp_data & 0x0000000F; + numbers--; + + // convert 4-bit value temp_data to char temp_char + if(temp_data < 10) + temp_char = '0' + temp_data; + else + temp_char = 'A' + temp_data - 10; + + // save character + *buffer++ = temp_char; + } + + *buffer++ = 0; // terminate string +} +fff005dc: 03a04001 moveq r4, #1 ; 0x1 +fff005e0: e1a02001 mov r2, r1 +fff005e4: e1a0e004 mov lr, r4 +fff005e8: e1a0310e mov r3, lr, lsl #2 +fff005ec: e35e0001 cmp lr, #1 ; 0x1 +fff005f0: e2433004 sub r3, r3, #4 ; 0x4 +fff005f4: e1a0c000 mov ip, r0 +fff005f8: 81a0c330 movhi ip, r0, lsr r3 +fff005fc: e24e3001 sub r3, lr, #1 ; 0x1 +fff00600: e20cc00f and ip, ip, #15 ; 0xf +fff00604: e203e0ff and lr, r3, #255 ; 0xff +fff00608: e35c0009 cmp ip, #9 ; 0x9 +fff0060c: e28c3030 add r3, ip, #48 ; 0x30 +fff00610: 828c3037 addhi r3, ip, #55 ; 0x37 +fff00614: e35e0000 cmp lr, #0 ; 0x0 +fff00618: e4c23001 strb r3, [r2], #1 +fff0061c: 1afffff1 bne fff005e8 +fff00620: e2443001 sub r3, r4, #1 ; 0x1 +fff00624: e20330ff and r3, r3, #255 ; 0xff +fff00628: e0813003 add r3, r1, r3 +fff0062c: e5c3e001 strb lr, [r3, #1] +fff00630: e8bd8010 ldmia sp!, {r4, pc} + +fff00634 : + + +// ############################################################################################ +// Convert 1/2/3/4/5/6/7/8 hex-chars to 32 bit value + unsigned long hex_string_to_long(unsigned char *buffer, // string char buffer + unsigned char numbers) // number of places, max 8 +// ############################################################################################ +{ +fff00634: e20110ff and r1, r1, #255 ; 0xff + unsigned long temp_char = 0; + unsigned long temp_data = 0; + + // fit into range + if(numbers > 8) +fff00638: e3510008 cmp r1, #8 ; 0x8 +fff0063c: e92d4010 stmdb sp!, {r4, lr} +fff00640: e1a04000 mov r4, r0 +fff00644: 8a000016 bhi fff006a4 + return 0; + if(numbers < 1) +fff00648: e3510000 cmp r1, #0 ; 0x0 +fff0064c: 0a000014 beq fff006a4 +fff00650: e3a00000 mov r0, #0 ; 0x0 +fff00654: ea000006 b fff00674 + return 0; + + while(numbers > 0){ + numbers--; +fff00658: e2413001 sub r3, r1, #1 ; 0x1 +fff0065c: e20310ff and r1, r3, #255 ; 0xff + + temp_char = (unsigned long)(*buffer++); // isolate one char + if((temp_char > '0'-1) && (temp_char < '9'+1)) + temp_char = temp_char - '0'; + else if((temp_char > 'A'-1) && (temp_char < 'F'+1)) + temp_char = temp_char - 'A' + 10; + else if((temp_char > 'a'-1) && (temp_char < 'f'+1)) + temp_char = temp_char - 'a' + 10; + else + return 0; + temp_char = temp_char & 0x0F; + temp_data = temp_data | (temp_char << 4*numbers); +fff00660: e202200f and r2, r2, #15 ; 0xf +fff00664: e1a03101 mov r3, r1, lsl #2 +fff00668: e3510000 cmp r1, #0 ; 0x0 +fff0066c: e1800312 orr r0, r0, r2, lsl r3 +fff00670: 08bd8010 ldmeqia sp!, {r4, pc} +fff00674: e4d43001 ldrb r3, [r4], #1 +fff00678: e2432030 sub r2, r3, #48 ; 0x30 +fff0067c: e3520009 cmp r2, #9 ; 0x9 +fff00680: e243c041 sub ip, r3, #65 ; 0x41 +fff00684: 9afffff3 bls fff00658 +fff00688: e35c0005 cmp ip, #5 ; 0x5 +fff0068c: e243e061 sub lr, r3, #97 ; 0x61 +fff00690: e2432037 sub r2, r3, #55 ; 0x37 +fff00694: 9affffef bls fff00658 +fff00698: e35e0005 cmp lr, #5 ; 0x5 +fff0069c: e2432057 sub r2, r3, #87 ; 0x57 +fff006a0: 9affffec bls fff00658 +fff006a4: e3a00000 mov r0, #0 ; 0x0 + } + + return temp_data; +} +fff006a8: e8bd8010 ldmia sp!, {r4, pc} + +fff006ac : + + +// ############################################################################################ +// Concate 4 bytes (chars) to single 32 bit value + unsigned long qbytes_to_long(unsigned char *buffer) +// ############################################################################################ +{ +fff006ac: e1a03000 mov r3, r0 + unsigned long temp = 0; + temp = temp | (0xFF000000 & (*buffer++ << 24)); + temp = temp | (0x00FF0000 & (*buffer++ << 16)); +fff006b0: e5d00001 ldrb r0, [r0, #1] +fff006b4: e283c001 add ip, r3, #1 ; 0x1 +fff006b8: e5d32000 ldrb r2, [r3] + temp = temp | (0x0000FF00 & (*buffer++ << 8)); +fff006bc: e5dc1002 ldrb r1, [ip, #2] +fff006c0: e1a00800 mov r0, r0, lsl #16 +fff006c4: e1800c02 orr r0, r0, r2, lsl #24 +fff006c8: e5dc3001 ldrb r3, [ip, #1] +fff006cc: e1800001 orr r0, r0, r1 + temp = temp | (0x000000FF & (*buffer++ << 0)); + return temp; +} +fff006d0: e1800403 orr r0, r0, r3, lsl #8 +fff006d4: e1a0f00e mov pc, lr + +fff006d8 : + + +// ############################################################################################ +// simple delay routine + void delay(int time) // waits time*10000 clock ticks +// ############################################################################################ +{ + time = time*2500*4; +fff006d8: e0603280 rsb r3, r0, r0, lsl #5 +fff006dc: e0800103 add r0, r0, r3, lsl #2 +fff006e0: e0800100 add r0, r0, r0, lsl #2 +fff006e4: e1a00200 mov r0, r0, lsl #4 + while(time > 0){ +fff006e8: e3500000 cmp r0, #0 ; 0x0 +fff006ec: d1a0f00e movle pc, lr + asm volatile ("NOP"); +fff006f0: e1a00000 nop (mov r0,r0) +fff006f4: e2500001 subs r0, r0, #1 ; 0x1 +fff006f8: 1afffffc bne fff006f0 +fff006fc: e1a0f00e mov pc, lr + +fff00700

: +// ############################################################################################ +// STORM SoC Bootloader + int main(void) +// ############################################################################################ +{ +fff00700: e92d45f0 stmdb sp!, {r4, r5, r6, r7, r8, sl, lr} + int function_sel, data, i, start_app = 0; + unsigned long *data_pointer, word_buffer, adr_buffer, cnt; + unsigned char buffer[5], char_tmp, *char_pointer, device_id; + + // show reset ack + io_set_gpio0_port(0); +fff00704: e3a00000 mov r0, #0 ; 0x0 +fff00708: e24dd00c sub sp, sp, #12 ; 0xc +fff0070c: ebfffe74 bl fff000e4 + set_syscpreg(0xC3, SYS_IO); +fff00710: e3a0100d mov r1, #13 ; 0xd +fff00714: e3a000c3 mov r0, #195 ; 0xc3 +fff00718: ebffff5b bl fff0048c + + // init I�C + io_i2c0_speed(0x0063); // 100kHz +fff0071c: e3a00063 mov r0, #99 ; 0x63 +fff00720: ebfffedc bl fff00298 + + // enable write-through strategy + set_syscpreg(get_syscpreg(SYS_CTRL_0) | (1< +fff0072c: e3a01006 mov r1, #6 ; 0x6 +fff00730: e3800008 orr r0, r0, #8 ; 0x8 +fff00734: ebffff54 bl fff0048c + + // Check config switches for immediate boot-config + function_sel = (int)((~(get_syscpreg(SYS_IO) >> 17)) & 0x0F); +fff00738: e3a0000d mov r0, #13 ; 0xd +fff0073c: ebffff2c bl fff003f4 + switch(function_sel){ +fff00740: e1a008a0 mov r0, r0, lsr #17 +fff00744: e1e00000 mvn r0, r0 +fff00748: e200000f and r0, r0, #15 ; 0xf +fff0074c: e3500001 cmp r0, #1 ; 0x1 +fff00750: 03a04030 moveq r4, #48 ; 0x30 +fff00754: 028da007 addeq sl, sp, #7 ; 0x7 +fff00758: 0a00001a beq fff007c8 +fff0075c: e3500002 cmp r0, #2 ; 0x2 +fff00760: 0a000070 beq fff00928 + case 1: function_sel = '0'; goto main_menu; break; // auto start application from RAM + case 2: function_sel = '3'; goto main_menu; start_app = 1; device_id = 0xA0; break; // auto boot from i�c EEPROM 0xA0 + default: break; + } + + // Intro screen + uart0_printf("\r\n\r\n\r\n+----------------------------------------------------------------+\r\n"); +fff00764: e59f07ec ldr r0, [pc, #2028] ; fff00f58 <.text+0xf58> +fff00768: ebffff6a bl fff00518 + uart0_printf( "| <<< STORM Core Processor System - By Stephan Nolting >>> |\r\n"); +fff0076c: e59f07e8 ldr r0, [pc, #2024] ; fff00f5c <.text+0xf5c> +fff00770: ebffff68 bl fff00518 + uart0_printf( "+----------------------------------------------------------------+\r\n"); +fff00774: e59f07e4 ldr r0, [pc, #2020] ; fff00f60 <.text+0xf60> +fff00778: ebffff66 bl fff00518 + uart0_printf( "| Bootloader for STORM SoC Version: 20120524-D |\r\n"); +fff0077c: e59f07e0 ldr r0, [pc, #2016] ; fff00f64 <.text+0xf64> +fff00780: ebffff64 bl fff00518 + uart0_printf( "| Contact: stnolting@googlemail.com |\r\n"); +fff00784: e59f07dc ldr r0, [pc, #2012] ; fff00f68 <.text+0xf68> +fff00788: ebffff62 bl fff00518 + uart0_printf( "+----------------------------------------------------------------+\r\n\r\n"); +fff0078c: e59f07d8 ldr r0, [pc, #2008] ; fff00f6c <.text+0xf6c> +fff00790: ebffff60 bl fff00518 + + uart0_printf( " < Welcome to the STORM SoC bootloader console! >\r\n < Select an operation from the menu below or press >\r\n"); +fff00794: e59f07d4 ldr r0, [pc, #2004] ; fff00f70 <.text+0xf70> +fff00798: ebffff5e bl fff00518 + uart0_printf( " < the boot key for immediate application start. >\r\n\r\n"); +fff0079c: e59f07d0 ldr r0, [pc, #2000] ; fff00f74 <.text+0xf74> +fff007a0: ebffff5c bl fff00518 + + // Console menu + uart0_printf(" 0 - boot from core RAM (start application)\r\n 1 - program core RAM via UART_0\r\n 2 - core RAM dump\r\n"); +fff007a4: e59f07cc ldr r0, [pc, #1996] ; fff00f78 <.text+0xf78> +fff007a8: ebffff5a bl fff00518 + uart0_printf(" 3 - boot from I2C EEPROM\r\n 4 - program I2C EEPROM via UART_0\r\n 5 - show content of I2C EEPROM\r\n"); +fff007ac: e59f07c8 ldr r0, [pc, #1992] ; fff00f7c <.text+0xf7c> +fff007b0: ebffff58 bl fff00518 + uart0_printf(" a - automatic boot configuration\r\n h - help\r\n r - restart system\r\n\r\nSelect: "); +fff007b4: e59f07c4 ldr r0, [pc, #1988] ; fff00f80 <.text+0xf80> +fff007b8: ebffff56 bl fff00518 +fff007bc: e28da007 add sl, sp, #7 ; 0x7 + + while(1){ + + // console input + function_sel = io_uart0_read_byte(); +fff007c0: ebfffe7d bl fff001bc +fff007c4: e1a04000 mov r4, r0 + +main_menu: + + // boot button + if (((get_syscpreg(SYS_IO) >> 16) & 0x01) == 0){ +fff007c8: e3a0000d mov r0, #13 ; 0xd +fff007cc: ebffff08 bl fff003f4 +fff007d0: e3100801 tst r0, #65536 ; 0x10000 + function_sel = '3'; + start_app = 1; + device_id = 0xA0; + } + + // main functions + switch(function_sel){ + + // boot from RAM (start application) + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '0': + io_uart0_send_byte((char)function_sel); + start_app = 1; + break; + + // load ram via UART0 + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '1': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nApplication will start automatically after download.\r\n-> Waiting for 'storm_program.bin' in byte-stream mode..."); + uart0_scanf(buffer,4,0); // get storm master boot record code + if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ + uart0_scanf(buffer,4,0); // get image size + adr_buffer = qbytes_to_long(buffer); + if (adr_buffer > RAM_SIZE-8){ + uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + break; + } + data_pointer = 0; + while(data_pointer != adr_buffer+4){ + uart0_scanf(buffer,4,0); // get word + *data_pointer = qbytes_to_long(buffer); // store memory entry + data_pointer = data_pointer + 1; + } + start_app = 1; + } + else + uart0_printf(" Invalid programming file!\r\n\r\nSelect: "); + break; + + // ram memory dump + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '2': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nAbort dumping by pressing any key.\r\nPress any key to continue.\r\n\r\n"); + while(io_uart0_read_byte() == -1); + while(io_uart0_read_byte() != -1); + data_pointer = 0; + while(data_pointer != RAM_SIZE){ + word_buffer = *data_pointer; + io_uart0_send_byte(word_buffer >> 24); + io_uart0_send_byte(word_buffer >> 16); + io_uart0_send_byte(word_buffer >> 8); + io_uart0_send_byte(word_buffer >> 0); + data_pointer++; + if(io_uart0_read_byte() != -1){ + break; + uart0_printf("\r\n\r\nAborted!"); + } + } + uart0_printf("\r\n\r\nDumping completed.\r\n\r\nSelect: "); + break; + + // boot from I�C EEPROM + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '3': + if(start_app == 0){ + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + uart0_scanf(buffer,2,1); + device_id = (unsigned char)hex_string_to_long(buffer, 2); + if(device_id == 0){ + uart0_printf(" Invalid address!\r\n\r\nSelect: "); +fff007d4: 03a06001 moveq r6, #1 ; 0x1 +fff007d8: 03a050a0 moveq r5, #160 ; 0xa0 +fff007dc: 1a000035 bne fff008b8 + break; + } + } + + uart0_printf("\r\nApplication will start automatically after upload.\r\n-> Loading boot image..."); + cnt = 0; + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); +fff007e0: e3a04000 mov r4, #0 ; 0x0 +fff007e4: e59f0798 ldr r0, [pc, #1944] ; fff00f84 <.text+0xf84> +fff007e8: ebffff4a bl fff00518 +fff007ec: e1a01005 mov r1, r5 +fff007f0: e1a02004 mov r2, r4 +fff007f4: e3a03002 mov r3, #2 ; 0x2 +fff007f8: e3a00072 mov r0, #114 ; 0x72 +fff007fc: e58d4000 str r4, [sp] +fff00800: ebfffeaf bl fff002c4 + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); +fff00804: e1a01005 mov r1, r5 +fff00808: e5cd0007 strb r0, [sp, #7] +fff0080c: e3a02001 mov r2, #1 ; 0x1 +fff00810: e3a03002 mov r3, #2 ; 0x2 +fff00814: e3a00072 mov r0, #114 ; 0x72 +fff00818: e58d4000 str r4, [sp] +fff0081c: ebfffea8 bl fff002c4 + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); +fff00820: e3a02002 mov r2, #2 ; 0x2 +fff00824: e1a03002 mov r3, r2 +fff00828: e5cd0008 strb r0, [sp, #8] +fff0082c: e1a01005 mov r1, r5 +fff00830: e3a00072 mov r0, #114 ; 0x72 +fff00834: e58d4000 str r4, [sp] +fff00838: ebfffea1 bl fff002c4 + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); +fff0083c: e3a03002 mov r3, #2 ; 0x2 +fff00840: e5cd0009 strb r0, [sp, #9] +fff00844: e1a01005 mov r1, r5 +fff00848: e3a00072 mov r0, #114 ; 0x72 +fff0084c: e3a02003 mov r2, #3 ; 0x3 +fff00850: e58d4000 str r4, [sp] +fff00854: ebfffe9a bl fff002c4 + if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ +fff00858: e5dd3007 ldrb r3, [sp, #7] +fff0085c: e20000ff and r0, r0, #255 ; 0xff +fff00860: e3530053 cmp r3, #83 ; 0x53 +fff00864: e5cd000a strb r0, [sp, #10] +fff00868: 1a000002 bne fff00878 +fff0086c: e5dd3008 ldrb r3, [sp, #8] +fff00870: e353004d cmp r3, #77 ; 0x4d +fff00874: 0a000062 beq fff00a04 + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + adr_buffer = qbytes_to_long(buffer); + data_pointer = 0; + while((data_pointer != adr_buffer+4) && (data_pointer < IRAM_SIZE)){ + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + *data_pointer = qbytes_to_long(buffer); // store memory entry + data_pointer = data_pointer + 1; + } + uart0_printf(" Upload complete\r\n"); + start_app = 1; + } + else + uart0_printf(" Invalid boot device or file!\r\n\r\nSelect: "); +fff00878: e59f0708 ldr r0, [pc, #1800] ; fff00f88 <.text+0xf88> +fff0087c: ebffff25 bl fff00518 + break; + + // program I�C EEPROM + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '4': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + uart0_scanf(buffer,2,1); + device_id = (unsigned char)hex_string_to_long(buffer, 2); + if(device_id == 0){ + uart0_printf("\r\nInvalid address!\r\n\r\nSelect: "); + break; + } + + uart0_printf("\r\nData will overwrite RAM content!\r\n-> Waiting for 'storm_program.bin' in byte-stream mode..."); + uart0_scanf(buffer,4,0); + if((buffer[0]=='S') && (buffer[1]=='M') && (buffer[2]=='B') && (buffer[3]=='R')){ + char_pointer = 0; // beginning of RAM + *char_pointer++ = 'S'; asm volatile ("NOP"); + *char_pointer++ = 'M'; asm volatile ("NOP"); + *char_pointer++ = 'B'; asm volatile ("NOP"); + *char_pointer++ = 'R'; asm volatile ("NOP"); + uart0_scanf(buffer,4,0); + *char_pointer++ = buffer[0]; + *char_pointer++ = buffer[1]; + *char_pointer++ = buffer[2]; + *char_pointer++ = buffer[3]; + cnt = qbytes_to_long(buffer); + if(cnt > 0xFFFC){ + uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + break; + } + + for(i=0; i 16 bit addresses,\r\n"); + uart0_printf("fixed boot device address: 0xA0\r\n\r\n"); + uart0_printf("Terminal setup: 9600 baud, 8 data bits, no parity, 1 stop bit\r\n\r\n"); + uart0_printf("For more information see the STORM Core / STORM SoC datasheet\r\n"); + uart0_printf("http://opencores.org/project,storm_core\r\n"); + uart0_printf("http://opencores.org/project,storm_soc\r\n"); + uart0_printf("Contact: stnolting@googlemail.com\r\n"); + uart0_printf("(c) 2012 by Stephan Nolting\r\n\r\nSelect: "); + break; + + // back to the future + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 'f': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nWe'll send you back - to the future!.\r\n\r\n"); + uart0_printf(" - Doctor Emmet L. Brown\r\n\r\nSelect: "); + break; + + // restart system + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 'r': + io_uart0_send_byte((char)function_sel); + asm volatile ("mov r0, #0x0FF00000"); + asm volatile ("add pc, r0, #0xF0000000"); // jump to bootloader + while(1); + break; + + // no input + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case -1: + break; + + // invalid selection + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + default: + io_uart0_send_byte((char)function_sel); + uart0_printf(" Invalid operation!\r\nTry again: "); + break; + + } + + // start application request + if(start_app != 0) +fff00880: e3560000 cmp r6, #0 ; 0x0 +fff00884: 0affffcd beq fff007c0 + break; + + } + + // start application + uart0_printf("\r\n\r\n-> Starting application...\r\n\r\n"); +fff00888: e59f06fc ldr r0, [pc, #1788] ; fff00f8c <.text+0xf8c> +fff0088c: ebffff21 bl fff00518 + set_syscpreg(0x00, SYS_IO); +fff00890: e3a0100d mov r1, #13 ; 0xd +fff00894: e3a00000 mov r0, #0 ; 0x0 +fff00898: ebfffefb bl fff0048c + + // disable write-through strategy + set_syscpreg(get_syscpreg(SYS_CTRL_0) & ~(1< +fff008a4: e3a01006 mov r1, #6 ; 0x6 +fff008a8: e3c00008 bic r0, r0, #8 ; 0x8 +fff008ac: ebfffef6 bl fff0048c + + // jump to application + asm volatile ("mov pc, #0"); +fff008b0: e3a0f000 mov pc, #0 ; 0x0 +fff008b4: eafffffe b fff008b4 +fff008b8: e3540034 cmp r4, #52 ; 0x34 +fff008bc: 0a000028 beq fff00964 +fff008c0: ca00001b bgt fff00934 +fff008c4: e3540031 cmp r4, #49 ; 0x31 +fff008c8: 0a000035 beq fff009a4 +fff008cc: da000097 ble fff00b30 +fff008d0: e3540032 cmp r4, #50 ; 0x32 +fff008d4: 0a0000a1 beq fff00b60 +fff008d8: e3540033 cmp r4, #51 ; 0x33 +fff008dc: 1a000097 bne fff00b40 +fff008e0: e1a00004 mov r0, r4 +fff008e4: ebfffe3a bl fff001d4 +fff008e8: e59f06a0 ldr r0, [pc, #1696] ; fff00f90 <.text+0xf90> +fff008ec: ebffff09 bl fff00518 +fff008f0: e1a0000a mov r0, sl +fff008f4: e3a01002 mov r1, #2 ; 0x2 +fff008f8: e3a02001 mov r2, #1 ; 0x1 +fff008fc: ebffff13 bl fff00550 +fff00900: e3a01002 mov r1, #2 ; 0x2 +fff00904: e1a0000a mov r0, sl +fff00908: ebffff49 bl fff00634 +fff0090c: e21010ff ands r1, r0, #255 ; 0xff +fff00910: 11a05001 movne r5, r1 +fff00914: 13a06000 movne r6, #0 ; 0x0 +fff00918: 1affffb0 bne fff007e0 +fff0091c: e59f0670 ldr r0, [pc, #1648] ; fff00f94 <.text+0xf94> +fff00920: ebfffefc bl fff00518 +fff00924: eaffffa5 b fff007c0 +fff00928: e3a04033 mov r4, #51 ; 0x33 +fff0092c: e28da007 add sl, sp, #7 ; 0x7 +fff00930: eaffffa4 b fff007c8 +fff00934: e3540066 cmp r4, #102 ; 0x66 +fff00938: 0a00002a beq fff009e8 +fff0093c: da0000a5 ble fff00bd8 +fff00940: e3540068 cmp r4, #104 ; 0x68 +fff00944: 0a000107 beq fff00d68 +fff00948: e3540072 cmp r4, #114 ; 0x72 +fff0094c: 1a00007b bne fff00b40 +fff00950: e1a00004 mov r0, r4 +fff00954: ebfffe1e bl fff001d4 +fff00958: e3a006ff mov r0, #267386880 ; 0xff00000 +fff0095c: e280f20f add pc, r0, #-268435456 ; 0xf0000000 +fff00960: eafffffe b fff00960 +fff00964: e1a00004 mov r0, r4 +fff00968: ebfffe19 bl fff001d4 +fff0096c: e59f061c ldr r0, [pc, #1564] ; fff00f90 <.text+0xf90> +fff00970: ebfffee8 bl fff00518 +fff00974: e1a0000a mov r0, sl +fff00978: e3a01002 mov r1, #2 ; 0x2 +fff0097c: e3a02001 mov r2, #1 ; 0x1 +fff00980: ebfffef2 bl fff00550 +fff00984: e1a0000a mov r0, sl +fff00988: e3a01002 mov r1, #2 ; 0x2 +fff0098c: ebffff28 bl fff00634 +fff00990: e21080ff ands r8, r0, #255 ; 0xff +fff00994: 1a00009c bne fff00c0c +fff00998: e59f05f8 ldr r0, [pc, #1528] ; fff00f98 <.text+0xf98> +fff0099c: ebfffedd bl fff00518 +fff009a0: eaffff86 b fff007c0 +fff009a4: e1a00004 mov r0, r4 +fff009a8: ebfffe09 bl fff001d4 +fff009ac: e59f05e8 ldr r0, [pc, #1512] ; fff00f9c <.text+0xf9c> +fff009b0: ebfffed8 bl fff00518 +fff009b4: e1a0000a mov r0, sl +fff009b8: e3a01004 mov r1, #4 ; 0x4 +fff009bc: e3a02000 mov r2, #0 ; 0x0 +fff009c0: ebfffee2 bl fff00550 +fff009c4: e5dd3007 ldrb r3, [sp, #7] +fff009c8: e3530053 cmp r3, #83 ; 0x53 +fff009cc: 1a000002 bne fff009dc +fff009d0: e5dd3008 ldrb r3, [sp, #8] +fff009d4: e353004d cmp r3, #77 ; 0x4d +fff009d8: 0a00010d beq fff00e14 +fff009dc: e59f05bc ldr r0, [pc, #1468] ; fff00fa0 <.text+0xfa0> +fff009e0: ebfffecc bl fff00518 +fff009e4: eaffff75 b fff007c0 +fff009e8: e1a00004 mov r0, r4 +fff009ec: ebfffdf8 bl fff001d4 +fff009f0: e59f05ac ldr r0, [pc, #1452] ; fff00fa4 <.text+0xfa4> +fff009f4: ebfffec7 bl fff00518 +fff009f8: e59f05a8 ldr r0, [pc, #1448] ; fff00fa8 <.text+0xfa8> +fff009fc: ebfffec5 bl fff00518 +fff00a00: eaffff6e b fff007c0 +fff00a04: e5dd3009 ldrb r3, [sp, #9] +fff00a08: e3530042 cmp r3, #66 ; 0x42 +fff00a0c: 1affff99 bne fff00878 +fff00a10: e3500052 cmp r0, #82 ; 0x52 +fff00a14: 1affff97 bne fff00878 +fff00a18: e1a01005 mov r1, r5 +fff00a1c: e3a02004 mov r2, #4 ; 0x4 +fff00a20: e2433040 sub r3, r3, #64 ; 0x40 +fff00a24: e2800020 add r0, r0, #32 ; 0x20 +fff00a28: e58d4000 str r4, [sp] +fff00a2c: ebfffe24 bl fff002c4 +fff00a30: e1a01005 mov r1, r5 +fff00a34: e5cd0007 strb r0, [sp, #7] +fff00a38: e3a02005 mov r2, #5 ; 0x5 +fff00a3c: e3a03002 mov r3, #2 ; 0x2 +fff00a40: e3a00072 mov r0, #114 ; 0x72 +fff00a44: e58d4000 str r4, [sp] +fff00a48: ebfffe1d bl fff002c4 +fff00a4c: e1a01005 mov r1, r5 +fff00a50: e5cd0008 strb r0, [sp, #8] +fff00a54: e3a02006 mov r2, #6 ; 0x6 +fff00a58: e3a03002 mov r3, #2 ; 0x2 +fff00a5c: e3a00072 mov r0, #114 ; 0x72 +fff00a60: e58d4000 str r4, [sp] +fff00a64: ebfffe16 bl fff002c4 +fff00a68: e1a01005 mov r1, r5 +fff00a6c: e5cd0009 strb r0, [sp, #9] +fff00a70: e3a02007 mov r2, #7 ; 0x7 +fff00a74: e3a03002 mov r3, #2 ; 0x2 +fff00a78: e3a00072 mov r0, #114 ; 0x72 +fff00a7c: e58d4000 str r4, [sp] +fff00a80: ebfffe0f bl fff002c4 +fff00a84: e5cd000a strb r0, [sp, #10] +fff00a88: e1a0000a mov r0, sl +fff00a8c: ebffff06 bl fff006ac +fff00a90: e2907004 adds r7, r0, #4 ; 0x4 +fff00a94: 0a000022 beq fff00b24 +fff00a98: e1a06004 mov r6, r4 +fff00a9c: e2842008 add r2, r4, #8 ; 0x8 +fff00aa0: e1a01005 mov r1, r5 +fff00aa4: e3a03002 mov r3, #2 ; 0x2 +fff00aa8: e3a00072 mov r0, #114 ; 0x72 +fff00aac: e58d6000 str r6, [sp] +fff00ab0: ebfffe03 bl fff002c4 +fff00ab4: e2842009 add r2, r4, #9 ; 0x9 +fff00ab8: e5cd0007 strb r0, [sp, #7] +fff00abc: e1a01005 mov r1, r5 +fff00ac0: e3a03002 mov r3, #2 ; 0x2 +fff00ac4: e3a00072 mov r0, #114 ; 0x72 +fff00ac8: e58d6000 str r6, [sp] +fff00acc: ebfffdfc bl fff002c4 +fff00ad0: e284200a add r2, r4, #10 ; 0xa +fff00ad4: e5cd0008 strb r0, [sp, #8] +fff00ad8: e1a01005 mov r1, r5 +fff00adc: e3a03002 mov r3, #2 ; 0x2 +fff00ae0: e3a00072 mov r0, #114 ; 0x72 +fff00ae4: e58d6000 str r6, [sp] +fff00ae8: ebfffdf5 bl fff002c4 +fff00aec: e284200b add r2, r4, #11 ; 0xb +fff00af0: e5cd0009 strb r0, [sp, #9] +fff00af4: e1a01005 mov r1, r5 +fff00af8: e3a03002 mov r3, #2 ; 0x2 +fff00afc: e3a00072 mov r0, #114 ; 0x72 +fff00b00: e58d6000 str r6, [sp] +fff00b04: ebfffdee bl fff002c4 +fff00b08: e5cd000a strb r0, [sp, #10] +fff00b0c: e1a0000a mov r0, sl +fff00b10: ebfffee5 bl fff006ac +fff00b14: e4840004 str r0, [r4], #4 +fff00b18: e1540007 cmp r4, r7 +fff00b1c: 13540902 cmpne r4, #32768 ; 0x8000 +fff00b20: 3affffdd bcc fff00a9c +fff00b24: e59f0480 ldr r0, [pc, #1152] ; fff00fac <.text+0xfac> +fff00b28: ebfffe7a bl fff00518 +fff00b2c: eaffff55 b fff00888 +fff00b30: e3740001 cmn r4, #1 ; 0x1 +fff00b34: 0affff21 beq fff007c0 +fff00b38: e3540030 cmp r4, #48 ; 0x30 +fff00b3c: 0a000004 beq fff00b54 +fff00b40: e20400ff and r0, r4, #255 ; 0xff +fff00b44: ebfffda2 bl fff001d4 +fff00b48: e59f0460 ldr r0, [pc, #1120] ; fff00fb0 <.text+0xfb0> +fff00b4c: ebfffe71 bl fff00518 +fff00b50: eaffff1a b fff007c0 +fff00b54: e1a00004 mov r0, r4 +fff00b58: ebfffd9d bl fff001d4 +fff00b5c: eaffff49 b fff00888 +fff00b60: e1a00004 mov r0, r4 +fff00b64: ebfffd9a bl fff001d4 +fff00b68: e59f0444 ldr r0, [pc, #1092] ; fff00fb4 <.text+0xfb4> +fff00b6c: ebfffe69 bl fff00518 +fff00b70: ebfffd91 bl fff001bc +fff00b74: e3700001 cmn r0, #1 ; 0x1 +fff00b78: 0afffffc beq fff00b70 +fff00b7c: ebfffd8e bl fff001bc +fff00b80: e3700001 cmn r0, #1 ; 0x1 +fff00b84: 1afffffc bne fff00b7c +fff00b88: e3a05000 mov r5, #0 ; 0x0 +fff00b8c: ea000001 b fff00b98 +fff00b90: e3550902 cmp r5, #32768 ; 0x8000 +fff00b94: 0a00000c beq fff00bcc +fff00b98: e5954000 ldr r4, [r5] +fff00b9c: e1a00c24 mov r0, r4, lsr #24 +fff00ba0: ebfffd8b bl fff001d4 +fff00ba4: e1a00824 mov r0, r4, lsr #16 +fff00ba8: ebfffd89 bl fff001d4 +fff00bac: e1a00424 mov r0, r4, lsr #8 +fff00bb0: ebfffd87 bl fff001d4 +fff00bb4: e1a00004 mov r0, r4 +fff00bb8: ebfffd85 bl fff001d4 +fff00bbc: ebfffd7e bl fff001bc +fff00bc0: e3700001 cmn r0, #1 ; 0x1 +fff00bc4: e2855004 add r5, r5, #4 ; 0x4 +fff00bc8: 0afffff0 beq fff00b90 +fff00bcc: e59f03e4 ldr r0, [pc, #996] ; fff00fb8 <.text+0xfb8> +fff00bd0: ebfffe50 bl fff00518 +fff00bd4: eafffef9 b fff007c0 +fff00bd8: e3540035 cmp r4, #53 ; 0x35 +fff00bdc: 0a0000a9 beq fff00e88 +fff00be0: e3540061 cmp r4, #97 ; 0x61 +fff00be4: 1affffd5 bne fff00b40 +fff00be8: e1a00004 mov r0, r4 +fff00bec: ebfffd78 bl fff001d4 +fff00bf0: e59f03c4 ldr r0, [pc, #964] ; fff00fbc <.text+0xfbc> +fff00bf4: ebfffe47 bl fff00518 +fff00bf8: e59f03c0 ldr r0, [pc, #960] ; fff00fc0 <.text+0xfc0> +fff00bfc: ebfffe45 bl fff00518 +fff00c00: e59f03bc ldr r0, [pc, #956] ; fff00fc4 <.text+0xfc4> +fff00c04: ebfffe43 bl fff00518 +fff00c08: eafffeec b fff007c0 +fff00c0c: e59f03b4 ldr r0, [pc, #948] ; fff00fc8 <.text+0xfc8> +fff00c10: ebfffe40 bl fff00518 +fff00c14: e1a0000a mov r0, sl +fff00c18: e3a01004 mov r1, #4 ; 0x4 +fff00c1c: e3a02000 mov r2, #0 ; 0x0 +fff00c20: ebfffe4a bl fff00550 +fff00c24: e5dd3007 ldrb r3, [sp, #7] +fff00c28: e3530053 cmp r3, #83 ; 0x53 +fff00c2c: 1a000002 bne fff00c3c +fff00c30: e5dd2008 ldrb r2, [sp, #8] +fff00c34: e352004d cmp r2, #77 ; 0x4d +fff00c38: 0a000004 beq fff00c50 +fff00c3c: e59f0388 ldr r0, [pc, #904] ; fff00fcc <.text+0xfcc> +fff00c40: ebfffe34 bl fff00518 +fff00c44: e59f0384 ldr r0, [pc, #900] ; fff00fd0 <.text+0xfd0> +fff00c48: ebfffe32 bl fff00518 +fff00c4c: eafffedb b fff007c0 +fff00c50: e5dd1009 ldrb r1, [sp, #9] +fff00c54: e3510042 cmp r1, #66 ; 0x42 +fff00c58: 1afffff7 bne fff00c3c +fff00c5c: e5dd000a ldrb r0, [sp, #10] +fff00c60: e3500052 cmp r0, #82 ; 0x52 +fff00c64: 1afffff4 bne fff00c3c +fff00c68: e3a04000 mov r4, #0 ; 0x0 +fff00c6c: e5c43000 strb r3, [r4] +fff00c70: e1a00000 nop (mov r0,r0) +fff00c74: e5c42001 strb r2, [r4, #1] +fff00c78: e1a00000 nop (mov r0,r0) +fff00c7c: e5c41002 strb r1, [r4, #2] +fff00c80: e1a00000 nop (mov r0,r0) +fff00c84: e5c40003 strb r0, [r4, #3] +fff00c88: e1a00000 nop (mov r0,r0) +fff00c8c: e241103e sub r1, r1, #62 ; 0x3e +fff00c90: e1a0000a mov r0, sl +fff00c94: e1a02004 mov r2, r4 +fff00c98: ebfffe2c bl fff00550 +fff00c9c: e5dd3007 ldrb r3, [sp, #7] +fff00ca0: e5c43004 strb r3, [r4, #4] +fff00ca4: e5dd2008 ldrb r2, [sp, #8] +fff00ca8: e5c42005 strb r2, [r4, #5] +fff00cac: e5dd3009 ldrb r3, [sp, #9] +fff00cb0: e5c43006 strb r3, [r4, #6] +fff00cb4: e5dd200a ldrb r2, [sp, #10] +fff00cb8: e1a0000a mov r0, sl +fff00cbc: e5c42007 strb r2, [r4, #7] +fff00cc0: ebfffe79 bl fff006ac +fff00cc4: e3a03cff mov r3, #65280 ; 0xff00 +fff00cc8: e28330fc add r3, r3, #252 ; 0xfc +fff00ccc: e1500003 cmp r0, r3 +fff00cd0: e1a05000 mov r5, r0 +fff00cd4: 8a000095 bhi fff00f30 +fff00cd8: e3700004 cmn r0, #4 ; 0x4 +fff00cdc: 12844008 addne r4, r4, #8 ; 0x8 +fff00ce0: 1280600b addne r6, r0, #11 ; 0xb +fff00ce4: 0a000006 beq fff00d04 +fff00ce8: ebfffd33 bl fff001bc +fff00cec: e3700001 cmn r0, #1 ; 0x1 +fff00cf0: 0afffffc beq fff00ce8 +fff00cf4: e1560004 cmp r6, r4 +fff00cf8: e5c40000 strb r0, [r4] +fff00cfc: e2844001 add r4, r4, #1 ; 0x1 +fff00d00: 1afffff8 bne fff00ce8 +fff00d04: e59f02c8 ldr r0, [pc, #712] ; fff00fd4 <.text+0xfd4> +fff00d08: ebfffe02 bl fff00518 +fff00d0c: e59f02c4 ldr r0, [pc, #708] ; fff00fd8 <.text+0xfd8> +fff00d10: ebfffe00 bl fff00518 +fff00d14: e375000c cmn r5, #12 ; 0xc +fff00d18: 0a00000f beq fff00d5c +fff00d1c: e3a04000 mov r4, #0 ; 0x0 +fff00d20: e285700c add r7, r5, #12 ; 0xc +fff00d24: e1a06004 mov r6, r4 +fff00d28: e5d45000 ldrb r5, [r4] +fff00d2c: e3a00077 mov r0, #119 ; 0x77 +fff00d30: e1a01008 mov r1, r8 +fff00d34: e1a02006 mov r2, r6 +fff00d38: e3a03002 mov r3, #2 ; 0x2 +fff00d3c: e58d5000 str r5, [sp] +fff00d40: ebfffd5f bl fff002c4 +fff00d44: e3500000 cmp r0, #0 ; 0x0 +fff00d48: 1afffff7 bne fff00d2c +fff00d4c: e2844001 add r4, r4, #1 ; 0x1 +fff00d50: e1540007 cmp r4, r7 +fff00d54: e1a06004 mov r6, r4 +fff00d58: 1afffff2 bne fff00d28 +fff00d5c: e59f0278 ldr r0, [pc, #632] ; fff00fdc <.text+0xfdc> +fff00d60: ebfffdec bl fff00518 +fff00d64: eaffffb6 b fff00c44 +fff00d68: e1a00004 mov r0, r4 +fff00d6c: ebfffd18 bl fff001d4 +fff00d70: e59f0268 ldr r0, [pc, #616] ; fff00fe0 <.text+0xfe0> +fff00d74: ebfffde7 bl fff00518 +fff00d78: e59f0264 ldr r0, [pc, #612] ; fff00fe4 <.text+0xfe4> +fff00d7c: ebfffde5 bl fff00518 +fff00d80: e59f0260 ldr r0, [pc, #608] ; fff00fe8 <.text+0xfe8> +fff00d84: ebfffde3 bl fff00518 +fff00d88: e59f025c ldr r0, [pc, #604] ; fff00fec <.text+0xfec> +fff00d8c: ebfffde1 bl fff00518 +fff00d90: e59f0258 ldr r0, [pc, #600] ; fff00ff0 <.text+0xff0> +fff00d94: ebfffddf bl fff00518 +fff00d98: e59f0254 ldr r0, [pc, #596] ; fff00ff4 <.text+0xff4> +fff00d9c: ebfffddd bl fff00518 +fff00da0: e59f0250 ldr r0, [pc, #592] ; fff00ff8 <.text+0xff8> +fff00da4: ebfffddb bl fff00518 +fff00da8: e59f024c ldr r0, [pc, #588] ; fff00ffc <.text+0xffc> +fff00dac: ebfffdd9 bl fff00518 +fff00db0: e59f0248 ldr r0, [pc, #584] ; fff01000 <.text+0x1000> +fff00db4: ebfffdd7 bl fff00518 +fff00db8: e59f0244 ldr r0, [pc, #580] ; fff01004 <.text+0x1004> +fff00dbc: ebfffdd5 bl fff00518 +fff00dc0: e59f0240 ldr r0, [pc, #576] ; fff01008 <.text+0x1008> +fff00dc4: ebfffdd3 bl fff00518 +fff00dc8: e59f023c ldr r0, [pc, #572] ; fff0100c <.text+0x100c> +fff00dcc: ebfffdd1 bl fff00518 +fff00dd0: e59f0238 ldr r0, [pc, #568] ; fff01010 <.text+0x1010> +fff00dd4: ebfffdcf bl fff00518 +fff00dd8: e59f0234 ldr r0, [pc, #564] ; fff01014 <.text+0x1014> +fff00ddc: ebfffdcd bl fff00518 +fff00de0: e59f0230 ldr r0, [pc, #560] ; fff01018 <.text+0x1018> +fff00de4: ebfffdcb bl fff00518 +fff00de8: e59f022c ldr r0, [pc, #556] ; fff0101c <.text+0x101c> +fff00dec: ebfffdc9 bl fff00518 +fff00df0: e59f0228 ldr r0, [pc, #552] ; fff01020 <.text+0x1020> +fff00df4: ebfffdc7 bl fff00518 +fff00df8: e59f0224 ldr r0, [pc, #548] ; fff01024 <.text+0x1024> +fff00dfc: ebfffdc5 bl fff00518 +fff00e00: e59f0220 ldr r0, [pc, #544] ; fff01028 <.text+0x1028> +fff00e04: ebfffdc3 bl fff00518 +fff00e08: e59f021c ldr r0, [pc, #540] ; fff0102c <.text+0x102c> +fff00e0c: ebfffdc1 bl fff00518 +fff00e10: eafffe6a b fff007c0 +fff00e14: e5dd3009 ldrb r3, [sp, #9] +fff00e18: e3530042 cmp r3, #66 ; 0x42 +fff00e1c: 1afffeee bne fff009dc +fff00e20: e5dd300a ldrb r3, [sp, #10] +fff00e24: e3530052 cmp r3, #82 ; 0x52 +fff00e28: 1afffeeb bne fff009dc +fff00e2c: e3a01004 mov r1, #4 ; 0x4 +fff00e30: e3a02000 mov r2, #0 ; 0x0 +fff00e34: e1a0000a mov r0, sl +fff00e38: ebfffdc4 bl fff00550 +fff00e3c: e1a0000a mov r0, sl +fff00e40: ebfffe19 bl fff006ac +fff00e44: e3a03c7f mov r3, #32512 ; 0x7f00 +fff00e48: e28330f8 add r3, r3, #248 ; 0xf8 +fff00e4c: e1500003 cmp r0, r3 +fff00e50: 8a000036 bhi fff00f30 +fff00e54: e2905004 adds r5, r0, #4 ; 0x4 +fff00e58: 0afffe8a beq fff00888 +fff00e5c: e3a04000 mov r4, #0 ; 0x0 +fff00e60: e3a01004 mov r1, #4 ; 0x4 +fff00e64: e3a02000 mov r2, #0 ; 0x0 +fff00e68: e1a0000a mov r0, sl +fff00e6c: ebfffdb7 bl fff00550 +fff00e70: e1a0000a mov r0, sl +fff00e74: ebfffe0c bl fff006ac +fff00e78: e4840004 str r0, [r4], #4 +fff00e7c: e1550004 cmp r5, r4 +fff00e80: 1afffff6 bne fff00e60 +fff00e84: eafffe7f b fff00888 +fff00e88: e1a00004 mov r0, r4 +fff00e8c: ebfffcd0 bl fff001d4 +fff00e90: e59f0198 ldr r0, [pc, #408] ; fff01030 <.text+0x1030> +fff00e94: ebfffd9f bl fff00518 +fff00e98: e1a0000a mov r0, sl +fff00e9c: e3a01002 mov r1, #2 ; 0x2 +fff00ea0: e3a02001 mov r2, #1 ; 0x1 +fff00ea4: ebfffda9 bl fff00550 +fff00ea8: e1a0000a mov r0, sl +fff00eac: e3a01002 mov r1, #2 ; 0x2 +fff00eb0: ebfffddf bl fff00634 +fff00eb4: e21060ff ands r6, r0, #255 ; 0xff +fff00eb8: 0afffe97 beq fff0091c +fff00ebc: e59f0170 ldr r0, [pc, #368] ; fff01034 <.text+0x1034> +fff00ec0: ebfffd94 bl fff00518 +fff00ec4: e59f016c ldr r0, [pc, #364] ; fff01038 <.text+0x1038> +fff00ec8: ebfffd92 bl fff00518 +fff00ecc: ebfffcba bl fff001bc +fff00ed0: e3700001 cmn r0, #1 ; 0x1 +fff00ed4: 0afffffc beq fff00ecc +fff00ed8: ebfffcb7 bl fff001bc +fff00edc: e3700001 cmn r0, #1 ; 0x1 +fff00ee0: 1afffffc bne fff00ed8 + while(1); +fff00ee4: e3a05000 mov r5, #0 ; 0x0 +fff00ee8: ea000001 b fff00ef4 +fff00eec: e3540000 cmp r4, #0 ; 0x0 +fff00ef0: aa000011 bge fff00f3c +fff00ef4: e3a0c000 mov ip, #0 ; 0x0 +fff00ef8: e1a02005 mov r2, r5 +fff00efc: e1a01006 mov r1, r6 +fff00f00: e3a03002 mov r3, #2 ; 0x2 +fff00f04: e3a00072 mov r0, #114 ; 0x72 +fff00f08: e58dc000 str ip, [sp] +fff00f0c: ebfffcec bl fff002c4 +fff00f10: e1a04000 mov r4, r0 +fff00f14: ebfffca8 bl fff001bc +fff00f18: e3700001 cmn r0, #1 ; 0x1 +fff00f1c: e1a00004 mov r0, r4 +fff00f20: 0afffff1 beq fff00eec +fff00f24: e59f0110 ldr r0, [pc, #272] ; fff0103c <.text+0x103c> +fff00f28: ebfffd7a bl fff00518 +fff00f2c: eaffff26 b fff00bcc +fff00f30: e59f0108 ldr r0, [pc, #264] ; fff01040 <.text+0x1040> +fff00f34: ebfffd77 bl fff00518 +fff00f38: eafffe20 b fff007c0 +fff00f3c: ebfffca4 bl fff001d4 +fff00f40: e3a03801 mov r3, #65536 ; 0x10000 +fff00f44: e2855001 add r5, r5, #1 ; 0x1 +fff00f48: e2433001 sub r3, r3, #1 ; 0x1 +fff00f4c: e1550003 cmp r5, r3 +fff00f50: 1affffe7 bne fff00ef4 +fff00f54: eaffff1c b fff00bcc +fff00f58: fff01044 undefined instruction 0xfff01044 +fff00f5c: fff01090 undefined instruction 0xfff01090 +fff00f60: fff010d8 undefined instruction 0xfff010d8 +fff00f64: fff01120 undefined instruction 0xfff01120 +fff00f68: fff01168 undefined instruction 0xfff01168 +fff00f6c: fff011b0 undefined instruction 0xfff011b0 +fff00f70: fff011f8 undefined instruction 0xfff011f8 +fff00f74: fff01264 undefined instruction 0xfff01264 +fff00f78: fff0129c undefined instruction 0xfff0129c +fff00f7c: fff01300 undefined instruction 0xfff01300 +fff00f80: fff01364 undefined instruction 0xfff01364 +fff00f84: fff0153c undefined instruction 0xfff0153c +fff00f88: fff015a0 undefined instruction 0xfff015a0 +fff00f8c: fff01ca4 undefined instruction 0xfff01ca4 +fff00f90: fff014e0 undefined instruction 0xfff014e0 +fff00f94: fff0151c undefined instruction 0xfff0151c +fff00f98: fff015cc undefined instruction 0xfff015cc +fff00f9c: fff013b4 undefined instruction 0xfff013b4 +fff00fa0: fff0144c undefined instruction 0xfff0144c +fff00fa4: fff01c28 undefined instruction 0xfff01c28 +fff00fa8: fff01c58 undefined instruction 0xfff01c58 +fff00fac: fff0158c undefined instruction 0xfff0158c +fff00fb0: fff01c80 undefined instruction 0xfff01c80 +fff00fb4: fff01474 undefined instruction 0xfff01474 +fff00fb8: fff014bc undefined instruction 0xfff014bc +fff00fbc: fff0177c undefined instruction 0xfff0177c +fff00fc0: fff017b0 undefined instruction 0xfff017b0 +fff00fc4: fff0181c undefined instruction 0xfff0181c +fff00fc8: fff015ec undefined instruction 0xfff015ec +fff00fcc: fff01694 undefined instruction 0xfff01694 +fff00fd0: fff01c74 undefined instruction 0xfff01c74 +fff00fd4: fff0164c undefined instruction 0xfff0164c +fff00fd8: fff01664 undefined instruction 0xfff01664 +fff00fdc: fff01684 undefined instruction 0xfff01684 +fff00fe0: fff01860 undefined instruction 0xfff01860 +fff00fe4: fff0187c undefined instruction 0xfff0187c +fff00fe8: fff0189c undefined instruction 0xfff0189c +fff00fec: fff018dc undefined instruction 0xfff018dc +fff00ff0: fff01910 undefined instruction 0xfff01910 +fff00ff4: fff0194c undefined instruction 0xfff0194c +fff00ff8: fff01988 undefined instruction 0xfff01988 +fff00ffc: fff019ac undefined instruction 0xfff019ac +fff01000: fff019e8 undefined instruction 0xfff019e8 +fff01004: fff01a04 undefined instruction 0xfff01a04 +fff01008: fff01a1c undefined instruction 0xfff01a1c +fff0100c: fff01a64 undefined instruction 0xfff01a64 +fff01010: fff01aa4 undefined instruction 0xfff01aa4 +fff01014: fff01adc undefined instruction 0xfff01adc +fff01018: fff01b00 undefined instruction 0xfff01b00 +fff0101c: fff01b44 undefined instruction 0xfff01b44 +fff01020: fff01b84 undefined instruction 0xfff01b84 +fff01024: fff01bb0 undefined instruction 0xfff01bb0 +fff01028: fff01bdc undefined instruction 0xfff01bdc +fff0102c: fff01c00 undefined instruction 0xfff01c00 +fff01030: fff016b8 undefined instruction 0xfff016b8 +fff01034: fff016f4 undefined instruction 0xfff016f4 +fff01038: fff01734 undefined instruction 0xfff01734 +fff0103c: fff01cc8 undefined instruction 0xfff01cc8 +fff01040: fff01428 undefined instruction 0xfff01428 +fff01044: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01048: 0d0a2b2d vstreq d2, [sl, #-180] +fff0104c: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01050: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01054: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01058: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff0105c: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01060: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01064: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01068: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff0106c: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01070: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01074: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01078: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff0107c: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01080: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01084: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01088: 2d2d2d2b stccs 13, cr2, [sp, #-172]! +fff0108c: 0d0a0000 stceq 0, cr0, [sl] +fff01090: 7c202020 stcvc 0, cr2, [r0], #-128 +fff01094: 203c3c3c eorcss r3, ip, ip, lsr ip +fff01098: 2053544f subcss r5, r3, pc, asr #8 +fff0109c: 524d2043 subpl r2, sp, #67 ; 0x43 +fff010a0: 6f726520 svcvs 0x00726520 +fff010a4: 50726f63 rsbpls r6, r2, r3, ror #30 +fff010a8: 6573736f ldrvsb r7, [r3, #-879]! +fff010ac: 72205379 eorvc r5, r0, #-469762047 ; 0xe4000001 +fff010b0: 7374656d cmnvc r4, #457179136 ; 0x1b400000 +fff010b4: 202d2042 eorcs r2, sp, r2, asr #32 +fff010b8: 79205374 stmvcdb r0!, {r2, r4, r5, r6, r8, r9, ip, lr} +fff010bc: 65706861 ldrvsb r6, [r0, #-2145]! +fff010c0: 6e204e6f cdpvs 14, 2, cr4, cr0, cr15, {3} +fff010c4: 6c74696e ldcvsl 9, cr6, [r4], #-440 +fff010c8: 67203e3e undefined +fff010cc: 3e202020 cdpcc 0, 2, cr2, cr0, cr0, {1} +fff010d0: 207c0d0a rsbcss r0, ip, sl, lsl #26 +fff010d4: 00000000 andeq r0, r0, r0 +fff010d8: 2b2d2d2d blcs a4c594 +fff010dc: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010e0: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010e4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010e8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010ec: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010f0: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010f4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010f8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff010fc: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01100: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01104: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01108: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff0110c: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01110: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01114: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff01118: 2d2b0d0a stccs 13, cr0, [fp, #-40]! +fff0111c: 00000000 andeq r0, r0, r0 +fff01120: 7c202020 stcvc 0, cr2, [r0], #-128 +fff01124: 20202020 eorcs r2, r0, r0, lsr #32 +fff01128: 2020426f eorcs r4, r0, pc, ror #4 +fff0112c: 6f746c6f svcvs 0x00746c6f +fff01130: 61646572 smcvs 18002 +fff01134: 20666f72 rsbcs r6, r6, r2, ror pc +fff01138: 2053544f subcss r5, r3, pc, asr #8 +fff0113c: 524d2053 subpl r2, sp, #83 ; 0x53 +fff01140: 6f432020 svcvs 0x00432020 +fff01144: 20566572 subcss r6, r6, r2, ror r5 +fff01148: 73696f6e cmnvc r9, #440 ; 0x1b8 +fff0114c: 3a203230 bcc 70da14 +fff01150: 31323035 teqcc r2, r5, lsr r0 +fff01154: 32342d44 eorccs r2, r4, #4352 ; 0x1100 +fff01158: 20202020 eorcs r2, r0, r0, lsr #32 +fff0115c: 20202020 eorcs r2, r0, r0, lsr #32 +fff01160: 207c0d0a rsbcss r0, ip, sl, lsl #26 +fff01164: 00000000 andeq r0, r0, r0 +fff01168: 7c202020 stcvc 0, cr2, [r0], #-128 +fff0116c: 20202020 eorcs r2, r0, r0, lsr #32 +fff01170: 20202020 eorcs r2, r0, r0, lsr #32 +fff01174: 20202020 eorcs r2, r0, r0, lsr #32 +fff01178: 436f6e74 cmnmi pc, #1856 ; 0x740 +fff0117c: 6163743a cmnvs r3, sl, lsr r4 +fff01180: 2073746e rsbcss r7, r3, lr, ror #8 +fff01184: 6f6c7469 svcvs 0x006c7469 +fff01188: 6e674067 cdpvs 0, 6, cr4, cr7, cr7, {3} +fff0118c: 6f6f676c svcvs 0x006f676c +fff01190: 656d6169 strvsb r6, [sp, #-361]! +fff01194: 6c2e636f stcvs 3, cr6, [lr], #-444 +fff01198: 6d202020 stcvs 0, cr2, [r0, #-128]! +fff0119c: 20202020 eorcs r2, r0, r0, lsr #32 +fff011a0: 20202020 eorcs r2, r0, r0, lsr #32 +fff011a4: 20202020 eorcs r2, r0, r0, lsr #32 +fff011a8: 207c0d0a rsbcss r0, ip, sl, lsl #26 +fff011ac: 00000000 andeq r0, r0, r0 +fff011b0: 2b2d2d2d blcs a4c66c +fff011b4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011b8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011bc: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011c0: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011c4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011c8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011cc: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011d0: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011d4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011d8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011dc: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011e0: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011e4: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011e8: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011ec: 2d2d2d2d stccs 13, cr2, [sp, #-180]! +fff011f0: 2d2b0d0a stccs 13, cr0, [fp, #-40]! +fff011f4: 0d0a0000 stceq 0, cr0, [sl] +fff011f8: 203c2057 eorcss r2, ip, r7, asr r0 +fff011fc: 656c636f strvsb r6, [ip, #-879]! +fff01200: 6d652074 stcvsl 0, cr2, [r5, #-464]! +fff01204: 6f207468 svcvs 0x00207468 +fff01208: 65205354 strvs r5, [r0, #-852]! +fff0120c: 4f524d20 svcmi 0x00524d20 +fff01210: 536f4320 cmnpl pc, #-2147483648 ; 0x80000000 +fff01214: 626f6f74 rsbvs r6, pc, #464 ; 0x1d0 +fff01218: 6c6f6164 stfvse f6, [pc], #-400 +fff0121c: 65722063 ldrvsb r2, [r2, #-99]! +fff01220: 6f6e736f svcvs 0x006e736f +fff01224: 6c652120 stfvse f2, [r5], #-128 +fff01228: 3e0d0a20 fmacscc s0, s26, s1 +fff0122c: 3c205365 stccc 3, cr5, [r0], #-404 +fff01230: 6c656374 stcvsl 3, cr6, [r5], #-464 +fff01234: 20616e20 rsbcs r6, r1, r0, lsr #28 +fff01238: 6f706572 svcvs 0x00706572 +fff0123c: 6174696f cmnvs r4, pc, ror #18 +fff01240: 6e206672 mcrvs 6, 1, r6, cr0, cr2, {3} +fff01244: 6f6d2074 svcvs 0x006d2074 +fff01248: 6865206d stmvsda r5!, {r0, r2, r3, r5, r6, sp}^ +fff0124c: 656e7520 strvsb r7, [lr, #-1312]! +fff01250: 62656c6f rsbvs r6, r5, #28416 ; 0x6f00 +fff01254: 77206f72 undefined +fff01258: 20707265 rsbcss r7, r0, r5, ror #4 +fff0125c: 7373203e cmnvc r3, #62 ; 0x3e +fff01260: 0d0a0000 stceq 0, cr0, [sl] +fff01264: 203c2074 eorcss r2, ip, r4, ror r0 +fff01268: 68652062 stmvsda r5!, {r1, r5, r6, sp}^ +fff0126c: 6f6f7420 svcvs 0x006f7420 +fff01270: 6b657920 blvs 185f6f8 +fff01274: 666f7220 strvsbt r7, [pc], -r0, lsr #4 +fff01278: 696d6d65 stmvsdb sp!, {r0, r2, r5, r6, r8, sl, fp, sp, lr}^ +fff0127c: 64696174 strvsbt r6, [r9], #-372 +fff01280: 65206170 strvs r6, [r0, #-368]! +fff01284: 706c6963 rsbvc r6, ip, r3, ror #18 +fff01288: 6174696f cmnvs r4, pc, ror #18 +fff0128c: 6e207374 mcrvs 3, 1, r7, cr0, cr4, {3} +fff01290: 6172742e cmnvs r2, lr, lsr #8 +fff01294: 203e0d0a eorcss r0, lr, sl, lsl #26 +fff01298: 0d0a0000 stceq 0, cr0, [sl] +fff0129c: 2030202d eorcss r2, r0, sp, lsr #32 +fff012a0: 20626f6f rsbcs r6, r2, pc, ror #30 +fff012a4: 74206672 strvct r6, [r0], #-1650 +fff012a8: 6f6d2063 svcvs 0x006d2063 +fff012ac: 6f726520 svcvs 0x00726520 +fff012b0: 52414d20 subpl r4, r1, #2048 ; 0x800 +fff012b4: 28737461 ldmcsda r3!, {r0, r5, r6, sl, ip, sp, lr}^ +fff012b8: 72742061 rsbvcs r2, r4, #97 ; 0x61 +fff012bc: 70706c69 rsbvcs r6, r0, r9, ror #24 +fff012c0: 63617469 cmnvs r1, #1761607680 ; 0x69000000 +fff012c4: 6f6e290d svcvs 0x006e290d +fff012c8: 0a203120 beq 70d750 +fff012cc: 2d207072 stccs 0, cr7, [r0, #-456]! +fff012d0: 6f677261 svcvs 0x00677261 +fff012d4: 6d20636f stcvs 3, cr6, [r0, #-444]! +fff012d8: 72652052 rsbvc r2, r5, #82 ; 0x52 +fff012dc: 414d2076 cmpmi sp, r6, ror r0 +fff012e0: 69612055 stmvsdb r1!, {r0, r2, r4, r6, sp}^ +fff012e4: 4152545f cmpmi r2, pc, asr r4 +fff012e8: 300d0a20 andcc r0, sp, r0, lsr #20 +fff012ec: 32202d20 eorcc r2, r0, #2048 ; 0x800 +fff012f0: 636f7265 cmnvs pc, #1342177286 ; 0x50000006 +fff012f4: 2052414d subcss r4, r2, sp, asr #2 +fff012f8: 2064756d rsbcs r7, r4, sp, ror #10 +fff012fc: 700d0a00 andvc r0, sp, r0, lsl #20 +fff01300: 2033202d eorcss r2, r3, sp, lsr #32 +fff01304: 20626f6f rsbcs r6, r2, pc, ror #30 +fff01308: 74206672 strvct r6, [r0], #-1650 +fff0130c: 6f6d2049 svcvs 0x006d2049 +fff01310: 32432045 subcc r2, r3, #69 ; 0x45 +fff01314: 4550524f ldrmib r5, [r0, #-591] +fff01318: 4d0d0a20 fstsmi s0, [sp, #-128] +fff0131c: 34202d20 strcct r2, [r0], #-3360 +fff01320: 70726f67 rsbvcs r6, r2, r7, ror #30 +fff01324: 72616d20 rsbvc r6, r1, #2048 ; 0x800 +fff01328: 49324320 ldmmidb r2!, {r5, r8, r9, lr} +fff0132c: 45455052 strmib r5, [r5, #-82] +fff01330: 4f4d2076 svcmi 0x004d2076 +fff01334: 69612055 stmvsdb r1!, {r0, r2, r4, r6, sp}^ +fff01338: 4152545f cmpmi r2, pc, asr r4 +fff0133c: 300d0a20 andcc r0, sp, r0, lsr #20 +fff01340: 35202d20 strcc r2, [r0, #-3360]! +fff01344: 73686f77 cmnvc r8, #476 ; 0x1dc +fff01348: 20636f6e rsbcs r6, r3, lr, ror #30 +fff0134c: 74656e74 strvcbt r6, [r5], #-3700 +fff01350: 206f6620 rsbcs r6, pc, r0, lsr #12 +fff01354: 49324320 ldmmidb r2!, {r5, r8, r9, lr} +fff01358: 45455052 strmib r5, [r5, #-82] +fff0135c: 4f4d0d0a svcmi 0x004d0d0a +fff01360: 00000000 andeq r0, r0, r0 +fff01364: 2061202d rsbcs r2, r1, sp, lsr #32 +fff01368: 20617574 rsbcs r7, r1, r4, ror r5 +fff0136c: 6f6d6174 svcvs 0x006d6174 +fff01370: 69632062 stmvsdb r3!, {r1, r5, r6, sp}^ +fff01374: 6f6f7420 svcvs 0x006f7420 +fff01378: 636f6e66 cmnvs pc, #1632 ; 0x660 +fff0137c: 69677572 stmvsdb r7!, {r1, r4, r5, r6, r8, sl, ip, sp, lr}^ +fff01380: 6174696f cmnvs r4, pc, ror #18 +fff01384: 6e0d0a20 fmacsvs s0, s26, s1 +fff01388: 68202d20 stmvsda r0!, {r5, r8, sl, fp, sp} +fff0138c: 68656c70 stmvsda r5!, {r4, r5, r6, sl, fp, sp, lr}^ +fff01390: 0d0a2072 stceq 0, cr2, [sl, #-456] +fff01394: 202d2072 eorcs r2, sp, r2, ror r0 +fff01398: 65737461 ldrvsb r7, [r3, #-1121]! +fff0139c: 72742073 rsbvcs r2, r4, #115 ; 0x73 +fff013a0: 79737465 ldmvcdb r3!, {r0, r2, r5, r6, sl, ip, sp, lr}^ +fff013a4: 6d0d0a0d fstsvs s0, [sp, #-52] +fff013a8: 0a53656c beq 13da960 +fff013ac: 6563743a strvsb r7, [r3, #-1082]! +fff013b0: 20000000 andcs r0, r0, r0 +fff013b4: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff013b8: 4170706c cmnmi r0, ip, rrx +fff013bc: 69636174 stmvsdb r3!, {r2, r4, r5, r6, r8, sp, lr}^ +fff013c0: 696f6e20 stmvsdb pc!, {r5, r9, sl, fp, sp, lr}^ +fff013c4: 77696c6c strvcb r6, [r9, -ip, ror #24]! +fff013c8: 20737461 rsbcss r7, r3, r1, ror #8 +fff013cc: 72742061 rsbvcs r2, r4, #97 ; 0x61 +fff013d0: 75746f6d ldrvcb r6, [r4, #-3949]! +fff013d4: 61746963 cmnvs r4, r3, ror #18 +fff013d8: 616c6c79 smcvs 50889 +fff013dc: 20616674 rsbcs r6, r1, r4, ror r6 +fff013e0: 65722064 ldrvsb r2, [r2, #-100]! +fff013e4: 6f776e6c svcvs 0x00776e6c +fff013e8: 6f61642e svcvs 0x0061642e +fff013ec: 0d0a2d3e stceq 13, cr2, [sl, #-248] +fff013f0: 20576169 subcss r6, r7, r9, ror #2 +fff013f4: 74696e67 strvcbt r6, [r9], #-3687 +fff013f8: 20666f72 rsbcs r6, r6, r2, ror pc +fff013fc: 20277374 eorcs r7, r7, r4, ror r3 +fff01400: 6f726d5f svcvs 0x00726d5f +fff01404: 70726f67 rsbvcs r6, r2, r7, ror #30 +fff01408: 72616d2e rsbvc r6, r1, #2944 ; 0xb80 +fff0140c: 62696e27 rsbvs r6, r9, #624 ; 0x270 +fff01410: 20696e20 rsbcs r6, r9, r0, lsr #28 +fff01414: 62797465 rsbvss r7, r9, #1694498816 ; 0x65000000 +fff01418: 2d737472 cfldrdcs mvd7, [r3, #-456]! +fff0141c: 65616d20 strvsb r6, [r1, #-3360]! +fff01420: 6d6f6465 cfstrdvs mvd6, [pc, #-404]! +fff01424: 2e2e2e00 cdpcs 14, 2, cr2, cr14, cr0, {0} +fff01428: 20455252 subcs r5, r5, r2, asr r2 +fff0142c: 4f522120 svcmi 0x00522120 +fff01430: 50726f67 rsbpls r6, r2, r7, ror #30 +fff01434: 72616d20 rsbvc r6, r1, #2048 ; 0x800 +fff01438: 66696c65 strvsbt r6, [r9], -r5, ror #24 +fff0143c: 20746f6f rsbcss r6, r4, pc, ror #30 +fff01440: 20626967 rsbcs r6, r2, r7, ror #18 +fff01444: 210d0a0d tstcs sp, sp, lsl #20 +fff01448: 0a000000 beq fff01450 <.text+0x1450> +fff0144c: 20496e76 subcs r6, r9, r6, ror lr +fff01450: 616c6964 cmnvs ip, r4, ror #18 +fff01454: 2070726f rsbcss r7, r0, pc, ror #4 +fff01458: 6772616d ldrvsb r6, [r2, -sp, ror #2]! +fff0145c: 6d696e67 stcvsl 14, cr6, [r9, #-412]! +fff01460: 2066696c rsbcs r6, r6, ip, ror #18 +fff01464: 65210d0a strvs r0, [r1, #-3338]! +fff01468: 0d0a5365 stceq 3, cr5, [sl, #-404] +fff0146c: 6c656374 stcvsl 3, cr6, [r5], #-464 +fff01470: 3a200000 bcc 701478 +fff01474: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01478: 41626f72 smcmi 9970 +fff0147c: 74206475 strvct r6, [r0], #-1141 +fff01480: 6d70696e ldcvsl 9, cr6, [r0, #-440]! +fff01484: 67206279 undefined +fff01488: 20707265 rsbcss r7, r0, r5, ror #4 +fff0148c: 7373696e cmnvc r3, #1802240 ; 0x1b8000 +fff01490: 6720616e strvs r6, [r0, -lr, ror #2]! +fff01494: 79206b65 stmvcdb r0!, {r0, r2, r5, r6, r8, r9, fp, sp, lr} +fff01498: 792e0d0a stmvcdb lr!, {r1, r3, r8, sl, fp} +fff0149c: 50726573 rsbpls r6, r2, r3, ror r5 +fff014a0: 7320616e teqvc r0, #-2147483621 ; 0x8000001b +fff014a4: 79206b65 stmvcdb r0!, {r0, r2, r5, r6, r8, r9, fp, sp, lr} +fff014a8: 7920746f stmvcdb r0!, {r0, r1, r2, r3, r5, r6, sl, ip, sp, lr} +fff014ac: 20636f6e rsbcs r6, r3, lr, ror #30 +fff014b0: 74696e75 strvcbt r6, [r9], #-3701 +fff014b4: 652e0d0a strvs r0, [lr, #-3338]! +fff014b8: 0d0a0000 stceq 0, cr0, [sl] +fff014bc: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff014c0: 44756d70 ldrmibt r6, [r5], #-3440 +fff014c4: 696e6720 stmvsdb lr!, {r5, r8, r9, sl, sp, lr}^ +fff014c8: 636f6d70 cmnvs pc, #7168 ; 0x1c00 +fff014cc: 6c657465 cfstrdvs mvd7, [r5], #-404 +fff014d0: 642e0d0a strvst r0, [lr], #-3338 +fff014d4: 0d0a5365 stceq 3, cr5, [sl, #-404] +fff014d8: 6c656374 stcvsl 3, cr6, [r5], #-464 +fff014dc: 3a200000 bcc 7014e4 +fff014e0: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff014e4: 456e7465 strmib r7, [lr, #-1125]! +fff014e8: 72206465 eorvc r6, r0, #1694498816 ; 0x65000000 +fff014ec: 76696365 strvcbt r6, [r9], -r5, ror #6 +fff014f0: 20616464 rsbcs r6, r1, r4, ror #8 +fff014f4: 72657373 rsbvc r7, r5, #-872415231 ; 0xcc000001 +fff014f8: 20283278 eorcs r3, r8, r8, ror r2 +fff014fc: 20686578 rsbcs r6, r8, r8, ror r5 +fff01500: 5f636861 svcpl 0x00636861 +fff01504: 72732c20 rsbvcs r2, r3, #8192 ; 0x2000 +fff01508: 73657420 cmnvc r5, #536870912 ; 0x20000000 +fff0150c: 4c534220 lfmmi f4, 2, [r3], {32} +fff01510: 746f2027 strvcbt r2, [pc], #39 ; fff01518 <.text+0x1518> +fff01514: 3027293a eorcc r2, r7, sl, lsr r9 +fff01518: 20000000 andcs r0, r0, r0 +fff0151c: 20496e76 subcs r6, r9, r6, ror lr +fff01520: 616c6964 cmnvs ip, r4, ror #18 +fff01524: 20616464 rsbcs r6, r1, r4, ror #8 +fff01528: 72657373 rsbvc r7, r5, #-872415231 ; 0xcc000001 +fff0152c: 210d0a0d tstcs sp, sp, lsl #20 +fff01530: 0a53656c beq 13daae8 +fff01534: 6563743a strvsb r7, [r3, #-1082]! +fff01538: 20000000 andcs r0, r0, r0 +fff0153c: 0d0a4170 stfeqs f4, [sl, #-448] +fff01540: 706c6963 rsbvc r6, ip, r3, ror #18 +fff01544: 6174696f cmnvs r4, pc, ror #18 +fff01548: 6e207769 cdpvs 7, 2, cr7, cr0, cr9, {3} +fff0154c: 6c6c2073 stcvsl 0, cr2, [ip], #-460 +fff01550: 74617274 strvcbt r7, [r1], #-628 +fff01554: 20617574 rsbcs r7, r1, r4, ror r5 +fff01558: 6f6d6174 svcvs 0x006d6174 +fff0155c: 6963616c stmvsdb r3!, {r2, r3, r5, r6, r8, sp, lr}^ +fff01560: 6c792061 ldcvsl 0, cr2, [r9], #-388 +fff01564: 66746572 undefined +fff01568: 2075706c rsbcss r7, r5, ip, rrx +fff0156c: 6f61642e svcvs 0x0061642e +fff01570: 0d0a2d3e stceq 13, cr2, [sl, #-248] +fff01574: 204c6f61 subcs r6, ip, r1, ror #30 +fff01578: 64696e67 strvsbt r6, [r9], #-3687 +fff0157c: 20626f6f rsbcs r6, r2, pc, ror #30 +fff01580: 7420696d strvct r6, [r0], #-2413 +fff01584: 6167652e cmnvs r7, lr, lsr #10 +fff01588: 2e2e0000 cdpcs 0, 2, cr0, cr14, cr0, {0} +fff0158c: 2055706c subcss r7, r5, ip, rrx +fff01590: 6f616420 svcvs 0x00616420 +fff01594: 636f6d70 cmnvs pc, #7168 ; 0x1c00 +fff01598: 6c657465 cfstrdvs mvd7, [r5], #-404 +fff0159c: 0d0a0000 stceq 0, cr0, [sl] +fff015a0: 20496e76 subcs r6, r9, r6, ror lr +fff015a4: 616c6964 cmnvs ip, r4, ror #18 +fff015a8: 20626f6f rsbcs r6, r2, pc, ror #30 +fff015ac: 74206465 strvct r6, [r0], #-1125 +fff015b0: 76696365 strvcbt r6, [r9], -r5, ror #6 +fff015b4: 206f7220 rsbcs r7, pc, r0, lsr #4 +fff015b8: 66696c65 strvsbt r6, [r9], -r5, ror #24 +fff015bc: 210d0a0d tstcs sp, sp, lsl #20 +fff015c0: 0a53656c beq 13dab78 +fff015c4: 6563743a strvsb r7, [r3, #-1082]! +fff015c8: 20000000 andcs r0, r0, r0 +fff015cc: 0d0a496e stceq 9, cr4, [sl, #-440] +fff015d0: 76616c69 strvcbt r6, [r1], -r9, ror #24 +fff015d4: 64206164 strvst r6, [r0], #-356 +fff015d8: 64726573 ldrvsbt r6, [r2], #-1395 +fff015dc: 73210d0a teqvc r1, #640 ; 0x280 +fff015e0: 0d0a5365 stceq 3, cr5, [sl, #-404] +fff015e4: 6c656374 stcvsl 3, cr6, [r5], #-464 +fff015e8: 3a200000 bcc 7015f0 +fff015ec: 0d0a4461 cfstrseq mvf4, [sl, #-388] +fff015f0: 74612077 strvcbt r2, [r1], #-119 +fff015f4: 696c6c20 stmvsdb ip!, {r5, sl, fp, sp, lr}^ +fff015f8: 6f766572 svcvs 0x00766572 +fff015fc: 77726974 undefined +fff01600: 65205241 strvs r5, [r0, #-577]! +fff01604: 4d20636f stcmi 3, cr6, [r0, #-444]! +fff01608: 6e74656e cdpvs 5, 7, cr6, cr4, cr14, {3} +fff0160c: 74210d0a strvct r0, [r1], #-3338 +fff01610: 2d3e2057 ldccs 0, cr2, [lr, #-348]! +fff01614: 61697469 cmnvs r9, r9, ror #8 +fff01618: 6e672066 cdpvs 0, 6, cr2, cr7, cr6, {3} +fff0161c: 6f722027 svcvs 0x00722027 +fff01620: 73746f72 cmnvc r4, #456 ; 0x1c8 +fff01624: 6d5f7072 ldcvsl 0, cr7, [pc, #-456] +fff01628: 6f677261 svcvs 0x00677261 +fff0162c: 6d2e6269 sfmvs f6, 4, [lr, #-420]! +fff01630: 6e272069 cdpvs 0, 2, cr2, cr7, cr9, {3} +fff01634: 6e206279 mcrvs 2, 1, r6, cr0, cr9, {3} +fff01638: 74652d73 strvcbt r2, [r5], #-3443 +fff0163c: 74726561 ldrvcbt r6, [r2], #-1377 +fff01640: 6d206d6f stcvs 13, cr6, [r0, #-444]! +fff01644: 64652e2e strvsbt r2, [r5], #-3630 +fff01648: 2e000000 cdpcs 0, 0, cr0, cr0, cr0, {0} +fff0164c: 20446f77 subcs r6, r4, r7, ror pc +fff01650: 6e6c6f61 cdpvs 15, 6, cr6, cr12, cr1, {3} +fff01654: 6420636f strvst r6, [r0], #-879 +fff01658: 6d706c65 ldcvsl 12, cr6, [r0, #-404]! +fff0165c: 7465640d strvcbt r6, [r5], #-1037 +fff01660: 0a000000 beq fff01668 <.text+0x1668> +fff01664: 57726974 undefined +fff01668: 696e6720 stmvsdb lr!, {r5, r8, r9, sl, sp, lr}^ +fff0166c: 62756666 rsbvss r6, r5, #106954752 ; 0x6600000 +fff01670: 65722074 ldrvsb r2, [r2, #-116]! +fff01674: 6f206932 svcvs 0x00206932 +fff01678: 63204545 teqvs r0, #289406976 ; 0x11400000 +fff0167c: 50524f4d subpls r4, r2, sp, asr #30 +fff01680: 2e2e2e00 cdpcs 14, 2, cr2, cr14, cr0, {0} +fff01684: 20436f6d subcs r6, r3, sp, ror #30 +fff01688: 706c6574 rsbvc r6, ip, r4, ror r5 +fff0168c: 65640d0a strvsb r0, [r4, #-3338]! +fff01690: 0d0a0000 stceq 0, cr0, [sl] +fff01694: 20496e76 subcs r6, r9, r6, ror lr +fff01698: 616c6964 cmnvs ip, r4, ror #18 +fff0169c: 20626f6f rsbcs r6, r2, pc, ror #30 +fff016a0: 74206465 strvct r6, [r0], #-1125 +fff016a4: 76696365 strvcbt r6, [r9], -r5, ror #6 +fff016a8: 206f7220 rsbcs r7, pc, r0, lsr #4 +fff016ac: 66696c65 strvsbt r6, [r9], -r5, ror #24 +fff016b0: 210d0a0d tstcs sp, sp, lsl #20 +fff016b4: 0a000000 beq fff016bc <.text+0x16bc> +fff016b8: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff016bc: 456e7465 strmib r7, [lr, #-1125]! +fff016c0: 72206465 eorvc r6, r0, #1694498816 ; 0x65000000 +fff016c4: 76696365 strvcbt r6, [r9], -r5, ror #6 +fff016c8: 20616464 rsbcs r6, r1, r4, ror #8 +fff016cc: 72657373 rsbvc r7, r5, #-872415231 ; 0xcc000001 +fff016d0: 20283220 eorcs r3, r8, r0, lsr #4 +fff016d4: 6865782d stmvsda r5!, {r0, r2, r3, r5, fp, ip, sp, lr}^ +fff016d8: 63686172 cmnvs r8, #-2147483620 ; 0x8000001c +fff016dc: 732c2073 teqvc ip, #115 ; 0x73 +fff016e0: 6574204c ldrvsb r2, [r4, #-76]! +fff016e4: 53422074 movtpl r2, #8308 ; 0x2074 +fff016e8: 6f202730 svcvs 0x00202730 +fff016ec: 27293a20 strcs r3, [r9, -r0, lsr #20]! +fff016f0: 00000000 andeq r0, r0, r0 +fff016f4: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff016f8: 41626f72 smcmi 9970 +fff016fc: 74206475 strvct r6, [r0], #-1141 +fff01700: 6d70696e ldcvsl 9, cr6, [r0, #-440]! +fff01704: 67206279 undefined +fff01708: 20707265 rsbcss r7, r0, r5, ror #4 +fff0170c: 7373696e cmnvc r3, #1802240 ; 0x1b8000 +fff01710: 6720616e strvs r6, [r0, -lr, ror #2]! +fff01714: 79206b65 stmvcdb r0!, {r0, r2, r5, r6, r8, r9, fp, sp, lr} +fff01718: 792e2049 stmvcdb lr!, {r0, r3, r6, sp} +fff0171c: 66206e6f strvst r6, [r0], -pc, ror #28 +fff01720: 20646174 rsbcs r6, r4, r4, ror r1 +fff01724: 61206973 teqvs r0, r3, ror r9 +fff01728: 2073686f rsbcss r6, r3, pc, ror #16 +fff0172c: 776e2c0d strvcb r2, [lr, -sp, lsl #24]! +fff01730: 0a000000 beq fff01738 <.text+0x1738> +fff01734: 74686520 strvcbt r6, [r8], #-1312 +fff01738: 73656c65 cmnvc r5, #25856 ; 0x6500 +fff0173c: 63746564 cmnvs r4, #419430400 ; 0x19000000 +fff01740: 20646576 rsbcs r6, r4, r6, ror r5 +fff01744: 69636520 stmvsdb r3!, {r5, r8, sl, sp, lr}^ +fff01748: 6973206e ldmvsdb r3!, {r1, r2, r3, r5, r6, sp}^ +fff0174c: 6f742072 svcvs 0x00742072 +fff01750: 6573706f ldrvsb r7, [r3, #-111]! +fff01754: 6e64696e cdpvs 9, 6, cr6, cr4, cr14, {3} +fff01758: 672e2050 undefined +fff0175c: 72657373 rsbvc r7, r5, #-872415231 ; 0xcc000001 +fff01760: 20616e79 rsbcs r6, r1, r9, ror lr +fff01764: 206b6579 rsbcs r6, fp, r9, ror r5 +fff01768: 20746f20 rsbcss r6, r4, r0, lsr #30 +fff0176c: 636f6e74 cmnvs pc, #1856 ; 0x740 +fff01770: 696e7565 stmvsdb lr!, {r0, r2, r5, r6, r8, sl, ip, sp, lr}^ +fff01774: 2e0d0a0d fmacscs s0, s26, s26 +fff01778: 0a000000 beq fff01780 <.text+0x1780> +fff0177c: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01780: 4175746f cmnmi r5, pc, ror #8 +fff01784: 6d617469 cfstrdvs mvd7, [r1, #-420]! +fff01788: 6320626f teqvs r0, #-268435450 ; 0xf0000006 +fff0178c: 6f742063 svcvs 0x00742063 +fff01790: 6f6e6669 svcvs 0x006e6669 +fff01794: 67757261 ldrvsb r7, [r5, -r1, ror #4]! +fff01798: 74696f6e strvcbt r6, [r9], #-3950 +fff0179c: 20666f72 rsbcs r6, r6, r2, ror pc +fff017a0: 20706f77 rsbcss r6, r0, r7, ror pc +fff017a4: 65722d75 ldrvsb r2, [r2, #-3445]! +fff017a8: 703a0d0a eorvcs r0, sl, sl, lsl #26 +fff017ac: 00000000 andeq r0, r0, r0 +fff017b0: 5b333231 blpl bce07c +fff017b4: 305d2063 subccs r2, sp, r3, rrx +fff017b8: 6f6e6669 svcvs 0x006e6669 +fff017bc: 67757261 ldrvsb r7, [r5, -r1, ror #4]! +fff017c0: 74696f6e strvcbt r6, [r9], #-3950 +fff017c4: 20444950 subcs r4, r4, r0, asr r9 +fff017c8: 20737769 rsbcss r7, r3, r9, ror #14 +fff017cc: 7463680d strvcbt r6, [r3], #-2061 +fff017d0: 0a203030 beq 70d898 +fff017d4: 3030202d eorccs r2, r0, sp, lsr #32 +fff017d8: 20537461 subcss r7, r3, r1, ror #8 +fff017dc: 72742062 rsbvcs r2, r4, #98 ; 0x62 +fff017e0: 6f6f746c svcvs 0x006f746c +fff017e4: 6f616465 svcvs 0x00616465 +fff017e8: 7220636f eorvc r6, r0, #-1140850687 ; 0xbc000001 +fff017ec: 6e736f6c cdpvs 15, 7, cr6, cr3, cr12, {3} +fff017f0: 650d0a20 strvs r0, [sp, #-2592] +fff017f4: 30303031 eorccs r3, r0, r1, lsr r0 +fff017f8: 202d2041 eorcs r2, sp, r1, asr #32 +fff017fc: 75746f6d ldrvcb r6, [r4, #-3949]! +fff01800: 61746963 cmnvs r4, r3, ror #18 +fff01804: 20626f6f rsbcs r6, r2, pc, ror #30 +fff01808: 74206672 strvct r6, [r0], #-1650 +fff0180c: 6f6d2063 svcvs 0x006d2063 +fff01810: 6f726520 svcvs 0x00726520 +fff01814: 52414d0d subpl r4, r1, #832 ; 0x340 +fff01818: 0a000000 beq fff01820 <.text+0x1820> +fff0181c: 20303031 eorcss r3, r0, r1, lsr r0 +fff01820: 30202d20 eorcc r2, r0, r0, lsr #26 +fff01824: 4175746f cmnmi r5, pc, ror #8 +fff01828: 6d617469 cfstrdvs mvd7, [r1, #-420]! +fff0182c: 6320626f teqvs r0, #-268435450 ; 0xf0000006 +fff01830: 6f742066 svcvs 0x00742066 +fff01834: 726f6d20 rsbvc r6, pc, #2048 ; 0x800 +fff01838: 49324320 ldmmidb r2!, {r5, r8, r9, lr} +fff0183c: 45455052 strmib r5, [r5, #-82] +fff01840: 4f4d2028 svcmi 0x004d2028 +fff01844: 41646472 smcmi 17986 +fff01848: 65737320 ldrvsb r7, [r3, #-800]! +fff0184c: 30784130 rsbccs r4, r8, r0, lsr r1 +fff01850: 290d0a0d stmcsdb sp, {r0, r2, r3, r9, fp} +fff01854: 0a53656c beq 13dae0c +fff01858: 6563743a strvsb r7, [r3, #-1082]! +fff0185c: 20000000 andcs r0, r0, r0 +fff01860: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01864: 53544f52 cmppl r4, #328 ; 0x148 +fff01868: 4d20536f stcmi 3, cr5, [r0, #-444]! +fff0186c: 4320626f teqmi r0, #-268435450 ; 0xf0000006 +fff01870: 6f746c6f svcvs 0x00746c6f +fff01874: 61646572 smcvs 18002 +fff01878: 0d0a0000 stceq 0, cr0, [sl] +fff0187c: 2730273a undefined +fff01880: 20457865 subcs r7, r5, r5, ror #16 +fff01884: 63757465 cmnvs r5, #1694498816 ; 0x65000000 +fff01888: 2070726f rsbcss r7, r0, pc, ror #4 +fff0188c: 6772616d ldrvsb r6, [r2, -sp, ror #2]! +fff01890: 20696e20 rsbcs r6, r9, r0, lsr #28 +fff01894: 52414d2e subpl r4, r1, #2944 ; 0xb80 +fff01898: 0d0a0000 stceq 0, cr0, [sl] +fff0189c: 2731273a undefined +fff018a0: 20577269 subcss r7, r7, r9, ror #4 +fff018a4: 74652027 strvcbt r2, [r5], #-39 +fff018a8: 73746f72 cmnvc r4, #456 ; 0x1c8 +fff018ac: 6d5f7072 ldcvsl 0, cr7, [pc, #-456] +fff018b0: 6f677261 svcvs 0x00677261 +fff018b4: 6d2e6269 sfmvs f6, 4, [lr, #-420]! +fff018b8: 6e272074 mcrvs 0, 1, r2, cr7, cr4, {3} +fff018bc: 6f207468 svcvs 0x00207468 +fff018c0: 6520636f strvs r6, [r0, #-879]! +fff018c4: 72652773 rsbvc r2, r5, #30146560 ; 0x1cc0000 +fff018c8: 2052414d subcss r4, r2, sp, asr #2 +fff018cc: 20766961 rsbcss r6, r6, r1, ror #18 +fff018d0: 20554152 subcss r4, r5, r2, asr r1 +fff018d4: 542e0d0a strplt r0, [lr], #-3338 +fff018d8: 00000000 andeq r0, r0, r0 +fff018dc: 2732273a undefined +fff018e0: 20507269 subcss r7, r0, r9, ror #4 +fff018e4: 6e742063 cdpvs 0, 7, cr2, cr4, cr3, {3} +fff018e8: 75727265 ldrvcb r7, [r2, #-613]! +fff018ec: 6e742063 cdpvs 0, 7, cr2, cr4, cr3, {3} +fff018f0: 6f6e7465 svcvs 0x006e7465 +fff018f4: 6e74206f cdpvs 0, 7, cr2, cr4, cr15, {3} +fff018f8: 6620636f strvst r6, [r0], -pc, ror #6 +fff018fc: 6d706c65 ldcvsl 12, cr6, [r0, #-404]! +fff01900: 74652063 strvcbt r2, [r5], #-99 +fff01904: 6f726520 svcvs 0x00726520 +fff01908: 52414d2e subpl r4, r1, #2944 ; 0xb80 +fff0190c: 0d0a0000 stceq 0, cr0, [sl] +fff01910: 2733273a undefined +fff01914: 204c6f61 subcs r6, ip, r1, ror #30 +fff01918: 6420626f strvst r6, [r0], #-623 +fff0191c: 6f742069 svcvs 0x00742069 +fff01920: 6d616765 stcvsl 7, cr6, [r1, #-404]! +fff01924: 2066726f rsbcs r7, r6, pc, ror #4 +fff01928: 6d204545 cfstr32vs mvfx4, [r0, #-276]! +fff0192c: 50524f4d subpls r4, r2, sp, asr #30 +fff01930: 20616e64 rsbcs r6, r1, r4, ror #28 +fff01934: 20737461 rsbcss r7, r3, r1, ror #8 +fff01938: 72742061 rsbvcs r2, r4, #97 ; 0x61 +fff0193c: 70706c69 rsbvcs r6, r0, r9, ror #24 +fff01940: 63617469 cmnvs r1, #1761607680 ; 0x69000000 +fff01944: 6f6e2e0d svcvs 0x006e2e0d +fff01948: 0a000000 beq fff01950 <.text+0x1950> +fff0194c: 2734273a undefined +fff01950: 20577269 subcss r7, r7, r9, ror #4 +fff01954: 74652027 strvcbt r2, [r5], #-39 +fff01958: 73746f72 cmnvc r4, #456 ; 0x1c8 +fff0195c: 6d5f7072 ldcvsl 0, cr7, [pc, #-456] +fff01960: 6f677261 svcvs 0x00677261 +fff01964: 6d2e6269 sfmvs f6, 4, [lr, #-420]! +fff01968: 6e272074 mcrvs 0, 1, r2, cr7, cr4, {3} +fff0196c: 6f204932 svcvs 0x00204932 +fff01970: 43204545 teqmi r0, #289406976 ; 0x11400000 +fff01974: 50524f4d subpls r4, r2, sp, asr #30 +fff01978: 20766961 rsbcss r6, r6, r1, ror #18 +fff0197c: 20554152 subcss r4, r5, r2, asr r1 +fff01980: 542e0d0a strplt r0, [lr], #-3338 +fff01984: 00000000 andeq r0, r0, r0 +fff01988: 2735273a undefined +fff0198c: 20507269 subcss r7, r0, r9, ror #4 +fff01990: 6e742063 cdpvs 0, 7, cr2, cr4, cr3, {3} +fff01994: 6f6e7465 svcvs 0x006e7465 +fff01998: 6e74206f cdpvs 0, 7, cr2, cr4, cr15, {3} +fff0199c: 66204932 undefined +fff019a0: 43204545 teqmi r0, #289406976 ; 0x11400000 +fff019a4: 50524f4d subpls r4, r2, sp, asr #30 +fff019a8: 2e0d0a00 fmacscs s0, s26, s0 +fff019ac: 2761273a undefined +fff019b0: 2053686f subcss r6, r3, pc, ror #16 +fff019b4: 77204449 strvc r4, [r0, -r9, asr #8]! +fff019b8: 50207377 eorpl r7, r0, r7, ror r3 +fff019bc: 69746368 ldmvsdb r4!, {r3, r5, r6, r8, r9, sp, lr}^ +fff019c0: 20636f6e rsbcs r6, r3, lr, ror #30 +fff019c4: 66696775 undefined +fff019c8: 72617469 rsbvc r7, r1, #1761607680 ; 0x69000000 +fff019cc: 6f6e7320 svcvs 0x006e7320 +fff019d0: 666f7220 strvsbt r7, [pc], -r0, lsr #4 +fff019d4: 6175746f cmnvs r5, pc, ror #8 +fff019d8: 6d617469 cfstrdvs mvd7, [r1, #-420]! +fff019dc: 6320626f teqvs r0, #-268435450 ; 0xf0000006 +fff019e0: 6f742e0d svcvs 0x00742e0d +fff019e4: 0a000000 beq fff019ec <.text+0x19ec> +fff019e8: 2768273a undefined +fff019ec: 2053686f subcss r6, r3, pc, ror #16 +fff019f0: 77207468 strvc r7, [r0, -r8, ror #8]! +fff019f4: 69732073 ldmvsdb r3!, {r0, r1, r4, r5, r6, sp}^ +fff019f8: 63726565 cmnvs r2, #423624704 ; 0x19400000 +fff019fc: 6e2e0d0a cdpvs 13, 2, cr0, cr14, cr10, {0} +fff01a00: 00000000 andeq r0, r0, r0 +fff01a04: 2772273a undefined +fff01a08: 20526573 subcss r6, r2, r3, ror r5 +fff01a0c: 65742073 ldrvsb r2, [r4, #-115]! +fff01a10: 79737465 ldmvcdb r3!, {r0, r2, r5, r6, sl, ip, sp, lr}^ +fff01a14: 6d2e0d0a stcvs 13, cr0, [lr, #-40]! +fff01a18: 0d0a0000 stceq 0, cr0, [sl] +fff01a1c: 426f6f74 rsbmi r6, pc, #464 ; 0x1d0 +fff01a20: 20454550 subcs r4, r5, r0, asr r5 +fff01a24: 524f4d3a subpl r4, pc, #3712 ; 0xe80 +fff01a28: 20323478 eorcss r3, r2, r8, ror r4 +fff01a2c: 786e6e6e stmvcda lr!, {r1, r2, r3, r5, r6, r9, sl, fp, sp, lr}^ +fff01a30: 20286c69 eorcs r6, r8, r9, ror #24 +fff01a34: 6b652032 blvs 1849b04 +fff01a38: 34414136 strccb r4, [r1], #-310 +fff01a3c: 34292c20 strcct r2, [r9], #-3104 +fff01a40: 37206269 strcc r6, [r0, -r9, ror #4]! +fff01a44: 74206164 strvct r6, [r0], #-356 +fff01a48: 64726573 ldrvsbt r6, [r2], #-1395 +fff01a4c: 73202b20 teqvc r0, #32768 ; 0x8000 +fff01a50: 646f6e74 strvsbt r6, [pc], #3700 ; fff01a58 <.text+0x1a58> +fff01a54: 2d636172 stfcse f6, [r3, #-456]! +fff01a58: 65206269 strvs r6, [r0, #-617]! +fff01a5c: 742c0d0a strvct r0, [ip], #-3338 +fff01a60: 00000000 andeq r0, r0, r0 +fff01a64: 636f6e6e cmnvs pc, #1760 ; 0x6e0 +fff01a68: 65637465 strvsb r7, [r3, #-1125]! +fff01a6c: 6420746f strvst r7, [r0], #-1135 +fff01a70: 20493243 subcs r3, r9, r3, asr #4 +fff01a74: 5f434f4e svcpl 0x00434f4e +fff01a78: 54524f4c ldrplb r4, [r2], #-3916 +fff01a7c: 4c45525f sfmmi f5, 2, [r5], {95} +fff01a80: 302c206f eorcc r2, ip, pc, rrx +fff01a84: 70657261 rsbvc r7, r5, r1, ror #4 +fff01a88: 74696e67 strvcbt r6, [r9], #-3687 +fff01a8c: 20667265 rsbcs r7, r6, r5, ror #4 +fff01a90: 7175656e cmnvc r5, lr, ror #10 +fff01a94: 63792069 cmnvs r9, #105 ; 0x69 +fff01a98: 73203130 teqvc r0, #12 ; 0xc +fff01a9c: 306b487a rsbcc r4, fp, sl, ror r8 +fff01aa0: 2c0d0a00 stccs 10, cr0, [sp], {0} +fff01aa4: 6d617869 stcvsl 8, cr7, [r1, #-420]! +fff01aa8: 6d756d20 ldcvsl 13, cr6, [r5, #-128]! +fff01aac: 45455052 strmib r5, [r5, #-82] +fff01ab0: 4f4d2073 svcmi 0x004d2073 +fff01ab4: 697a6520 ldmvsdb sl!, {r5, r8, sl, sp, lr}^ +fff01ab8: 3d203635 stccc 6, cr3, [r0, #-212]! +fff01abc: 35333620 ldrcc r3, [r3, #-1568]! +fff01ac0: 62797465 rsbvss r7, r9, #1694498816 ; 0x65000000 +fff01ac4: 203d3e20 eorcss r3, sp, r0, lsr #28 +fff01ac8: 31362062 teqcc r6, r2, rrx +fff01acc: 69742061 ldmvsdb r4!, {r0, r5, r6, sp}^ +fff01ad0: 64647265 strvsbt r7, [r4], #-613 +fff01ad4: 73736573 cmnvc r3, #482344960 ; 0x1cc00000 +fff01ad8: 2c0d0a00 stccs 10, cr0, [sp], {0} +fff01adc: 66697865 strvsbt r7, [r9], -r5, ror #16 +fff01ae0: 6420626f strvst r6, [r0], #-623 +fff01ae4: 6f742064 svcvs 0x00742064 +fff01ae8: 65766963 ldrvsb r6, [r6, #-2403]! +fff01aec: 65206164 strvs r6, [r0, #-356]! +fff01af0: 64726573 ldrvsbt r6, [r2], #-1395 +fff01af4: 733a2030 teqvc sl, #48 ; 0x30 +fff01af8: 7841300d stmvcda r1, {r0, r2, r3, ip, sp}^ +fff01afc: 0a0d0a00 beq 244304 +fff01b00: 5465726d strplbt r7, [r5], #-621 +fff01b04: 696e616c stmvsdb lr!, {r2, r3, r5, r6, r8, sp, lr}^ +fff01b08: 20736574 rsbcss r6, r3, r4, ror r5 +fff01b0c: 75703a20 ldrvcb r3, [r0, #-2592]! +fff01b10: 39363030 ldmccdb r6!, {r4, r5, ip, sp} +fff01b14: 20626175 rsbcs r6, r2, r5, ror r1 +fff01b18: 642c2038 strvst r2, [ip], #-56 +fff01b1c: 20646174 rsbcs r6, r4, r4, ror r1 +fff01b20: 61206269 teqvs r0, r9, ror #4 +fff01b24: 74732c20 ldrvcbt r2, [r3], #-3104 +fff01b28: 6e6f2070 mcrvs 0, 3, r2, cr15, cr0, {3} +fff01b2c: 61726974 cmnvs r2, r4, ror r9 +fff01b30: 792c2031 stmvcdb ip!, {r0, r4, r5, sp} +fff01b34: 2073746f rsbcss r7, r3, pc, ror #8 +fff01b38: 70206269 eorvc r6, r0, r9, ror #4 +fff01b3c: 740d0a0d strvc r0, [sp], #-2573 +fff01b40: 0a000000 beq fff01b48 <.text+0x1b48> +fff01b44: 466f7220 strmibt r7, [pc], -r0, lsr #4 +fff01b48: 6d6f7265 sfmvs f7, 2, [pc, #-404]! +fff01b4c: 20696e66 rsbcs r6, r9, r6, ror #28 +fff01b50: 6f726d61 svcvs 0x00726d61 +fff01b54: 74696f6e strvcbt r6, [r9], #-3950 +fff01b58: 20736565 rsbcss r6, r3, r5, ror #10 +fff01b5c: 20746865 rsbcss r6, r4, r5, ror #16 +fff01b60: 2053544f subcss r5, r3, pc, asr #8 +fff01b64: 524d2043 subpl r2, sp, #67 ; 0x43 +fff01b68: 6f726520 svcvs 0x00726520 +fff01b6c: 2f205354 svccs 0x00205354 +fff01b70: 4f524d20 svcmi 0x00524d20 +fff01b74: 536f4320 cmnpl pc, #-2147483648 ; 0x80000000 +fff01b78: 64617461 strvsbt r7, [r1], #-1121 +fff01b7c: 73686565 cmnvc r8, #423624704 ; 0x19400000 +fff01b80: 740d0a00 strvc r0, [sp], #-2560 +fff01b84: 68747470 ldmvsda r4!, {r4, r5, r6, sl, ip, sp, lr}^ +fff01b88: 3a2f2f6f bcc acd94c +fff01b8c: 70656e63 rsbvc r6, r5, r3, ror #28 +fff01b90: 6f726573 svcvs 0x00726573 +fff01b94: 2e6f7267 cdpcs 2, 6, cr7, cr15, cr7, {3} +fff01b98: 2f70726f svccs 0x0070726f +fff01b9c: 6a656374 bvs 185a974 +fff01ba0: 2c73746f cfldrdcs mvd7, [r3], #-444 +fff01ba4: 726d5f63 rsbvc r5, sp, #396 ; 0x18c +fff01ba8: 6f72650d svcvs 0x0072650d +fff01bac: 0a000000 beq fff01bb4 <.text+0x1bb4> +fff01bb0: 68747470 ldmvsda r4!, {r4, r5, r6, sl, ip, sp, lr}^ +fff01bb4: 3a2f2f6f bcc acd978 +fff01bb8: 70656e63 rsbvc r6, r5, r3, ror #28 +fff01bbc: 6f726573 svcvs 0x00726573 +fff01bc0: 2e6f7267 cdpcs 2, 6, cr7, cr15, cr7, {3} +fff01bc4: 2f70726f svccs 0x0070726f +fff01bc8: 6a656374 bvs 185a9a0 +fff01bcc: 2c73746f cfldrdcs mvd7, [r3], #-444 +fff01bd0: 726d5f73 rsbvc r5, sp, #460 ; 0x1cc +fff01bd4: 6f630d0a svcvs 0x00630d0a +fff01bd8: 00000000 andeq r0, r0, r0 +fff01bdc: 436f6e74 cmnmi pc, #1856 ; 0x740 +fff01be0: 6163743a cmnvs r3, sl, lsr r4 +fff01be4: 2073746e rsbcss r7, r3, lr, ror #8 +fff01be8: 6f6c7469 svcvs 0x006c7469 +fff01bec: 6e674067 cdpvs 0, 6, cr4, cr7, cr7, {3} +fff01bf0: 6f6f676c svcvs 0x006f676c +fff01bf4: 656d6169 strvsb r6, [sp, #-361]! +fff01bf8: 6c2e636f stcvs 3, cr6, [lr], #-444 +fff01bfc: 6d0d0a00 fstsvs s0, [sp] +fff01c00: 28632920 stmcsda r3!, {r5, r8, fp, sp}^ +fff01c04: 32303132 eorccs r3, r0, #-2147483636 ; 0x8000000c +fff01c08: 20627920 rsbcs r7, r2, r0, lsr #18 +fff01c0c: 53746570 cmnpl r4, #469762048 ; 0x1c000000 +fff01c10: 68616e20 stmvsda r1!, {r5, r9, sl, fp, sp, lr}^ +fff01c14: 4e6f6c74 mcrmi 12, 3, r6, cr15, cr4, {3} +fff01c18: 696e670d stmvsdb lr!, {r0, r2, r3, r8, r9, sl, sp, lr}^ +fff01c1c: 0a0d0a53 beq 244570 +fff01c20: 656c6563 strvsb r6, [ip, #-1379]! +fff01c24: 743a2000 ldrvct r2, [sl] +fff01c28: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01c2c: 5765276c strplb r2, [r5, -ip, ror #14]! +fff01c30: 6c207365 stcvs 3, cr7, [r0], #-404 +fff01c34: 6e642079 mcrvs 0, 3, r2, cr4, cr9, {3} +fff01c38: 6f752062 svcvs 0x00752062 +fff01c3c: 61636b20 cmnvs r3, r0, lsr #22 +fff01c40: 2d20746f cfstrscs mvf7, [r0, #-444]! +fff01c44: 20746865 rsbcss r6, r4, r5, ror #16 +fff01c48: 20667574 rsbcs r7, r6, r4, ror r5 +fff01c4c: 75726521 ldrvcb r6, [r2, #-1313]! +fff01c50: 2e0d0a0d fmacscs s0, s26, s26 +fff01c54: 0a000000 beq fff01c5c <.text+0x1c5c> +fff01c58: 202d2044 eorcs r2, sp, r4, asr #32 +fff01c5c: 6f63746f svcvs 0x0063746f +fff01c60: 7220456d eorvc r4, r0, #457179136 ; 0x1b400000 +fff01c64: 6d657420 cfstrdvs mvd7, [r5, #-128]! +fff01c68: 4c2e2042 stcmi 0, cr2, [lr], #-264 +fff01c6c: 726f776e rsbvc r7, pc, #28835840 ; 0x1b80000 +fff01c70: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01c74: 53656c65 cmnpl r5, #25856 ; 0x6500 +fff01c78: 63743a20 cmnvs r4, #131072 ; 0x20000 +fff01c7c: 00000000 andeq r0, r0, r0 +fff01c80: 20496e76 subcs r6, r9, r6, ror lr +fff01c84: 616c6964 cmnvs ip, r4, ror #18 +fff01c88: 206f7065 rsbcs r7, pc, r5, rrx +fff01c8c: 72617469 rsbvc r7, r1, #1761607680 ; 0x69000000 +fff01c90: 6f6e210d svcvs 0x006e210d +fff01c94: 0a547279 beq 141e680 +fff01c98: 20616761 rsbcs r6, r1, r1, ror #14 +fff01c9c: 696e3a20 stmvsdb lr!, {r5, r9, fp, ip, sp}^ +fff01ca0: 00000000 andeq r0, r0, r0 +fff01ca4: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01ca8: 2d3e2053 ldccs 0, cr2, [lr, #-332]! +fff01cac: 74617274 strvcbt r7, [r1], #-628 +fff01cb0: 696e6720 stmvsdb lr!, {r5, r8, r9, sl, sp, lr}^ +fff01cb4: 6170706c cmnvs r0, ip, rrx +fff01cb8: 69636174 stmvsdb r3!, {r2, r4, r5, r6, r8, sp, lr}^ +fff01cbc: 696f6e2e stmvsdb pc!, {r1, r2, r3, r5, r9, sl, fp, sp, lr}^ +fff01cc0: 2e2e0d0a cdpcs 13, 2, cr0, cr14, cr10, {0} +fff01cc4: 0d0a0000 stceq 0, cr0, [sl] +fff01cc8: 0d0a0d0a stceq 13, cr0, [sl, #-40] +fff01ccc: 41626f72 smcmi 9970 +fff01cd0: 74656421 strvcbt r6, [r5], #-1057 +fff01cd4: 00000000 andeq r0, r0, r0 Index: trunk/basic_system/software/bootloader/main.lst =================================================================== --- trunk/basic_system/software/bootloader/main.lst (nonexistent) +++ trunk/basic_system/software/bootloader/main.lst (revision 13) @@ -0,0 +1,3512 @@ + 1 .file "main.c" + 9 .Ltext0: + 10 .align 2 + 11 .global io_read_gpio0_pin + 13 io_read_gpio0_pin: + 14 .LFB2: + 15 .file 1 "io_driver.c" + 1:io_driver.c **** #include "io_driver.h" + 2:io_driver.c **** #include "storm_core.h" + 3:io_driver.c **** #include "storm_soc_basic.h" + 4:io_driver.c **** + 5:io_driver.c **** // ################################################################################################ + 6:io_driver.c **** // General Purpose IO (GENERAL_PURPOSE_CONTROLLER_0) + 7:io_driver.c **** // ################################################################################################ + 8:io_driver.c **** + 9:io_driver.c **** // ****************************************************************************** + 10:io_driver.c **** // Read general purpose IO port + 11:io_driver.c **** unsigned long io_read_gpio0_pin(unsigned char pin) + 12:io_driver.c **** // ****************************************************************************** + 13:io_driver.c **** { + 16 args = 0, pretend = 0, frame = 0 + 17 @ frame_needed = 0, uses_anonymous_args = 0 + 18 @ link register save eliminated. + 19 .LVL0: + 20 .loc 1 14 0 + 14:io_driver.c **** unsigned long temp = GPIO0_IN & (1< 7) + 162 0: + 163 0090 E3500007 .loc 1 71 0 + 164 mov ip, #0 + 165 0094 E92D4010 mvn lr, #255 + 166 .loc 1 67 0 + 167 and r1, r1, #255 + 168 0098 E3A0C000 .loc 1 71 0 + 169 009c E3E0E0FF bhi .L16 + 170 .loc 1 83 0 + 171 00a0 E20110FF sub r3, r0, #4 + 172 and r3, r3, #255 + 173 00a4 8A000011 .loc 1 74 0 + 72:io_driver.c **** port = 0; + 73:io_driver.c **** + 74:io_driver.c **** if(port < 4){ + 75:io_driver.c **** temp = PWM0_CONF0; // get working copy + 76:io_driver.c **** temp = temp & ~(0xFF << (port*8)); // clear old value + 77:io_driver.c **** temp = temp | (unsigned long)(data << (port*8)); // insert new value + 78:io_driver.c **** PWM0_CONF0 = temp; + 79:io_driver.c **** } + 80:io_driver.c **** else{ + 81:io_driver.c **** port = port-4; + 82:io_driver.c **** temp = PWM0_CONF1; // get working copy + 83:io_driver.c **** temp = temp & ~(0xFF << (port*8)); // clear old value + 174 .loc 1 83 0 + 175 00a8 E2403004 mov lr, r3, asl #3 + 176 00ac E20330FF .loc 1 82 0 + 177 mvn r4, #61440 + 178 00b0 E3500003 .loc 1 74 0 + 179 mov ip, r0, asl #3 + 180 00b4 E1A0E183 bls .L22 + 181 .loc 1 83 0 + 182 00b8 E3E04A0F mov r3, #255 + 183 mov r3, r3, asl lr + 184 00bc E1A0C180 .loc 1 82 0 + 185 00c0 9A000007 ldr r2, [r4, #-3979] + 186 .LVL7: + 187 00c4 E3A030FF .loc 1 83 0 + 188 00c8 E1A03E13 mvn r3, r3 + 189 and r2, r2, r3 + 190 00cc E5142F8B .LVL8: + 191 .loc 1 84 0 + 192 orr r2, r2, r1, asl lr + 193 00d0 E1E03003 .LVL9: + 194 00d4 E0022003 .loc 1 85 0 + 195 str r2, [r4, #-3979] + 84:io_driver.c **** temp = temp | (unsigned long)(data << (port*8)); // insert new value + 196 LVL10: + 197 00d8 E1822E11 .L22: + 198 .loc 1 74 0 + 85:io_driver.c **** PWM0_CONF1 = temp; + 199 v r3, #255 + 200 00dc E5042F8B mov r3, r3, asl ip + 201 00e0 E8BD8010 mvn lr, r3 + 202 .L16: + 203 .loc 1 75 0 + 204 mvn r2, #61440 + 205 00e4 E3A030FF ldr r3, [r2, #-3983] + 206 00e8 E1A03C13 .LVL11: + 207 00ec E1E0E003 .loc 1 76 0 + 208 and r3, r3, lr + 209 .LVL12: + 210 00f0 E3E02A0F .loc 1 77 0 + 211 00f4 E5123F8F orr r3, r3, r1, asl ip + 212 .LVL13: + 213 .loc 1 78 0 + 214 00f8 E003300E str r3, [r2, #-3983] + 215 ldmfd sp!, {r4, pc} + 216 .LFE8: + 218 .align 2 + 219 .global io_get_pwm + 221 0104 E8BD8010 io_get_pwm: + 222 .LFB9: + 223 .loc 1 93 0 + 224 @ args = 0, pretend = 0, frame = 0 + 225 @ frame_needed = 0, uses_anonymous_args = 0 + 226 @ link register save eliminated. + 227 .LVL14: + 228 and r0, r0, #255 + 86:io_driver.c **** } + 87:io_driver.c **** } + 88:io_driver.c **** + 89:io_driver.c **** // ****************************************************************************** + 90:io_driver.c **** // Set pwm value + 91:io_driver.c **** unsigned char io_get_pwm(unsigned char port) + 92:io_driver.c **** // ****************************************************************************** + 93:io_driver.c **** { + 229 1 93 0 + 230 @ lr needed for prologue + 231 .loc 1 97 0 + 232 mov r2, #0 + 233 bhi .L26 + 234 0108 E20000FF .loc 1 104 0 + 94:io_driver.c **** unsigned long temp = 0; + 95:io_driver.c **** + 96:io_driver.c **** // value adjustment + 97:io_driver.c **** if(port > 7) + 235 3, r0, #4 + 236 010c E3500007 .loc 1 100 0 + 237 cmp r0, #3 + 238 .loc 1 104 0 + 239 and r2, r3, #255 + 240 0110 E3A02000 .loc 1 100 0 + 241 0114 8A00000A bls .L31 + 98:io_driver.c **** port = 0; + 99:io_driver.c **** + 100:io_driver.c **** if(port < 4) + 101:io_driver.c **** temp = PWM0_CONF0; // get config register + 102:io_driver.c **** else{ + 103:io_driver.c **** port = port-4; + 104:io_driver.c **** temp = PWM0_CONF1; // get config register + 242 104 0 + 243 0118 E2403004 mvn r3, #61440 + 244 ldr r0, [r3, #-3979] + 245 011c E3500003 .LVL15: + 246 mov r2, r2, asl #3 + 247 0120 E20320FF mov r0, r0, lsr r2 + 248 .LVL16: + 249 0124 9A000005 and r0, r0, #255 + 250 .loc 1 110 0 + 251 0128 E3E03A0F mov pc, lr + 252 012c E5130F8B .LVL17: + 253 .L31: + 254 0130 E1A02182 .loc 1 100 0 + 255 0134 E1A00230 mov r2, r0, asl #3 + 256 .L26: + 257 0138 E20000FF .loc 1 101 0 + 105:io_driver.c **** } + 106:io_driver.c **** + 107:io_driver.c **** temp = temp >> (port*8); // only keep designated byte + 108:io_driver.c **** + 109:io_driver.c **** return (unsigned char)temp; + 110:io_driver.c **** } + 258 ldr r0, [r3, #-3983] + 259 013c E1A0F00E .LVL18: + 260 .loc 1 104 0 + 261 mov r0, r0, lsr r2 + 262 .LVL19: + 263 0140 E1A02180 and r0, r0, #255 + 264 .loc 1 110 0 + 265 mov pc, lr + 266 0144 E3E03A0F .LFE9: + 268 .align 2 + 269 .global io_uart0_read_byte + 271 io_uart0_read_byte: + 272 0150 E20000FF .LFB10: + 273 .loc 1 122 0 + 274 0154 E1A0F00E @ args = 0, pretend = 0, frame = 0 + 275 @ frame_needed = 0, uses_anonymous_args = 0 + 276 @ link register save eliminated. + 277 .loc 1 123 0 + 278 mvn r2, #61440 + 279 ldr r3, [r2, #-4067] + 280 tst r3, #2 + 281 mvn r0, #0 + 111:io_driver.c **** + 112:io_driver.c **** + 113:io_driver.c **** + 114:io_driver.c **** // ################################################################################################ + 115:io_driver.c **** // General Purpose UART "miniUART" (UART_0) + 116:io_driver.c **** // ################################################################################################ + 117:io_driver.c **** + 118:io_driver.c **** // ****************************************************************************** + 119:io_driver.c **** // Read one byte via UART 0 + 120:io_driver.c **** int io_uart0_read_byte(void) + 121:io_driver.c **** // ****************************************************************************** + 122:io_driver.c **** { + 282 [r2, #-4071] + 283 .loc 1 122 0 + 284 @ lr needed for prologue + 285 .loc 1 127 0 + 123:io_driver.c **** if ((UART0_SREG & (1< at the falling edge of sclk = set SPI_TX_NEG + 153:io_driver.c **** if(auto_cs == 1) + 335 needed for prologue + 336 0190 E3500001 .loc 1 154 0 + 154:io_driver.c **** SPI0_CONF = (1< (sys_clk/(spi_clk*2))-1 + 161:io_driver.c **** void io_spi0_speed(unsigned long clk_divider) + 162:io_driver.c **** // ****************************************************************************** + 163:io_driver.c **** { + 359 lr + 360 .LFE13: + 362 .align 2 + 363 .global io_spi0_trans + 164:io_driver.c **** SPI0_PRSC = clk_divider; // (sys_clk/(spi_clk*2))-1; + 364 e io_spi0_trans, %function + 365 01b0 E3E03A0F io_spi0_trans: + 366 .LFB14: + 367 .loc 1 171 0 + 368 @ args = 0, pretend = 0, frame = 0 + 369 01b4 E5030FCB @ frame_needed = 0, uses_anonymous_args = 0 + 165:io_driver.c **** } + 370 k register save eliminated. + 371 01b8 E1A0F00E .LVL25: + 372 @ lr needed for prologue + 373 mvn r2, #61440 + 374 .L53: + 375 .loc 1 173 0 + 376 ldr r3, [r2, #-4047] + 377 tst r3, #256 + 378 bne .L53 + 166:io_driver.c **** + 167:io_driver.c **** // ****************************************************************************** + 168:io_driver.c **** // Sends/receives max 32 bits via SPI, CS and config must be done outside + 169:io_driver.c **** unsigned long io_spi0_trans(unsigned long data) + 170:io_driver.c **** // ****************************************************************************** + 171:io_driver.c **** { + 379 74 0 + 380 str r0, [r2, #-4031] + 381 .loc 1 175 0 + 382 ldr r3, [r2, #-4047] + 383 orr r3, r3, #256 + 384 str r3, [r2, #-4047] + 385 01bc E3E02A0F mvn r2, #61440 + 386 .L55: + 172:io_driver.c **** // spi transmission + 173:io_driver.c **** while((SPI0_CONF & (1< (sys_clk/(5*i2c_clock)-1 + 206:io_driver.c **** void io_i2c0_speed(unsigned long clk_divider) + 207:io_driver.c **** // ****************************************************************************** + 208:io_driver.c **** { + 467 [r2, #-3991] + 468 .loc 1 210 0 + 469 str r0, [r2, #-3999] + 470 .loc 1 211 0 + 471 str r1, [r2, #-3995] + 209:io_driver.c **** I2C0_CTRL = I2C0_CTRL & ~(1<> 8; + 475 oc 1 208 0 + 476 023c E1A01420 @ lr needed for prologue + 477 .loc 1 212 0 + 478 0240 E3C33080 str r3, [r2, #-3991] + 479 0244 E5023F97 .loc 1 213 0 + 480 mov pc, lr + 481 0248 E5020F9F .LFE17: + 483 024c E5021F9B .align 2 + 212:io_driver.c **** I2C0_CTRL = I2C0_CTRL | (1<> 8; // high byte + 545 78: + 546 02bc 01A02424 .loc 1 239 0 + 547 02c0 03E03A0F ldr r3, [r2, #-4015] + 236:io_driver.c **** else + 237:io_driver.c **** I2C0_DATA = data_adr; // low byte + 548 t r3, #2 + 549 02c4 13E03A0F bne .L78 + 550 .loc 1 240 0 + 551 02c8 05032F93 ldr r3, [r2, #-4015] + 552 tst r3, #128 + 553 02cc 15034F93 beq .L80 + 238:io_driver.c **** I2C0_CMD = (1< 0){ + 909 2 31 0 + 910 04f0 E2514000 mov r0, r3 + 911 .LVL80: + 912 04f4 E1A05000 .loc 2 29 0 + 913 04f8 E20260FF add r5, r5, #1 + 914 .loc 2 30 0 + 915 04fc D8BD8070 beq .L158 + 916 .LVL81: + 917 .L153: + 26:uart.c **** temp = io_uart0_read_byte(); + 918 2 0 + 919 0500 EBFFFFFE sub r4, r4, #1 + 920 .LVL82: + 921 .L151: + 27:uart.c **** if(temp != -1){ + 922 c 2 25 0 + 923 0504 E3700001 cmp r4, #0 + 28:uart.c **** temp = (unsigned char)(temp & 0x000000FF); + 924 gt .L156 + 925 0508 E20030FF ldmfd sp!, {r4, r5, r6, pc} + 926 .LVL83: + 927 .L158: + 928 050c 0A000005 .loc 2 31 0 + 29:uart.c **** *buffer++ = temp; + 30:uart.c **** if(en_echo == 1) + 929 o_uart0_send_byte + 930 0510 E3560001 .LVL84: + 931 b .L153 + 932 .LFE26: + 934 .align 2 + 31:uart.c **** io_uart0_send_byte(temp); // echo + 935 al uart0_print_buffer + 937 uart0_print_buffer: + 938 .LFB27: + 939 051c E2855001 .loc 2 41 0 + 940 @ args = 0, pretend = 0, frame = 0 + 941 0520 0A000003 @ frame_needed = 0, uses_anonymous_args = 0 + 942 .LVL85: + 943 stmfd sp!, {r4, r5, lr} + 32:uart.c **** length--; + 944 .loc 2 43 0 + 945 0524 E2444001 subs r4, r1, #0 + 946 .loc 2 41 0 + 947 mov r5, r0 + 948 .loc 2 43 0 + 949 0528 E3540000 ldmlefd sp!, {r4, r5, pc} + 950 052c CAFFFFF3 .LVL86: + 951 0530 E8BD8070 .L163: + 952 .loc 2 45 0 + 953 ldrb r0, [r5], #1 @ zero_extendqisi2 + 954 .LVL87: + 955 0534 EBFFFFFE bl io_uart0_send_byte + 956 .LVL88: + 957 0538 EAFFFFF9 .loc 2 43 0 + 958 subs r4, r4, #1 + 959 bne .L163 + 960 ldmfd sp!, {r4, r5, pc} + 961 .LFE27: + 963 .align 2 + 964 .global long_to_hex_string + 33:uart.c **** } + 34:uart.c **** } + 35:uart.c **** } + 36:uart.c **** + 37:uart.c **** // ############################################################################################ + 38:uart.c **** // Print character buffer via UART 0 + 39:uart.c **** void uart0_print_buffer(unsigned char *buffer, int size) + 40:uart.c **** // ############################################################################################ + 41:uart.c **** { + 965 ring, %function + 966 long_to_hex_string: + 967 .LFB28: + 968 .file 3 "utilities.c" + 969 053c E92D4030 .loc 3 9 0 + 970 @ args = 0, pretend = 0, frame = 0 + 42:uart.c **** unsigned char char_buffer = 0; + 43:uart.c **** while(size > 0){ + 971 me_needed = 0, uses_anonymous_args = 0 + 972 0540 E2514000 .LVL89: + 973 stmfd sp!, {r4, lr} + 974 0544 E1A05000 .LCFI7: + 975 .loc 3 9 0 + 976 0548 D8BD8030 and r4, r2, #255 + 977 .loc 3 14 0 + 978 cmp r4, #8 + 44:uart.c **** char_buffer = *buffer++; + 45:uart.c **** io_uart0_send_byte(char_buffer); + 979 4, #8 + 980 054c E4D50001 bhi .L168 + 981 .LVL90: + 982 0550 EBFFFFFE .loc 3 16 0 + 983 cmp r4, #0 + 984 .loc 3 39 0 + 985 0554 E2544001 moveq r4, #1 + 986 0558 1AFFFFFB .L168: + 987 055c E8BD8030 mov r2, r1 + 988 .LVL91: + 989 mov lr, r4 + 990 .LVL92: + 991 .L170: + 992 .loc 3 22 0 + 993 mov r3, lr, asl #2 + 994 .loc 3 21 0 + 995 cmp lr, #1 + 1:utilities.c **** #include "utilities.h" + 2:utilities.c **** + 3:utilities.c **** // ############################################################################################ + 4:utilities.c **** // Convert 4/8/12/16/20/24/28/32 bit hexadecimal value to ASCII string + 5:utilities.c **** void long_to_hex_string(unsigned long data, // max 32 bit data word + 6:utilities.c **** unsigned char *buffer, // buffer to store the string + 7:utilities.c **** unsigned char numbers) // number of places, max 8 + 8:utilities.c **** // ############################################################################################ + 9:utilities.c **** { + 996 r3, r3, #4 + 997 .loc 3 21 0 + 998 mov ip, r0 + 999 .LVL93: + 1000 0560 E92D4010 .loc 3 22 0 + 1001 movhi ip, r0, lsr r3 + 1002 .loc 3 26 0 + 1003 0564 E20240FF sub r3, lr, #1 + 10:utilities.c **** unsigned char temp_char = 0; + 11:utilities.c **** unsigned long temp_data = 0; + 12:utilities.c **** + 13:utilities.c **** // fit into range + 14:utilities.c **** if(numbers > 8) + 1004 25 0 + 1005 0568 E3540008 and ip, ip, #15 + 1006 056c 83A04008 .LVL94: + 1007 0570 8A000001 .loc 3 26 0 + 1008 and lr, r3, #255 + 15:utilities.c **** numbers = 8; + 16:utilities.c **** if(numbers < 1) + 1009 3 29 0 + 1010 0574 E3540000 cmp ip, #9 + 17:utilities.c **** numbers = 1; + 18:utilities.c **** + 19:utilities.c **** while(numbers > 0){ + 20:utilities.c **** // isolate one 4-bit value + 21:utilities.c **** if(numbers > 1) + 22:utilities.c **** temp_data = data >> ((numbers-1)*4); + 23:utilities.c **** else + 24:utilities.c **** temp_data = data; + 25:utilities.c **** temp_data = temp_data & 0x0000000F; + 26:utilities.c **** numbers--; + 27:utilities.c **** + 28:utilities.c **** // convert 4-bit value temp_data to char temp_char + 29:utilities.c **** if(temp_data < 10) + 30:utilities.c **** temp_char = '0' + temp_data; + 31:utilities.c **** else + 32:utilities.c **** temp_char = 'A' + temp_data - 10; + 33:utilities.c **** + 34:utilities.c **** // save character + 35:utilities.c **** *buffer++ = temp_char; + 36:utilities.c **** } + 37:utilities.c **** + 38:utilities.c **** *buffer++ = 0; // terminate string + 39:utilities.c **** } + 1011 loc 3 30 0 + 1012 0578 03A04001 add r3, ip, #48 + 1013 .LVL95: + 1014 057c E1A02001 .loc 3 32 0 + 1015 addhi r3, ip, #55 + 1016 0580 E1A0E004 .loc 3 19 0 + 1017 cmp lr, #0 + 1018 .loc 3 35 0 + 1019 strb r3, [r2], #1 + 1020 0584 E1A0310E .loc 3 19 0 + 1021 bne .L170 + 1022 0588 E35E0001 .loc 3 38 0 + 1023 sub r3, r4, #1 + 1024 058c E2433004 .LVL96: + 1025 and r3, r3, #255 + 1026 0590 E1A0C000 add r3, r1, r3 + 1027 strb lr, [r3, #1] + 1028 .loc 3 39 0 + 1029 0594 81A0C330 ldmfd sp!, {r4, pc} + 1030 .LFE28: + 1032 .align 2 + 1033 059c E20CC00F .global hex_string_to_long + 1035 hex_string_to_long: + 1036 05a0 E203E0FF .LFB29: + 1037 .loc 3 47 0 + 1038 05a4 E35C0009 @ args = 0, pretend = 0, frame = 0 + 1039 @ frame_needed = 0, uses_anonymous_args = 0 + 1040 05a8 E28C3030 .LVL97: + 1041 and r1, r1, #255 + 1042 .loc 3 52 0 + 1043 05ac 828C3037 cmp r1, #8 + 1044 .loc 3 47 0 + 1045 05b0 E35E0000 stmfd sp!, {r4, lr} + 1046 .LCFI8: + 1047 05b4 E4C23001 .loc 3 47 0 + 1048 mov r4, r0 + 1049 05b8 1AFFFFF1 .loc 3 52 0 + 1050 bhi .L182 + 1051 05bc E2443001 .LVL98: + 1052 .loc 3 54 0 + 1053 05c0 E20330FF cmp r1, #0 + 1054 05c4 E0813003 beq .L182 + 1055 05c8 E5C3E001 mov r0, #0 + 1056 .LVL99: + 1057 05cc E8BD8010 b .L185 + 1058 .LVL100: + 1059 .L186: + 1060 .loc 3 58 0 + 1061 sub r3, r1, #1 + 1062 .LVL101: + 1063 and r1, r3, #255 + 1064 .loc 3 70 0 + 40:utilities.c **** + 41:utilities.c **** + 42:utilities.c **** // ############################################################################################ + 43:utilities.c **** // Convert 1/2/3/4/5/6/7/8 hex-chars to 32 bit value + 44:utilities.c **** unsigned long hex_string_to_long(unsigned char *buffer, // string char buffer + 45:utilities.c **** unsigned char numbers) // number of places, max 8 + 46:utilities.c **** // ############################################################################################ + 47:utilities.c **** { + 1065 57 0 + 1066 cmp r1, #0 + 1067 .loc 3 70 0 + 1068 orr r0, r0, r2, asl r3 + 1069 05d0 E20110FF .loc 3 57 0 + 48:utilities.c **** unsigned long temp_char = 0; + 49:utilities.c **** unsigned long temp_data = 0; + 50:utilities.c **** + 51:utilities.c **** // fit into range + 52:utilities.c **** if(numbers > 8) + 1070 qfd sp!, {r4, pc} + 1071 05d4 E3510008 .L185: + 1072 .loc 3 60 0 + 1073 05d8 E92D4010 ldrb r3, [r4], #1 @ zero_extendqisi2 + 1074 .LVL103: + 1075 .loc 3 61 0 + 1076 05dc E1A04000 sub r2, r3, #48 + 1077 .LVL104: + 1078 05e0 8A000016 cmp r2, #9 + 1079 .loc 3 63 0 + 53:utilities.c **** return 0; + 54:utilities.c **** if(numbers < 1) + 1080 3, #65 + 1081 05e4 E3510000 .loc 3 61 0 + 1082 05e8 0A000014 bls .L186 + 1083 05ec E3A00000 .loc 3 63 0 + 1084 cmp ip, #5 + 1085 05f0 EA000006 .loc 3 65 0 + 1086 sub lr, r3, #97 + 1087 .loc 3 64 0 + 55:utilities.c **** return 0; + 56:utilities.c **** + 57:utilities.c **** while(numbers > 0){ + 58:utilities.c **** numbers--; + 1088 r3, #55 + 1089 05f4 E2413001 .loc 3 63 0 + 1090 bls .L186 + 1091 05f8 E20310FF .loc 3 65 0 + 59:utilities.c **** + 60:utilities.c **** temp_char = (unsigned long)(*buffer++); // isolate one char + 61:utilities.c **** if((temp_char > '0'-1) && (temp_char < '9'+1)) + 62:utilities.c **** temp_char = temp_char - '0'; + 63:utilities.c **** else if((temp_char > 'A'-1) && (temp_char < 'F'+1)) + 64:utilities.c **** temp_char = temp_char - 'A' + 10; + 65:utilities.c **** else if((temp_char > 'a'-1) && (temp_char < 'f'+1)) + 66:utilities.c **** temp_char = temp_char - 'a' + 10; + 67:utilities.c **** else + 68:utilities.c **** return 0; + 69:utilities.c **** temp_char = temp_char & 0x0F; + 70:utilities.c **** temp_data = temp_data | (temp_char << 4*numbers); + 1092 lr, #5 + 1093 05fc E202200F .loc 3 66 0 + 1094 sub r2, r3, #87 + 1095 0600 E1A03101 .loc 3 65 0 + 1096 bls .L186 + 1097 0604 E3510000 .LVL105: + 1098 .L182: + 1099 0608 E1800312 .loc 3 57 0 + 1100 mov r0, #0 + 1101 060c 08BD8010 .LVL106: + 1102 .loc 3 74 0 + 1103 ldmfd sp!, {r4, pc} + 1104 0610 E4D43001 .LFE29: + 1106 .align 2 + 1107 0614 E2432030 .global qbytes_to_long + 1109 0618 E3520009 qbytes_to_long: + 1110 .LFB30: + 1111 061c E243C041 .loc 3 81 0 + 1112 @ args = 0, pretend = 0, frame = 0 + 1113 0620 9AFFFFF3 @ frame_needed = 0, uses_anonymous_args = 0 + 1114 @ link register save eliminated. + 1115 0624 E35C0005 .LVL107: + 1116 mov r3, r0 + 1117 0628 E243E061 .loc 3 84 0 + 1118 ldrb r0, [r0, #1] @ zero_extendqisi2 + 1119 062c E2432037 .LVL108: + 1120 .loc 3 83 0 + 1121 0630 9AFFFFEF add ip, r3, #1 + 1122 .LVL109: + 1123 0634 E35E0005 .loc 3 84 0 + 1124 ldrb r2, [r3, #0] @ zero_extendqisi2 + 1125 0638 E2432057 .loc 3 85 0 + 1126 ldrb r1, [ip, #2] @ zero_extendqisi2 + 1127 063c 9AFFFFEC .loc 3 84 0 + 1128 mov r0, r0, asl #16 + 1129 orr r0, r0, r2, asl #24 + 1130 .LVL110: + 1131 0640 E3A00000 .loc 3 85 0 + 1132 ldrb r3, [ip, #1] @ zero_extendqisi2 + 71:utilities.c **** } + 72:utilities.c **** + 73:utilities.c **** return temp_data; + 74:utilities.c **** } + 1133 88 0 + 1134 0644 E8BD8010 orr r0, r0, r3, asl #8 + 1135 .LVL113: + 1136 .loc 3 81 0 + 1137 @ lr needed for prologue + 1138 .loc 3 88 0 + 1139 mov pc, lr + 1140 .LFE30: + 75:utilities.c **** + 76:utilities.c **** + 77:utilities.c **** // ############################################################################################ + 78:utilities.c **** // Concate 4 bytes (chars) to single 32 bit value + 79:utilities.c **** unsigned long qbytes_to_long(unsigned char *buffer) + 80:utilities.c **** // ############################################################################################ + 81:utilities.c **** { + 1142 + 1143 .global delay + 1145 delay: + 1146 .LFB31: + 1147 0648 E1A03000 .loc 3 95 0 + 82:utilities.c **** unsigned long temp = 0; + 83:utilities.c **** temp = temp | (0xFF000000 & (*buffer++ << 24)); + 84:utilities.c **** temp = temp | (0x00FF0000 & (*buffer++ << 16)); + 1148 gs = 0, pretend = 0, frame = 0 + 1149 064c E5D00001 @ frame_needed = 0, uses_anonymous_args = 0 + 1150 @ link register save eliminated. + 1151 .LVL114: + 1152 0650 E283C001 .loc 3 96 0 + 1153 rsb r3, r0, r0, asl #5 + 1154 add r0, r0, r3, asl #2 + 1155 0654 E5D32000 .LVL115: + 85:utilities.c **** temp = temp | (0x0000FF00 & (*buffer++ << 8)); + 1156 r0, r0, asl #2 + 1157 0658 E5DC1002 mov r0, r0, asl #4 + 1158 .LVL116: + 1159 065c E1A00800 .loc 3 97 0 + 1160 0660 E1800C02 cmp r0, #0 + 1161 .loc 3 95 0 + 1162 @ lr needed for prologue + 1163 0664 E5DC3001 .loc 3 97 0 + 1164 movle pc, lr + 1165 0668 E1800001 .L200: + 1166 .loc 3 98 0 + 86:utilities.c **** temp = temp | (0x000000FF & (*buffer++ << 0)); + 87:utilities.c **** return temp; + 88:utilities.c **** } + 1167 3 97 0 + 1168 066c E1800403 subs r0, r0, #1 + 1169 bne .L200 + 1170 mov pc, lr + 1171 .LFE31: + 1173 0670 E1A0F00E .section .rodata.str1.4,"aMS",%progbits,1 + 1174 .align 2 + 1175 .LC0: + 1176 .ascii "\015\012\015\012\015\012+--------------------------" + 1177 .ascii "--------------------------------------+\015\012\000" + 1178 .align 2 + 1179 .LC1: + 1180 .ascii "| <<< STORM Core Processor System - By Stephan N" + 89:utilities.c **** + 90:utilities.c **** + 91:utilities.c **** // ############################################################################################ + 92:utilities.c **** // simple delay routine + 93:utilities.c **** void delay(int time) // waits time*10000 clock ticks + 94:utilities.c **** // ############################################################################################ + 95:utilities.c **** { + 1181 g >>> |\015\012\000" + 1182 .align 2 + 1183 .LC2: + 1184 .ascii "+--------------------------------------------------" + 1185 .ascii "--------------+\015\012\000" + 96:utilities.c **** time = time*2500*4; + 1186 gn 2 + 1187 0674 E0603280 .LC3: + 1188 0678 E0800103 .ascii "| Bootloader for STORM SoC Version: 20120" + 1189 .ascii "524-D |\015\012\000" + 1190 067c E0800100 .align 2 + 1191 0680 E1A00200 .LC4: + 1192 .ascii "| Contact: stnolting@googlemail.com " + 97:utilities.c **** while(time > 0){ + 1193 " |\015\012\000" + 1194 0684 E3500000 .align 2 + 1195 .LC5: + 1196 .ascii "+--------------------------------------------------" + 1197 .ascii "--------------+\015\012\015\012\000" + 1198 0688 D1A0F00E .align 2 + 1199 .LC6: + 98:utilities.c **** asm volatile ("NOP"); + 1200 " < Welcome to the STORM SoC bootloader console! >\015" + 1201 068c E1A00000 .ascii "\012 < Select an operation from the menu below or p" + 1202 .ascii "ress >\015\012\000" + 1203 0690 E2500001 .align 2 + 1204 0694 1AFFFFFC .LC7: + 1205 0698 E1A0F00E .ascii " < the boot key for immediate application start. >\015" + 1206 .ascii "\012\015\012\000" + 1207 .align 2 + 1208 .LC8: + 1209 .ascii " 0 - boot from core RAM (start application)\015\012" + 1210 .ascii " 1 - program core RAM via UART_0\015\012 2 - core R" + 1211 0000 0D0A0D0A .ascii "AM dump\015\012\000" + 1211 0D0A2B2D + 1211 2D2D2D2D + 1211 2D2D2D2D + 1211 2D2D2D2D + 1212 0021 2D2D2D2D .align 2 + 1212 2D2D2D2D + 1212 2D2D2D2D + 1212 2D2D2D2D + 1212 2D2D2D2D + 1213 004b 00 .LC9: + 1214 .ascii " 3 - boot from I2C EEPROM\015\012 4 - program I2C E" + 1215 004c 7C202020 .ascii "EPROM via UART_0\015\012 5 - show content of I2C EE" + 1215 203C3C3C + 1215 2053544F + 1215 524D2043 + 1215 6F726520 + 1216 007f 6F6C7469 .ascii "PROM\015\012\000" + 1216 6E67203E + 1216 3E3E2020 + 1216 20207C0D + 1216 0A00 + 1217 0091 000000 .align 2 + 1218 .LC10: + 1219 0094 2B2D2D2D .ascii " a - automatic boot configuration\015\012 h - help\015" + 1219 2D2D2D2D + 1219 2D2D2D2D + 1219 2D2D2D2D + 1219 2D2D2D2D + 1220 00c7 2D2D2D2D .ascii "\012 r - restart system\015\012\015\012Select: \000" + 1220 2D2D2D2D + 1220 2D2D2D2D + 1220 2D2D2B0D + 1220 0A00 + 1221 00d9 000000 .align 2 + 1222 .LC11: + 1223 00dc 7C202020 .ascii "\015\012\015\012Application will start automaticall" + 1223 20202020 + 1223 2020426F + 1223 6F746C6F + 1223 61646572 + 1224 010f 3532342D .ascii "y after download.\015\012-> Waiting for 'storm_prog" + 1224 44202020 + 1224 20202020 + 1224 20207C0D + 1224 0A00 + 1225 0121 000000 .ascii "ram.bin' in byte-stream mode...\000" + 1226 .align 2 + 1227 0124 7C202020 .LC12: + 1227 20202020 + 1227 20202020 + 1227 20202020 + 1227 436F6E74 + 1228 0157 20202020 .ascii " ERROR! Program file too big!\015\012\015\012\000" + 1228 20202020 + 1228 20202020 + 1228 20207C0D + 1228 0A00 + 1229 0169 000000 .align 2 + 1230 .LC13: + 1231 016c 2B2D2D2D .ascii " Invalid programming file!\015\012\015\012Select: \000" + 1231 2D2D2D2D + 1231 2D2D2D2D + 1231 2D2D2D2D + 1231 2D2D2D2D + 1232 019f 2D2D2D2D .align 2 + 1232 2D2D2D2D + 1232 2D2D2D2D + 1232 2D2D2B0D + 1232 0A0D0A00 + 1233 01b3 00 .LC14: + 1234 .ascii "\015\012\015\012Abort dumping by pressing any key.\015" + 1235 01b4 203C2057 .ascii "\012Press any key to continue.\015\012\015\012\000" + 1235 656C636F + 1235 6D652074 + 1235 6F207468 + 1235 65205354 + 1236 01e6 0A203C20 .align 2 + 1236 53656C65 + 1236 63742061 + 1236 6E206F70 + 1236 65726174 + 1237 0216 72657373 .LC15: + 1237 203E0D0A + 1237 00 + 1238 021f 00 .ascii "\015\012\015\012Dumping completed.\015\012\015\012S" + 1239 .ascii "elect: \000" + 1240 0220 203C2074 .align 2 + 1240 68652062 + 1240 6F6F7420 + 1240 6B657920 + 1240 666F7220 + 1241 0253 0A0D0A00 .LC16: + 1242 0257 00 .ascii "\015\012\015\012Enter device address (2x hex_chars," + 1243 .ascii " set LSB to '0'): \000" + 1244 0258 2030202D .align 2 + 1244 20626F6F + 1244 74206672 + 1244 6F6D2063 + 1244 6F726520 + 1245 0285 2031202D .LC17: + 1245 2070726F + 1245 6772616D + 1245 20636F72 + 1245 65205241 + 1246 02b2 414D2064 .ascii " Invalid address!\015\012\015\012Select: \000" + 1246 756D700D + 1246 0A00 + 1247 .align 2 + 1248 .LC18: + 1249 02bc 2033202D .ascii "\015\012Application will start automatically after " + 1249 20626F6F + 1249 74206672 + 1249 6F6D2049 + 1249 32432045 + 1250 02e9 4550524F .ascii "upload.\015\012-> Loading boot image...\000" + 1250 4D207669 + 1250 61205541 + 1250 52545F30 + 1250 0D0A2035 + 1251 0316 50524F4D .align 2 + 1251 0D0A00 + 1252 031d 000000 .LC19: + 1253 .ascii " Upload complete\015\012\000" + 1254 0320 2061202D .align 2 + 1254 20617574 + 1254 6F6D6174 + 1254 69632062 + 1254 6F6F7420 + 1255 034d 0A207220 .LC20: + 1255 2D207265 + 1255 73746172 + 1255 74207379 + 1255 7374656D + 1256 036e 0000 .ascii " Invalid boot device or file!\015\012\015\012Select" + 1257 .ascii ": \000" + 1258 0370 0D0A0D0A .align 2 + 1258 4170706C + 1258 69636174 + 1258 696F6E20 + 1258 77696C6C + 1259 0397 79206166 .LC21: + 1259 74657220 + 1259 646F776E + 1259 6C6F6164 + 1259 2E0D0A2D + 1260 03c4 72616D2E .ascii "\015\012Invalid address!\015\012\015\012Select: \000" + 1260 62696E27 + 1260 20696E20 + 1260 62797465 + 1260 2D737472 + 1261 .align 2 + 1262 .LC22: + 1263 03e4 20455252 .ascii "\015\012Data will overwrite RAM content!\015\012-> " + 1263 4F522120 + 1263 50726F67 + 1263 72616D20 + 1263 66696C65 + 1264 0406 0000 .ascii "Waiting for 'storm_program.bin' in byte-stream mode" + 1265 .ascii "...\000" + 1266 0408 20496E76 .align 2 + 1266 616C6964 + 1266 2070726F + 1266 6772616D + 1266 6D696E67 + 1267 042f 00 .LC23: + 1268 .ascii " Download completed\015\012\000" + 1269 0430 0D0A0D0A .align 2 + 1269 41626F72 + 1269 74206475 + 1269 6D70696E + 1269 67206279 + 1270 0457 0A507265 .LC24: + 1270 73732061 + 1270 6E79206B + 1270 65792074 + 1270 6F20636F + 1271 0477 00 .ascii "Writing buffer to i2c EEPROM...\000" + 1272 .align 2 + 1273 0478 0D0A0D0A .LC25: + 1273 44756D70 + 1273 696E6720 + 1273 636F6D70 + 1273 6C657465 + 1274 0493 656C6563 .ascii " Completed\015\012\015\012\000" + 1274 743A2000 + 1275 049b 00 .align 2 + 1276 .LC26: + 1277 049c 0D0A0D0A .ascii " Invalid boot device or file!\015\012\015\012\000" + 1277 456E7465 + 1277 72206465 + 1277 76696365 + 1277 20616464 + 1278 04c3 20736574 .align 2 + 1278 204C5342 + 1278 20746F20 + 1278 27302729 + 1278 3A2000 + 1279 04d6 0000 .LC27: + 1280 .ascii "Select: \000" + 1281 04d8 20496E76 .align 2 + 1281 616C6964 + 1281 20616464 + 1281 72657373 + 1281 210D0A0D + 1282 04f6 0000 .LC28: + 1283 .ascii "\015\012\015\012Enter device address (2 hex-chars, " + 1284 04f8 0D0A4170 .ascii "set LSB to '0'): \000" + 1284 706C6963 + 1284 6174696F + 1284 6E207769 + 1284 6C6C2073 + 1285 0525 75706C6F .align 2 + 1285 61642E0D + 1285 0A2D3E20 + 1285 4C6F6164 + 1285 696E6720 + 1286 0547 00 .LC29: + 1287 .ascii "\015\012\015\012Abort dumping by pressing any key. " + 1288 0548 2055706C .ascii "If no data is shown,\015\012\000" + 1288 6F616420 + 1288 636F6D70 + 1288 6C657465 + 1288 0D0A00 + 1289 055b 00 .align 2 + 1290 .LC30: + 1291 055c 20496E76 .ascii "the selected device is not responding. Press any ke" + 1291 616C6964 + 1291 20626F6F + 1291 74206465 + 1291 76696365 + 1292 0583 3A2000 .ascii "y to continue.\015\012\015\012\000" + 1293 0586 0000 .align 2 + 1294 .LC31: + 1295 0588 0D0A496E .ascii "\015\012\015\012Automatic boot configuration for po" + 1295 76616C69 + 1295 64206164 + 1295 64726573 + 1295 73210D0A + 1296 05a7 00 .ascii "wer-up:\015\012\000" + 1297 .align 2 + 1298 05a8 0D0A4461 .LC32: + 1298 74612077 + 1298 696C6C20 + 1298 6F766572 + 1298 77726974 + 1299 05cf 57616974 .ascii "[3210] configuration DIP switch\015\012 0000 - Star" + 1299 696E6720 + 1299 666F7220 + 1299 2773746F + 1299 726D5F70 + 1300 0602 2E2E2E00 .ascii "t bootloader console\015\012 0001 - Automatic boot " + 1301 0606 0000 .ascii "from core RAM\015\012\000" + 1302 .align 2 + 1303 0608 20446F77 .LC33: + 1303 6E6C6F61 + 1303 6420636F + 1303 6D706C65 + 1303 7465640D + 1304 061e 0000 .ascii " 0010 - Automatic boot from I2C EEPROM (Address 0xA" + 1305 .ascii "0)\015\012\015\012Select: \000" + 1306 0620 57726974 .align 2 + 1306 696E6720 + 1306 62756666 + 1306 65722074 + 1306 6F206932 + 1307 .LC34: + 1308 .ascii "\015\012\015\012STORM SoC bootloader\015\012\000" + 1309 0640 20436F6D .align 2 + 1309 706C6574 + 1309 65640D0A + 1309 0D0A00 + 1310 064f 00 .LC35: + 1311 .ascii "'0': Execute program in RAM.\015\012\000" + 1312 0650 20496E76 .align 2 + 1312 616C6964 + 1312 20626F6F + 1312 74206465 + 1312 76696365 + 1313 0672 0000 .LC36: + 1314 .ascii "'1': Write 'storm_program.bin' to the core's RAM vi" + 1315 0674 53656C65 .ascii "a UART.\015\012\000" + 1315 63743A20 + 1315 00 + 1316 067d 000000 .align 2 + 1317 .LC37: + 1318 0680 0D0A0D0A .ascii "'2': Print current content of complete core RAM.\015" + 1318 456E7465 + 1318 72206465 + 1318 76696365 + 1318 20616464 + 1319 06a7 73657420 .ascii "\012\000" + 1319 4C534220 + 1319 746F2027 + 1319 3027293A + 1319 2000 + 1320 06b9 000000 .align 2 + 1321 .LC38: + 1322 06bc 0D0A0D0A .ascii "'3': Load boot image from EEPROM and start applicat" + 1322 41626F72 + 1322 74206475 + 1322 6D70696E + 1322 67206279 + 1323 06e3 4966206E .ascii "ion.\015\012\000" + 1323 6F206461 + 1323 74612069 + 1323 73207368 + 1323 6F776E2C + 1324 06fa 0000 .align 2 + 1325 .LC39: + 1326 06fc 74686520 .ascii "'4': Write 'storm_program.bin' to I2C EEPROM via UA" + 1326 73656C65 + 1326 63746564 + 1326 20646576 + 1326 69636520 + 1327 072f 7920746F .ascii "RT.\015\012\000" + 1327 20636F6E + 1327 74696E75 + 1327 652E0D0A + 1327 0D0A00 + 1328 0742 0000 .align 2 + 1329 .LC40: + 1330 0744 0D0A0D0A .ascii "'5': Print content of I2C EEPROM.\015\012\000" + 1330 4175746F + 1330 6D617469 + 1330 6320626F + 1330 6F742063 + 1331 076b 7765722D .align 2 + 1331 75703A0D + 1331 0A00 + 1332 0775 000000 .LC41: + 1333 .ascii "'a': Show DIP switch configurations for automatic b" + 1334 0778 5B333231 .ascii "oot.\015\012\000" + 1334 305D2063 + 1334 6F6E6669 + 1334 67757261 + 1334 74696F6E + 1335 07a5 7420626F .align 2 + 1335 6F746C6F + 1335 61646572 + 1335 20636F6E + 1335 736F6C65 + 1336 07d2 66726F6D .LC42: + 1336 20636F72 + 1336 65205241 + 1336 4D0D0A00 + 1337 07e2 0000 .ascii "'h': Show this screen.\015\012\000" + 1338 .align 2 + 1339 07e4 20303031 .LC43: + 1339 30202D20 + 1339 4175746F + 1339 6D617469 + 1339 6320626F + 1340 0817 30290D0A .ascii "'r': Reset system.\015\012\015\012\000" + 1340 0D0A5365 + 1340 6C656374 + 1340 3A2000 + 1341 0826 0000 .align 2 + 1342 .LC44: + 1343 0828 0D0A0D0A .ascii "Boot EEPROM: 24xxnnn (like 24AA64), 7 bit address +" + 1343 53544F52 + 1343 4D20536F + 1343 4320626F + 1343 6F746C6F + 1344 0843 00 .ascii " dont-care bit,\015\012\000" + 1345 .align 2 + 1346 0844 2730273A .LC45: + 1346 20457865 + 1346 63757465 + 1346 2070726F + 1346 6772616D + 1347 0863 00 .ascii "connected to I2C_CONTROLLER_0, operating frequency " + 1348 .ascii "is 100kHz,\015\012\000" + 1349 0864 2731273A .align 2 + 1349 20577269 + 1349 74652027 + 1349 73746F72 + 1349 6D5F7072 + 1350 0897 61205541 .LC46: + 1350 52542E0D + 1350 0A00 + 1351 08a1 000000 .ascii "maximum EEPROM size = 65536 byte => 16 bit addresse" + 1352 .ascii "s,\015\012\000" + 1353 08a4 2732273A .align 2 + 1353 20507269 + 1353 6E742063 + 1353 75727265 + 1353 6E742063 + 1354 08d5 0A00 .LC47: + 1355 08d7 00 .ascii "fixed boot device address: 0xA0\015\012\015\012\000" + 1356 .align 2 + 1357 08d8 2733273A .LC48: + 1357 204C6F61 + 1357 6420626F + 1357 6F742069 + 1357 6D616765 + 1358 090b 696F6E2E .ascii "Terminal setup: 9600 baud, 8 data bits, no parity, " + 1358 0D0A00 + 1359 0912 0000 .ascii "1 stop bit\015\012\015\012\000" + 1360 .align 2 + 1361 0914 2734273A .LC49: + 1361 20577269 + 1361 74652027 + 1361 73746F72 + 1361 6D5F7072 + 1362 0947 52542E0D .ascii "For more information see the STORM Core / STORM SoC" + 1362 0A00 + 1363 094d 000000 .ascii " datasheet\015\012\000" + 1364 .align 2 + 1365 0950 2735273A .LC50: + 1365 20507269 + 1365 6E742063 + 1365 6F6E7465 + 1365 6E74206F + 1366 .ascii "http://opencores.org/project,storm_core\015\012\000" + 1367 .align 2 + 1368 0974 2761273A .LC51: + 1368 2053686F + 1368 77204449 + 1368 50207377 + 1368 69746368 + 1369 09a7 6F6F742E .ascii "http://opencores.org/project,storm_soc\015\012\000" + 1369 0D0A00 + 1370 09ae 0000 .align 2 + 1371 .LC52: + 1372 09b0 2768273A .ascii "Contact: stnolting@googlemail.com\015\012\000" + 1372 2053686F + 1372 77207468 + 1372 69732073 + 1372 63726565 + 1373 09c9 000000 .align 2 + 1374 .LC53: + 1375 09cc 2772273A .ascii "(c) 2012 by Stephan Nolting\015\012\015\012Select: " + 1375 20526573 + 1375 65742073 + 1375 79737465 + 1375 6D2E0D0A + 1376 09e3 00 .ascii "\000" + 1377 .align 2 + 1378 09e4 426F6F74 .LC54: + 1378 20454550 + 1378 524F4D3A + 1378 20323478 + 1378 786E6E6E + 1379 0a17 20646F6E .ascii "\015\012\015\012We'll send you back - to the future" + 1379 742D6361 + 1379 72652062 + 1379 69742C0D + 1379 0A00 + 1380 0a29 000000 .ascii "!.\015\012\015\012\000" + 1381 .align 2 + 1382 0a2c 636F6E6E .LC55: + 1382 65637465 + 1382 6420746F + 1382 20493243 + 1382 5F434F4E + 1383 0a5f 69732031 .ascii " - Doctor Emmet L. Brown\015\012\015\012Select: \000" + 1383 30306B48 + 1383 7A2C0D0A + 1383 00 + 1384 .align 2 + 1385 .LC56: + 1386 0a6c 6D617869 .ascii " Invalid operation!\015\012Try again: \000" + 1386 6D756D20 + 1386 45455052 + 1386 4F4D2073 + 1386 697A6520 + 1387 0a9f 732C0D0A .align 2 + 1387 00 + 1388 .LC57: + 1389 .ascii "\015\012\015\012-> Starting application...\015\012\015" + 1390 0aa4 66697865 .ascii "\012\000" + 1390 6420626F + 1390 6F742064 + 1390 65766963 + 1390 65206164 + 1391 .align 2 + 1392 .LC58: + 1393 0ac8 5465726D .ascii "\015\012\015\012Aborted!\000" + 1393 696E616C + 1393 20736574 + 1393 75703A20 + 1393 39363030 + 1394 0afb 31207374 .text + 1394 6F702062 + 1394 69740D0A + 1394 0D0A00 + 1395 0b0a 0000 .align 2 + 1396 .global main + 1398 0b3f 20646174 main: + 1398 61736865 + 1398 65740D0A + 1398 00 + 1399 .LFB32: + 1400 .file 4 "main.c" + 1401 0b4c 68747470 .loc 4 12 0 + 1401 3A2F2F6F + 1401 70656E63 + 1401 6F726573 + 1401 2E6F7267 + 1402 0b76 0000 @ args = 0, pretend = 0, frame = 8 + 1403 @ frame_needed = 0, uses_anonymous_args = 0 + 1404 0b78 68747470 stmfd sp!, {r4, r5, r6, r7, r8, sl, lr} + 1404 3A2F2F6F + 1404 70656E63 + 1404 6F726573 + 1404 2E6F7267 + 1405 0ba1 000000 .LCFI9: + 1406 .loc 4 18 0 + 1407 0ba4 436F6E74 mov r0, #0 + 1407 6163743A + 1407 2073746E + 1407 6F6C7469 + 1407 6E674067 + 1408 .loc 4 12 0 + 1409 sub sp, sp, #12 + 1410 0bc8 28632920 .LCFI10: + 1410 32303132 + 1410 20627920 + 1410 53746570 + 1410 68616E20 + 1411 0bef 00 .loc 4 18 0 + 1412 bl io_set_gpio0_port + 1413 .loc 4 19 0 + 1414 0bf0 0D0A0D0A mov r1, #13 + 1414 5765276C + 1414 6C207365 + 1414 6E642079 + 1414 6F752062 + 1415 0c17 212E0D0A mov r0, #195 + 1415 0D0A00 + 1416 0c1e 0000 bl set_syscpreg + 1417 .loc 4 22 0 + 1418 0c20 202D2044 mov r0, #99 + 1418 6F63746F + 1418 7220456D + 1418 6D657420 + 1418 4C2E2042 + 1419 0c45 000000 bl io_i2c0_speed + 1420 .loc 4 25 0 + 1421 0c48 20496E76 mov r0, #6 + 1421 616C6964 + 1421 206F7065 + 1421 72617469 + 1421 6F6E210D + 1422 0c69 000000 bl get_syscpreg + 1423 mov r1, #6 + 1424 0c6c 0D0A0D0A orr r0, r0, #8 + 1424 2D3E2053 + 1424 74617274 + 1424 696E6720 + 1424 6170706C + 1425 0c8d 0A00 bl set_syscpreg + 1426 0c8f 00 .loc 4 28 0 + 1427 mov r0, #13 + 1428 0c90 0D0A0D0A bl get_syscpreg + 1428 41626F72 + 1428 74656421 + 1428 00 + 1429 0c9d 000000 .loc 4 29 0 + 1430 mov r0, r0, lsr #17 + 1431 mvn r0, r0 + 1432 and r0, r0, #15 + 1433 cmp r0, #1 + 1434 moveq r4, #48 + 1435 .LVL117: + 1:main.c **** #include "storm_core.h" + 2:main.c **** #include "storm_soc_basic.h" + 3:main.c **** #include "io_driver.c" + 4:main.c **** #include "uart.c" + 5:main.c **** #include "utilities.c" + 6:main.c **** + 7:main.c **** + 8:main.c **** // ############################################################################################ + 9:main.c **** // STORM SoC Bootloader + 10:main.c **** int main(void) + 11:main.c **** // ############################################################################################ + 12:main.c **** { + 1436 printf + 1437 .loc 4 37 0 + 1438 ldr r0, .L325+4 + 1439 069c E92D45F0 bl uart0_printf + 1440 .loc 4 38 0 + 13:main.c **** int function_sel, data, i, start_app = 0; + 14:main.c **** unsigned long *data_pointer, word_buffer, adr_buffer, cnt; + 15:main.c **** unsigned char buffer[5], char_tmp, *char_pointer, device_id; + 16:main.c **** + 17:main.c **** // show reset ack + 18:main.c **** io_set_gpio0_port(0); + 1441 r0, .L325+8 + 1442 06a0 E3A00000 bl uart0_printf + 1443 .loc 4 39 0 + 1444 06a4 E24DD00C ldr r0, .L325+12 + 1445 bl uart0_printf + 1446 .loc 4 40 0 + 1447 06a8 EBFFFFFE ldr r0, .L325+16 + 19:main.c **** set_syscpreg(0xC3, SYS_IO); + 1448 t0_printf + 1449 06ac E3A0100D .loc 4 41 0 + 1450 06b0 E3A000C3 ldr r0, .L325+20 + 1451 06b4 EBFFFFFE bl uart0_printf + 20:main.c **** + 21:main.c **** // init I�C + 22:main.c **** io_i2c0_speed(0x0063); // 100kHz + 1452 c 4 43 0 + 1453 06b8 E3A00063 ldr r0, .L325+24 + 1454 06bc EBFFFFFE bl uart0_printf + 23:main.c **** + 24:main.c **** // enable write-through strategy + 25:main.c **** set_syscpreg(get_syscpreg(SYS_CTRL_0) | (1<> 17)) & 0x0F); + 1461 4 48 0 + 1462 06d4 E3A0000D ldr r0, .L325+36 + 1463 06d8 EBFFFFFE bl uart0_printf + 29:main.c **** switch(function_sel){ + 1464 oc 4 49 0 + 1465 06dc E1A008A0 ldr r0, .L325+40 + 1466 06e0 E1E00000 bl uart0_printf + 1467 06e4 E200000F add sl, sp, #7 + 1468 06e8 E3500001 .LVL118: + 1469 06ec 03A04030 .L207: + 1470 .loc 4 54 0 + 1471 06f0 028DA007 bl io_uart0_read_byte + 1472 06f4 0A00001A mov r4, r0 + 1473 06f8 E3500002 .LVL119: + 1474 06fc 0A000070 .L206: + 30:main.c **** case 1: function_sel = '0'; goto main_menu; break; // auto start application from RAM + 31:main.c **** case 2: function_sel = '3'; goto main_menu; start_app = 1; device_id = 0xA0; break; // auto boot + 32:main.c **** default: break; + 33:main.c **** } + 34:main.c **** + 35:main.c **** // Intro screen + 36:main.c **** uart0_printf("\r\n\r\n\r\n+----------------------------------------------------------------+\r\n") + 1475 0 + 1476 0700 E59F07EC mov r0, #13 + 1477 0704 EBFFFFFE bl get_syscpreg + 37:main.c **** uart0_printf( "| <<< STORM Core Processor System - By Stephan Nolting >>> |\r\n") + 1478 t r0, #65536 + 1479 0708 E59F07E8 .loc 4 132 0 + 1480 070c EBFFFFFE moveq r6, #1 + 38:main.c **** uart0_printf( "+----------------------------------------------------------------+\r\n") + 1481 L120: + 1482 0710 E59F07E4 moveq r5, #160 + 1483 0714 EBFFFFFE .LVL121: + 39:main.c **** uart0_printf( "| Bootloader for STORM SoC Version: 20120524-D |\r\n") + 1484 oc 4 59 0 + 1485 0718 E59F07E0 bne .L315 + 1486 071c EBFFFFFE .LVL122: + 40:main.c **** uart0_printf( "| Contact: stnolting@googlemail.com |\r\n") + 1487 43: + 1488 0720 E59F07DC .loc 4 139 0 + 1489 0724 EBFFFFFE mov r4, #0 + 41:main.c **** uart0_printf( "+----------------------------------------------------------------+\r\n\r + 1490 L123: + 1491 0728 E59F07D8 .loc 4 137 0 + 1492 072c EBFFFFFE ldr r0, .L325+44 + 42:main.c **** + 43:main.c **** uart0_printf( " < Welcome to the STORM SoC bootloader console! >\r\n < Select an operat + 1493 uart0_printf + 1494 0730 E59F07D4 .LVL124: + 1495 0734 EBFFFFFE .loc 4 139 0 + 44:main.c **** uart0_printf( " < the boot key for immediate application start. >\r\n\r\n"); + 1496 v r1, r5 + 1497 0738 E59F07D0 mov r2, r4 + 1498 073c EBFFFFFE mov r3, #2 + 45:main.c **** + 46:main.c **** // Console menu + 47:main.c **** uart0_printf(" 0 - boot from core RAM (start application)\r\n 1 - program core RAM via UART_0\r\n + 1499 v r0, #114 + 1500 0740 E59F07CC str r4, [sp, #0] + 1501 0744 EBFFFFFE bl io_i2c0_byte_transfer + 48:main.c **** uart0_printf(" 3 - boot from I2C EEPROM\r\n 4 - program I2C EEPROM via UART_0\r\n 5 - show content + 1502 oc 4 140 0 + 1503 0748 E59F07C8 mov r1, r5 + 1504 074c EBFFFFFE .loc 4 139 0 + 49:main.c **** uart0_printf(" a - automatic boot configuration\r\n h - help\r\n r - restart system\r\n\r\nSelect: + 1505 rb r0, [sp, #7] + 1506 0750 E59F07C4 .loc 4 140 0 + 1507 0754 EBFFFFFE mov r2, #1 + 1508 0758 E28DA007 mov r3, #2 + 1509 mov r0, #114 + 1510 str r4, [sp, #0] + 50:main.c **** + 51:main.c **** while(1){ + 52:main.c **** + 53:main.c **** // console input + 54:main.c **** function_sel = io_uart0_read_byte(); + 1511 _i2c0_byte_transfer + 1512 075c EBFFFFFE .loc 4 141 0 + 1513 0760 E1A04000 mov r2, #2 + 1514 mov r3, r2 + 1515 .loc 4 140 0 + 55:main.c **** + 56:main.c **** main_menu: + 57:main.c **** + 58:main.c **** // boot button + 59:main.c **** if (((get_syscpreg(SYS_IO) >> 16) & 0x01) == 0){ + 1516 r0, [sp, #8] + 1517 0764 E3A0000D .loc 4 141 0 + 1518 0768 EBFFFFFE mov r1, r5 + 1519 076c E3100801 mov r0, #114 + 60:main.c **** function_sel = '3'; + 61:main.c **** start_app = 1; + 62:main.c **** device_id = 0xA0; + 63:main.c **** } + 64:main.c **** + 65:main.c **** // main functions + 66:main.c **** switch(function_sel){ + 67:main.c **** + 68:main.c **** // boot from RAM (start application) + 69:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 70:main.c **** case '0': + 71:main.c **** io_uart0_send_byte((char)function_sel); + 72:main.c **** start_app = 1; + 73:main.c **** break; + 74:main.c **** + 75:main.c **** // load ram via UART0 + 76:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 77:main.c **** case '1': + 78:main.c **** io_uart0_send_byte((char)function_sel); + 79:main.c **** uart0_printf("\r\n\r\nApplication will start automatically after download.\r\n-> Waiting for 's + 80:main.c **** uart0_scanf(buffer,4,0); // get storm master boot record code + 81:main.c **** if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ + 82:main.c **** uart0_scanf(buffer,4,0); // get image size + 83:main.c **** adr_buffer = qbytes_to_long(buffer); + 84:main.c **** if (adr_buffer > RAM_SIZE-8){ + 85:main.c **** uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + 86:main.c **** break; + 87:main.c **** } + 88:main.c **** data_pointer = 0; + 89:main.c **** while(data_pointer != adr_buffer+4){ + 90:main.c **** uart0_scanf(buffer,4,0); // get word + 91:main.c **** *data_pointer = qbytes_to_long(buffer); // store memory entry + 92:main.c **** data_pointer = data_pointer + 1; + 93:main.c **** } + 94:main.c **** start_app = 1; + 95:main.c **** } + 96:main.c **** else + 97:main.c **** uart0_printf(" Invalid programming file!\r\n\r\nSelect: "); + 98:main.c **** break; + 99:main.c **** + 100:main.c **** // ram memory dump + 101:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 102:main.c **** case '2': + 103:main.c **** io_uart0_send_byte((char)function_sel); + 104:main.c **** uart0_printf("\r\n\r\nAbort dumping by pressing any key.\r\nPress any key to continue.\r\n\r\n" + 105:main.c **** while(io_uart0_read_byte() == -1); + 106:main.c **** while(io_uart0_read_byte() != -1); + 107:main.c **** data_pointer = 0; + 108:main.c **** while(data_pointer != RAM_SIZE){ + 109:main.c **** word_buffer = *data_pointer; + 110:main.c **** io_uart0_send_byte(word_buffer >> 24); + 111:main.c **** io_uart0_send_byte(word_buffer >> 16); + 112:main.c **** io_uart0_send_byte(word_buffer >> 8); + 113:main.c **** io_uart0_send_byte(word_buffer >> 0); + 114:main.c **** data_pointer++; + 115:main.c **** if(io_uart0_read_byte() != -1){ + 116:main.c **** break; + 117:main.c **** uart0_printf("\r\n\r\nAborted!"); + 118:main.c **** } + 119:main.c **** } + 120:main.c **** uart0_printf("\r\n\r\nDumping completed.\r\n\r\nSelect: "); + 121:main.c **** break; + 122:main.c **** + 123:main.c **** // boot from I�C EEPROM + 124:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 125:main.c **** case '3': + 126:main.c **** if(start_app == 0){ + 127:main.c **** io_uart0_send_byte((char)function_sel); + 128:main.c **** uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + 129:main.c **** uart0_scanf(buffer,2,1); + 130:main.c **** device_id = (unsigned char)hex_string_to_long(buffer, 2); + 131:main.c **** if(device_id == 0){ + 132:main.c **** uart0_printf(" Invalid address!\r\n\r\nSelect: "); + 1520 r4, [sp, #0] + 1521 0770 03A06001 bl io_i2c0_byte_transfer + 1522 .loc 4 142 0 + 1523 0774 03A050A0 mov r3, #2 + 1524 .loc 4 141 0 + 1525 strb r0, [sp, #9] + 1526 0778 1A000035 .loc 4 142 0 + 1527 mov r1, r5 + 1528 mov r0, #114 + 133:main.c **** break; + 134:main.c **** } + 135:main.c **** } + 136:main.c **** + 137:main.c **** uart0_printf("\r\nApplication will start automatically after upload.\r\n-> Loading boot image.. + 138:main.c **** cnt = 0; + 139:main.c **** buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 1529 #3 + 1530 077c E3A04000 str r4, [sp, #0] + 1531 bl io_i2c0_byte_transfer + 1532 .loc 4 143 0 + 1533 0780 E59F0798 ldrb r3, [sp, #7] @ zero_extendqisi2 + 1534 0784 EBFFFFFE .loc 4 142 0 + 1535 and r0, r0, #255 + 1536 .loc 4 143 0 + 1537 0788 E1A01005 cmp r3, #83 + 1538 078c E1A02004 .loc 4 142 0 + 1539 0790 E3A03002 strb r0, [sp, #10] + 1540 0794 E3A00072 .loc 4 143 0 + 1541 0798 E58D4000 bne .L244 + 1542 079c EBFFFFFE ldrb r3, [sp, #8] @ zero_extendqisi2 + 140:main.c **** buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 1543 beq .L316 + 1544 07a0 E1A01005 .L244: + 1545 .loc 4 162 0 + 1546 07a4 E5CD0007 ldr r0, .L325+48 + 1547 bl uart0_printf + 1548 07a8 E3A02001 .loc 4 317 0 + 1549 07ac E3A03002 cmp r6, #0 + 1550 07b0 E3A00072 beq .L207 + 1551 07b4 E58D4000 .LVL125: + 1552 07b8 EBFFFFFE .L225: + 141:main.c **** buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 1553 3 0 + 1554 07bc E3A02002 ldr r0, .L325+52 + 1555 07c0 E1A03002 .LVL126: + 1556 bl uart0_printf + 1557 07c4 E5CD0008 .loc 4 324 0 + 1558 mov r1, #13 + 1559 07c8 E1A01005 mov r0, #0 + 1560 07cc E3A00072 bl set_syscpreg + 1561 07d0 E58D4000 .loc 4 327 0 + 1562 07d4 EBFFFFFE mov r0, #6 + 142:main.c **** buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 1563 scpreg + 1564 07d8 E3A03002 mov r1, #6 + 1565 bic r0, r0, #8 + 1566 07dc E5CD0009 bl set_syscpreg + 1567 .loc 4 330 0 + 1568 07e0 E1A01005 mov pc, #0 + 1569 07e4 E3A00072 .L285: + 1570 07e8 E3A02003 b .L285 + 1571 07ec E58D4000 .LVL127: + 1572 07f0 EBFFFFFE .L315: + 143:main.c **** if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ + 1573 0 + 1574 07f4 E5DD3007 cmp r4, #52 + 1575 beq .L216 + 1576 07f8 E20000FF bgt .L222 + 1577 cmp r4, #49 + 1578 07fc E3530053 beq .L213 + 1579 ble .L317 + 1580 0800 E5CD000A cmp r4, #50 + 1581 beq .L214 + 1582 0804 1A000002 cmp r4, #51 + 1583 0808 E5DD3008 bne .L210 + 1584 080c E353004D .loc 4 127 0 + 1585 0810 0A000062 mov r0, r4 + 1586 bl io_uart0_send_byte + 144:main.c **** buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 145:main.c **** buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 146:main.c **** buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 147:main.c **** buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 148:main.c **** adr_buffer = qbytes_to_long(buffer); + 149:main.c **** data_pointer = 0; + 150:main.c **** while((data_pointer != adr_buffer+4) && (data_pointer < IRAM_SIZE)){ + 151:main.c **** buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 152:main.c **** buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 153:main.c **** buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 154:main.c **** buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + 155:main.c **** *data_pointer = qbytes_to_long(buffer); // store memory entry + 156:main.c **** data_pointer = data_pointer + 1; + 157:main.c **** } + 158:main.c **** uart0_printf(" Upload complete\r\n"); + 159:main.c **** start_app = 1; + 160:main.c **** } + 161:main.c **** else + 162:main.c **** uart0_printf(" Invalid boot device or file!\r\n\r\nSelect: "); + 1587 ldr r0, .L325+56 + 1588 0814 E59F0708 bl uart0_printf + 1589 0818 EBFFFFFE .loc 4 129 0 + 163:main.c **** break; + 164:main.c **** + 165:main.c **** // program I�C EEPROM + 166:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 167:main.c **** case '4': + 168:main.c **** io_uart0_send_byte((char)function_sel); + 169:main.c **** uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + 170:main.c **** uart0_scanf(buffer,2,1); + 171:main.c **** device_id = (unsigned char)hex_string_to_long(buffer, 2); + 172:main.c **** if(device_id == 0){ + 173:main.c **** uart0_printf("\r\nInvalid address!\r\n\r\nSelect: "); + 174:main.c **** break; + 175:main.c **** } + 176:main.c **** + 177:main.c **** uart0_printf("\r\nData will overwrite RAM content!\r\n-> Waiting for 'storm_program.bin' in byt + 178:main.c **** uart0_scanf(buffer,4,0); + 179:main.c **** if((buffer[0]=='S') && (buffer[1]=='M') && (buffer[2]=='B') && (buffer[3]=='R')){ + 180:main.c **** char_pointer = 0; // beginning of RAM + 181:main.c **** *char_pointer++ = 'S'; asm volatile ("NOP"); + 182:main.c **** *char_pointer++ = 'M'; asm volatile ("NOP"); + 183:main.c **** *char_pointer++ = 'B'; asm volatile ("NOP"); + 184:main.c **** *char_pointer++ = 'R'; asm volatile ("NOP"); + 185:main.c **** uart0_scanf(buffer,4,0); + 186:main.c **** *char_pointer++ = buffer[0]; + 187:main.c **** *char_pointer++ = buffer[1]; + 188:main.c **** *char_pointer++ = buffer[2]; + 189:main.c **** *char_pointer++ = buffer[3]; + 190:main.c **** cnt = qbytes_to_long(buffer); + 191:main.c **** if(cnt > 0xFFFC){ + 192:main.c **** uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + 193:main.c **** break; + 194:main.c **** } + 195:main.c **** + 196:main.c **** for(i=0; i 16 bit addresses,\r\n"); + 276:main.c **** uart0_printf("fixed boot device address: 0xA0\r\n\r\n"); + 277:main.c **** uart0_printf("Terminal setup: 9600 baud, 8 data bits, no parity, 1 stop bit\r\n\r\n"); + 278:main.c **** uart0_printf("For more information see the STORM Core / STORM SoC datasheet\r\n"); + 279:main.c **** uart0_printf("http://opencores.org/project,storm_core\r\n"); + 280:main.c **** uart0_printf("http://opencores.org/project,storm_soc\r\n"); + 281:main.c **** uart0_printf("Contact: stnolting@googlemail.com\r\n"); + 282:main.c **** uart0_printf("(c) 2012 by Stephan Nolting\r\n\r\nSelect: "); + 283:main.c **** break; + 284:main.c **** + 285:main.c **** // back to the future + 286:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 287:main.c **** case 'f': + 288:main.c **** io_uart0_send_byte((char)function_sel); + 289:main.c **** uart0_printf("\r\n\r\nWe'll send you back - to the future!.\r\n\r\n"); + 290:main.c **** uart0_printf(" - Doctor Emmet L. Brown\r\n\r\nSelect: "); + 291:main.c **** break; + 292:main.c **** + 293:main.c **** // restart system + 294:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 295:main.c **** case 'r': + 296:main.c **** io_uart0_send_byte((char)function_sel); + 297:main.c **** asm volatile ("mov r0, #0x0FF00000"); + 298:main.c **** asm volatile ("add pc, r0, #0xF0000000"); // jump to bootloader + 299:main.c **** while(1); + 300:main.c **** break; + 301:main.c **** + 302:main.c **** // no input + 303:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 304:main.c **** case -1: + 305:main.c **** break; + 306:main.c **** + 307:main.c **** // invalid selection + 308:main.c **** // +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 309:main.c **** default: + 310:main.c **** io_uart0_send_byte((char)function_sel); + 311:main.c **** uart0_printf(" Invalid operation!\r\nTry again: "); + 312:main.c **** break; + 313:main.c **** + 314:main.c **** } + 315:main.c **** + 316:main.c **** // start application request + 317:main.c **** if(start_app != 0) + 1590 v r0, sl + 1591 081c E3560000 mov r1, #2 + 1592 0820 0AFFFFCD mov r2, #1 + 1593 bl uart0_scanf + 1594 .loc 4 130 0 + 318:main.c **** break; + 319:main.c **** + 320:main.c **** } + 321:main.c **** + 322:main.c **** // start application + 323:main.c **** uart0_printf("\r\n\r\n-> Starting application...\r\n\r\n"); + 1595 r1, #2 + 1596 0824 E59F06FC mov r0, sl + 1597 bl hex_string_to_long + 1598 0828 EBFFFFFE .loc 4 131 0 + 324:main.c **** set_syscpreg(0x00, SYS_IO); + 1599 s r1, r0, #255 + 1600 082c E3A0100D .LVL128: + 1601 0830 E3A00000 movne r5, r1 + 1602 0834 EBFFFFFE movne r6, #0 + 325:main.c **** + 326:main.c **** // disable write-through strategy + 327:main.c **** set_syscpreg(get_syscpreg(SYS_CTRL_0) & ~(1<> 17)) & 0x0F); + switch(function_sel){ + case 1: function_sel = '0'; goto main_menu; break; // auto start application from RAM + case 2: function_sel = '3'; goto main_menu; start_app = 1; device_id = 0xA0; break; // auto boot from i�c EEPROM 0xA0 + default: break; + } + + // Intro screen + uart0_printf("\r\n\r\n\r\n+----------------------------------------------------------------+\r\n"); + uart0_printf( "| <<< STORM Core Processor System - By Stephan Nolting >>> |\r\n"); + uart0_printf( "+----------------------------------------------------------------+\r\n"); + uart0_printf( "| Bootloader for STORM SoC Version: 20120524-D |\r\n"); + uart0_printf( "| Contact: stnolting@googlemail.com |\r\n"); + uart0_printf( "+----------------------------------------------------------------+\r\n\r\n"); + + uart0_printf( " < Welcome to the STORM SoC bootloader console! >\r\n < Select an operation from the menu below or press >\r\n"); + uart0_printf( " < the boot key for immediate application start. >\r\n\r\n"); + + // Console menu + uart0_printf(" 0 - boot from core RAM (start application)\r\n 1 - program core RAM via UART_0\r\n 2 - core RAM dump\r\n"); + uart0_printf(" 3 - boot from I2C EEPROM\r\n 4 - program I2C EEPROM via UART_0\r\n 5 - show content of I2C EEPROM\r\n"); + uart0_printf(" a - automatic boot configuration\r\n h - help\r\n r - restart system\r\n\r\nSelect: "); + + while(1){ + + // console input + function_sel = io_uart0_read_byte(); + +main_menu: + + // boot button + if (((get_syscpreg(SYS_IO) >> 16) & 0x01) == 0){ + function_sel = '3'; + start_app = 1; + device_id = 0xA0; + } + + // main functions + switch(function_sel){ + + // boot from RAM (start application) + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '0': + io_uart0_send_byte((char)function_sel); + start_app = 1; + break; + + // load ram via UART0 + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '1': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nApplication will start automatically after download.\r\n-> Waiting for 'storm_program.bin' in byte-stream mode..."); + uart0_scanf(buffer,4,0); // get storm master boot record code + if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ + uart0_scanf(buffer,4,0); // get image size + adr_buffer = qbytes_to_long(buffer); + if (adr_buffer > RAM_SIZE-8){ + uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + break; + } + data_pointer = 0; + while(data_pointer != adr_buffer+4){ + uart0_scanf(buffer,4,0); // get word + *data_pointer = qbytes_to_long(buffer); // store memory entry + data_pointer = data_pointer + 1; + } + start_app = 1; + } + else + uart0_printf(" Invalid programming file!\r\n\r\nSelect: "); + break; + + // ram memory dump + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '2': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nAbort dumping by pressing any key.\r\nPress any key to continue.\r\n\r\n"); + while(io_uart0_read_byte() == -1); + while(io_uart0_read_byte() != -1); + data_pointer = 0; + while(data_pointer != RAM_SIZE){ + word_buffer = *data_pointer; + io_uart0_send_byte(word_buffer >> 24); + io_uart0_send_byte(word_buffer >> 16); + io_uart0_send_byte(word_buffer >> 8); + io_uart0_send_byte(word_buffer >> 0); + data_pointer++; + if(io_uart0_read_byte() != -1){ + break; + uart0_printf("\r\n\r\nAborted!"); + } + } + uart0_printf("\r\n\r\nDumping completed.\r\n\r\nSelect: "); + break; + + // boot from I�C EEPROM + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '3': + if(start_app == 0){ + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + uart0_scanf(buffer,2,1); + device_id = (unsigned char)hex_string_to_long(buffer, 2); + if(device_id == 0){ + uart0_printf(" Invalid address!\r\n\r\nSelect: "); + break; + } + } + + uart0_printf("\r\nApplication will start automatically after upload.\r\n-> Loading boot image..."); + cnt = 0; + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + if((buffer[0] == 'S') && (buffer[1] == 'M') && (buffer[2] == 'B') && (buffer[3] == 'R')){ + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + adr_buffer = qbytes_to_long(buffer); + data_pointer = 0; + while((data_pointer != adr_buffer+4) && (data_pointer < IRAM_SIZE)){ + buffer[0] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[1] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[2] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + buffer[3] = (unsigned char)io_i2c0_byte_transfer('r',device_id,cnt++,2,0x00); + *data_pointer = qbytes_to_long(buffer); // store memory entry + data_pointer = data_pointer + 1; + } + uart0_printf(" Upload complete\r\n"); + start_app = 1; + } + else + uart0_printf(" Invalid boot device or file!\r\n\r\nSelect: "); + break; + + // program I�C EEPROM + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case '4': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nEnter device address (2x hex_chars, set LSB to '0'): "); + uart0_scanf(buffer,2,1); + device_id = (unsigned char)hex_string_to_long(buffer, 2); + if(device_id == 0){ + uart0_printf("\r\nInvalid address!\r\n\r\nSelect: "); + break; + } + + uart0_printf("\r\nData will overwrite RAM content!\r\n-> Waiting for 'storm_program.bin' in byte-stream mode..."); + uart0_scanf(buffer,4,0); + if((buffer[0]=='S') && (buffer[1]=='M') && (buffer[2]=='B') && (buffer[3]=='R')){ + char_pointer = 0; // beginning of RAM + *char_pointer++ = 'S'; asm volatile ("NOP"); + *char_pointer++ = 'M'; asm volatile ("NOP"); + *char_pointer++ = 'B'; asm volatile ("NOP"); + *char_pointer++ = 'R'; asm volatile ("NOP"); + uart0_scanf(buffer,4,0); + *char_pointer++ = buffer[0]; + *char_pointer++ = buffer[1]; + *char_pointer++ = buffer[2]; + *char_pointer++ = buffer[3]; + cnt = qbytes_to_long(buffer); + if(cnt > 0xFFFC){ + uart0_printf(" ERROR! Program file too big!\r\n\r\n"); + break; + } + + for(i=0; i 16 bit addresses,\r\n"); + uart0_printf("fixed boot device address: 0xA0\r\n\r\n"); + uart0_printf("Terminal setup: 9600 baud, 8 data bits, no parity, 1 stop bit\r\n\r\n"); + uart0_printf("For more information see the STORM Core / STORM SoC datasheet\r\n"); + uart0_printf("http://opencores.org/project,storm_core\r\n"); + uart0_printf("http://opencores.org/project,storm_soc\r\n"); + uart0_printf("Contact: stnolting@googlemail.com\r\n"); + uart0_printf("(c) 2012 by Stephan Nolting\r\n\r\nSelect: "); + break; + + // back to the future + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 'f': + io_uart0_send_byte((char)function_sel); + uart0_printf("\r\n\r\nWe'll send you back - to the future!.\r\n\r\n"); + uart0_printf(" - Doctor Emmet L. Brown\r\n\r\nSelect: "); + break; + + // restart system + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case 'r': + io_uart0_send_byte((char)function_sel); + asm volatile ("mov r0, #0x0FF00000"); + asm volatile ("add pc, r0, #0xF0000000"); // jump to bootloader + while(1); + break; + + // no input + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + case -1: + break; + + // invalid selection + // ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + default: + io_uart0_send_byte((char)function_sel); + uart0_printf(" Invalid operation!\r\nTry again: "); + break; + + } + + // start application request + if(start_app != 0) + break; + + } + + // start application + uart0_printf("\r\n\r\n-> Starting application...\r\n\r\n"); + set_syscpreg(0x00, SYS_IO); + + // disable write-through strategy + set_syscpreg(get_syscpreg(SYS_CTRL_0) & ~(1<

trunk/basic_system/software/bootloader/main.elf Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/basic_system/software/bootloader/storm_program.txt =================================================================== --- trunk/basic_system/software/bootloader/storm_program.txt (nonexistent) +++ trunk/basic_system/software/bootloader/storm_program.txt (revision 13) @@ -0,0 +1,1847 @@ +000000 => x"EA000006", +000001 => x"EAFFFFFE", +000002 => x"EAFFFFFE", +000003 => x"EAFFFFFE", +000004 => x"EAFFFFFE", +000005 => x"E1A00000", +000006 => x"EAFFFFFE", +000007 => x"EAFFFFFE", +000008 => x"E59F0034", +000009 => x"E10F1000", +000010 => x"E3C1107F", +000011 => x"E38110DF", +000012 => x"E129F001", +000013 => x"E1A0D000", +000014 => x"E3A00000", +000015 => x"E1A01000", +000016 => x"E1A02000", +000017 => x"E1A0B000", +000018 => x"E1A07000", +000019 => x"E59FA00C", +000020 => x"E1A0E00F", +000021 => x"E1A0F00A", +000022 => x"EAFFFFFE", +000023 => x"00008000", +000024 => x"FFF00700", +000025 => x"E3E03A0F", +000026 => x"E5131FFB", +000027 => x"E20020FF", +000028 => x"E3A00001", +000029 => x"E0010210", +000030 => x"E1A0F00E", +000031 => x"E3E03A0F", +000032 => x"E5130FFB", +000033 => x"E1A0F00E", +000034 => x"E3E01A0F", +000035 => x"E5113FFF", +000036 => x"E20000FF", +000037 => x"E3A02001", +000038 => x"E1833012", +000039 => x"E5013FFF", +000040 => x"E1A0F00E", +000041 => x"E20000FF", +000042 => x"E3A02001", +000043 => x"E1A02012", +000044 => x"E3E01A0F", +000045 => x"E5113FFF", +000046 => x"E1E02002", +000047 => x"E0033002", +000048 => x"E5013FFF", +000049 => x"E1A0F00E", +000050 => x"E3E01A0F", +000051 => x"E5113FFF", +000052 => x"E20000FF", +000053 => x"E3A02001", +000054 => x"E0233012", +000055 => x"E5013FFF", +000056 => x"E1A0F00E", +000057 => x"E3E03A0F", +000058 => x"E5030FFF", +000059 => x"E1A0F00E", +000060 => x"E20000FF", +000061 => x"E3500007", +000062 => x"E92D4010", +000063 => x"E3A0C000", +000064 => x"E3E0E0FF", +000065 => x"E20110FF", +000066 => x"8A000011", +000067 => x"E2403004", +000068 => x"E20330FF", +000069 => x"E3500003", +000070 => x"E1A0E183", +000071 => x"E3E04A0F", +000072 => x"E1A0C180", +000073 => x"9A000007", +000074 => x"E3A030FF", +000075 => x"E1A03E13", +000076 => x"E5142F8B", +000077 => x"E1E03003", +000078 => x"E0022003", +000079 => x"E1822E11", +000080 => x"E5042F8B", +000081 => x"E8BD8010", +000082 => x"E3A030FF", +000083 => x"E1A03C13", +000084 => x"E1E0E003", +000085 => x"E3E02A0F", +000086 => x"E5123F8F", +000087 => x"E003300E", +000088 => x"E1833C11", +000089 => x"E5023F8F", +000090 => x"E8BD8010", +000091 => x"E20000FF", +000092 => x"E3500007", +000093 => x"E3A02000", +000094 => x"8A00000A", +000095 => x"E2403004", +000096 => x"E3500003", +000097 => x"E20320FF", +000098 => x"9A000005", +000099 => x"E3E03A0F", +000100 => x"E5130F8B", +000101 => x"E1A02182", +000102 => x"E1A00230", +000103 => x"E20000FF", +000104 => x"E1A0F00E", +000105 => x"E1A02180", +000106 => x"E3E03A0F", +000107 => x"E5130F8F", +000108 => x"E1A00230", +000109 => x"E20000FF", +000110 => x"E1A0F00E", +000111 => x"E3E02A0F", +000112 => x"E5123FE3", +000113 => x"E3130002", +000114 => x"E3E00000", +000115 => x"15120FE7", +000116 => x"E1A0F00E", +000117 => x"E3E02A0F", +000118 => x"E5123FE3", +000119 => x"E3130001", +000120 => x"0AFFFFFC", +000121 => x"E20030FF", +000122 => x"E5023FE7", +000123 => x"E1A0F00E", +000124 => x"E20000FF", +000125 => x"E3500001", +000126 => x"E3812B01", +000127 => x"03E03A0F", +000128 => x"E3811B09", +000129 => x"13E03A0F", +000130 => x"05031FCF", +000131 => x"15032FCF", +000132 => x"E1A0F00E", +000133 => x"E3E03A0F", +000134 => x"E5030FCB", +000135 => x"E1A0F00E", +000136 => x"E3E02A0F", +000137 => x"E5123FCF", +000138 => x"E3130C01", +000139 => x"1AFFFFFC", +000140 => x"E5020FBF", +000141 => x"E5123FCF", +000142 => x"E3833C01", +000143 => x"E5023FCF", +000144 => x"E3E02A0F", +000145 => x"E5123FCF", +000146 => x"E3130C01", +000147 => x"1AFFFFFC", +000148 => x"E5120FBF", +000149 => x"E1A0F00E", +000150 => x"E3E01A0F", +000151 => x"E5113FC7", +000152 => x"E20000FF", +000153 => x"E3A02001", +000154 => x"E1833012", +000155 => x"E5013FC7", +000156 => x"E1A0F00E", +000157 => x"E20000FF", +000158 => x"E3A02001", +000159 => x"E1A02012", +000160 => x"E3E01A0F", +000161 => x"E5113FC7", +000162 => x"E1E02002", +000163 => x"E0033002", +000164 => x"E5013FC7", +000165 => x"E1A0F00E", +000166 => x"E3E02A0F", +000167 => x"E5123F97", +000168 => x"E1A01420", +000169 => x"E3C33080", +000170 => x"E5023F97", +000171 => x"E5020F9F", +000172 => x"E5021F9B", +000173 => x"E5123F97", +000174 => x"E3833080", +000175 => x"E5023F97", +000176 => x"E1A0F00E", +000177 => x"E92D4030", +000178 => x"E3A0C090", +000179 => x"E20140FE", +000180 => x"E3E0EA0F", +000181 => x"E5DD500F", +000182 => x"E20000FF", +000183 => x"E50E4F93", +000184 => x"E20110FF", +000185 => x"E50ECFAF", +000186 => x"E1A04002", +000187 => x"E203C0FF", +000188 => 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trunk/basic_system/software/bootloader/Makefile =================================================================== --- trunk/basic_system/software/bootloader/Makefile (nonexistent) +++ trunk/basic_system/software/bootloader/Makefile (revision 13) @@ -0,0 +1,431 @@ +# Hey Emacs, this is a -*- makefile -*- +# +# WinARM template makefile +# by Martin Thomas, Kaiserslautern, Germany +# +# +# based on the WinAVR makefile written by Eric B. Weddington, J�rg Wunsch, et al. +# Released to the Public Domain +# Please read the make user manual! +# +# +# On command line: +# +# make all = Make software. +# +# make clean = Clean out built project files. +# +# make program = Download the hex file to the device, using lpc21isp +# +# (TODO: make filename.s = Just compile filename.c into the assembler code only) +# +# To rebuild project do "make clean" then "make all". +# +# Changelog: +# - 17. Feb. 2005 - added thumb-interwork support (mth) +# - 28. Apr. 2005 - added C++ support (mth) +# - 29. Arp. 2005 - changed handling for lst-Filename (mth) +# - 22. Jan. 2012 - modified to handle storm core project +# + +# MCU name and submodel +MCU = arm7m +SUBMDL = STORMcore + + +THUMB = +THUMB_IW = + + +## Create ROM-Image +RUN_MODE = ROM_RUN + + +# Output format. (can be srec, ihex, binary) +FORMAT = ihex + + +# Target file name (without extension). +TARGET = main + + +# List C source files here. (C dependencies are automatically generated.) +# use file-extension c for "c-only"-files +#SRC = + +# List C source files here which must be compiled in ARM-Mode. +# use file-extension c for "c-only"-files +SRCARM = $(TARGET).c + +# List C++ source files here. +# use file-extension cpp for C++-files +CPPSRC = + +# List C++ source files here which must be compiled in ARM-Mode. +# use file-extension cpp for C++-files +# CPPSRCARM = $(TARGET).cpp +CPPSRCARM = + +# List Assembler source files here. +# Make them always end in a capital .S. Files ending in a lowercase .s +# will not be considered source files but generated files (assembler +# output from the compiler), and will be deleted upon "make clean"! +# Even though the DOS/Win* filesystem matches both .s and .S the same, +# it will preserve the spelling of the filenames, and gcc itself does +# care about how the name is spelled on its command-line. +ASRC = + +# List Assembler source files here which must be assembled in ARM-Mode.. +ASRCARM = build/storm_boot_startup_code.S + +# Optimization level, can be [0, 1, 2, 3, s]. +# 0 = turn off optimization. s = optimize for size. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPT = 2 + +# Debugging format. +# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2. +# AVR (extended) COFF requires stabs, plus an avr-objcopy run. +#DEBUG = stabs +DEBUG = dwarf-2 + +# List any extra directories to look for include files here. +# Each directory must be seperated by a space. +#EXTRAINCDIRS = ./include +EXTRAINCDIRS = + +# Compiler flag to set the C Standard level. +# c89 - "ANSI" C +# gnu89 - c89 plus GCC extensions +# c99 - ISO C99 standard (not yet fully implemented) +# gnu99 - c99 plus GCC extensions +CSTANDARD = -std=gnu99 + +# Place -D or -U options for C here +CDEFS = -D$(RUN_MODE) + +# Place -I options here +CINCS = + +# Place -D or -U options for ASM here +ADEFS = -D$(RUN_MODE) + + +# Compiler flags. +# -g*: generate debugging information +# -O*: optimization level +# -f...: tuning, see GCC manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns...: create assembler listing +# +# Flags for C and C++ (arm-elf-gcc/arm-elf-g++) +CFLAGS = -g$(DEBUG) +CFLAGS += $(CDEFS) $(CINCS) +CFLAGS += -O$(OPT) +CFLAGS += -Wall -Wcast-align -Wcast-qual -Wimplicit +CFLAGS += -Wpointer-arith -Wswitch +CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused +#CFLAGS += -Wa,-adhlns=$(<:.c=.lst) +CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) +CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) + +# flags only for C +CONLYFLAGS = -Wstrict-prototypes -Wmissing-declarations +CONLYFLAGS += -Wmissing-prototypes -Wnested-externs +CONLYFLAGS += $(CSTANDARD) + +# flags only for C++ (arm-elf-g++) +CPPFLAGS = + +# Assembler flags. +# -Wa,...: tell GCC to pass this to the assembler. +# -ahlms: create listing +# -gstabs: have the assembler create line number information; note that +# for use in COFF files, additional information about filenames +# and function names needs to be present in the assembler source +# files -- see avr-libc docs [FIXME: not yet described there] +##ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs +ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG) + +#Additional libraries. + +#Support for newlibc-lpc (file: libnewlibc-lpc.a) +#NEWLIBLPC = -lnewlib-lpc +NEWLIBCLPC = + +MATH_LIB = -lm + +# Linker flags. +# -Wl,...: tell GCC to pass this to linker. +# -Map: create map file +# --cref: add cross reference to map file +LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref +LDFLAGS += -lc +LDFLAGS += $(NEWLIBLPC) $(MATH_LIB) +LDFLAGS += -lc -lgcc + +# Set Linker-Script Depending On Selected Memory +ifeq ($(RUN_MODE),RAM_RUN) +LDFLAGS +=-Tbuild/$(SUBMDL)-RAM.ld +else +LDFLAGS +=-Tbuild/$(SUBMDL)-ROM.ld +endif + + + +# --------------------------------------------------------------------------- +# Flash-Programming support using lpc21isp by Martin Maurer + +# Settings and variables: +LPC21ISP = lpc21isp +#LPC21ISP = lpc21isp_beta +LPC21ISP_PORT = com1 +LPC21ISP_BAUD = 115200 +LPC21ISP_XTAL = 14746 +LPC21ISP_FLASHFILE = $(TARGET).hex +# verbose output: +## LPC21ISP_DEBUG = -debug +# enter bootloader via RS232 DTR/RTS (only if hardware supports this +# feature - see Philips AppNote): +LPC21ISP_CONTROL = -control + + +# --------------------------------------------------------------------------- + +# Define directories, if needed. +## DIRARM = c:/WinARM/ +## DIRARMBIN = $(DIRAVR)/bin/ +## DIRAVRUTILS = $(DIRAVR)/utils/bin/ + +# Define programs and commands. +SHELL = sh +CC = arm-elf-gcc -mbig-endian +CPP = arm-elf-g++ +OBJCOPY = arm-elf-objcopy +OBJDUMP = arm-elf-objdump +SIZE = arm-elf-size +NM = arm-elf-nm +REMOVE = rm -f +COPY = cp + + +# Define Messages +# English +MSG_ERRORS_NONE = Errors: none +MSG_BEGIN = -------- begin -------- +MSG_END = -------- end -------- +MSG_EXTRACT = Extracting bootloader program file: +MSG_SIZE_BEFORE = Size before: +MSG_SIZE_AFTER = Size after: +MSG_FLASH = Creating load file for Flash: +MSG_EXTENDED_LISTING = Creating Extended Listing: +MSG_SYMBOL_TABLE = Creating Symbol Table: +MSG_LINKING = Linking: +MSG_COMPILING = Compiling C: +MSG_COMPILING_ARM = "Compiling C (ARM-only):" +MSG_COMPILINGCPP = Compiling C++: +MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):" +MSG_ASSEMBLING = Assembling: +MSG_ASSEMBLING_ARM = "Assembling (ARM-only):" +MSG_CLEANING = Cleaning project: +MSG_LPC21_RESETREMINDER = You may have to bring the target in bootloader-mode now. + + +# Define all object files. +COBJ = $(SRC:.c=.o) +AOBJ = $(ASRC:.S=.o) +COBJARM = $(SRCARM:.c=.o) +AOBJARM = $(ASRCARM:.S=.o) +CPPOBJ = $(CPPSRC:.cpp=.o) +CPPOBJARM = $(CPPSRCARM:.cpp=.o) + +# Define all listing files. +LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst) $(SRCARM:.c=.lst) +LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst) + +# Compiler flags to generate dependency files. +### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d +GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d + +# Combine all necessary flags and optional flags. +# Add target processor to flags. +ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS) +ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS) + + +# Default target. +all: begin gccversion sizebefore build sizeafter finished cmp end + +build: elf hex lss + +elf: $(TARGET).elf +hex: $(TARGET).hex +lss: $(TARGET).lss +sym: $(TARGET).sym + +# Extract memory file. +cmp: + @echo + @echo $(MSG_EXTRACT) + storm_extractor.exe $(TARGET).elf + @echo + + +# Eye candy. +begin: + @echo + @echo $(MSG_BEGIN) + +finished: + @echo $(MSG_ERRORS_NONE) + +end: + @echo $(MSG_END) + @echo + + +# Display size of file. +HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex +ELFSIZE = $(SIZE) -A $(TARGET).elf +sizebefore: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi + +sizeafter: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi + + +# Display compiler version information. +gccversion : + @$(CC) --version + + +# Program the device. +program: $(TARGET).hex + @echo + @echo $(MSG_LPC21_RESETREMINDER) + $(LPC21ISP) $(LPC21ISP_CONTROL) $(LPC21ISP_DEBUG) $(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL) + + +# Create final output files (.hex, .eep) from ELF output file. +# TODO: handling the .eeprom-section should be redundant +%.hex: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O $(FORMAT) $< $@ + + +# Create extended listing file from ELF output file. +# testing: option -C +%.lss: %.elf + @echo + @echo $(MSG_EXTENDED_LISTING) $@ + $(OBJDUMP) -h -S -C $< > $@ + + +# Create a symbol table from ELF output file. +%.sym: %.elf + @echo + @echo $(MSG_SYMBOL_TABLE) $@ + $(NM) -n $< > $@ + + +# Link: create ELF output file from object files. +.SECONDARY : $(TARGET).elf +.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) +%.elf: $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) + @echo + @echo $(MSG_LINKING) $@ + $(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) +# $(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) + +# Compile: create object files from C source files. ARM/Thumb +$(COBJ) : %.o : %.c + @echo + @echo $(MSG_COMPILING) $< + $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C source files. ARM-only +$(COBJARM) : %.o : %.c + @echo + @echo $(MSG_COMPILING_ARM) $< + $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM/Thumb +$(CPPOBJ) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP) $< + $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM-only +$(CPPOBJARM) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP_ARM) $< + $(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + + +# Compile: create assembler files from C source files. ARM/Thumb +## does not work - TODO - hints welcome +##$(COBJ) : %.s : %.c +## $(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM/Thumb +$(AOBJ) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING) $< + $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM-only +$(AOBJARM) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING_ARM) $< + $(CC) -c $(ALL_ASFLAGS) $< -o $@ + + +# Target: clean project. +clean: begin clean_list finished end + + +clean_list : + @echo + @echo $(MSG_CLEANING) + $(REMOVE) $(TARGET).hex + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).elf + $(REMOVE) $(TARGET).map + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).a90 + $(REMOVE) $(TARGET).sym + $(REMOVE) $(TARGET).lnk + $(REMOVE) $(TARGET).lss + $(REMOVE) a.out + $(REMOVE) storm_program.txt + $(REMOVE) storm_program.bin + $(REMOVE) $(COBJ) + $(REMOVE) $(CPPOBJ) + $(REMOVE) $(AOBJ) + $(REMOVE) $(COBJARM) + $(REMOVE) $(CPPOBJARM) + $(REMOVE) $(AOBJARM) + $(REMOVE) $(LST) + $(REMOVE) $(SRC:.c=.s) + $(REMOVE) $(SRC:.c=.d) + $(REMOVE) $(SRCARM:.c=.s) + $(REMOVE) $(SRCARM:.c=.d) + $(REMOVE) $(CPPSRC:.cpp=.s) + $(REMOVE) $(CPPSRC:.cpp=.d) + $(REMOVE) $(CPPSRCARM:.cpp=.s) + $(REMOVE) $(CPPSRCARM:.cpp=.d) + $(REMOVE) .dep/* + + +# Include the dependency files. +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + + +# Listing of phony targets. +.PHONY : all begin finish end sizebefore sizeafter gccversion \ +build elf hex lss sym clean clean_list program +

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