OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /t400/trunk/sw/verif/int/sequence
    from Rev 100 to Rev 176
    Reverse comparison

Rev 100 → Rev 176

/int --- test.asm (nonexistent) +++ test.asm (revision 176) @@ -0,0 +1,58 @@ + ;; ******************************************************************* + ;; $Id: test.asm,v 1.1 2006-06-05 02:12:19 arniml Exp $ + ;; + ;; Checks interrupt on a sequence of "transfer of control" + ;; instructions. + ;; + + ;; the cpu type is defined on asl's command line + + include "int_macros.inc" + + org 0x00 + clra + + int_flag_clear + lei 0x02 + jp int_mark + + org 0x030 +int_mark: + nop + nop +int_instr: + jmp + ++ jp + ++ jsrp jsrp_target + jsr jsrp_target + lqid + nop +ret_instr: + jmp + + org 0x040 ++ int_flag_check + jmp pass + + + org 0x080 +jsrp_target: + ret + + + + ;; ******************************************************************* + ;; Interrupt routine + ;; + org 0x0fd + jmp fail +int_routine: + nop + save_a_m_c + int_flag_set + check_sa ret_instr + restore_c_m_a + ret + + + org 0x200 + include "int_pass_fail.asm"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.