URL
https://opencores.org/ocsvn/t48/t48/trunk
Subversion Repositories t48
Compare Revisions
- This comparison shows the changes necessary to convert path
/t48/tags/rel_0_3_beta/sim
- from Rev 253 to Rev 292
- ↔ Reverse comparison
Rev 253 → Rev 292
/rtl_sim/Makefile.ghdl
0,0 → 1,142
############################################################################## |
# |
# Tool-specific Makefile for the GHDL compiler. |
# |
# It sets all variables needed for VHDL code compilation with Makefile.hier. |
# |
# |
# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org) |
# |
# All rights reserved |
# |
############################################################################## |
|
# Generate diagnosis files for line coverage |
#GCOV = -Wc,-ftest-coverage -Wc,-fprofile-arcs |
GCOV = |
|
# In case elaborating/linking throws error messages about undefined references |
#GCOV_LINK = -Wl,-lgcov |
GCOV_LINK = |
|
LIB_WORK = ghdl-work |
|
CLEAN = ghdl --clean --std=87 --workdir=$(LIB_WORK); \ |
rm -f tb_*_c0 *.gcno *.gcda *.gcov UNUSED |
|
ANALYZE = ghdl -a --std=87 --workdir=$(LIB_WORK) $(GCOV) |
|
ELABORATE = ghdl -e --std=87 --workdir=$(LIB_WORK) $(GCOV_LINK) |
|
MAKE_LIB = mkdir -p $(LIB_WORK) |
|
|
############################################################################## |
# The analyze targets |
# |
tb_t8039_behav_c0 = $(LIB_WORK)/tb_t8039-c.o |
tb_t8039 = $(LIB_WORK)/tb_t8039.o |
tb_t8048_behav_c0 = $(LIB_WORK)/tb_t8048-c.o |
tb_t8048 = $(LIB_WORK)/tb_t8048.o |
tb_behav_c0 = $(LIB_WORK)/tb-c.o |
tb = $(LIB_WORK)/tb.o |
if_timing_behav_c0 = $(LIB_WORK)/if_timing-c.o |
if_timing = $(LIB_WORK)/if_timing.o |
t8048_struct_c0 = $(LIB_WORK)/t8048-c.o |
t8048 = $(LIB_WORK)/t8048.o |
t8039_struct_c0 = $(LIB_WORK)/t8039-c.o |
t8039 = $(LIB_WORK)/t8039.o |
t48_tb_pack = $(LIB_WORK)/t48_tb_pack-p.o |
t48_pack = $(LIB_WORK)/t48_pack-p.o |
t48_core_struct_c0 = $(LIB_WORK)/t48_core-c.o |
t48_core = $(LIB_WORK)/t48_core.o |
t48_core_comp_pack = $(LIB_WORK)/t48_core_comp_pack-p.o |
t48_comp_pack = $(LIB_WORK)/t48_comp_pack-p.o |
syn_rom = $(LIB_WORK)/syn_rom-e.o |
syn_rom-lpm-a = $(LIB_WORK)/syn_rom-lpm-a.o |
syn_rom_lpm_c0 = $(LIB_WORK)/syn_rom-lpm-c.o |
lpm_rom = $(LIB_WORK)/lpm_rom.o |
syn_ram = $(LIB_WORK)/syn_ram-e.o |
syn_ram-lpm-a = $(LIB_WORK)/syn_ram-lpm-a.o |
syn_ram_lpm_c0 = $(LIB_WORK)/syn_ram-lpm-c.o |
lpm_ram_dq = $(LIB_WORK)/lpm_ram_dq.o |
psw_rtl_c0 = $(LIB_WORK)/psw-c.o |
psw = $(LIB_WORK)/psw.o |
pmem_ctrl_rtl_c0 = $(LIB_WORK)/pmem_ctrl-c.o |
pmem_ctrl_pack = $(LIB_WORK)/pmem_ctrl_pack-p.o |
pmem_ctrl = $(LIB_WORK)/pmem_ctrl.o |
p2_rtl_c0 = $(LIB_WORK)/p2-c.o |
p2 = $(LIB_WORK)/p2.o |
p1_rtl_c0 = $(LIB_WORK)/p1-c.o |
p1 = $(LIB_WORK)/p1.o |
timer_rtl_c0 = $(LIB_WORK)/timer-c.o |
timer = $(LIB_WORK)/timer.o |
opc_table_rtl_c0 = $(LIB_WORK)/opc_table-c.o |
opc_table = $(LIB_WORK)/opc_table.o |
opc_decoder_rtl_c0 = $(LIB_WORK)/opc_decoder-c.o |
opc_decoder = $(LIB_WORK)/opc_decoder.o |
int_rtl_c0 = $(LIB_WORK)/int-c.o |
int = $(LIB_WORK)/int.o |
dmem_ctrl_rtl_c0 = $(LIB_WORK)/dmem_ctrl-c.o |
dmem_ctrl_pack = $(LIB_WORK)/dmem_ctrl_pack-p.o |
dmem_ctrl = $(LIB_WORK)/dmem_ctrl.o |
decoder_rtl_c0 = $(LIB_WORK)/decoder-c.o |
decoder_pack = $(LIB_WORK)/decoder_pack-p.o |
decoder = $(LIB_WORK)/decoder.o |
db_bus_rtl_c0 = $(LIB_WORK)/db_bus-c.o |
db_bus = $(LIB_WORK)/db_bus.o |
cond_branch_rtl_c0 = $(LIB_WORK)/cond_branch-c.o |
cond_branch_pack = $(LIB_WORK)/cond_branch_pack-p.o |
cond_branch = $(LIB_WORK)/cond_branch.o |
clock_ctrl_rtl_c0 = $(LIB_WORK)/clock_ctrl-c.o |
clock_ctrl = $(LIB_WORK)/clock_ctrl.o |
bus_mux_rtl_c0 = $(LIB_WORK)/bus_mux-c.o |
bus_mux = $(LIB_WORK)/bus_mux.o |
alu_rtl_c0 = $(LIB_WORK)/alu-c.o |
alu_pack = $(LIB_WORK)/alu_pack-p.o |
alu = $(LIB_WORK)/alu.o |
# |
############################################################################## |
|
|
############################################################################## |
# The default target for elaboration |
# |
.PHONY: all |
all: elaborate |
# |
############################################################################## |
|
|
############################################################################## |
# The elaboration targets |
# |
tb_elab = tb_behav_c0 |
tb_t8048_elab = tb_t8048_behav_c0 |
tb_t8039_elab = tb_t8039_behav_c0 |
# |
############################################################################## |
|
|
############################################################################## |
# Tool-specific elaboration rules |
# |
$(tb_elab) : $(tb_behav_c0) |
$(ELABORATE) tb_behav_c0; \ |
strip tb_behav_c0 |
|
$(tb_t8048_elab) : $(tb_t8048_behav_c0) |
$(ELABORATE) tb_t8048_behav_c0; \ |
strip tb_t8048_behav_c0 |
|
$(tb_t8039_elab) : $(tb_t8039_behav_c0) |
$(ELABORATE) tb_t8039_behav_c0; \ |
strip tb_t8039_behav_c0 |
|
.PHONY: elaborate |
elaborate: $(LIB_WORK) $(tb_elab) $(tb_t8048_elab) $(tb_t8039_elab) |
# |
############################################################################## |
|
|
include Makefile.hier |
/rtl_sim/Makefile.hier
0,0 → 1,363
############################################################################## |
# |
# Core Makefile for the T48 project. |
# |
# The dependencies for all VHDL source files are stored here. |
# Include this file from within the tool-specific Makefile. See |
# Makefile.ghdl for an example how to use it. |
# |
# The following environment/make variables are expected. Set them in the |
# tool-specific Makefile or from the shell. |
# |
# PROJECT_DIR : Project base directory |
# Set in sw/init_project.sh |
# |
# LIB_WORK : object directory for the work library |
# <local path>/t48/sim/rtl_sim/<tool-object dir> |
# |
# MAKE_LIB : command to create the work library |
# |
# ANALYZE : command calling the tool-specific compiler for analysis of |
# the VHDL code |
# |
# CLEAN : command to clean the tool-object directory |
# |
# Various VHDL design units. |
# |
# |
# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org) |
# |
# All rights reserved |
# |
############################################################################## |
|
RTL_DIR = $(PROJECT_DIR)/rtl/vhdl |
BENCH_DIR = $(PROJECT_DIR)/bench/vhdl |
|
|
$(LIB_WORK): |
$(MAKE_LIB) |
|
.PHONY: clean |
clean: |
$(CLEAN); \ |
rm -rf *~ |
|
.PHONY: analyze |
analyze: $(LIB_WORK) $(tb_behav_c0) $(tb_t8048_behav_c0) |
|
|
$(alu) : $(RTL_DIR)/alu.vhd \ |
$(alu_pack) \ |
$(t48_pack) \ |
$(t48_tb_pack) |
$(ANALYZE) $(RTL_DIR)/alu.vhd |
|
$(alu_pack) : $(RTL_DIR)/alu_pack-p.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/alu_pack-p.vhd |
|
$(alu_rtl_c0) : $(RTL_DIR)/alu-c.vhd \ |
$(alu) |
$(ANALYZE) $(RTL_DIR)/alu-c.vhd |
|
$(bus_mux) : $(RTL_DIR)/bus_mux.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/bus_mux.vhd |
|
$(bus_mux_rtl_c0) : $(RTL_DIR)/bus_mux-c.vhd \ |
$(bus_mux-rtl) \ |
$(bus_mux) |
$(ANALYZE) $(RTL_DIR)/bus_mux-c.vhd |
|
$(clock_ctrl) : $(RTL_DIR)/clock_ctrl.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/clock_ctrl.vhd |
|
$(clock_ctrl_rtl_c0) : $(RTL_DIR)/clock_ctrl-c.vhd \ |
$(clock_ctrl) |
$(ANALYZE) $(RTL_DIR)/clock_ctrl-c.vhd |
|
$(cond_branch) : $(RTL_DIR)/cond_branch.vhd \ |
$(cond_branch_pack) \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/cond_branch.vhd |
|
$(cond_branch_pack) : $(RTL_DIR)/cond_branch_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/cond_branch_pack-p.vhd |
|
$(cond_branch_rtl_c0) : $(RTL_DIR)/cond_branch-c.vhd \ |
$(cond_branch) |
$(ANALYZE) $(RTL_DIR)/cond_branch-c.vhd |
|
$(db_bus) : $(RTL_DIR)/db_bus.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/db_bus.vhd |
|
$(db_bus_rtl_c0) : $(RTL_DIR)/db_bus-c.vhd \ |
$(db_bus) |
$(ANALYZE) $(RTL_DIR)/db_bus-c.vhd |
|
$(decoder) : $(RTL_DIR)/decoder.vhd \ |
$(pmem_ctrl_pack) \ |
$(dmem_ctrl_pack) \ |
$(cond_branch_pack) \ |
$(alu_pack) \ |
$(t48_pack) \ |
$(t48_comp_pack) \ |
$(t48_tb_pack) \ |
$(decoder_pack) |
$(ANALYZE) $(RTL_DIR)/decoder.vhd |
|
$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/decoder_pack-p.vhd |
|
$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \ |
$(opc_decoder_rtl_c0) \ |
$(int_rtl_c0) \ |
$(decoder) |
$(ANALYZE) $(RTL_DIR)/decoder-c.vhd |
|
$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \ |
$(dmem_ctrl_pack) \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/dmem_ctrl.vhd |
|
$(dmem_ctrl_pack) : $(RTL_DIR)/dmem_ctrl_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/dmem_ctrl_pack-p.vhd |
|
$(dmem_ctrl_rtl_c0) : $(RTL_DIR)/dmem_ctrl-c.vhd \ |
$(dmem_ctrl) |
$(ANALYZE) $(RTL_DIR)/dmem_ctrl-c.vhd |
|
$(int) : $(RTL_DIR)/int.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/int.vhd |
|
$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \ |
$(int) |
$(ANALYZE) $(RTL_DIR)/int-c.vhd |
|
$(lpm_ram_dq) : $(RTL_DIR)/system/lpm_ram_dq.vhd |
$(ANALYZE) $(RTL_DIR)/system/lpm_ram_dq.vhd |
|
$(lpm_rom) : $(RTL_DIR)/system/lpm_rom.vhd |
$(ANALYZE) $(RTL_DIR)/system/lpm_rom.vhd |
|
$(opc_decoder) : $(RTL_DIR)/opc_decoder.vhd \ |
$(decoder_pack) \ |
$(t48_pack) \ |
$(pmem_ctrl_pack) \ |
$(dmem_ctrl_pack) \ |
$(cond_branch_pack) \ |
$(alu_pack) \ |
$(t48_comp_pack) |
$(ANALYZE) $(RTL_DIR)/opc_decoder.vhd |
|
$(opc_decoder_rtl_c0) : $(RTL_DIR)/opc_decoder-c.vhd \ |
$(opc_table_rtl_c0) \ |
$(opc_decoder) |
$(ANALYZE) $(RTL_DIR)/opc_decoder-c.vhd |
|
$(opc_table) : $(RTL_DIR)/opc_table.vhd \ |
$(decoder_pack) \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/opc_table.vhd |
|
$(opc_table_rtl_c0) : $(RTL_DIR)/opc_table-c.vhd \ |
$(opc_table) |
$(ANALYZE) $(RTL_DIR)/opc_table-c.vhd |
|
$(p1) : $(RTL_DIR)/p1.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/p1.vhd |
|
$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \ |
$(p1) |
$(ANALYZE) $(RTL_DIR)/p1-c.vhd |
|
$(p2) : $(RTL_DIR)/p2.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/p2.vhd |
|
$(p2_rtl_c0) : $(RTL_DIR)/p2-c.vhd \ |
$(p2) |
$(ANALYZE) $(RTL_DIR)/p2-c.vhd |
|
$(pmem_ctrl) : $(RTL_DIR)/pmem_ctrl.vhd \ |
$(pmem_ctrl_pack) \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/pmem_ctrl.vhd |
|
$(pmem_ctrl_pack) : $(RTL_DIR)/pmem_ctrl_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/pmem_ctrl_pack-p.vhd |
|
$(pmem_ctrl_rtl_c0) : $(RTL_DIR)/pmem_ctrl-c.vhd \ |
$(pmem_ctrl) |
$(ANALYZE) $(RTL_DIR)/pmem_ctrl-c.vhd |
|
$(psw) : $(RTL_DIR)/psw.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/psw.vhd |
|
$(psw_rtl_c0) : $(RTL_DIR)/psw-c.vhd \ |
$(psw) |
$(ANALYZE) $(RTL_DIR)/psw-c.vhd |
|
$(syn_ram) : $(RTL_DIR)/system/syn_ram-e.vhd |
$(ANALYZE) $(RTL_DIR)/system/syn_ram-e.vhd |
|
$(syn_ram-lpm-a) : $(RTL_DIR)/system/syn_ram-lpm-a.vhd \ |
$(syn_ram) |
$(ANALYZE) $(RTL_DIR)/system/syn_ram-lpm-a.vhd |
|
$(syn_ram_lpm_c0) : $(RTL_DIR)/system/syn_ram-lpm-c.vhd \ |
$(lpm_ram_dq) \ |
$(syn_ram-lpm-a) |
$(ANALYZE) $(RTL_DIR)/system/syn_ram-lpm-c.vhd |
|
$(syn_rom) : $(RTL_DIR)/system/syn_rom-e.vhd |
$(ANALYZE) $(RTL_DIR)/system/syn_rom-e.vhd |
|
$(syn_rom-lpm-a) : $(RTL_DIR)/system/syn_rom-lpm-a.vhd \ |
$(syn_rom) |
$(ANALYZE) $(RTL_DIR)/system/syn_rom-lpm-a.vhd |
|
$(syn_rom_lpm_c0) : $(RTL_DIR)/system/syn_rom-lpm-c.vhd \ |
$(lpm_rom) \ |
$(syn_rom-lpm-a) |
$(ANALYZE) $(RTL_DIR)/system/syn_rom-lpm-c.vhd |
|
$(t48_comp_pack) : $(RTL_DIR)/t48_comp_pack-p.vhd \ |
$(pmem_ctrl_pack) \ |
$(dmem_ctrl_pack) \ |
$(decoder_pack) \ |
$(cond_branch_pack) \ |
$(t48_pack) \ |
$(alu_pack) |
$(ANALYZE) $(RTL_DIR)/t48_comp_pack-p.vhd |
|
$(t48_core) : $(RTL_DIR)/t48_core.vhd \ |
$(decoder_pack) \ |
$(t48_comp_pack) \ |
$(pmem_ctrl_pack) \ |
$(dmem_ctrl_pack) \ |
$(cond_branch_pack) \ |
$(t48_pack) \ |
$(alu_pack) |
$(ANALYZE) $(RTL_DIR)/t48_core.vhd |
|
$(t48_core_comp_pack) : $(RTL_DIR)/t48_core_comp_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/t48_core_comp_pack-p.vhd |
|
$(t48_core_struct_c0) : $(RTL_DIR)/t48_core-c.vhd \ |
$(psw_rtl_c0) \ |
$(pmem_ctrl_rtl_c0) \ |
$(p2_rtl_c0) \ |
$(p1_rtl_c0) \ |
$(timer_rtl_c0) \ |
$(dmem_ctrl_rtl_c0) \ |
$(decoder_rtl_c0) \ |
$(db_bus_rtl_c0) \ |
$(cond_branch_rtl_c0) \ |
$(clock_ctrl_rtl_c0) \ |
$(bus_mux_rtl_c0) \ |
$(alu_rtl_c0) \ |
$(decoder_pack) \ |
$(t48_comp_pack) \ |
$(pmem_ctrl_pack) \ |
$(dmem_ctrl_pack) \ |
$(cond_branch_pack) \ |
$(t48_pack) \ |
$(alu_pack) \ |
$(t48_core-struct) \ |
$(t48_core) |
$(ANALYZE) $(RTL_DIR)/t48_core-c.vhd |
|
$(t48_pack) : $(RTL_DIR)/t48_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/t48_pack-p.vhd |
|
$(t48_tb_pack) : $(RTL_DIR)/t48_tb_pack-p.vhd |
$(ANALYZE) $(RTL_DIR)/t48_tb_pack-p.vhd |
|
$(t8048) : $(RTL_DIR)/system/t8048.vhd \ |
$(t48_core_comp_pack) |
$(ANALYZE) $(RTL_DIR)/system/t8048.vhd |
|
$(t8048_struct_c0) : $(RTL_DIR)/system/t8048-c.vhd \ |
$(t48_core_struct_c0) \ |
$(syn_ram_lpm_c0) \ |
$(syn_rom_lpm_c0) \ |
$(t48_core_comp_pack) \ |
$(t8048) |
$(ANALYZE) $(RTL_DIR)/system/t8048-c.vhd |
|
$(t8039) : $(RTL_DIR)/system/t8039.vhd \ |
$(t48_core_comp_pack) |
$(ANALYZE) $(RTL_DIR)/system/t8039.vhd |
|
$(t8039_struct_c0) : $(RTL_DIR)/system/t8039-c.vhd \ |
$(t48_core_struct_c0) \ |
$(syn_ram_lpm_c0) \ |
$(t48_core_comp_pack) \ |
$(t8039) |
$(ANALYZE) $(RTL_DIR)/system/t8039-c.vhd |
|
$(if_timing) : $(BENCH_DIR)/if_timing.vhd |
$(ANALYZE) $(BENCH_DIR)/if_timing.vhd |
|
$(if_timing_behav_c0) : $(BENCH_DIR)/if_timing-c.vhd \ |
$(if_timing) |
$(ANALYZE) $(BENCH_DIR)/if_timing-c.vhd |
|
$(tb) : $(BENCH_DIR)/tb.vhd \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) |
$(ANALYZE) $(BENCH_DIR)/tb.vhd |
|
$(tb_behav_c0) : $(BENCH_DIR)/tb-c.vhd \ |
$(if_timing_behav_c0) \ |
$(t48_core_struct_c0) \ |
$(syn_ram_lpm_c0) \ |
$(lpm_rom) \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) \ |
$(tb-behav) \ |
$(tb) |
$(ANALYZE) $(BENCH_DIR)/tb-c.vhd |
|
$(tb_t8039) : $(BENCH_DIR)/tb_t8039.vhd \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) |
$(ANALYZE) $(BENCH_DIR)/tb_t8039.vhd |
|
$(tb_t8039_behav_c0) : $(BENCH_DIR)/tb_t8039-c.vhd \ |
$(t8039_struct_c0) \ |
$(syn_ram_lpm_c0) \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) \ |
$(tb_t8039) |
$(ANALYZE) $(BENCH_DIR)/tb_t8039-c.vhd |
|
$(tb_t8048) : $(BENCH_DIR)/tb_t8048.vhd \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) |
$(ANALYZE) $(BENCH_DIR)/tb_t8048.vhd |
|
$(tb_t8048_behav_c0) : $(BENCH_DIR)/tb_t8048-c.vhd \ |
$(t8048_struct_c0) \ |
$(syn_ram_lpm_c0) \ |
$(t48_tb_pack) \ |
$(t48_core_comp_pack) \ |
$(tb_t8048) |
$(ANALYZE) $(BENCH_DIR)/tb_t8048-c.vhd |
|
$(timer) : $(RTL_DIR)/timer.vhd \ |
$(t48_pack) |
$(ANALYZE) $(RTL_DIR)/timer.vhd |
|
$(timer_rtl_c0) : $(RTL_DIR)/timer-c.vhd \ |
$(timer-rtl) \ |
$(t48_pack) \ |
$(timer) |
$(ANALYZE) $(RTL_DIR)/timer-c.vhd |
/rtl_sim/Makefile.simili
0,0 → 1,94
############################################################################## |
# |
# Tool-specific Makefile for the Simili compiler. |
# |
# It sets all variables needed for VHDL code compilation with Makefile.hier. |
# |
# |
# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org) |
# |
# All rights reserved |
# |
############################################################################## |
|
|
LIB_WORK=work.sym |
|
CLEAN=rm -rf $(LIB_WORK); mkdir $(LIB_WORK) |
|
ANALYZE=vhdlp -87 -s |
|
ELABORATE= |
|
############################################################################## |
# The analyze targets |
# |
tb_t8039_behav_c0 = $(LIB_WORK)/tb_t8039_behav_c0/prim.dep |
tb_t8039 = $(LIB_WORK)/tb_t8039/_behav.dep |
tb_t8048_behav_c0 = $(LIB_WORK)/tb_t8048_behav_c0/prim.dep |
tb_t8048 = $(LIB_WORK)/tb_t8048/_behav.dep |
tb_behav_c0 = $(LIB_WORK)/tb_behav_c0/prim.dep |
tb = $(LIB_WORK)/tb/_behav.dep |
if_timing_behav_c0 = $(LIB_WORK)/if_timing_behav_c0/prim.dep |
if_timing = $(LIB_WORK)/if_timing/_behav.dep |
t8048_struct_c0 = $(LIB_WORK)/t8048_struct_c0/prim.dep |
t8048 = $(LIB_WORK)/t8048/_struct.dep |
t8039_struct_c0 = $(LIB_WORK)/t8039_struct_c0/prim.dep |
t8039 = $(LIB_WORK)/t8039/_struct.dep |
t48_tb_pack = $(LIB_WORK)/t48_tb_pack/prim.dep |
t48_pack = $(LIB_WORK)/t48_pack/prim.dep |
t48_core_struct_c0 = $(LIB_WORK)/t48_core_struct_c0/prim.dep |
t48_core = $(LIB_WORK)/t48_core/_struct.dep |
t48_core_comp_pack = $(LIB_WORK)/t48_core_comp_pack/prim.dep |
t48_comp_pack = $(LIB_WORK)/t48_comp_pack/prim.dep |
syn_rom = $(LIB_WORK)/syn_rom/prim.dep |
syn_rom-lpm-a = $(LIB_WORK)/syn_rom/_lpm.dep |
syn_rom_lpm_c0 = $(LIB_WORK)/syn_rom_lpm_c0/prim.dep |
lpm_rom = $(LIB_WORK)/lpm_rom_c0/prim.dep |
syn_ram = $(LIB_WORK)/syn_ram/prim.dep |
syn_ram-lpm-a = $(LIB_WORK)/syn_ram/_lpm.dep |
syn_ram_lpm_c0 = $(LIB_WORK)/syn_ram_lpm_c0/prim.dep |
lpm_ram_dq = $(LIB_WORK)/lpm_ram_dq_c0/prim.dep |
psw_rtl_c0 = $(LIB_WORK)/psw_rtl_c0/prim.dep |
psw = $(LIB_WORK)/psw/_rtl.dep |
pmem_ctrl_rtl_c0 = $(LIB_WORK)/pmem_ctrl_rtl_c0/prim.dep |
pmem_ctrl_pack = $(LIB_WORK)/pmem_ctrl_pack/prim.dep |
pmem_ctrl = $(LIB_WORK)/pmem_ctrl/_rtl.dep |
p2_rtl_c0 = $(LIB_WORK)/p2_rtl_c0/prim.dep |
p2 = $(LIB_WORK)/p2/_rtl.dep |
p1_rtl_c0 = $(LIB_WORK)/p1_rtl_c0/prim.dep |
p1 = $(LIB_WORK)/p1/_rtl.dep |
timer_rtl_c0 = $(LIB_WORK)/timer_rtl_c0/prim.dep |
timer = $(LIB_WORK)/timer/_rtl.dep |
opc_table_rtl_c0 = $(LIB_WORK)/opc_table_rtl_c0/prim.dep |
opc_table = $(LIB_WORK)/opc_table/_rtl.dep |
opc_decoder_rtl_c0 = $(LIB_WORK)/opc_decoder_rtl_c0/prim.dep |
opc_decoder = $(LIB_WORK)/opc_decoder/_rtl.dep |
int_rtl_c0 = $(LIB_WORK)/int_rtl_c0/prim.dep |
int = $(LIB_WORK)/int/_rtl.dep |
dmem_ctrl_rtl_c0 = $(LIB_WORK)/dmem_ctrl_rtl_c0/prim.dep |
dmem_ctrl_pack = $(LIB_WORK)/dmem_ctrl_pack/prim.dep |
dmem_ctrl = $(LIB_WORK)/dmem_ctrl/_rtl.dep |
decoder_rtl_c0 = $(LIB_WORK)/decoder_rtl_c0/prim.dep |
decoder_pack = $(LIB_WORK)/decoder_pack/prim.dep |
decoder = $(LIB_WORK)/decoder/_rtl.dep |
db_bus_rtl_c0 = $(LIB_WORK)/db_bus_rtl_c0/prim.dep |
db_bus = $(LIB_WORK)/db_bus/_rtl.dep |
cond_branch_rtl_c0 = $(LIB_WORK)/cond_branch_rtl_c0/prim.dep |
cond_branch_pack = $(LIB_WORK)/cond_branch_pack/prim.dep |
cond_branch = $(LIB_WORK)/cond_branch/_rtl.dep |
clock_ctrl_rtl_c0 = $(LIB_WORK)/clock_ctrl_rtl_c0/prim.dep |
clock_ctrl = $(LIB_WORK)/clock_ctrl/_rtl.dep |
bus_mux_rtl_c0 = $(LIB_WORK)/bus_mux_rtl_c0/prim.dep |
bus_mux = $(LIB_WORK)/bus_mux/_rtl.dep |
alu_rtl_c0 = $(LIB_WORK)/alu_rtl_c0/prim.dep |
alu_pack = $(LIB_WORK)/alu_pack/prim.dep |
alu = $(LIB_WORK)/alu/_rtl.dep |
# |
############################################################################## |
|
|
.PHONY: all |
all: $(tb_behav_c0) $(tb_t8039_behav_c0) $(tb_t8048_behav_c0) |
|
include Makefile.hier |