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  • This comparison shows the changes necessary to convert path
    /t48/tags/rel_1_1/sw/verif/black_box/orl
    from Rev 289 to Rev 292
    Reverse comparison

Rev 289 → Rev 292

/bus/no_dump_compare
0,0 → 1,2
Reason why this cell is exluded from dump compare:
External ports not modelled in detail in i8039 emulator.
/bus/test.asm
0,0 → 1,29
;; *******************************************************************
;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:18 arniml Exp $
;;
;; Test ORL BUS, data.
;; *******************************************************************
 
INCLUDE "cpu.inc"
INCLUDE "pass_fail.inc"
 
ORG 0
 
;; Start of test
mov a, #000H
outl bus, a
 
cpl a
ins a, bus
jnz fail
 
orl bus, #0AAH
jnz fail
 
ins a, bus
add a, #056H
jnz fail
 
pass: PASS
 
fail: FAIL
/pp/test.asm
0,0 → 1,40
;; *******************************************************************
;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:18 arniml Exp $
;;
;; Test ORL Pp, data.
;; *******************************************************************
 
INCLUDE "cpu.inc"
INCLUDE "pass_fail.inc"
 
ORG 0
 
;; Start of test
mov a, #000H
outl p1, a
outl p2, a
 
cpl a
in a, p1
jnz fail
 
cpl a
in a, p2
jnz fail
 
orl P1, #0AAH
jnz fail
orl P2, #055H
jnz fail
 
in a, p1
add a, #056H
jnz fail
 
in a, p2
add a, #0ABH
jnz fail
 
pass: PASS
 
fail: FAIL
/rr/test.asm
0,0 → 1,149
;; *******************************************************************
;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:18 arniml Exp $
;;
;; Test ORL A, Rr with RB0 and RB1.
;; *******************************************************************
 
INCLUDE "cpu.inc"
INCLUDE "pass_fail.inc"
 
ORG 0
 
;; Start of test
 
;; fill RB0
call fill
 
;; check RB0
call check
 
;; fill RB1
sel rb1
call fill
sel rb0
 
;; clear RB0
call clr_rb0
 
;; check RB1
sel rb1
call check
 
;; check RB0 for all 0
mov r0, #000H
mov r1, #008H
chk0_loop:
mov a, @r0
jnz fail
inc r0
djnz r1, chk0_loop
 
pass: PASS
 
fail: FAIL
 
 
ORG 0300H
 
fill: mov a, #0FEH
mov r0, a
mov a, #0FDH
mov r1, a
mov a, #0FBH
mov r2, a
mov a, #0F7H
mov r3, a
mov a, #0EFH
mov r4, a
mov a, #0DFH
mov r5, a
mov a, #0BFH
mov r6, a
mov a, #07FH
mov r7, a
ret
 
clr_rb0:
mov r0, #007H
clr a
clr_loop:
mov @r0, a
djnz r0, clr_loop
ret
 
check: mov a, #(1 << 0)
orl a, r0
cpl a
jnz fail_p3
clr a
orl a, r0
add a, #(~(0FFH - (1 << 0)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 1)
orl a, r1
cpl a
jnz fail_p3
clr a
orl a, r1
add a, #(~(0FFH - (1 << 1)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 2)
orl a, r2
cpl a
jnz fail_p3
clr a
orl a, r2
add a, #(~(0FFH - (1 << 2)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 3)
orl a, r3
cpl a
jnz fail_p3
clr a
orl a, r3
add a, #(~(0FFH - (1 << 3)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 4)
orl a, r4
cpl a
jnz fail_p3
clr a
orl a, r4
add a, #(~(0FFH - (1 << 4)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 5)
orl a, r5
cpl a
jnz fail_p3
clr a
orl a, r5
add a, #(~(0FFH - (1 << 5)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 6)
orl a, r6
cpl a
jnz fail_p3
clr a
orl a, r6
add a, #(~(0FFH - (1 << 6)) + 1) & 0FFH
jnz fail_p3
 
mov a, #(1 << 7)
orl a, r7
cpl a
jnz fail_p3
clr a
orl a, r7
add a, #(~(0FFH - (1 << 7)) + 1) & 0FFH
jnz fail_p3
 
ret
 
fail_p3:
FAIL
/a_data/test.asm
0,0 → 1,32
;; *******************************************************************
;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:18 arniml Exp $
;;
;; Test ORL A, data.
;; *******************************************************************
 
INCLUDE "cpu.inc"
INCLUDE "pass_fail.inc"
 
ORG 0
 
;; Start of test
clr a
orl a, #0FFH
jz fail
orl a, #0FFH
jz fail
 
clr a
orl a, #055H
add a, #0ABH
jnz fail
 
clr a
orl a, #023H
orl a, #088H
add a, #055H
jnz fail
 
pass: PASS
 
fail: FAIL
/ind_rr/test.asm
0,0 → 1,92
;; *******************************************************************
;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:18 arniml Exp $
;;
;; Test ORL A, @ Rr.
;; *******************************************************************
 
INCLUDE "cpu.inc"
INCLUDE "pass_fail.inc"
 
testR0R1 MACRO pos
inc r0
inc r1
mov a, #(1 << pos)
orl a, @r0
cpl a
jnz fail
clr a
orl a, @r0
add a, #(~(0FFH - (1 << pos)) + 1) & 0FFH
jnz fail
mov a, #(1 << pos)
orl a, @r1
cpl a
jnz fail
clr a
orl a, @r1
add a, #(~(0FFH - (1 << pos)) + 1) & 0FFH
jnz fail
ENDM
 
ORG 0
 
;; Start of test
mov r0, #010H
mov r1, #020H
mov a, #0FEH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0FDH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0FBH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0F7H
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0EFH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0DFH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #0BFH
mov @r0, a
mov @r1, a
inc r0
inc r1
mov a, #07FH
mov @r0, a
mov @r1, a
 
jmp goon
 
ORG 256
;;
goon: mov r0, #00FH
mov r1, #01FH
testR0R1 0
testR0R1 1
testR0R1 2
testR0R1 3
testR0R1 4
testR0R1 5
testR0R1 6
testR0R1 7
 
pass: PASS
 
fail: FAIL

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