URL
https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
Subversion Repositories t6507lp
Compare Revisions
- This comparison shows the changes necessary to convert path
/t6507lp/trunk/rtl/verilog
- from Rev 108 to Rev 109
- ↔ Reverse comparison
Rev 108 → Rev 109
/t6507lp_fsm_tb.v
186,8 → 186,9
// 341 is skipped due to RTS internal functionality |
fake_mem[342] = PHA_IMP; |
fake_mem[343] = PHP_IMP; |
fake_mem[344] = PLA_IMP; |
fake_mem[345] = PLP_IMP; |
|
|
|
fake_mem[8190] = 8'h53; // this is the reset vector |
fake_mem[8191] = 8'h01; |
/t6507lp_fsm.v
96,6 → 96,7
localparam PULL_PCH = 5'b11000; |
localparam INCREMENT_PC = 5'b11001; |
localparam PUSH_REGISTER = 5'b11010; |
localparam PULL_REGISTER = 5'b11011; |
|
localparam RESET = 5'b11111; |
|
140,7 → 141,9
reg rti; |
reg rts; |
reg pha; |
reg php; |
reg php; |
reg pla; |
reg plp; |
|
wire [ADDR_SIZE_:0] next_pc; |
assign next_pc = pc + 13'b0000000000001; |
293,6 → 296,11
data_out <= (pha) ? alu_result : alu_status; |
control <= MEM_WRITE; |
end |
else if (pla || plp) begin |
pc <= pc; |
address <= sp; |
control <= MEM_READ; |
end |
end |
end |
FETCH_HIGH_CALC_INDEX: begin |
533,7 → 541,13
address <= pc; |
sp <= sp_minus_one; |
control <= MEM_READ; |
temp_data <= data_in; |
end |
PULL_REGISTER: begin |
pc <= pc; |
address <= pc; |
temp_data <= data_in; |
end |
default: begin |
$write("unknown state"); // TODO: check if synth really ignores this 2 lines. Otherwise wrap it with a `ifdef |
$finish(0); |
628,6 → 642,9
else if (php) begin |
next_state = PUSH_REGISTER; |
end |
else if (pla || plp) begin |
next_state = INCREMENT_SP; |
end |
end |
end |
READ_FROM_POINTER: begin |
767,7 → 784,10
INCREMENT_SP: begin |
if (rti) begin |
next_state = PULL_STATUS; |
end |
end |
else if (pla || plp) begin |
next_state = PULL_REGISTER; |
end |
else begin // rts |
next_state = PULL_PCL; |
end |
795,6 → 815,9
PUSH_REGISTER: begin |
next_state = FETCH_OP; |
end |
PULL_REGISTER: begin |
next_state = FETCH_OP_CALC_PARAM; |
end |
default: begin |
next_state = RESET; |
end |
828,6 → 851,8
rts = 1'b0; |
pha = 1'b0; |
php = 1'b0; |
pla = 1'b0; |
plp = 1'b0; |
|
case (ir) |
CLC_IMP, CLD_IMP, CLI_IMP, CLV_IMP, DEX_IMP, DEY_IMP, INX_IMP, INY_IMP, NOP_IMP, |
984,6 → 1009,12
PHP_IMP: begin |
php = 1'b1; |
end |
PLA_IMP: begin |
pla = 1'b1; |
end |
PLP_IMP: begin |
plp = 1'b1; |
end |
default: begin |
$write("state : %b", state); |
if (reset_n == 1 && state != FETCH_OP_FIX_PC) begin // the processor is NOT being reset neither it is fixing the pc |