URL
https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
Subversion Repositories t6507lp
Compare Revisions
- This comparison shows the changes necessary to convert path
/t6507lp/trunk/rtl/verilog
- from Rev 228 to Rev 229
- ↔ Reverse comparison
Rev 228 → Rev 229
/vga_controller.v
155,20 → 155,22
VGA_G[3] <= 0; |
VGA_B[3] <= 0; |
if (vidon == 1) begin |
if (hc < 40) begin |
if (vert_counter == 15) begin |
VGA_R[0] <= line[hc*12]; |
VGA_R[1] <= line[hc*12+1]; |
VGA_R[2] <= line[hc*12+2]; |
VGA_R[3] <= line[hc*12+3]; |
VGA_G[0] <= line[hc*12+4]; |
VGA_G[1] <= line[hc*12+5]; |
VGA_G[2] <= line[hc*12+6]; |
VGA_G[3] <= line[hc*12+7]; |
VGA_B[0] <= line[hc*12+8]; |
VGA_B[1] <= line[hc*12+9]; |
VGA_B[2] <= line[hc*12+10]; |
VGA_B[3] <= line[hc*12+11]; |
if (hc < 640) begin |
if (vc > vert_counter * 16 && vc < vert_couter*16 + 16) |
if (vert_counter == 1) begin |
VGA_R[0] <= line[hc*12]; |
VGA_R[1] <= line[hc*12+1]; |
VGA_R[2] <= line[hc*12+2]; |
VGA_R[3] <= line[hc*12+3]; |
VGA_G[0] <= line[hc*12+4]; |
VGA_G[1] <= line[hc*12+5]; |
VGA_G[2] <= line[hc*12+6]; |
VGA_G[3] <= line[hc*12+7]; |
VGA_B[0] <= line[hc*12+8]; |
VGA_B[1] <= line[hc*12+9]; |
VGA_B[2] <= line[hc*12+10]; |
VGA_B[3] <= line[hc*12+11]; |
end |
end |
end |
end |