URL
https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
Subversion Repositories t6507lp
Compare Revisions
- This comparison shows the changes necessary to convert path
/t6507lp/trunk/syn/cadence/scripts
- from Rev 249 to Rev 250
- ↔ Reverse comparison
Rev 249 → Rev 250
/regular.cmd
0,0 → 1,22
# script written by Samuel N. Pagliarini |
# Cadence Encounter(R) RTL Compiler |
|
set SVNPATH /home/nscad/samuel/Desktop/svn_atari/trunk/ |
set FILE_LIST {t6507lp.v t6507lp_alu.v t6507lp_fsm.v} |
|
set_attribute hdl_search_path $SVNPATH/rtl/verilog/ |
set_attr lib_search_path $SVNPATH/syn/cadence/libs/ |
read_hdl $FILE_LIST -v2001 |
set_attr library D_CELLS_3_3V.lib |
# use other libs later |
elaborate |
check_design -unresolved |
define_clock -period 1000000 -name 1MHz [find [ find / -design t6507lp] -port clk] |
synthesize -to_generic |
synthesize -to_mapped |
|
write_hdl t6507lp > ../results/t6507.vg |
|
#reports |
#report area |
|
/rc_script_LP.cmd
9,12 → 9,13
|
set_attribute hdl_search_path $SVNPATH/rtl/verilog/ |
set_attr lib_search_path $SVNPATH/syn/cadence/libs/ |
|
read_hdl $FILE_LIST -v2001 |
set_attr library { D_CELLS_3_3V.lib D_CELLSL_3_3V.lib} |
|
set_attribute avoid false [find / -libcell LGC*] |
set_attribute avoid false [find / -libcell LSG*] |
set_attribute avoid false [find / -libcell LSOGC*] |
#set_attribute avoid false [find / -libcell LGC*] |
#set_attribute avoid false [find / -libcell LSG*] |
#set_attribute avoid false [find / -libcell LSOGC*] |
|
set_attribute lef_library {xc06_m3_FE.lef D_CELLS.lef D_CELLSL.lef} |
set_attr cap_table_file xc06m3_typ.CapTbl |
34,5 → 35,3
synthesize -incremental -effort high |
|
write_encounter design -basename /home/nscad/samuel/Desktop/svn_atari/trunk/syn/cadence/results/t6507lp t6507lp |
|
#write_hdl t6507lp > ../results/t6507lp.vg |