URL
https://opencores.org/ocsvn/thor/thor/trunk
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- This comparison shows the changes necessary to convert path
/thor/trunk
- from Rev 43 to Rev 44
- ↔ Reverse comparison
Rev 43 → Rev 44
/FT64/software/test/TestICache.asm
0,0 → 1,113
; TestICache.asm - (C) 2017-2018 Robert Finch, Waterloo |
; |
; This file is part of FT64 |
; |
;------------------------------------------------------------------------------ |
; |
; system memory map |
; |
; |
; 00000000 +----------------+ |
; | | |
; | | |
; | | |
; | | |
; : dram memory : 512 MB |
; | | |
; | | |
; | | |
; | | |
; 20000000 +----------------+ |
; | | |
; : unused : |
; | | |
; FF400000 +----------------+ |
; | scratchpad | 32 kB |
; FF408000 +----------------+ |
; | unused | |
; FFD00000 +----------------+ |
; | | |
; : I/O area : 1.0 M |
; | | |
; FFE00000 +----------------+ |
; | | |
; : unused : |
; | | |
; FFFC0000 +----------------+ |
; | | |
; : boot rom : |
; | | |
; FFFFFFFF +----------------+ |
; |
; |
; |
; Test I-Cache |
; |
org 0xFFFC0000 |
jmp brkrout |
|
org 0xFFFC0100 |
start: |
; Seed random number generator |
ldi r6,#$FFDC0000 |
sh r0,$0C04[r6] ; select stream #0 |
ldi r1,#$88888888 |
sh r1,$0C08[r6] ; set initial m_z |
ldi r1,#$01234567 |
sh r1,$0C0C[r6] ; set initial m_w |
.st4: |
; Get a random number |
sh r0,$FFDC0C04 ; set the stream |
nop ; delay a wee bit |
lhu r1,$FFDC0C00 ; get a number |
sh r0,$FFDC0C00 ; generate next number |
|
; convert to random address |
shl r1,r1,#2 |
and r1,r1,#$3FFC |
add r1,r1,#$FF400000 ; scratchram address |
|
; Fill an area with test code |
ldi r2,#15 ; number of ops - 1 |
ldi r3,#.st2 |
.st3: |
lhu r4,[r3+r2*4] |
sh r4,[r1+r2*4] |
sub r2,r2,#1 |
bge .st3 |
|
; Jump to the test code |
jal r29,[r1] |
ldi r2,#14 |
cmp r1,r1,r2 |
bne r1,r0,.st5 |
bra .st4 |
|
; Display fail code |
.st5: |
ldi r1,#$FA |
sb r1,$FFDC0600 |
bra .st5 |
|
; Test code accumulates for 16 instructions, sum should be 14 |
|
.st2: |
ldi r1,#0 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
add r1,r1,#1 |
ret |
|
brkrout: |
rti |