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https://opencores.org/ocsvn/tinycpu/tinycpu/trunk
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- This comparison shows the changes necessary to convert path
/tinycpu/trunk/docs
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/design.md.txt
7,7 → 7,8
5. 1 instruction per clock cycle |
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Register list: |
r0-r6 general purpose registers |
r0-r5 general purpose registers |
sp stack pointer (represented as r6) |
ip instruction pointer register (represented as r7) |
cs, ds, es, ss segment registers (code segment, data segment, extra segment, stack segment) |
tr truth register for conditionals |
21,7 → 22,7
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second byte: |
first 1 bit: second portion of condition (if not immediate) (1 for only if false) |
next 1 bit: unused |
next 1 bit: use extra segment |
next 3 bits: other register |
last 3 bits: extra opcode information or third register. such as for ADD it could be target=source+third_register |
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35,6 → 36,7
2. move [reg], immediate |
3. push and move reg, immediate (or call immediate) |
4. push immediate |
5. jmp immediate |
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groups: (limited to 2 registers and no immediates. each group has 8 opcodes) |
group 1: |
42,8 → 44,11
move(load) reg,[reg] |
out reg1,reg2 (output to port reg1 value reg2) |
in reg1,reg2 (input from port reg2 and store in reg1) |
pop reg |
push reg |
move segmentreg,reg |
move reg,segmentreg |
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group 2: |
and reg1,reg2 (reg1=reg1 and reg2) |
or reg, reg |
61,17 → 66,39
is less than or equal to reg,reg |
is equal to reg,reg |
is not equal to reg,reg |
equals 0 reg |
not equals 0 reg |
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group 4: |
push segmentreg |
pop segmentreg |
push and move reg, reg (or call reg) |
exchange reg,reg |
exchange reg,seg |
clear TR |
Set TR |
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group 5: |
increment reg |
decrement reg |
far jmp reg1, reg2 (CS=reg1 and IP=reg2) |
far call reg1,reg2 |
far jmp [reg] (first byte is CS, second byte is IP) |
push extended segmentreg, reg (equivalent to push seg; push reg) |
pop extended segmentreg, reg (equivalent to pop reg; pop seg) |
reset processor (will completely reset the processor to starting state, but not RAM or anything else) |
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3 register instructions: |
1. add reg1, reg2, reg3 (reg1=reg2+reg3) |
2. sub reg1, reg2, reg3 |
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opcodes used: 12 of 16. 4 more opcodes available. Decide what to do with the room later. |
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0 -nop (doesn't do a thing) |
1 -move immediate (only uses first byte) |
2 -move |
97,3 → 124,16
move |
add |
sub |
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limitations that shouldn't be passed with instructions |
* Doing 2 memory references |
* pushing a memory reference (equates to 2 memory references) |
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Note it is possible however to read and write 16bits at one time to the memory to consecutive addresses. |
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segments: |
DS is used in all "normal" memory references |
SS is used in all push and pop instructions |
ES is used when the ExtraSegment bit is set for either push/pop or normal memory references |
CS is only used for fetching instructions |