URL
https://opencores.org/ocsvn/tinyvliw8/tinyvliw8/trunk
Subversion Repositories tinyvliw8
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- This comparison shows the changes necessary to convert path
/tinyvliw8/trunk
- from Rev 10 to Rev 9
- ↔ Reverse comparison
Rev 10 → Rev 9
/src/vhdl/ioport.vhd
38,6 → 38,10
PnOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- data to pad (gpio out) |
PnOEN : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- port direction (low active) |
|
-- MODxIN : IN STD_LOGIC_VECTOR(7 DOWNTO 0); -- data to peripheral |
-- MODxDIR : IN STD_LOGIC_VECTOR(7 DOWNTO 0); -- direction |
-- MODxOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- data from peripheral |
|
rst_n : IN STD_LOGIC |
); |
END ioport; |
54,7 → 58,7
SIGNAL PxIFG : STD_LOGIC_VECTOR(7 DOWNTO 0); |
|
SIGNAL IRQ_S : STD_LOGIC; |
SIGNAL CLK_S : STD_LOGIC; |
SIGNAL CLK_S : STD_LOGIC; |
|
SIGNAL ifg_clk : std_logic_vector(7 downto 0); |
SIGNAL int : std_logic_vector(7 downto 0); |
178,6 → 182,19
-- PxIN |
PxIN <= PnIN; |
|
-- MODxOUT |
-- gen_MODxOUT: for i in 0 to 7 generate |
-- begin |
-- MODxOUT_proc: process (rst_n, PxIN, PxSEL) |
-- begin |
-- if rst_n = '0' then |
-- MODxOUT(i) <= '0'; |
-- elsif PxSEL(i) = '1' then |
-- MODxOUT(i) <= PxIN(i); |
-- end if; |
-- end process; |
-- end generate; |
|
irq_en : process(rst_n, clk_s) |
begin |
IF (rst_n = '0') THEN |