URL
https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
Subversion Repositories turbo8051
Compare Revisions
- This comparison shows the changes necessary to convert path
/turbo8051/trunk/rtl/core
- from Rev 50 to Rev 53
- ↔ Reverse comparison
Rev 50 → Rev 53
/core.v
315,7 → 315,17
(wbd_risc_adr[1:0] == 2'b10) ? wb_master2_rdata[23:16]: |
wb_master2_rdata[31:24]; |
|
wire [3:0] wbd_tar_id = wbd_risc_adr[15:13] +1; |
//------------------------------ |
// RISC Data Memory Map |
// 0x0000 to 0x7FFFF - Data Memory |
// 0x8000 to 0x8FFF - SPI |
// 0x9000 to 0x9FFF - UART |
// 0xA000 to 0xAFFF - MAC Core |
//----------------------------- |
// |
wire [3:0] wbd_tar_id = (wbd_risc_adr[15] == 1'b0 ) ? 4'b0001 : |
(wbd_risc_adr[15:12] == 4'b1000 ) ? 4'b0010 : |
(wbd_risc_adr[15:12] == 4'b1001 ) ? 4'b0011 : 4'b0100; |
|
wb_crossbar #(5,5,32,4,13,4) u_wb_crossbar ( |
|