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https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
Subversion Repositories turbo8051
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/turbo8051
- from Rev 31 to Rev 32
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Rev 31 → Rev 32
/trunk/rtl/lib/wb_crossbar.v
154,7 → 154,7
// [DAT_O(63..0)] signal array during WRITE cycles. |
// Also see the [DAT_I(63..0)], [DAT_O(63..0)] and [STB_O] |
// signal descriptions. |
input [(WB_SLAVE * BE_WD)-1:0] wbd_be_slave; // Byte Enable |
output [(WB_SLAVE * BE_WD)-1:0] wbd_be_slave; // Byte Enable |
// SEL_O(7..0) The select output array [SEL_O(7..0)] indicates |
// where valid data is expected on the [DAT_I(63..0)] signal |
// array during READ cycles, and where it is placed on the |