URL
https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
Subversion Repositories turbo8051
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- This comparison shows the changes necessary to convert path
/turbo8051
- from Rev 76 to Rev 77
- ↔ Reverse comparison
Rev 76 → Rev 77
/trunk/rtl/gmac/mac/g_deferral.v
176,7 → 176,6
end // always @ (posedge tx_clk or negedge app_reset_n) |
|
|
// Mandar |
// Detect Packet end |
assign was_xmitted = (phy_tx_en_d == 1'b1 && phy_tx_en == 1'b0) ? 1'b1 : 1'b0; |
|
/trunk/rtl/gmac/mac/g_mac_core.v
241,10 → 241,7
wire [15:0]tx_sts_byte_cntr_o ; |
wire tx_sts_fifo_underrun_o; |
// TX Interface Status Signal |
wire tx_set_fifo_undrn_o ;// Description: At GMII Interface , |
// abug after a transmit fifo underun was found. |
// The packet after a packet that |
// underran has 1 too few bytes . |
wire tx_set_fifo_undrn_o ; |
|
wire[7:0] mi2rx_rx_byte,tx2mi_tx_byte; |
wire [7:0] cf2df_dfl_single_rx; |
253,7 → 250,7
g_rx_top u_rx_top( |
//application |
.app_clk (app_clk), |
.app_reset_n (s_reset_n), // Condor Change |
.app_reset_n (s_reset_n), |
.rx_reset_n (rx_reset_n), |
.scan_mode (scan_mode), |
|
295,7 → 292,7
.cf_macmode (cf_mac_mode_o), |
.cf2df_dfl_single_rx (cf2df_dfl_single_rx), |
.ap2rx_rx_fifo_err (rx_fifo_error_i), |
//A200 change Port added for crs based flow control |
//for crs based flow control |
.phy_crs (phy_crs) |
); |
|
328,7 → 325,6
wire int_mdio_in; |
|
// ------------------------------------------------------------------------ |
// CONDOR CHANGE |
// MDIO Enable/disable Mux |
// MDIO is used only in the WAN MAC block. The MDIO block has to be disabled |
// in all other places. When MDIO is enabled the MDIO block signals will be |
375,8 → 371,8
|
g_md_intf u_md_intf( |
//apllication interface |
.scan_mode (scan_mode), // A200 change |
.reset_n (int_s_reset_n), // Condor Change |
.scan_mode (scan_mode), |
.reset_n (int_s_reset_n), |
|
.mdio_clk (int_mdio_clk), |
.mdio_in (int_mdio_in), |
444,7 → 440,7
//MII |
.mi2tx_byte_ack (mi2tx_byte_ack), |
|
.app_reset_n (s_reset_n), // Condor Change |
.app_reset_n (s_reset_n), |
.tx_reset_n (tx_reset_n), |
.tx_clk (phy_tx_clk) |
); |
502,7 → 498,6
. tx_sts (tx_sts_fifo_underrun_o), |
|
// MDIO READ DATA FROM PHY |
// CONDOR CHANGE |
// Since MDIO is not required for the half duplex |
// MACs the done is always tied to 1'b1 |
.md2cf_cmd_done (md2cf_cmd_done), |
525,7 → 520,6
|
//CHANNEL enable |
.cf2tx_ch_en (cf2tx_ch_en), |
//CHANNEL CONTROL TX |
.cf2df_dfl_single (cf2df_dfl_single), |
.cf2df_dfl_single_rx (cf2df_dfl_single_rx), |
.cf2tx_pad_enable (cf2tx_pad_enable), |
/trunk/rtl/gmac/mac/g_md_intf.v
243,7 → 243,6
mdio_out = 1'b0; |
else |
mdio_out = 1'b1; |
//mdio_out = 1'b0; naveen 120199 |
mdio_nxt_st = mdio_op2_st; |
end |
|
304,7 → 303,6
// This state determines whether the output enable |
// needs to on or of based on the type of command |
begin |
//mdio_out_en = 1'b1;naveen 011299 |
mdio_out = 1'b1; |
if(operation) |
begin |
432,7 → 430,6
phy_addr <= phy_addr; |
transmit_data <= transmit_data; |
reg_addr <= reg_addr; |
// receive_data <= receive_data; naveen 011299 |
end // else: !if(go_mdio) |
|
if(phyaddr_mux_sel) |
492,7 → 489,6
receive_data[14] <= receive_data[13]; |
receive_data[15] <= receive_data[14]; |
end |
// end // else: !if(go_mdio) naveen 011298 |
end // else: !if(!reset_n) |
end // always @ (posedge mdio_clk or negedge reset_n) |
|
511,7 → 507,6
reg mdio_outen_reg, mdio_out_reg; |
|
//---------------------------------------------- |
// Scan fix done for negedge FF-Dinesh-A for A200 |
// Note: Druring Scan Mode inverted mdio_clk used for |
// mdio_outen_reg & mdio_out_reg |
//----------------------------------------------- |
/trunk/rtl/gmac/mac/g_mii_intf.v
81,7 → 81,6
phy_rx_dv, |
phy_rxd, |
phy_crs, |
// rx_er fix. need to fwd to mac wrapper, to drop rx_er pkts. mfilardo. |
rx_sts_rx_er_reg, |
|
// Reset signal |
134,7 → 133,7
|
input phy_tx_clk; // Transmit Clock in 10/100 Mb/s |
|
output rx_sts_rx_er_reg; // rx_er fix. need to fwd to mac wrapper, to drop rx_er pkts. mfilardo. |
output rx_sts_rx_er_reg; |
input app_reset_n; // reset from the application interface |
|
input phy_rx_clk; // Receive Clock in 10/100/1000 Mb/s |
380,7 → 379,7
tx_xfr_ack_in = 1'b0; |
mii_tx_nxt_st = mii_tx_end_st; |
end |
else if (!cf_mac_mode & cfg_uni_mac_mode_change) // Mandar |
else if (!cf_mac_mode & cfg_uni_mac_mode_change) |
begin |
tx_en_in = 1'b1; |
tx_xfr_ack_in = 1'b1; |
447,7 → 446,7
end |
end*/ |
|
mii_tx_nibble_st: // Mandar |
mii_tx_nibble_st: / |
// This state picks up a byte from the transmit block |
// before transmitting on the line |
begin |
457,7 → 456,7
tx_xfr_ack_in = 1'b1; |
mii_tx_nxt_st = mii_tx_nibble_end_st; |
end |
else if (cf_mac_mode & cfg_uni_mac_mode_change) // Mandar |
else if (cf_mac_mode & cfg_uni_mac_mode_change) |
begin |
tx_en_in = 1'b1; |
tx_xfr_ack_in = 1'b1; |
/trunk/rtl/gmac/mac/g_rx_fsm.v
99,7 → 99,7
cf2rx_snd_crc, |
cf2rx_rcv_runt_pkt_en, |
cf2rx_gigabit_xfr, |
//A200 change Port added for crs based flow control |
//for crs based flow control |
phy_crs |
|
); |
159,7 → 159,7
input cf2rx_gigabit_xfr; |
input mi2rx_extend; |
|
//A200 change Port added for crs based flow control |
//for crs based flow control |
input phy_crs; |
|
|
/trunk/rtl/gmac/mac/g_rx_top.v
83,7 → 83,7
mi2rx_crs, |
df2rx_dfl_dn, |
ap2rx_rx_fifo_err, |
//A200 change Port added for crs based flow control |
//for crs based flow control |
phy_crs |
); |
|
129,7 → 129,7
input mi2rx_crs; |
output df2rx_dfl_dn; |
|
//A200 change Port added for crs based flow control |
//for crs based flow control |
input phy_crs; |
|
|
179,19 → 179,19
.cf2rx_snd_crc(cf2rx_snd_crc), |
.cf2rx_rcv_runt_pkt_en(cf2rx_rcv_runt_pkt_en), |
.cf2rx_gigabit_xfr(cf_macmode), |
//A200 change Port added for crs based flow control |
//for crs based flow control |
.phy_crs(phy_crs) |
); |
|
|
g_rx_crc32 u_rx_crc32 ( |
// CRC Valid signal to rx_fsm |
// CRC Valid signal to rx_fsm |
.rc2rf_crc_ok(rc2rx_crc_ok), |
|
// Global Signals |
.phy_rx_clk(phy_rx_clk), |
.reset_n(rx_reset_n), |
// CRC Data signals |
// CRC Data signals |
.mi2rc_strt_rcv(mi2rx_strt_rcv), |
.mi2rc_rcv_valid(mi2rx_rcv_vld), |
.mi2rc_rx_byte(mi2rx_rx_byte) |
199,11 → 199,9
|
|
g_deferral_rx U_deferral_rx ( |
//0503 Changed .port names to match g_deferral_rx |
.rx_dfl_dn(df2rx_dfl_dn), |
.dfl_single(cf2df_dfl_single_rx), |
.rx_dv(phy_rx_dv), |
//0504 .phy_rx_er(phy_rx_er), |
.rx_clk(phy_rx_clk), |
.reset_n(rx_reset_n)); |
|
/trunk/rtl/gmac/mac/g_tx_fsm.v
159,15 → 159,12
output tx_sts_vld; //tx status is valid |
output [15:0] tx_sts_byte_cntr; |
output tx_sts_fifo_underrun; |
output tx_ch_en; // MANDAR |
output tx_ch_en; |
|
input phy_tx_en; // mfilardo ofn auth fix. |
input phy_tx_en; |
|
input app_clk; |
output set_fifo_undrn; // Description: At GMII Interface , |
// abug after a transmit fifo underun was found. |
// The packet after a packet that |
// underran has 1 too few bytes . |
output set_fifo_undrn; |
|
|
parameter mn_idle_st = 3'd0; |
215,7 → 212,7
|
reg set_pad_byte; //send zero filled bytes |
reg e_tx_sts_vld; //current packet is transferred |
reg tx_sts_vld; //02999 |
reg tx_sts_vld; |
reg strt_preamble; |
reg [7:0] tx_byte; |
reg [7:0] tx_fsm_dt_reg; |
571,7 → 568,6
wire strt_preamble_prog; |
assign strt_preamble_pls = strt_preamble || s_p_d1 || s_p_d2 || s_p_d3; |
assign strt_preamble_prog = strt_preamble; |
//ECO fix, part1 end |
|
//fsm to transmit the FCS |
//synchronous process |
622,13 → 618,13
begin |
strt_fcs_reg <= 0; |
tx_fcs_dn_reg <= 0; |
tx_lst_xfr_fcs_reg <= 0; //naveen 052799 |
tx_lst_xfr_fcs_reg <= 0; |
end // if (!tx_reset_n) |
else |
begin |
tx_fcs_dn_reg <= tx_fcs_dn; |
strt_fcs_reg <= strt_fcs; |
tx_lst_xfr_fcs_reg <= tx_lst_xfr_fcs; //naveen 052799 |
tx_lst_xfr_fcs_reg <= tx_lst_xfr_fcs; |
end // else: !if(!tx_reset_n) |
end // always @ (posedge tx_clk or negedge tx_reset_n) |
|
685,7 → 681,7
end // else: !if(!tx_reset_n) |
end // always @ (posedge tx_clk or negedge tx_reset_n) |
|
//remmember if frame is padded |
//if frame is padded |
always @(posedge tx_clk or negedge tx_reset_n) |
begin |
if (!tx_reset_n) |
/trunk/rtl/gmac/mac/g_tx_top.v
69,7 → 69,7
tx2mi_byte_valid, |
tx2mi_byte, |
tx2mi_end_transmit, |
tx_ch_en, // MANDAR |
tx_ch_en, |
|
//Status to application |
tx_sts_vld, |
134,17 → 134,14
output [15:0] tx_sts_byte_cntr; |
output tx_sts_fifo_underrun; |
|
output tx_ch_en; // MANDAR |
output tx_ch_en; |
|
output set_fifo_undrn;// Description: At GMII Interface , |
// abug after a transmit fifo underun was found. |
// The packet after a packet that |
// underran has 1 too few bytes . |
output set_fifo_undrn; |
|
input app_clk; // condor fix |
input app_clk; |
|
wire [31:0] tc2tx_fcs; |
wire set_fifo_undrn;// E3C fix |
wire set_fifo_undrn; |
|
|
|
164,8 → 161,8
|
// Instantiate Transmit State machine block |
g_tx_fsm U_tx_fsm( |
.app_clk(app_clk), // condor fix |
.set_fifo_undrn(set_fifo_undrn), // E3C fix |
.app_clk(app_clk), / |
.set_fifo_undrn(set_fifo_undrn), |
|
//Outputs |
.tx_commit_read(tx_commit_read), |
179,7 → 176,7
.tx2mi_byte(tx2mi_byte), |
.tx2mi_end_transmit(tx2mi_end_transmit), |
.tx_ch_en(tx_ch_en), |
.phy_tx_en(phy_tx_en), // mfilardo. for ofn auth fix. |
.phy_tx_en(phy_tx_en), |
//tx fifo management outputs |
.tx_sts_vld(tx_sts_vld), |
.tx_sts_byte_cntr(tx_sts_byte_cntr), |