URL
https://opencores.org/ocsvn/uart_block/uart_block/trunk
Subversion Repositories uart_block
Compare Revisions
- This comparison shows the changes necessary to convert path
/uart_block
- from Rev 35 to Rev 36
- ↔ Reverse comparison
Rev 35 → Rev 36
/trunk/hdl/iseProject/testSerial_receiver.vhd
39,7 → 39,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: serial_receiver PORT MAP ( |
rst => rst, |
baudOverSampleClk => baudOverSampleClk, |
/trunk/hdl/iseProject/testUart_control.vhd
57,7 → 57,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: uart_control PORT MAP ( |
rst => rst, |
clk => clk, |
/trunk/hdl/iseProject/testDivisor.vhd
42,7 → 42,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: divisor PORT MAP ( |
rst => rst, |
clk => clk, |
/trunk/hdl/iseProject/SERIALMASTER.vhd
1,4 → 1,5
--! Top wishbone Master to test the uart_wishbone_slave |
--! @file |
--! @brief Top wishbone Master to test the uart_wishbone_slave |
library ieee; |
USE ieee.std_logic_1164.ALL; |
use ieee.std_logic_unsigned.all; |
10,23 → 11,25
entity SERIALMASTER is |
port( |
-- WISHBONE Signals |
ACK_I: in std_logic; |
ADR_O: out std_logic_vector( 1 downto 0 ); |
CLK_I: in std_logic; |
CYC_O: out std_logic; |
DAT_I: in std_logic_vector( 31 downto 0 ); |
DAT_O: out std_logic_vector( 31 downto 0 ); |
RST_I: in std_logic; |
SEL_O: out std_logic; |
STB_O: out std_logic; |
WE_O: out std_logic; |
ACK_I: in std_logic; --! Ack input |
ADR_O: out std_logic_vector( 1 downto 0 ); --! Address output |
CLK_I: in std_logic; --! Clock input |
CYC_O: out std_logic; --! Cycle output |
DAT_I: in std_logic_vector( 31 downto 0 ); --! Data input |
DAT_O: out std_logic_vector( 31 downto 0 ); --! Data output |
RST_I: in std_logic; --! Reset input |
SEL_O: out std_logic; --! Select output |
STB_O: out std_logic; --! Strobe output (Works like a chip select) |
WE_O: out std_logic; --! Write enable |
|
-- NON-WISHBONE Signals |
byte_rec : out std_logic_vector(7 downto 0) |
byte_rec : out std_logic_vector(7 downto 0) --! Signal byte received (Used to debug on the out leds) |
); |
|
end SERIALMASTER; |
|
--! @brief Test the uart_wishbone_slave |
--! @details Configure the core then, send the received data back to the PC |
architecture Behavioral of SERIALMASTER is |
signal masterSerialStates : testMaster; |
signal byteIncome : std_logic_vector(7 downto 0); |
101,7 → 104,7
end if; |
|
when wait_cycles => |
-- wait some cycles (90) |
-- wait some cycles |
if contWait < cycles2Wait then |
contWait := contWait + 1; |
STB_O <= '0'; |
/trunk/hdl/iseProject/INTERCON_P2P.cpj
1,5 → 1,5
#ChipScope Pro Analyzer Project File, Version 3.0 |
#Fri May 04 23:28:54 CEST 2012 |
#Mon May 07 21:56:33 CEST 2012 |
deviceChain.deviceName0=XC3S500E |
deviceChain.deviceName1=XCF04S |
deviceChain.deviceName2=XC2C64A |
32,10 → 32,10
unit.0.0.0.WIDTH0=1.0 |
unit.0.0.0.X0=0.0 |
unit.0.0.0.Y0=0.0 |
unit.0.0.1.HEIGHT1=0.6156406 |
unit.0.0.1.HEIGHT1=0.53410983 |
unit.0.0.1.WIDTH1=1.0 |
unit.0.0.1.X1=0.0023219814 |
unit.0.0.1.Y1=0.327787 |
unit.0.0.1.X1=0.0 |
unit.0.0.1.Y1=0.3294509 |
unit.0.0.MFBitsA0=F |
unit.0.0.MFBitsB0=0 |
unit.0.0.MFCompareA0=0 |
62,12 → 62,12
unit.0.0.browser_tree_state<Data\ Port>=1 |
unit.0.0.coretype=ILA |
unit.0.0.eventCount0=1 |
unit.0.0.port.-1.b.0.alias=ByteReceived |
unit.0.0.port.-1.b.0.channellist=4 5 6 7 8 9 10 11 |
unit.0.0.port.-1.b.0.alias=ByteReceive |
unit.0.0.port.-1.b.0.channellist=3 4 5 6 7 8 9 10 |
unit.0.0.port.-1.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.b.0.name=DataPort |
unit.0.0.port.-1.b.0.orderindex=-1 |
unit.0.0.port.-1.b.0.radix=Hex |
unit.0.0.port.-1.b.0.radix=Bin |
unit.0.0.port.-1.b.0.signedOffset=0.0 |
unit.0.0.port.-1.b.0.signedPrecision=0 |
unit.0.0.port.-1.b.0.signedScaleFactor=1.0 |
77,13 → 77,13
unit.0.0.port.-1.b.0.unsignedScaleFactor=1.0 |
unit.0.0.port.-1.b.0.visible=1 |
unit.0.0.port.-1.buscount=1 |
unit.0.0.port.-1.channelcount=12 |
unit.0.0.port.-1.s.0.alias=Serial_IN |
unit.0.0.port.-1.channelcount=11 |
unit.0.0.port.-1.s.0.alias=Serial In |
unit.0.0.port.-1.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.0.name=DataPort[0] |
unit.0.0.port.-1.s.0.orderindex=-1 |
unit.0.0.port.-1.s.0.visible=1 |
unit.0.0.port.-1.s.1.alias=Baud |
unit.0.0.port.-1.s.1.alias=Baud Rate |
unit.0.0.port.-1.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.1.name=DataPort[1] |
unit.0.0.port.-1.s.1.orderindex=-1 |
93,21 → 93,16
unit.0.0.port.-1.s.10.name=DataPort[10] |
unit.0.0.port.-1.s.10.orderindex=-1 |
unit.0.0.port.-1.s.10.visible=0 |
unit.0.0.port.-1.s.11.alias= |
unit.0.0.port.-1.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.11.name=DataPort[11] |
unit.0.0.port.-1.s.11.orderindex=-1 |
unit.0.0.port.-1.s.11.visible=0 |
unit.0.0.port.-1.s.2.alias=BaudOverSample |
unit.0.0.port.-1.s.2.alias=Baud Rate Oversample |
unit.0.0.port.-1.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.2.name=DataPort[2] |
unit.0.0.port.-1.s.2.orderindex=-1 |
unit.0.0.port.-1.s.2.visible=1 |
unit.0.0.port.-1.s.3.alias=SyncDetector |
unit.0.0.port.-1.s.3.alias= |
unit.0.0.port.-1.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.3.name=DataPort[3] |
unit.0.0.port.-1.s.3.orderindex=-1 |
unit.0.0.port.-1.s.3.visible=1 |
unit.0.0.port.-1.s.3.visible=0 |
unit.0.0.port.-1.s.4.alias= |
unit.0.0.port.-1.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.0.0.port.-1.s.4.name=DataPort[4] |
170,44 → 165,41
unit.0.0.triggerNSamplesTS=0 |
unit.0.0.triggerPosition=0 |
unit.0.0.triggerWindowCount=1 |
unit.0.0.triggerWindowDepth=8192 |
unit.0.0.triggerWindowDepth=16384 |
unit.0.0.triggerWindowTS=0 |
unit.0.0.username=MyILA0 |
unit.0.0.waveform.count=5 |
unit.0.0.waveform.count=4 |
unit.0.0.waveform.posn.0.channel=0 |
unit.0.0.waveform.posn.0.name=Serial_IN |
unit.0.0.waveform.posn.0.name=Serial In |
unit.0.0.waveform.posn.0.type=signal |
unit.0.0.waveform.posn.1.channel=1 |
unit.0.0.waveform.posn.1.name=Baud |
unit.0.0.waveform.posn.1.name=Baud Rate |
unit.0.0.waveform.posn.1.type=signal |
unit.0.0.waveform.posn.10.channel=11 |
unit.0.0.waveform.posn.10.name=DataPort[11] |
unit.0.0.waveform.posn.10.channel=10 |
unit.0.0.waveform.posn.10.name=DataPort[10] |
unit.0.0.waveform.posn.10.type=signal |
unit.0.0.waveform.posn.11.channel=11 |
unit.0.0.waveform.posn.11.name=DataPort[11] |
unit.0.0.waveform.posn.11.type=signal |
unit.0.0.waveform.posn.2.channel=2 |
unit.0.0.waveform.posn.2.name=BaudOverSample |
unit.0.0.waveform.posn.2.name=Baud Rate Oversample |
unit.0.0.waveform.posn.2.type=signal |
unit.0.0.waveform.posn.3.channel=3 |
unit.0.0.waveform.posn.3.name=SyncDetector |
unit.0.0.waveform.posn.3.type=signal |
unit.0.0.waveform.posn.4.channel=2147483646 |
unit.0.0.waveform.posn.4.name=ByteReceived |
unit.0.0.waveform.posn.4.radix=1 |
unit.0.0.waveform.posn.4.type=bus |
unit.0.0.waveform.posn.5.channel=11 |
unit.0.0.waveform.posn.5.name=DataPort[11] |
unit.0.0.waveform.posn.3.channel=2147483646 |
unit.0.0.waveform.posn.3.name=ByteReceive |
unit.0.0.waveform.posn.3.radix=0 |
unit.0.0.waveform.posn.3.type=bus |
unit.0.0.waveform.posn.4.channel=10 |
unit.0.0.waveform.posn.4.name=DataPort[10] |
unit.0.0.waveform.posn.4.type=signal |
unit.0.0.waveform.posn.5.channel=10 |
unit.0.0.waveform.posn.5.name=DataPort[10] |
unit.0.0.waveform.posn.5.type=signal |
unit.0.0.waveform.posn.6.channel=11 |
unit.0.0.waveform.posn.6.name=DataPort[11] |
unit.0.0.waveform.posn.6.channel=10 |
unit.0.0.waveform.posn.6.name=DataPort[10] |
unit.0.0.waveform.posn.6.type=signal |
unit.0.0.waveform.posn.7.channel=11 |
unit.0.0.waveform.posn.7.name=DataPort[11] |
unit.0.0.waveform.posn.7.channel=10 |
unit.0.0.waveform.posn.7.name=DataPort[10] |
unit.0.0.waveform.posn.7.type=signal |
unit.0.0.waveform.posn.8.channel=11 |
unit.0.0.waveform.posn.8.name=DataPort[11] |
unit.0.0.waveform.posn.8.channel=10 |
unit.0.0.waveform.posn.8.name=DataPort[10] |
unit.0.0.waveform.posn.8.type=signal |
unit.0.0.waveform.posn.9.channel=11 |
unit.0.0.waveform.posn.9.name=DataPort[11] |
unit.0.0.waveform.posn.9.channel=10 |
unit.0.0.waveform.posn.9.name=DataPort[10] |
unit.0.0.waveform.posn.9.type=signal |
/trunk/hdl/iseProject/SYC0001a.vhd
1,68 → 1,31
---------------------------------------------------------------------- |
-- Module name: SYC0001a.VHD |
-- |
-- Description: A simple WISHBONE SYSCON for FPGA. For more infor- |
-- mation, please refer to the WISHBONE Public Domain |
-- Library Technical Reference Manual. |
-- |
-- History: Project complete: SEP 20, 2001 |
-- WD Peterson |
-- Silicore Corporation |
-- |
-- Release: Notice is hereby given that this document is not |
-- copyrighted, and has been placed into the public |
-- domain. It may be freely copied and distributed |
-- by any means. |
-- |
-- Disclaimer: In no event shall Silicore Corporation be liable |
-- for incidental, consequential, indirect or special |
-- damages resulting from the use of this file. The |
-- user assumes all responsibility for its use. |
-- |
---------------------------------------------------------------------- |
|
---------------------------------------------------------------------- |
-- Load the IEEE 1164 library and make it visible. |
---------------------------------------------------------------------- |
|
--! @file |
--! @brief SYSCON core avaible at: http://www.pldworld.com/_hdl/2/_ip/-silicore.net/wishbone.htm |
|
library ieee; |
use ieee.std_logic_1164.all; |
|
|
---------------------------------------------------------------------- |
-- Entity declaration. |
---------------------------------------------------------------------- |
|
entity SYC0001a is |
port( |
-- WISHBONE Interface |
|
CLK_O: out std_logic; |
RST_O: out std_logic; |
|
|
-- WISHBONE Interface |
CLK_O: out std_logic; --! Clock output |
RST_O: out std_logic; --! Reset output |
-- NON-WISHBONE Signals |
|
EXTCLK: in std_logic; |
EXTRST: in std_logic |
EXTCLK: in std_logic; --! Clock input |
EXTRST: in std_logic --! Reset input |
); |
|
end SYC0001a; |
|
|
---------------------------------------------------------------------- |
-- Architecture definition. |
---------------------------------------------------------------------- |
|
--! @brief Architecture definition. of SYSCON core |
--! @details Architecture definition. of SYSCON core |
architecture SYC0001a1 of SYC0001a IS |
|
begin |
|
|
|
------------------------------------------------------------------ |
-- Make selected signals available to the outside world. |
------------------------------------------------------------------ |
|
MAKE_VISIBLE: process( EXTCLK, EXTRST ) |
begin |
|
/trunk/hdl/iseProject/testUart_wishbone_slave.vhd
51,7 → 51,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: uart_wishbone_slave PORT MAP ( |
RST_I => RST_I, |
CLK_I => CLK_I, |
/trunk/hdl/iseProject/webtalk_pn.xml
3,10 → 3,10
<!--The data in this file is primarily intended for consumption by Xilinx tools. |
The structure and the elements are likely to change over the next few releases. |
This means code written to parse this file will need to be revisited each subsequent release.--> |
<application name="pn" timeStamp="Sat May 05 22:40:10 2012"> |
<application name="pn" timeStamp="Tue May 08 23:40:28 2012"> |
<section name="Project Information" visible="false"> |
<property name="ProjectID" value="225093D1BA50465FB2D0D99DBD16A3DC" type="project"/> |
<property name="ProjectIteration" value="30" type="project"/> |
<property name="ProjectIteration" value="31" type="project"/> |
<property name="ProjectFile" value="E:/uart_block/hdl/iseProject/iseProject.xise" type="project"/> |
<property name="ProjectCreationTimestamp" value="2012-04-20T22:53:04" type="project"/> |
</section> |
14,24 → 14,22
<property name="PROPEXT_xilxSynthMaxFanout_virtex2" value="100000" type="process"/> |
<property name="PROP_Board" value="Spartan-3E Starter Board" type="process"/> |
<property name="PROP_Enable_Message_Filtering" value="false" type="design"/> |
<property name="PROP_FitterReportFormat" value="HTML" type="process"/> |
<property name="PROP_LastAppliedGoal" value="Balanced" type="design"/> |
<property name="PROP_LastAppliedStrategy" value="Xilinx Default (unlocked)" type="design"/> |
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/> |
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/> |
<property name="PROP_SelectedInstanceHierarchicalPath" value="/testUart_communication_block" type="process"/> |
<property name="PROP_SelectedInstanceHierarchicalPath" value="/testUart_wishbone_slave" type="process"/> |
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/> |
<property name="PROP_SynthTopFile" value="changed" type="process"/> |
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/> |
<property name="PROP_UseSmartGuide" value="false" type="design"/> |
<property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/> |
<property name="PROP_intProjectCreationTimestamp" value="2012-04-20T22:53:04" type="design"/> |
<property name="PROP_intWbtProjectID" value="225093D1BA50465FB2D0D99DBD16A3DC" type="design"/> |
<property name="PROP_intWbtProjectIteration" value="30" type="process"/> |
<property name="PROP_intWbtProjectIteration" value="31" type="process"/> |
<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/> |
<property name="PROP_intWorkingDirUsed" value="No" type="design"/> |
<property name="PROP_lockPinsUcfFile" value="changed" type="process"/> |
<property name="PROP_selectedSimRootSourceNode_behav" value="work.testUart_communication_block" type="process"/> |
<property name="PROP_selectedSimRootSourceNode_behav" value="work.testUart_wishbone_slave" type="process"/> |
<property name="PROP_xilxBitgStart_IntDone" value="true" type="process"/> |
<property name="PROP_AutoTop" value="false" type="design"/> |
<property name="PROP_DevFamily" value="Spartan3E" type="design"/> |
/trunk/hdl/iseProject/testSerial_transmitter.vhd
37,7 → 37,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: serial_transmitter PORT MAP ( |
rst => rst, |
baudClk => baudClk, |
/trunk/hdl/iseProject/xst/work/hdpdeps.ref
11,74 → 11,74
FL /home/laraujo/work/uart_block/hdl/iseProject/uart_control.vhd 2012/05/02.17:56:59 O.87xd |
FL /home/laraujo/work/uart_block/hdl/iseProject/uart_main_blocks.vhd 2012/04/30.12:49:26 O.87xd |
FL /home/laraujo/work/uart_block/hdl/iseProject/uart_wishbone_slave.vhd 2012/05/02.08:07:03 O.87xd |
FL E:/uart_block/hdl/iseProject/baud_generator.vhd 2012/05/05.19:53:55 O.87xd |
EN work/baud_generator 1336250413 \ |
FL E:/uart_block/hdl/iseProject/baud_generator.vhd 2012/05/08.22:34:17 O.87xd |
EN work/baud_generator 1336513192 \ |
FL E:/uart_block/hdl/iseProject/baud_generator.vhd PB ieee/std_logic_1164 1325952872 \ |
PB ieee/STD_LOGIC_UNSIGNED 1325952875 PB ieee/std_logic_arith 1325952873 \ |
PB ieee/NUMERIC_STD 1325952877 PB work/pkgDefinitions 1336250412 |
AR work/baud_generator/Behavioral 1336250414 \ |
FL E:/uart_block/hdl/iseProject/baud_generator.vhd EN work/baud_generator 1336250413 |
FL E:/uart_block/hdl/iseProject/divisor.vhd 2012/05/01.21:07:49 O.87xd |
EN work/divisor 1336250419 FL E:/uart_block/hdl/iseProject/divisor.vhd \ |
PB ieee/NUMERIC_STD 1325952877 PB work/pkgDefinitions 1336513191 |
AR work/baud_generator/Behavioral 1336513193 \ |
FL E:/uart_block/hdl/iseProject/baud_generator.vhd EN work/baud_generator 1336513192 |
FL E:/uart_block/hdl/iseProject/divisor.vhd 2012/05/08.23:23:27 O.87xd |
EN work/divisor 1336513198 FL E:/uart_block/hdl/iseProject/divisor.vhd \ |
PB ieee/std_logic_1164 1325952872 PB ieee/std_logic_arith 1325952873 \ |
PB work/pkgDefinitions 1336250412 |
AR work/divisor/Behavioral 1336250420 \ |
FL E:/uart_block/hdl/iseProject/divisor.vhd EN work/divisor 1336250419 |
FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd 2012/05/04.00:27:06 O.87xd |
EN work/INTERCON_P2P 1336250431 FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd \ |
PB work/pkgDefinitions 1336513191 |
AR work/divisor/Behavioral 1336513199 \ |
FL E:/uart_block/hdl/iseProject/divisor.vhd EN work/divisor 1336513198 |
FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd 2012/05/08.22:54:12 O.87xd |
EN work/INTERCON_P2P 1336513210 FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd \ |
PB ieee/std_logic_1164 1325952872 |
AR work/INTERCON_P2P/Behavioral 1336250432 \ |
FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd EN work/INTERCON_P2P 1336250431 \ |
AR work/INTERCON_P2P/Behavioral 1336513211 \ |
FL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd EN work/INTERCON_P2P 1336513210 \ |
CP SYC0001a CP SERIALMASTER CP uart_wishbone_slave |
FL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd 2012/05/05.19:53:54 O.87xd |
PH work/pkgDefinitions 1336250411 \ |
FL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd 2012/05/08.22:34:17 O.87xd |
PH work/pkgDefinitions 1336513190 \ |
FL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd PB ieee/std_logic_1164 1325952872 |
PB work/pkgDefinitions 1336250412 \ |
FL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd PH work/pkgDefinitions 1336250411 |
FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd 2012/05/04.01:05:05 O.87xd |
EN work/SERIALMASTER 1336250427 FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd \ |
PB work/pkgDefinitions 1336513191 \ |
FL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd PH work/pkgDefinitions 1336513190 |
FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd 2012/05/08.23:01:15 O.87xd |
EN work/SERIALMASTER 1336513206 FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd \ |
PB ieee/std_logic_1164 1325952872 PB ieee/STD_LOGIC_UNSIGNED 1325952875 \ |
PB ieee/std_logic_arith 1325952873 PB work/pkgDefinitions 1336250412 |
AR work/SERIALMASTER/Behavioral 1336250428 \ |
FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd EN work/SERIALMASTER 1336250427 |
FL E:/uart_block/hdl/iseProject/serial_receiver.vhd 2012/05/05.22:39:11 O.87xd |
EN work/serial_receiver 1336250417 \ |
PB ieee/std_logic_arith 1325952873 PB work/pkgDefinitions 1336513191 |
AR work/SERIALMASTER/Behavioral 1336513207 \ |
FL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd EN work/SERIALMASTER 1336513206 |
FL E:/uart_block/hdl/iseProject/serial_receiver.vhd 2012/05/08.22:34:17 O.87xd |
EN work/serial_receiver 1336513196 \ |
FL E:/uart_block/hdl/iseProject/serial_receiver.vhd PB ieee/std_logic_1164 1325952872 \ |
PB work/pkgDefinitions 1336250412 |
AR work/serial_receiver/Behavioral 1336250418 \ |
FL E:/uart_block/hdl/iseProject/serial_receiver.vhd EN work/serial_receiver 1336250417 |
PB work/pkgDefinitions 1336513191 |
AR work/serial_receiver/Behavioral 1336513197 \ |
FL E:/uart_block/hdl/iseProject/serial_receiver.vhd EN work/serial_receiver 1336513196 |
FL E:/uart_block/hdl/iseProject/serial_transmitter.vhd 2012/04/21.09:27:16 O.87xd |
EN work/serial_transmitter 1336250415 \ |
EN work/serial_transmitter 1336513194 \ |
FL E:/uart_block/hdl/iseProject/serial_transmitter.vhd \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336250412 |
AR work/serial_transmitter/Behavioral 1336250416 \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336513191 |
AR work/serial_transmitter/Behavioral 1336513195 \ |
FL E:/uart_block/hdl/iseProject/serial_transmitter.vhd \ |
EN work/serial_transmitter 1336250415 |
FL E:/uart_block/hdl/iseProject/SYC0001a.vhd 2012/05/04.00:26:54 O.87xd |
EN work/SYC0001a 1336250425 FL E:/uart_block/hdl/iseProject/SYC0001a.vhd \ |
EN work/serial_transmitter 1336513194 |
FL E:/uart_block/hdl/iseProject/SYC0001a.vhd 2012/05/08.22:58:32 O.87xd |
EN work/SYC0001a 1336513204 FL E:/uart_block/hdl/iseProject/SYC0001a.vhd \ |
PB ieee/std_logic_1164 1325952872 |
AR work/SYC0001a/SYC0001a1 1336250426 \ |
FL E:/uart_block/hdl/iseProject/SYC0001a.vhd EN work/SYC0001a 1336250425 |
FL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd 2012/05/05.22:40:08 O.87xd |
EN work/uart_communication_blocks 1336250423 \ |
AR work/SYC0001a/SYC0001a1 1336513205 \ |
FL E:/uart_block/hdl/iseProject/SYC0001a.vhd EN work/SYC0001a 1336513204 |
FL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd 2012/05/08.23:34:57 O.87xd |
EN work/uart_communication_blocks 1336513202 \ |
FL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336250412 |
AR work/uart_communication_blocks/Behavioral 1336250424 \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336513191 |
AR work/uart_communication_blocks/Behavioral 1336513203 \ |
FL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd \ |
EN work/uart_communication_blocks 1336250423 CP baud_generator \ |
EN work/uart_communication_blocks 1336513202 CP baud_generator \ |
CP serial_transmitter CP serial_receiver |
FL E:/uart_block/hdl/iseProject/uart_control.vhd 2012/05/03.19:17:33 O.87xd |
EN work/uart_control 1336250421 FL E:/uart_block/hdl/iseProject/uart_control.vhd \ |
FL E:/uart_block/hdl/iseProject/uart_control.vhd 2012/05/08.23:25:39 O.87xd |
EN work/uart_control 1336513200 FL E:/uart_block/hdl/iseProject/uart_control.vhd \ |
PB ieee/std_logic_1164 1325952872 PB ieee/STD_LOGIC_UNSIGNED 1325952875 \ |
PB ieee/std_logic_arith 1325952873 PB work/pkgDefinitions 1336250412 |
AR work/uart_control/Behavioral 1336250422 \ |
FL E:/uart_block/hdl/iseProject/uart_control.vhd EN work/uart_control 1336250421 \ |
PB ieee/std_logic_arith 1325952873 PB work/pkgDefinitions 1336513191 |
AR work/uart_control/Behavioral 1336513201 \ |
FL E:/uart_block/hdl/iseProject/uart_control.vhd EN work/uart_control 1336513200 \ |
CP divisor |
FL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd 2012/05/03.19:17:33 O.87xd |
EN work/uart_wishbone_slave 1336250429 \ |
FL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd 2012/05/08.23:31:19 O.87xd |
EN work/uart_wishbone_slave 1336513208 \ |
FL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336250412 |
AR work/uart_wishbone_slave/Behavioral 1336250430 \ |
PB ieee/std_logic_1164 1325952872 PB work/pkgDefinitions 1336513191 |
AR work/uart_wishbone_slave/Behavioral 1336513209 \ |
FL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd \ |
EN work/uart_wishbone_slave 1336250429 CP uart_control \ |
EN work/uart_wishbone_slave 1336513208 CP uart_control \ |
CP uart_communication_blocks |
/trunk/hdl/iseProject/xst/work/hdllib.ref
1,22 → 1,22
AR uart_communication_blocks behavioral E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd sub00/vhpl13 1336250424 |
AR uart_control behavioral E:/uart_block/hdl/iseProject/uart_control.vhd sub00/vhpl11 1336250422 |
AR syc0001a syc0001a1 E:/uart_block/hdl/iseProject/SYC0001a.vhd sub00/vhpl17 1336250426 |
EN intercon_p2p NULL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd sub00/vhpl20 1336250431 |
PB pkgdefinitions pkgdefinitions E:/uart_block/hdl/iseProject/pkgDefinitions.vhd sub00/vhpl01 1336250412 |
EN serial_receiver NULL E:/uart_block/hdl/iseProject/serial_receiver.vhd sub00/vhpl04 1336250417 |
AR uart_wishbone_slave behavioral E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd sub00/vhpl15 1336250430 |
AR serial_transmitter behavioral E:/uart_block/hdl/iseProject/serial_transmitter.vhd sub00/vhpl03 1336250416 |
EN uart_communication_blocks NULL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd sub00/vhpl12 1336250423 |
EN divisor NULL E:/uart_block/hdl/iseProject/divisor.vhd sub00/vhpl08 1336250419 |
AR divisor behavioral E:/uart_block/hdl/iseProject/divisor.vhd sub00/vhpl09 1336250420 |
AR baud_generator behavioral E:/uart_block/hdl/iseProject/baud_generator.vhd sub00/vhpl07 1336250414 |
EN syc0001a NULL E:/uart_block/hdl/iseProject/SYC0001a.vhd sub00/vhpl16 1336250425 |
EN serialmaster NULL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd sub00/vhpl18 1336250427 |
EN uart_control NULL E:/uart_block/hdl/iseProject/uart_control.vhd sub00/vhpl10 1336250421 |
AR intercon_p2p behavioral E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd sub00/vhpl21 1336250432 |
EN serial_transmitter NULL E:/uart_block/hdl/iseProject/serial_transmitter.vhd sub00/vhpl02 1336250415 |
PH pkgdefinitions NULL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd sub00/vhpl00 1336250411 |
AR serialmaster behavioral E:/uart_block/hdl/iseProject/SERIALMASTER.vhd sub00/vhpl19 1336250428 |
EN uart_wishbone_slave NULL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd sub00/vhpl14 1336250429 |
EN baud_generator NULL E:/uart_block/hdl/iseProject/baud_generator.vhd sub00/vhpl06 1336250413 |
AR serial_receiver behavioral E:/uart_block/hdl/iseProject/serial_receiver.vhd sub00/vhpl05 1336250418 |
AR uart_communication_blocks behavioral E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd sub00/vhpl13 1336513203 |
AR uart_control behavioral E:/uart_block/hdl/iseProject/uart_control.vhd sub00/vhpl11 1336513201 |
AR syc0001a syc0001a1 E:/uart_block/hdl/iseProject/SYC0001a.vhd sub00/vhpl17 1336513205 |
EN intercon_p2p NULL E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd sub00/vhpl20 1336513210 |
PB pkgdefinitions pkgdefinitions E:/uart_block/hdl/iseProject/pkgDefinitions.vhd sub00/vhpl01 1336513191 |
EN serial_receiver NULL E:/uart_block/hdl/iseProject/serial_receiver.vhd sub00/vhpl04 1336513196 |
AR uart_wishbone_slave behavioral E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd sub00/vhpl15 1336513209 |
AR serial_transmitter behavioral E:/uart_block/hdl/iseProject/serial_transmitter.vhd sub00/vhpl03 1336513195 |
EN uart_communication_blocks NULL E:/uart_block/hdl/iseProject/uart_communication_blocks.vhd sub00/vhpl12 1336513202 |
EN divisor NULL E:/uart_block/hdl/iseProject/divisor.vhd sub00/vhpl08 1336513198 |
AR divisor behavioral E:/uart_block/hdl/iseProject/divisor.vhd sub00/vhpl09 1336513199 |
AR baud_generator behavioral E:/uart_block/hdl/iseProject/baud_generator.vhd sub00/vhpl07 1336513193 |
EN syc0001a NULL E:/uart_block/hdl/iseProject/SYC0001a.vhd sub00/vhpl16 1336513204 |
EN serialmaster NULL E:/uart_block/hdl/iseProject/SERIALMASTER.vhd sub00/vhpl18 1336513206 |
EN uart_control NULL E:/uart_block/hdl/iseProject/uart_control.vhd sub00/vhpl10 1336513200 |
AR intercon_p2p behavioral E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd sub00/vhpl21 1336513211 |
EN serial_transmitter NULL E:/uart_block/hdl/iseProject/serial_transmitter.vhd sub00/vhpl02 1336513194 |
PH pkgdefinitions NULL E:/uart_block/hdl/iseProject/pkgDefinitions.vhd sub00/vhpl00 1336513190 |
AR serialmaster behavioral E:/uart_block/hdl/iseProject/SERIALMASTER.vhd sub00/vhpl19 1336513207 |
EN uart_wishbone_slave NULL E:/uart_block/hdl/iseProject/uart_wishbone_slave.vhd sub00/vhpl14 1336513208 |
EN baud_generator NULL E:/uart_block/hdl/iseProject/baud_generator.vhd sub00/vhpl06 1336513192 |
AR serial_receiver behavioral E:/uart_block/hdl/iseProject/serial_receiver.vhd sub00/vhpl05 1336513197 |
/trunk/hdl/iseProject/uart_control.vhd
1,4 → 1,5
--! uart control unit |
--! @file |
--! @brief Uart control unit |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use ieee.std_logic_unsigned.all; |
8,23 → 9,25
use work.pkgDefinitions.all; |
|
entity uart_control is |
Port ( rst : in std_logic; -- Global reset |
clk : in std_logic; -- Global clock |
WE : in std_logic; -- Write enable |
reg_addr : in std_logic_vector (1 downto 0); -- Register address |
start : in std_logic; -- Start (Strobe) |
done : out std_logic; -- Done (ACK) |
DAT_I : in std_logic_vector ((nBitsLarge-1) downto 0); -- Data Input (Wishbone) |
DAT_O : out std_logic_vector ((nBitsLarge-1) downto 0); -- Data output (Wishbone) |
baud_wait : out std_logic_vector ((nBitsLarge-1) downto 0); -- Signal to control the baud rate frequency |
data_byte_tx : out std_logic_vector((nBits-1) downto 0); -- 1 Byte to be send to serial_transmitter |
data_byte_rx : in std_logic_vector((nBits-1) downto 0); -- 1 Byte to be received by serial_receiver |
tx_data_sent : in std_logic; -- Signal comming from serial_transmitter |
tx_start : out std_logic; -- Signal to start sending serial data... |
rst_comm_blocks : out std_logic; -- Reset Communication blocks |
rx_data_ready : in std_logic); -- Signal comming from serial_receiver |
Port ( rst : in std_logic; --! Global reset |
clk : in std_logic; --! Global clock |
WE : in std_logic; --! Write enable |
reg_addr : in std_logic_vector (1 downto 0); --! Register address |
start : in std_logic; --! Start (Strobe) |
done : out std_logic; --! Done (ACK) |
DAT_I : in std_logic_vector ((nBitsLarge-1) downto 0); --! Data Input (Wishbone) |
DAT_O : out std_logic_vector ((nBitsLarge-1) downto 0); --! Data output (Wishbone) |
baud_wait : out std_logic_vector ((nBitsLarge-1) downto 0); --! Signal to control the baud rate frequency |
data_byte_tx : out std_logic_vector((nBits-1) downto 0); --! 1 Byte to be send to serial_transmitter |
data_byte_rx : in std_logic_vector((nBits-1) downto 0); --! 1 Byte to be received by serial_receiver |
tx_data_sent : in std_logic; --! Signal comming from serial_transmitter |
tx_start : out std_logic; --! Signal to start sending serial data... |
rst_comm_blocks : out std_logic; --! Reset Communication blocks |
rx_data_ready : in std_logic); --! Signal comming from serial_receiver |
end uart_control; |
|
--! @brief Uart control unit |
--! @details Configure, commands, the uart_communication_blocks |
architecture Behavioral of uart_control is |
signal config_clk : std_logic_vector((nBitsLarge-1) downto 0); |
signal config_baud : std_logic_vector((nBitsLarge-1) downto 0); |
58,7 → 61,7
end component; |
|
begin |
-- Instantiate block for calculate division |
--! Instantiate block for calculate division |
uDiv : divisor port map ( |
rst => sigDivRst, |
clk => clk, |
/trunk/hdl/iseProject/iseProject.gise
205,6 → 205,10
<transform xil_pn:end_ts="1336250815" xil_pn:in_ck="8052531156335828411" xil_pn:name="TRAN_copyAbstractToPostAbstractSimulation" xil_pn:start_ts="1336250815"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="InputChanged"/> |
<status xil_pn:value="OutputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.vhd"/> |
<outfile xil_pn:name="SERIALMASTER.vhd"/> |
<outfile xil_pn:name="SYC0001a.vhd"/> |
239,6 → 243,11
<transform xil_pn:end_ts="1336250815" xil_pn:in_ck="8052531156335828411" xil_pn:name="TRAN_copyPostAbstractToPreSimulation" xil_pn:start_ts="1336250815"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="InputChanged"/> |
<status xil_pn:value="OutputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.vhd"/> |
<outfile xil_pn:name="SERIALMASTER.vhd"/> |
<outfile xil_pn:name="SYC0001a.vhd"/> |
261,6 → 270,10
<transform xil_pn:end_ts="1336250972" xil_pn:in_ck="8052531156335828411" xil_pn:name="TRAN_ISimulateBehavioralModelRunFuse" xil_pn:prop_ck="8691405173963172662" xil_pn:start_ts="1336250968"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="OutOfDateForProperties"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="InputChanged"/> |
<outfile xil_pn:name="fuse.log"/> |
<outfile xil_pn:name="isim"/> |
<outfile xil_pn:name="isim.log"/> |
271,9 → 284,12
<transform xil_pn:end_ts="1336250972" xil_pn:in_ck="7043554240611338668" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="7109246390254422178" xil_pn:start_ts="1336250972"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<outfile xil_pn:name="isim.cmd"/> |
<outfile xil_pn:name="isim.log"/> |
<outfile xil_pn:name="testUart_wishbone_slave_isim_beh.wdb"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="OutOfDateForProperties"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="InputRemoved"/> |
<status xil_pn:value="OutputRemoved"/> |
</transform> |
<transform xil_pn:end_ts="1335914570" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1335914570"> |
<status xil_pn:value="SuccessfullyRun"/> |
303,10 → 319,12
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
</transform> |
<transform xil_pn:end_ts="1336250421" xil_pn:in_ck="4673194791943474574" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="-8986552465892320357" xil_pn:start_ts="1336250409"> |
<transform xil_pn:end_ts="1336513199" xil_pn:in_ck="4673194791943474574" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="-8986552465892320357" xil_pn:start_ts="1336513183"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="WarningsGenerated"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="OutputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.lso"/> |
<outfile xil_pn:name="INTERCON_P2P.ngc"/> |
<outfile xil_pn:name="INTERCON_P2P.ngr"/> |
330,12 → 348,10
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
</transform> |
<transform xil_pn:end_ts="1336249519" xil_pn:in_ck="4758608941402184672" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-7171404100274592149" xil_pn:start_ts="1336249504"> |
<transform xil_pn:end_ts="1336513221" xil_pn:in_ck="4758608941402184672" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-7171404100274592149" xil_pn:start_ts="1336513207"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="WarningsGenerated"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="InputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.bld"/> |
<outfile xil_pn:name="INTERCON_P2P.ngd"/> |
<outfile xil_pn:name="INTERCON_P2P_cs.blc"/> |
344,13 → 360,10
<outfile xil_pn:name="_ngo"/> |
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/> |
</transform> |
<transform xil_pn:end_ts="1336249526" xil_pn:in_ck="7070038919220904605" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="-5849673150125579957" xil_pn:start_ts="1336249519"> |
<transform xil_pn:end_ts="1336513228" xil_pn:in_ck="7070038919220904605" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="-5849673150125579957" xil_pn:start_ts="1336513221"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="WarningsGenerated"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="OutputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.pcf"/> |
<outfile xil_pn:name="INTERCON_P2P_map.map"/> |
<outfile xil_pn:name="INTERCON_P2P_map.mrp"/> |
361,11 → 374,10
<outfile xil_pn:name="INTERCON_P2P_usage.xml"/> |
<outfile xil_pn:name="_xmsgs/map.xmsgs"/> |
</transform> |
<transform xil_pn:end_ts="1336249541" xil_pn:in_ck="5901297062896623158" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-5563652517805085498" xil_pn:start_ts="1336249526"> |
<transform xil_pn:end_ts="1336513241" xil_pn:in_ck="5901297062896623158" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-5563652517805085498" xil_pn:start_ts="1336513228"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="WarningsGenerated"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<outfile xil_pn:name="INTERCON_P2P.ncd"/> |
<outfile xil_pn:name="INTERCON_P2P.pad"/> |
<outfile xil_pn:name="INTERCON_P2P.par"/> |
377,13 → 389,10
<outfile xil_pn:name="INTERCON_P2P_par.xrpt"/> |
<outfile xil_pn:name="_xmsgs/par.xmsgs"/> |
</transform> |
<transform xil_pn:end_ts="1336249555" xil_pn:in_ck="-1437695683665201866" xil_pn:name="TRANEXT_bitFile_spartan3e" xil_pn:prop_ck="-7817169320884990698" xil_pn:start_ts="1336249541"> |
<transform xil_pn:end_ts="1336513346" xil_pn:in_ck="-1437695683665201866" xil_pn:name="TRANEXT_bitFile_spartan3e" xil_pn:prop_ck="-7817169320884990698" xil_pn:start_ts="1336513333"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="WarningsGenerated"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForOutputs"/> |
<status xil_pn:value="OutputChanged"/> |
<outfile xil_pn:name="INTERCON_P2P.ut"/> |
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/> |
<outfile xil_pn:name="intercon_p2p.bgn"/> |
396,25 → 405,28
<transform xil_pn:end_ts="1336249692" xil_pn:in_ck="-5263026143922103232" xil_pn:name="TRAN_configureTargetDevice" xil_pn:prop_ck="5582947192412673156" xil_pn:start_ts="1336249691"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="InputChanged"/> |
<status xil_pn:value="InputRemoved"/> |
</transform> |
<transform xil_pn:end_ts="1336249854" xil_pn:in_ck="-5263026143922103232" xil_pn:name="TRAN_analyzeDesignUsingChipscope" xil_pn:prop_ck="-7171404100274592149" xil_pn:start_ts="1336249853"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="InputChanged"/> |
<status xil_pn:value="InputRemoved"/> |
</transform> |
<transform xil_pn:end_ts="1336243447" xil_pn:in_ck="-5119142186248317927" xil_pn:name="TRAN_fpgaFloorplanPostPAR" xil_pn:start_ts="1336243447"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForInputs"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<status xil_pn:value="InputAdded"/> |
<status xil_pn:value="InputChanged"/> |
<status xil_pn:value="InputRemoved"/> |
</transform> |
<transform xil_pn:end_ts="1336249541" xil_pn:in_ck="-5119142186248317927" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1336249538"> |
<transform xil_pn:end_ts="1336513241" xil_pn:in_ck="-5119142186248317927" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1336513238"> |
<status xil_pn:value="SuccessfullyRun"/> |
<status xil_pn:value="ReadyToRun"/> |
<status xil_pn:value="OutOfDateForPredecessor"/> |
<outfile xil_pn:name="INTERCON_P2P.twr"/> |
<outfile xil_pn:name="INTERCON_P2P.twx"/> |
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/> |
/trunk/hdl/iseProject/divisor.vhd
1,5 → 1,8
--! Unsigned division circuit, based on slow division algorithm (Restoring division) |
--! http://en.wikipedia.org/wiki/Division_%28digital%29 |
--! @file |
--! @brief Unsigned division circuit, based on slow division algorithm (Restoring division) |
--! http://en.wikipedia.org/wiki/Division_%28digital%29 |
--! The problem with this algorithm is that will take the same ammount of ticks (on this case 32) of |
--! it's operands to resolve... |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.std_logic_arith.all; |
8,15 → 11,17
use work.pkgDefinitions.all; |
|
entity divisor is |
Port ( rst : in STD_LOGIC; |
clk : in STD_LOGIC; |
quotient : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); |
reminder : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); |
numerator : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); |
divident : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); |
Port ( rst : in STD_LOGIC; --! Reset input |
clk : in STD_LOGIC; --! Clock input |
quotient : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Division result (32 bits) |
reminder : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Reminder result (32 bits) |
numerator : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Numerator (32 bits) |
divident : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! "Divide by" number (32 bits) |
done : out STD_LOGIC); |
end divisor; |
|
--! @brief Top divisor architecture |
--! @details http://en.wikipedia.org/wiki/Division_%28digital%29 |
architecture Behavioral of divisor is |
|
begin |
55,6 → 60,7
Q(iteractions) := '1'; |
end if; |
else |
-- We have the results here... |
done <= '1'; |
quotient <= CONV_STD_LOGIC_VECTOR(Q,32); |
reminder <= CONV_STD_LOGIC_VECTOR(R,32); |
/trunk/hdl/iseProject/iseconfig/iseProject.projectmgr
48,7 → 48,7
</SelectedItems> |
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000301000000040101000100000000000000000000000064ffffffff0000008100000000000000040000006900000001000000000000002400000001000000000000006600000001000000000000020e0000000100000000</ViewHeaderState> |
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000000000000000100000000000000000000000000000000000002f1000000040101000100000000000000000000000064ffffffff000000810000000000000004000000690000000100000000000000240000000100000000000000660000000100000000000001fe0000000100000000</ViewHeaderState> |
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
<CurrentItem>pkgDefinitions.vhd</CurrentItem> |
</ItemView> |
78,7 → 78,7
<SelectedItems> |
<SelectedItem>Analyze Design Using ChipScope</SelectedItem> |
</SelectedItems> |
<ScrollbarPosition orientation="vertical" >10</ScrollbarPosition> |
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000153000000010000000100000000000000000000000064ffffffff000000810000000000000001000001530000000100000000</ViewHeaderState> |
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
122,13 → 122,13
<ClosedNode>Design Utilities</ClosedNode> |
</ClosedNodes> |
<SelectedItems> |
<SelectedItem></SelectedItem> |
<SelectedItem/> |
</SelectedItems> |
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f6000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f60000000100000000</ViewHeaderState> |
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
<CurrentItem></CurrentItem> |
<CurrentItem/> |
</ItemView> |
<ItemView engineview="BehavioralSim" sourcetype="DESUT_VHDL_ARCHITECTURE" guiview="Process" > |
<ClosedNodes> |
163,12 → 163,12
<ClosedNodesVersion>1</ClosedNodesVersion> |
</ClosedNodes> |
<SelectedItems> |
<SelectedItem></SelectedItem> |
<SelectedItem/> |
</SelectedItems> |
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition> |
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition> |
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000163000000010000000100000000000000000000000064ffffffff000000810000000000000001000001630000000100000000</ViewHeaderState> |
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths> |
<CurrentItem></CurrentItem> |
<CurrentItem/> |
</ItemView> |
</Project> |
/trunk/hdl/iseProject/pins_spartan3EStarterKit.ucf
1,3 → 1,4
# Constraint file to point to the right pins on the Spartan3E starter kit |
NET "EXTCLK" LOC = "c9"| IOSTANDARD = LVCMOS33 ; |
|
NET "EXTRST" LOC = "n17"| IOSTANDARD = LVCMOS33 ; |
/trunk/hdl/iseProject/INTERCON_P2P.vhd
1,4 → 1,6
|
--! @file |
--! @brief Point to point wishbone interconnection (Sample Master with uart_wishbone_slave) |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
|
15,15 → 17,17
); |
end INTERCON_P2P; |
|
--! @brief Declaring the components (SYC0001a, SERIALMASTER, uart_wishbone_slave) |
--! @details Just instantiate and connect the various components |
architecture Behavioral of INTERCON_P2P is |
component SYC0001a |
port( |
-- WISHBONE Interface |
CLK_O: out std_logic; |
RST_O: out std_logic; |
CLK_O: out std_logic; --! Clock output |
RST_O: out std_logic; --! Reset output |
-- NON-WISHBONE Signals |
EXTCLK: in std_logic; |
EXTRST: in std_logic |
EXTCLK: in std_logic; --! Clock input |
EXTRST: in std_logic --! Reset input |
); |
end component SYC0001a; |
|
30,34 → 34,36
component SERIALMASTER is |
port( |
-- WISHBONE Signals |
ACK_I: in std_logic; |
ADR_O: out std_logic_vector( 1 downto 0 ); |
CLK_I: in std_logic; |
CYC_O: out std_logic; |
DAT_I: in std_logic_vector( 31 downto 0 ); |
DAT_O: out std_logic_vector( 31 downto 0 ); |
RST_I: in std_logic; |
SEL_O: out std_logic; |
STB_O: out std_logic; |
WE_O: out std_logic; |
ACK_I: in std_logic; --! Ack input |
ADR_O: out std_logic_vector( 1 downto 0 ); --! Address output |
CLK_I: in std_logic; --! Clock input |
CYC_O: out std_logic; --! Cycle output |
DAT_I: in std_logic_vector( 31 downto 0 ); --! Data input |
DAT_O: out std_logic_vector( 31 downto 0 ); --! Data output |
RST_I: in std_logic; --! Reset input |
SEL_O: out std_logic; --! Select output |
STB_O: out std_logic; --! Strobe output (Works like a chip select) |
WE_O: out std_logic; --! Write enable |
|
-- NON-WISHBONE Signals |
byte_rec : out std_logic_vector(7 downto 0) |
byte_rec : out std_logic_vector(7 downto 0) --! Signal byte received (Used to debug on the out leds) |
); |
end component; |
|
component uart_wishbone_slave is |
Port ( RST_I : in STD_LOGIC; |
CLK_I : in STD_LOGIC; |
ADR_I0 : in STD_LOGIC_VECTOR (1 downto 0); |
DAT_I0 : in STD_LOGIC_VECTOR (31 downto 0); |
DAT_O0 : out STD_LOGIC_VECTOR (31 downto 0); |
WE_I : in STD_LOGIC; |
STB_I : in STD_LOGIC; |
ACK_O : out STD_LOGIC; |
serial_in : in std_logic; |
data_Avaible : out std_logic; |
serial_out : out std_logic |
Port ( RST_I : in STD_LOGIC; --! Reset Input |
CLK_I : in STD_LOGIC; --! Clock Input |
ADR_I0 : in STD_LOGIC_VECTOR (1 downto 0); --! Address input |
DAT_I0 : in STD_LOGIC_VECTOR (31 downto 0); --! Data Input 0 |
DAT_O0 : out STD_LOGIC_VECTOR (31 downto 0); --! Data Output 0 |
WE_I : in STD_LOGIC; --! Write enable input |
STB_I : in STD_LOGIC; --! Strobe input (Works like a chip select) |
ACK_O : out STD_LOGIC; --! Ack output |
|
-- NON-WISHBONE Signals |
serial_in : in std_logic; --! Uart serial input |
data_Avaible : out std_logic; --! Flag to indicate data avaible |
serial_out : out std_logic --! Uart serial output |
); |
end component; |
signal CLK : std_logic; |
69,6 → 75,7
signal dataI : std_logic_vector (31 downto 0); |
signal dataO : std_logic_vector (31 downto 0); |
begin |
--! Instantiate SYC0001a |
uSysCon: component SYC0001a |
port map( |
CLK_O => CLK, |
77,6 → 84,7
EXTRST => EXTRST |
); |
|
--! Instantiate SERIALMASTER |
uMasterSerial : component SERIALMASTER |
port map( |
ACK_I => ACK, |
92,6 → 100,7
WE_O => WE |
); |
|
--! Instantiate uart_wishbone_slave |
uUartWishboneSlave: component uart_wishbone_slave |
port map( |
RST_I => RST, |
/trunk/hdl/iseProject/uart_wishbone_slave.vhd
1,4 → 1,6
--! Top wishbone slave for the uart |
--! @file |
--! @brief Top wishbone slave for the uart (Connects uart_control and uart_communication_blocks) |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
|
6,50 → 8,54
use work.pkgDefinitions.all; |
|
entity uart_wishbone_slave is |
Port ( RST_I : in STD_LOGIC; |
CLK_I : in STD_LOGIC; |
ADR_I0 : in STD_LOGIC_VECTOR (1 downto 0); |
DAT_I0 : in STD_LOGIC_VECTOR (31 downto 0); |
DAT_O0 : out STD_LOGIC_VECTOR (31 downto 0); |
WE_I : in STD_LOGIC; |
STB_I : in STD_LOGIC; |
ACK_O : out STD_LOGIC; |
serial_in : in std_logic; |
data_Avaible : out std_logic; -- Indicate that the receiver module got something |
Port ( RST_I : in STD_LOGIC; --! Reset Input |
CLK_I : in STD_LOGIC; --! Clock Input |
ADR_I0 : in STD_LOGIC_VECTOR (1 downto 0); --! Address input |
DAT_I0 : in STD_LOGIC_VECTOR (31 downto 0); --! Data Input 0 |
DAT_O0 : out STD_LOGIC_VECTOR (31 downto 0); --! Data Output 0 |
WE_I : in STD_LOGIC; --! Write enable input |
STB_I : in STD_LOGIC; --! Strobe input (Works like a chip select) |
ACK_O : out STD_LOGIC; --! Ack output |
|
-- NON-WISHBONE Signals |
serial_in : in std_logic; --! Uart serial input |
data_Avaible : out std_logic; --! Flag to indicate data avaible |
serial_out : out std_logic |
); |
end uart_wishbone_slave; |
|
--! @brief Top uart_wishbone_slave architecture |
--! @details Connect the control unit and the communication blocks |
architecture Behavioral of uart_wishbone_slave is |
component uart_control is |
Port ( rst : in std_logic; -- Global reset |
clk : in std_logic; -- Global clock |
WE : in std_logic; -- Write enable |
reg_addr : in std_logic_vector (1 downto 0); -- Register address |
start : in std_logic; -- Start (Strobe) |
done : out std_logic; -- Done (ACK) |
DAT_I : in std_logic_vector ((nBitsLarge-1) downto 0); -- Data Input (Wishbone) |
DAT_O : out std_logic_vector ((nBitsLarge-1) downto 0); -- Data output (Wishbone) |
baud_wait : out std_logic_vector ((nBitsLarge-1) downto 0); -- Signal to control the baud rate frequency |
data_byte_tx : out std_logic_vector((nBits-1) downto 0); -- 1 Byte to be send to serial_transmitter |
data_byte_rx : in std_logic_vector((nBits-1) downto 0); -- 1 Byte to be received by serial_receiver |
tx_data_sent : in std_logic; -- Signal comming from serial_transmitter |
tx_start : out std_logic; -- Signal to start sending serial data... |
rst_comm_blocks : out std_logic; -- Reset Communication blocks |
Port ( rst : in std_logic; --! Global reset |
clk : in std_logic; --! Global clock |
WE : in std_logic; --! Write enable |
reg_addr : in std_logic_vector (1 downto 0); --! Register address |
start : in std_logic; --! Start (Strobe) |
done : out std_logic; --! Done (ACK) |
DAT_I : in std_logic_vector ((nBitsLarge-1) downto 0); --! Data Input (Wishbone) |
DAT_O : out std_logic_vector ((nBitsLarge-1) downto 0); --! Data output (Wishbone) |
baud_wait : out std_logic_vector ((nBitsLarge-1) downto 0); --! Signal to control the baud rate frequency |
data_byte_tx : out std_logic_vector((nBits-1) downto 0); --! 1 Byte to be send to serial_transmitter |
data_byte_rx : in std_logic_vector((nBits-1) downto 0); --! 1 Byte to be received by serial_receiver |
tx_data_sent : in std_logic; --! Signal comming from serial_transmitter |
tx_start : out std_logic; --! Signal to start sending serial data... |
rst_comm_blocks : out std_logic; --! Reset Communication blocks |
rx_data_ready : in std_logic); |
end component; |
|
component uart_communication_blocks is |
Port ( rst : in STD_LOGIC; |
clk : in STD_LOGIC; |
cycle_wait_baud : in std_logic_vector((nBitsLarge-1) downto 0); |
byte_tx : in STD_LOGIC_VECTOR ((nBits-1) downto 0); |
byte_rx : out STD_LOGIC_VECTOR ((nBits-1) downto 0); |
data_sent_tx : out STD_LOGIC; |
data_received_rx : out STD_LOGIC; |
serial_out : out std_logic; |
serial_in : in std_logic; |
start_tx : in STD_LOGIC); |
Port ( rst : in STD_LOGIC; --! Global reset |
clk : in STD_LOGIC; --! Global clock |
cycle_wait_baud : in std_logic_vector((nBitsLarge-1) downto 0); --! Number of cycles to wait in order to generate desired baud |
byte_tx : in STD_LOGIC_VECTOR ((nBits-1) downto 0); --! Byte to transmit |
byte_rx : out STD_LOGIC_VECTOR ((nBits-1) downto 0); --! Byte to receive |
data_sent_tx : out STD_LOGIC; --! Indicate that byte has been sent |
data_received_rx : out STD_LOGIC; --! Indicate that we got a byte |
serial_out : out std_logic; --! Uart serial out |
serial_in : in std_logic; --! Uart serial in |
start_tx : in STD_LOGIC); --! Initiate transmission |
end component; |
signal baud_wait : std_logic_vector((nBitsLarge-1) downto 0); |
signal tx_data_sent : std_logic; |
59,7 → 65,7
signal data_byte_tx : std_logic_vector(7 downto 0); |
signal data_byte_rx : std_logic_vector(7 downto 0); |
begin |
-- Instantiate uart_control |
--! Instantiate uart_control |
uUartControl : uart_control port map ( |
rst => RST_I, |
clk => CLK_I, |
78,7 → 84,7
rx_data_ready => rx_data_ready |
); |
|
-- Instantiate uart_communication_blocks |
--! Instantiate uart_communication_blocks |
uUartCommunicationBlocks : uart_communication_blocks port map ( |
rst => rst_comm_blocks, |
clk => CLK_I, |
/trunk/hdl/iseProject/testUart_communication_block.vhd
47,7 → 47,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: uart_communication_blocks PORT MAP ( |
rst => rst, |
clk => clk, |
/trunk/hdl/iseProject/_xmsgs/pn_parser.xmsgs
8,7 → 8,7
<!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --> |
|
<messages> |
<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "E:/uart_block/hdl/iseProject/testSerial_receiver.vhd" into library work</arg> |
<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "E:/uart_block/hdl/iseProject/testUart_wishbone_slave.vhd" into library work</arg> |
</msg> |
|
</messages> |
/trunk/hdl/iseProject/_xmsgs/xst.xmsgs
5,969 → 5,969
behavior or data corruption. It is strongly advised that |
users do not edit the contents of this file. --> |
<messages> |
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">80</arg>: Unconnected output port '<arg fmt="%s" index="3">CYC_O</arg>' of component '<arg fmt="%s" index="4">SERIALMASTER</arg>'. |
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">88</arg>: Unconnected output port '<arg fmt="%s" index="3">CYC_O</arg>' of component '<arg fmt="%s" index="4">SERIALMASTER</arg>'. |
</msg> |
|
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">80</arg>: Unconnected output port '<arg fmt="%s" index="3">SEL_O</arg>' of component '<arg fmt="%s" index="4">SERIALMASTER</arg>'. |
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">88</arg>: Unconnected output port '<arg fmt="%s" index="3">SEL_O</arg>' of component '<arg fmt="%s" index="4">SERIALMASTER</arg>'. |
</msg> |
|
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">95</arg>: Unconnected output port '<arg fmt="%s" index="3">data_Avaible</arg>' of component '<arg fmt="%s" index="4">uart_wishbone_slave</arg>'. |
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/INTERCON_P2P.vhd</arg>" line <arg fmt="%d" index="2">104</arg>: Unconnected output port '<arg fmt="%s" index="3">data_Avaible</arg>' of component '<arg fmt="%s" index="4">uart_wishbone_slave</arg>'. |
</msg> |
|
<msg type="warning" file="Xst" num="1610" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/SERIALMASTER.vhd</arg>" line <arg fmt="%d" index="2">46</arg>: Width mismatch. <<arg fmt="%s" index="3">byteIncome</arg>> has a width of <arg fmt="%d" index="4">8</arg> bits but assigned expression is <arg fmt="%d" index="5">32</arg>-bit wide. |
<msg type="warning" file="Xst" num="1610" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/SERIALMASTER.vhd</arg>" line <arg fmt="%d" index="2">49</arg>: Width mismatch. <<arg fmt="%s" index="3">byteIncome</arg>> has a width of <arg fmt="%d" index="4">8</arg> bits but assigned expression is <arg fmt="%d" index="5">32</arg>-bit wide. |
</msg> |
|
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/uart_control.vhd</arg>" line <arg fmt="%d" index="2">62</arg>: Unconnected output port '<arg fmt="%s" index="3">reminder</arg>' of component '<arg fmt="%s" index="4">divisor</arg>'. |
<msg type="warning" file="Xst" num="753" delta="new" >"<arg fmt="%s" index="1">E:/uart_block/hdl/iseProject/uart_control.vhd</arg>" line <arg fmt="%d" index="2">65</arg>: Unconnected output port '<arg fmt="%s" index="3">reminder</arg>' of component '<arg fmt="%s" index="4">divisor</arg>'. |
</msg> |
|
<msg type="warning" file="Xst" num="647" delta="new" >Input <<arg fmt="%s" index="1">DAT_I<31:8></arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. |
<msg type="warning" file="Xst" num="647" delta="old" >Input <<arg fmt="%s" index="1">DAT_I<31:8></arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. |
</msg> |
|
<msg type="warning" file="Xst" num="1305" delta="new" >Output <<arg fmt="%s" index="1">CYC_O</arg>> is never assigned. Tied to value <arg fmt="%s" index="2">0</arg>. |
<msg type="warning" file="Xst" num="1305" delta="old" >Output <<arg fmt="%s" index="1">CYC_O</arg>> is never assigned. Tied to value <arg fmt="%s" index="2">0</arg>. |
</msg> |
|
<msg type="warning" file="Xst" num="1305" delta="new" >Output <<arg fmt="%s" index="1">SEL_O</arg>> is never assigned. Tied to value <arg fmt="%s" index="2">0</arg>. |
<msg type="warning" file="Xst" num="1305" delta="old" >Output <<arg fmt="%s" index="1">SEL_O</arg>> is never assigned. Tied to value <arg fmt="%s" index="2">0</arg>. |
</msg> |
|
<msg type="warning" file="Xst" num="1306" delta="new" >Output <<arg fmt="%s" index="1">data_avaible</arg>> is never assigned. |
<msg type="warning" file="Xst" num="1306" delta="old" >Output <<arg fmt="%s" index="1">data_avaible</arg>> is never assigned. |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_23</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_25> <half_cycle0_22> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_23</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_25> <half_cycle0_22> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_14</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_16> <half_cycle0_13> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_14</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_16> <half_cycle0_13> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_10</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_12> <half_cycle0_9> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_10</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_12> <half_cycle0_9> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_1</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_3> <half_cycle0_0> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_1</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_3> <half_cycle0_0> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_4</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_6> <half_cycle0_3> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_4</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_6> <half_cycle0_3> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_28</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_30> <half_cycle0_27> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_28</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_30> <half_cycle0_27> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_24</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_26> <half_cycle0_23> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_24</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_26> <half_cycle0_23> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_19</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_21> <half_cycle0_18> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_19</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_21> <half_cycle0_18> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_22</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_24> <half_cycle0_21> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_22</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_24> <half_cycle0_21> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_13</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_15> <half_cycle0_12> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_13</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_15> <half_cycle0_12> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_0</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_2> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_0</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_2> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_27</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_29> <half_cycle0_26> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_27</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_29> <half_cycle0_26> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_2</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_4> <half_cycle0_1> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_2</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_4> <half_cycle0_1> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><cycle_wait_oversample_31> <cycle_wait_oversample_30> <half_cycle_31> <half_cycle0_31> <half_cycle0_30> <half_cycle0_29> <half_cycle0_28> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><cycle_wait_oversample_31> <cycle_wait_oversample_30> <half_cycle_31> <half_cycle0_31> <half_cycle0_30> <half_cycle0_29> <half_cycle0_28> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_18</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_20> <half_cycle0_17> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_18</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_20> <half_cycle0_17> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_8</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_10> <half_cycle0_7> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_8</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_10> <half_cycle0_7> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_5</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_7> <half_cycle0_4> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_5</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_7> <half_cycle0_4> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_21</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_23> <half_cycle0_20> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_21</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_23> <half_cycle0_20> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_16</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_18> <half_cycle0_15> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_16</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_18> <half_cycle0_15> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_12</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_14> <half_cycle0_11> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_12</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_14> <half_cycle0_11> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_26</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_28> <half_cycle0_25> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_26</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_28> <half_cycle0_25> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_7</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_9> <half_cycle0_6> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_7</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_9> <half_cycle0_6> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_17</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_19> <half_cycle0_16> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_17</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_19> <half_cycle0_16> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_20</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_22> <half_cycle0_19> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_20</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_22> <half_cycle0_19> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_15</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_17> <half_cycle0_14> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_15</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_17> <half_cycle0_14> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_3</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_5> <half_cycle0_2> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_3</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_5> <half_cycle0_2> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_9</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_11> <half_cycle0_8> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_9</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_11> <half_cycle0_8> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_11</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_13> <half_cycle0_10> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_11</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_13> <half_cycle0_10> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_6</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_8> <half_cycle0_5> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_6</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_8> <half_cycle0_5> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_25</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_27> <half_cycle0_24> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_25</arg>> in Unit <<arg fmt="%s" index="2">uBaudGen</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_27> <half_cycle0_24> </arg> |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_clk_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_clk_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">config_baud_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">config_baud_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uBaudGen</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uBaudGen</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uMasterSerial</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">N_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">N_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">D_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">D_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uDiv</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivDividend_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">sigDivNumerator_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">uUartControl</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">half_cycle0_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">baud_generator</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_23</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_25> <half_cycle0_22> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_23</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_25> <half_cycle0_22> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_14</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_16> <half_cycle0_13> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_14</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_16> <half_cycle0_13> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_10</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_12> <half_cycle0_9> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_10</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_12> <half_cycle0_9> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_1</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_3> <half_cycle0_0> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_1</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_3> <half_cycle0_0> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_4</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_6> <half_cycle0_3> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_4</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_6> <half_cycle0_3> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_28</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_30> <half_cycle0_27> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_28</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_30> <half_cycle0_27> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_24</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_26> <half_cycle0_23> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_24</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_26> <half_cycle0_23> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_19</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_21> <half_cycle0_18> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_19</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_21> <half_cycle0_18> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_22</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_24> <half_cycle0_21> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_22</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_24> <half_cycle0_21> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_13</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_15> <half_cycle0_12> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_13</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_15> <half_cycle0_12> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_0</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_2> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_0</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_2> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_27</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_29> <half_cycle0_26> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_27</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_29> <half_cycle0_26> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_2</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_4> <half_cycle0_1> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_2</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_4> <half_cycle0_1> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_18</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_20> <half_cycle0_17> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_18</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_20> <half_cycle0_17> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_8</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_10> <half_cycle0_7> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_8</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_10> <half_cycle0_7> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_5</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_7> <half_cycle0_4> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_5</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_7> <half_cycle0_4> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_21</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_23> <half_cycle0_20> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_21</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_23> <half_cycle0_20> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_16</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_18> <half_cycle0_15> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_16</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_18> <half_cycle0_15> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_12</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_14> <half_cycle0_11> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_12</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_14> <half_cycle0_11> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_26</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_28> <half_cycle0_25> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_26</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_28> <half_cycle0_25> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_7</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_9> <half_cycle0_6> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_7</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_9> <half_cycle0_6> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_17</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_19> <half_cycle0_16> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_17</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_19> <half_cycle0_16> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_20</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_22> <half_cycle0_19> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_20</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_22> <half_cycle0_19> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_15</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_17> <half_cycle0_14> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_15</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_17> <half_cycle0_14> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_3</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_5> <half_cycle0_2> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_3</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_5> <half_cycle0_2> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_9</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_11> <half_cycle0_8> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_9</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_11> <half_cycle0_8> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_11</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_13> <half_cycle0_10> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_11</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_13> <half_cycle0_10> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_6</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_8> <half_cycle0_5> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_6</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_8> <half_cycle0_5> </arg> |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_25</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_27> <half_cycle0_24> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">cycle_wait_oversample_25</arg>> in Unit <<arg fmt="%s" index="2">baud_generator</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><half_cycle_27> <half_cycle0_24> </arg> |
</msg> |
|
<msg type="warning" file="Xst" num="1293" delta="new" >FF/Latch <<arg fmt="%s" index="1">cycles2Wait_0</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">cycles2Wait_0</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_1</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_1</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_2</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_2</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_4</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_4</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_5</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_5</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_23</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">cycles2Wait_23</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">nextState_1</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">nextState_1</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1896" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">nextState_5</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">nextState_5</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">SERIALMASTER</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="info" file="Xst" num="2261" delta="new" >The FF/Latch <<arg fmt="%s" index="1">current_s_FSM_FFd1</arg>> in Unit <<arg fmt="%s" index="2">serial_receiver</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><data_ready> </arg> |
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">current_s_FSM_FFd1</arg>> in Unit <<arg fmt="%s" index="2">serial_receiver</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><data_ready> </arg> |
</msg> |
|
<msg type="warning" file="Xst" num="2042" delta="new" >Unit <arg fmt="%s" index="1">uart_control</arg>: <arg fmt="%d" index="2">32</arg> internal tristates are replaced by logic (pull-up <arg fmt="%s" index="3">yes</arg>): </msg> |
<msg type="warning" file="Xst" num="2042" delta="old" >Unit <arg fmt="%s" index="1">uart_control</arg>: <arg fmt="%d" index="2">32</arg> internal tristates are replaced by logic (pull-up <arg fmt="%s" index="3">yes</arg>): </msg> |
|
<msg type="warning" file="Xst" num="1293" delta="new" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1293" delta="new" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1293" delta="new" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">waitBestPoint_3</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">serial_receiver</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_clk_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/config_baud_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivNumerator_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/sigDivDividend_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/D_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/N_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/R_31</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/R_31</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_0</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_0</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_1</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_1</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_2</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_2</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_3</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_3</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_4</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_4</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_5</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_5</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_6</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_6</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_7</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_7</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_8</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_8</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_9</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_9</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_10</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_10</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_11</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_11</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_12</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_12</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_13</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_13</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_14</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_14</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_15</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_15</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_16</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_16</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_17</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_17</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_18</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_18</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_19</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_19</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_20</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_20</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_21</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_21</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_22</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_22</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_23</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_23</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_24</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_24</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_25</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_25</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_26</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_26</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_27</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_27</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_28</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_28</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_29</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_29</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_30</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_30</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="2677" delta="new" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_31</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
<msg type="warning" file="Xst" num="2677" delta="old" >Node <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/uDiv/reminder_31</arg>> of sequential type is unconnected in block <<arg fmt="%s" index="2">INTERCON_P2P</arg>>. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1895" delta="new" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1895" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_31</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_30</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_29</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_28</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_27</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_26</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_24</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_18</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_11</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_10</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="1710" delta="new" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
<msg type="warning" file="Xst" num="1710" delta="old" >FF/Latch <<arg fmt="%s" index="1">uUartWishboneSlave/uUartControl/Mtridata_DAT_O_8</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">INTERCON_P2P</arg>>. This FF/Latch will be trimmed during the optimization process. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<11></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<11></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<18></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<18></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<24></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<24></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<26></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<26></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<27></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<27></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<28></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<28></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<29></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<29></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<30></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<30></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<31></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<31></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="warning" file="Xst" num="638" delta="new" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<8></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
<msg type="warning" file="Xst" num="638" delta="old" >in unit <arg fmt="%s" index="1">INTERCON_P2P</arg> Conflict on KEEP property on signal <arg fmt="%s" index="2">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<8></arg> and <arg fmt="%s" index="3">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> <arg fmt="%s" index="4">uUartWishboneSlave/uUartControl/Mtridata_DAT_O<10></arg> signal will be lost. |
</msg> |
|
<msg type="info" file="Xst" num="2169" delta="new" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems. |
<msg type="info" file="Xst" num="2169" delta="old" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems. |
</msg> |
|
</messages> |
/trunk/hdl/iseProject/testBaud_generator.vhd
37,7 → 37,7
|
BEGIN |
|
-- Instantiate the Unit Under Test (UUT) |
--! Instantiate the Unit Under Test (UUT) |
uut: baud_generator PORT MAP ( |
rst => rst, |
clk => clk, |
/trunk/hdl/iseProject/uart_communication_blocks.vhd
6,16 → 6,16
use work.pkgDefinitions.all; |
|
entity uart_communication_blocks is |
Port ( rst : in STD_LOGIC; |
clk : in STD_LOGIC; |
cycle_wait_baud : in std_logic_vector((nBitsLarge-1) downto 0); |
byte_tx : in STD_LOGIC_VECTOR ((nBits-1) downto 0); |
byte_rx : out STD_LOGIC_VECTOR ((nBits-1) downto 0); |
data_sent_tx : out STD_LOGIC; |
data_received_rx : out STD_LOGIC; |
serial_out : out std_logic; |
serial_in : in std_logic; |
start_tx : in STD_LOGIC); |
Port ( rst : in STD_LOGIC; --! Global reset |
clk : in STD_LOGIC; --! Global clock |
cycle_wait_baud : in std_logic_vector((nBitsLarge-1) downto 0); --! Number of cycles to wait in order to generate desired baud |
byte_tx : in STD_LOGIC_VECTOR ((nBits-1) downto 0); --! Byte to transmit |
byte_rx : out STD_LOGIC_VECTOR ((nBits-1) downto 0); --! Byte to receive |
data_sent_tx : out STD_LOGIC; --! Indicate that byte has been sent |
data_received_rx : out STD_LOGIC; --! Indicate that we got a byte |
serial_out : out std_logic; --! Uart serial out |
serial_in : in std_logic; --! Uart serial in |
start_tx : in STD_LOGIC); --! Initiate transmission |
end uart_communication_blocks; |
|
architecture Behavioral of uart_communication_blocks is |
48,7 → 48,7
signal baud_tick : std_logic; |
signal baud_tick_oversample : std_logic; |
begin |
-- Instantiate baud generator |
--! Instantiate baud generator |
uBaudGen : baud_generator port map ( |
rst => rst, |
clk => clk, |
57,7 → 57,7
baud => baud_tick |
); |
|
-- Instantiate serial_transmitter |
--! Instantiate serial_transmitter |
uTransmitter : serial_transmitter port map ( |
rst => not start_tx, |
baudClk => baud_tick, |
66,7 → 66,7
serial_out => serial_out |
); |
|
-- Instantiate serial_receiver |
--! Instantiate serial_receiver |
uReceiver : serial_receiver port map( |
rst => rst, |
baudOverSampleClk => baud_tick_oversample, |
/trunk/docs/confDoxygen.cnf
0,0 → 1,1802
# Doxyfile 1.8.0 |
|
# This file describes the settings to be used by the documentation system |
# doxygen (www.doxygen.org) for a project |
# |
# All text after a hash (#) is considered a comment and will be ignored |
# The format is: |
# TAG = value [value, ...] |
# For lists items can also be appended using: |
# TAG += value [value, ...] |
# Values that contain spaces should be placed between quotes (" ") |
|
#--------------------------------------------------------------------------- |
# Project related configuration options |
#--------------------------------------------------------------------------- |
|
# This tag specifies the encoding used for all characters in the config file |
# that follow. The default is UTF-8 which is also the encoding used for all |
# text before the first occurrence of this tag. Doxygen uses libiconv (or the |
# iconv built into libc) for the transcoding. See |
# http://www.gnu.org/software/libiconv for the list of possible encodings. |
|
DOXYFILE_ENCODING = UTF-8 |
|
# The PROJECT_NAME tag is a single word (or sequence of words) that should |
# identify the project. Note that if you do not use Doxywizard you need |
# to put quotes around the project name if it contains spaces. |
|
PROJECT_NAME = "Uart wishbone slave Documentation" |
|
# The PROJECT_NUMBER tag can be used to enter a project or revision number. |
# This could be handy for archiving the generated documentation or |
# if some version control system is used. |
|
PROJECT_NUMBER = |
|
# Using the PROJECT_BRIEF tag one can provide an optional one line description |
# for a project that appears at the top of each page and should give viewer |
# a quick idea about the purpose of the project. Keep the description short. |
|
PROJECT_BRIEF = |
|
# With the PROJECT_LOGO tag one can specify an logo or icon that is |
# included in the documentation. The maximum height of the logo should not |
# exceed 55 pixels and the maximum width should not exceed 200 pixels. |
# Doxygen will copy the logo to the output directory. |
|
PROJECT_LOGO = |
|
# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) |
# base path where the generated documentation will be put. |
# If a relative path is entered, it will be relative to the location |
# where doxygen was started. If left blank the current directory will be used. |
|
OUTPUT_DIRECTORY = gen |
|
# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create |
# 4096 sub-directories (in 2 levels) under the output directory of each output |
# format and will distribute the generated files over these directories. |
# Enabling this option can be useful when feeding doxygen a huge amount of |
# source files, where putting all generated files in the same directory would |
# otherwise cause performance problems for the file system. |
|
CREATE_SUBDIRS = NO |
|
# The OUTPUT_LANGUAGE tag is used to specify the language in which all |
# documentation generated by doxygen is written. Doxygen will use this |
# information to generate all constant output in the proper language. |
# The default language is English, other supported languages are: |
# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional, |
# Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German, |
# Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English |
# messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, |
# Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrillic, Slovak, |
# Slovene, Spanish, Swedish, Ukrainian, and Vietnamese. |
|
OUTPUT_LANGUAGE = English |
|
# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will |
# include brief member descriptions after the members that are listed in |
# the file and class documentation (similar to JavaDoc). |
# Set to NO to disable this. |
|
BRIEF_MEMBER_DESC = YES |
|
# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend |
# the brief description of a member or function before the detailed description. |
# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the |
# brief descriptions will be completely suppressed. |
|
REPEAT_BRIEF = YES |
|
# This tag implements a quasi-intelligent brief description abbreviator |
# that is used to form the text in various listings. Each string |
# in this list, if found as the leading text of the brief description, will be |
# stripped from the text and the result after processing the whole list, is |
# used as the annotated text. Otherwise, the brief description is used as-is. |
# If left blank, the following values are used ("$name" is automatically |
# replaced with the name of the entity): "The $name class" "The $name widget" |
# "The $name file" "is" "provides" "specifies" "contains" |
# "represents" "a" "an" "the" |
|
ABBREVIATE_BRIEF = "The $name class" \ |
"The $name widget" \ |
"The $name file" \ |
is \ |
provides \ |
specifies \ |
contains \ |
represents \ |
a \ |
an \ |
the |
|
# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then |
# Doxygen will generate a detailed section even if there is only a brief |
# description. |
|
ALWAYS_DETAILED_SEC = NO |
|
# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all |
# inherited members of a class in the documentation of that class as if those |
# members were ordinary class members. Constructors, destructors and assignment |
# operators of the base classes will not be shown. |
|
INLINE_INHERITED_MEMB = NO |
|
# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full |
# path before files name in the file list and in the header files. If set |
# to NO the shortest path that makes the file name unique will be used. |
|
FULL_PATH_NAMES = YES |
|
# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag |
# can be used to strip a user-defined part of the path. Stripping is |
# only done if one of the specified strings matches the left-hand part of |
# the path. The tag can be used to show relative paths in the file list. |
# If left blank the directory from which doxygen is run is used as the |
# path to strip. |
|
STRIP_FROM_PATH = |
|
# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of |
# the path mentioned in the documentation of a class, which tells |
# the reader which header file to include in order to use a class. |
# If left blank only the name of the header file containing the class |
# definition is used. Otherwise one should specify the include paths that |
# are normally passed to the compiler using the -I flag. |
|
STRIP_FROM_INC_PATH = |
|
# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter |
# (but less readable) file names. This can be useful if your file system |
# doesn't support long names like on DOS, Mac, or CD-ROM. |
|
SHORT_NAMES = NO |
|
# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen |
# will interpret the first line (until the first dot) of a JavaDoc-style |
# comment as the brief description. If set to NO, the JavaDoc |
# comments will behave just like regular Qt-style comments |
# (thus requiring an explicit @brief command for a brief description.) |
|
JAVADOC_AUTOBRIEF = NO |
|
# If the QT_AUTOBRIEF tag is set to YES then Doxygen will |
# interpret the first line (until the first dot) of a Qt-style |
# comment as the brief description. If set to NO, the comments |
# will behave just like regular Qt-style comments (thus requiring |
# an explicit \brief command for a brief description.) |
|
QT_AUTOBRIEF = NO |
|
# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen |
# treat a multi-line C++ special comment block (i.e. a block of //! or /// |
# comments) as a brief description. This used to be the default behaviour. |
# The new default is to treat a multi-line C++ comment block as a detailed |
# description. Set this tag to YES if you prefer the old behaviour instead. |
|
MULTILINE_CPP_IS_BRIEF = NO |
|
# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented |
# member inherits the documentation from any documented member that it |
# re-implements. |
|
INHERIT_DOCS = YES |
|
# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce |
# a new page for each member. If set to NO, the documentation of a member will |
# be part of the file/class/namespace that contains it. |
|
SEPARATE_MEMBER_PAGES = NO |
|
# The TAB_SIZE tag can be used to set the number of spaces in a tab. |
# Doxygen uses this value to replace tabs by spaces in code fragments. |
|
TAB_SIZE = 8 |
|
# This tag can be used to specify a number of aliases that acts |
# as commands in the documentation. An alias has the form "name=value". |
# For example adding "sideeffect=\par Side Effects:\n" will allow you to |
# put the command \sideeffect (or @sideeffect) in the documentation, which |
# will result in a user-defined paragraph with heading "Side Effects:". |
# You can put \n's in the value part of an alias to insert newlines. |
|
ALIASES = |
|
# This tag can be used to specify a number of word-keyword mappings (TCL only). |
# A mapping has the form "name=value". For example adding |
# "class=itcl::class" will allow you to use the command class in the |
# itcl::class meaning. |
|
TCL_SUBST = |
|
# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C |
# sources only. Doxygen will then generate output that is more tailored for C. |
# For instance, some of the names that are used will be different. The list |
# of all members will be omitted, etc. |
|
OPTIMIZE_OUTPUT_FOR_C = NO |
|
# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java |
# sources only. Doxygen will then generate output that is more tailored for |
# Java. For instance, namespaces will be presented as packages, qualified |
# scopes will look different, etc. |
|
OPTIMIZE_OUTPUT_JAVA = NO |
|
# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran |
# sources only. Doxygen will then generate output that is more tailored for |
# Fortran. |
|
OPTIMIZE_FOR_FORTRAN = NO |
|
# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL |
# sources. Doxygen will then generate output that is tailored for |
# VHDL. |
|
OPTIMIZE_OUTPUT_VHDL = YES |
|
# Doxygen selects the parser to use depending on the extension of the files it |
# parses. With this tag you can assign which parser to use for a given extension. |
# Doxygen has a built-in mapping, but you can override or extend it using this |
# tag. The format is ext=language, where ext is a file extension, and language |
# is one of the parsers supported by doxygen: IDL, Java, Javascript, CSharp, C, |
# C++, D, PHP, Objective-C, Python, Fortran, VHDL, C, C++. For instance to make |
# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C |
# (default is Fortran), use: inc=Fortran f=C. Note that for custom extensions |
# you also need to set FILE_PATTERNS otherwise the files are not read by doxygen. |
|
EXTENSION_MAPPING = |
|
# If MARKDOWN_SUPPORT is enabled (the default) then doxygen pre-processes all |
# comments according to the Markdown format, which allows for more readable |
# documentation. See http://daringfireball.net/projects/markdown/ for details. |
# The output of markdown processing is further processed by doxygen, so you |
# can mix doxygen, HTML, and XML commands with Markdown formatting. |
# Disable only in case of backward compatibilities issues. |
|
MARKDOWN_SUPPORT = YES |
|
# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want |
# to include (a tag file for) the STL sources as input, then you should |
# set this tag to YES in order to let doxygen match functions declarations and |
# definitions whose arguments contain STL classes (e.g. func(std::string); v.s. |
# func(std::string) {}). This also makes the inheritance and collaboration |
# diagrams that involve STL classes more complete and accurate. |
|
BUILTIN_STL_SUPPORT = NO |
|
# If you use Microsoft's C++/CLI language, you should set this option to YES to |
# enable parsing support. |
|
CPP_CLI_SUPPORT = NO |
|
# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only. |
# Doxygen will parse them like normal C++ but will assume all classes use public |
# instead of private inheritance when no explicit protection keyword is present. |
|
SIP_SUPPORT = NO |
|
# For Microsoft's IDL there are propget and propput attributes to indicate getter |
# and setter methods for a property. Setting this option to YES (the default) |
# will make doxygen replace the get and set methods by a property in the |
# documentation. This will only work if the methods are indeed getting or |
# setting a simple type. If this is not the case, or you want to show the |
# methods anyway, you should set this option to NO. |
|
IDL_PROPERTY_SUPPORT = YES |
|
# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC |
# tag is set to YES, then doxygen will reuse the documentation of the first |
# member in the group (if any) for the other members of the group. By default |
# all members of a group must be documented explicitly. |
|
DISTRIBUTE_GROUP_DOC = NO |
|
# Set the SUBGROUPING tag to YES (the default) to allow class member groups of |
# the same type (for instance a group of public functions) to be put as a |
# subgroup of that type (e.g. under the Public Functions section). Set it to |
# NO to prevent subgrouping. Alternatively, this can be done per class using |
# the \nosubgrouping command. |
|
SUBGROUPING = YES |
|
# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and |
# unions are shown inside the group in which they are included (e.g. using |
# @ingroup) instead of on a separate page (for HTML and Man pages) or |
# section (for LaTeX and RTF). |
|
INLINE_GROUPED_CLASSES = NO |
|
# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and |
# unions with only public data fields will be shown inline in the documentation |
# of the scope in which they are defined (i.e. file, namespace, or group |
# documentation), provided this scope is documented. If set to NO (the default), |
# structs, classes, and unions are shown on a separate page (for HTML and Man |
# pages) or section (for LaTeX and RTF). |
|
INLINE_SIMPLE_STRUCTS = NO |
|
# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum |
# is documented as struct, union, or enum with the name of the typedef. So |
# typedef struct TypeS {} TypeT, will appear in the documentation as a struct |
# with name TypeT. When disabled the typedef will appear as a member of a file, |
# namespace, or class. And the struct will be named TypeS. This can typically |
# be useful for C code in case the coding convention dictates that all compound |
# types are typedef'ed and only the typedef is referenced, never the tag name. |
|
TYPEDEF_HIDES_STRUCT = NO |
|
# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to |
# determine which symbols to keep in memory and which to flush to disk. |
# When the cache is full, less often used symbols will be written to disk. |
# For small to medium size projects (<1000 input files) the default value is |
# probably good enough. For larger projects a too small cache size can cause |
# doxygen to be busy swapping symbols to and from disk most of the time |
# causing a significant performance penalty. |
# If the system has enough physical memory increasing the cache will improve the |
# performance by keeping more symbols in memory. Note that the value works on |
# a logarithmic scale so increasing the size by one will roughly double the |
# memory usage. The cache size is given by this formula: |
# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0, |
# corresponding to a cache size of 2^16 = 65536 symbols. |
|
SYMBOL_CACHE_SIZE = 0 |
|
# Similar to the SYMBOL_CACHE_SIZE the size of the symbol lookup cache can be |
# set using LOOKUP_CACHE_SIZE. This cache is used to resolve symbols given |
# their name and scope. Since this can be an expensive process and often the |
# same symbol appear multiple times in the code, doxygen keeps a cache of |
# pre-resolved symbols. If the cache is too small doxygen will become slower. |
# If the cache is too large, memory is wasted. The cache size is given by this |
# formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range is 0..9, the default is 0, |
# corresponding to a cache size of 2^16 = 65536 symbols. |
|
LOOKUP_CACHE_SIZE = 0 |
|
#--------------------------------------------------------------------------- |
# Build related configuration options |
#--------------------------------------------------------------------------- |
|
# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in |
# documentation are documented, even if no documentation was available. |
# Private class members and static file members will be hidden unless |
# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES |
|
EXTRACT_ALL = NO |
|
# If the EXTRACT_PRIVATE tag is set to YES all private members of a class |
# will be included in the documentation. |
|
EXTRACT_PRIVATE = NO |
|
# If the EXTRACT_PACKAGE tag is set to YES all members with package or internal |
# scope will be included in the documentation. |
|
EXTRACT_PACKAGE = NO |
|
# If the EXTRACT_STATIC tag is set to YES all static members of a file |
# will be included in the documentation. |
|
EXTRACT_STATIC = NO |
|
# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) |
# defined locally in source files will be included in the documentation. |
# If set to NO only classes defined in header files are included. |
|
EXTRACT_LOCAL_CLASSES = YES |
|
# This flag is only useful for Objective-C code. When set to YES local |
# methods, which are defined in the implementation section but not in |
# the interface are included in the documentation. |
# If set to NO (the default) only methods in the interface are included. |
|
EXTRACT_LOCAL_METHODS = NO |
|
# If this flag is set to YES, the members of anonymous namespaces will be |
# extracted and appear in the documentation as a namespace called |
# 'anonymous_namespace{file}', where file will be replaced with the base |
# name of the file that contains the anonymous namespace. By default |
# anonymous namespaces are hidden. |
|
EXTRACT_ANON_NSPACES = NO |
|
# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all |
# undocumented members of documented classes, files or namespaces. |
# If set to NO (the default) these members will be included in the |
# various overviews, but no documentation section is generated. |
# This option has no effect if EXTRACT_ALL is enabled. |
|
HIDE_UNDOC_MEMBERS = NO |
|
# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all |
# undocumented classes that are normally visible in the class hierarchy. |
# If set to NO (the default) these classes will be included in the various |
# overviews. This option has no effect if EXTRACT_ALL is enabled. |
|
HIDE_UNDOC_CLASSES = NO |
|
# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all |
# friend (class|struct|union) declarations. |
# If set to NO (the default) these declarations will be included in the |
# documentation. |
|
HIDE_FRIEND_COMPOUNDS = NO |
|
# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any |
# documentation blocks found inside the body of a function. |
# If set to NO (the default) these blocks will be appended to the |
# function's detailed documentation block. |
|
HIDE_IN_BODY_DOCS = NO |
|
# The INTERNAL_DOCS tag determines if documentation |
# that is typed after a \internal command is included. If the tag is set |
# to NO (the default) then the documentation will be excluded. |
# Set it to YES to include the internal documentation. |
|
INTERNAL_DOCS = NO |
|
# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate |
# file names in lower-case letters. If set to YES upper-case letters are also |
# allowed. This is useful if you have classes or files whose names only differ |
# in case and if your file system supports case sensitive file names. Windows |
# and Mac users are advised to set this option to NO. |
|
CASE_SENSE_NAMES = NO |
|
# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen |
# will show members with their full class and namespace scopes in the |
# documentation. If set to YES the scope will be hidden. |
|
HIDE_SCOPE_NAMES = NO |
|
# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen |
# will put a list of the files that are included by a file in the documentation |
# of that file. |
|
SHOW_INCLUDE_FILES = YES |
|
# If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen |
# will list include files with double quotes in the documentation |
# rather than with sharp brackets. |
|
FORCE_LOCAL_INCLUDES = NO |
|
# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] |
# is inserted in the documentation for inline members. |
|
INLINE_INFO = YES |
|
# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen |
# will sort the (detailed) documentation of file and class members |
# alphabetically by member name. If set to NO the members will appear in |
# declaration order. |
|
SORT_MEMBER_DOCS = YES |
|
# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the |
# brief documentation of file, namespace and class members alphabetically |
# by member name. If set to NO (the default) the members will appear in |
# declaration order. |
|
SORT_BRIEF_DOCS = NO |
|
# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen |
# will sort the (brief and detailed) documentation of class members so that |
# constructors and destructors are listed first. If set to NO (the default) |
# the constructors will appear in the respective orders defined by |
# SORT_MEMBER_DOCS and SORT_BRIEF_DOCS. |
# This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO |
# and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO. |
|
SORT_MEMBERS_CTORS_1ST = NO |
|
# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the |
# hierarchy of group names into alphabetical order. If set to NO (the default) |
# the group names will appear in their defined order. |
|
SORT_GROUP_NAMES = NO |
|
# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be |
# sorted by fully-qualified names, including namespaces. If set to |
# NO (the default), the class list will be sorted only by class name, |
# not including the namespace part. |
# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. |
# Note: This option applies only to the class list, not to the |
# alphabetical list. |
|
SORT_BY_SCOPE_NAME = NO |
|
# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to |
# do proper type resolution of all parameters of a function it will reject a |
# match between the prototype and the implementation of a member function even |
# if there is only one candidate or it is obvious which candidate to choose |
# by doing a simple string match. By disabling STRICT_PROTO_MATCHING doxygen |
# will still accept a match between prototype and implementation in such cases. |
|
STRICT_PROTO_MATCHING = NO |
|
# The GENERATE_TODOLIST tag can be used to enable (YES) or |
# disable (NO) the todo list. This list is created by putting \todo |
# commands in the documentation. |
|
GENERATE_TODOLIST = YES |
|
# The GENERATE_TESTLIST tag can be used to enable (YES) or |
# disable (NO) the test list. This list is created by putting \test |
# commands in the documentation. |
|
GENERATE_TESTLIST = YES |
|
# The GENERATE_BUGLIST tag can be used to enable (YES) or |
# disable (NO) the bug list. This list is created by putting \bug |
# commands in the documentation. |
|
GENERATE_BUGLIST = YES |
|
# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or |
# disable (NO) the deprecated list. This list is created by putting |
# \deprecated commands in the documentation. |
|
GENERATE_DEPRECATEDLIST= YES |
|
# The ENABLED_SECTIONS tag can be used to enable conditional |
# documentation sections, marked by \if sectionname ... \endif. |
|
ENABLED_SECTIONS = |
|
# The MAX_INITIALIZER_LINES tag determines the maximum number of lines |
# the initial value of a variable or macro consists of for it to appear in |
# the documentation. If the initializer consists of more lines than specified |
# here it will be hidden. Use a value of 0 to hide initializers completely. |
# The appearance of the initializer of individual variables and macros in the |
# documentation can be controlled using \showinitializer or \hideinitializer |
# command in the documentation regardless of this setting. |
|
MAX_INITIALIZER_LINES = 30 |
|
# Set the SHOW_USED_FILES tag to NO to disable the list of files generated |
# at the bottom of the documentation of classes and structs. If set to YES the |
# list will mention the files that were used to generate the documentation. |
|
SHOW_USED_FILES = YES |
|
# If the sources in your project are distributed over multiple directories |
# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy |
# in the documentation. The default is NO. |
|
SHOW_DIRECTORIES = NO |
|
# Set the SHOW_FILES tag to NO to disable the generation of the Files page. |
# This will remove the Files entry from the Quick Index and from the |
# Folder Tree View (if specified). The default is YES. |
|
SHOW_FILES = YES |
|
# Set the SHOW_NAMESPACES tag to NO to disable the generation of the |
# Namespaces page. This will remove the Namespaces entry from the Quick Index |
# and from the Folder Tree View (if specified). The default is YES. |
|
SHOW_NAMESPACES = YES |
|
# The FILE_VERSION_FILTER tag can be used to specify a program or script that |
# doxygen should invoke to get the current version for each file (typically from |
# the version control system). Doxygen will invoke the program by executing (via |
# popen()) the command <command> <input-file>, where <command> is the value of |
# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file |
# provided by doxygen. Whatever the program writes to standard output |
# is used as the file version. See the manual for examples. |
|
FILE_VERSION_FILTER = |
|
# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed |
# by doxygen. The layout file controls the global structure of the generated |
# output files in an output format independent way. The create the layout file |
# that represents doxygen's defaults, run doxygen with the -l option. |
# You can optionally specify a file name after the option, if omitted |
# DoxygenLayout.xml will be used as the name of the layout file. |
|
LAYOUT_FILE = |
|
# The CITE_BIB_FILES tag can be used to specify one or more bib files |
# containing the references data. This must be a list of .bib files. The |
# .bib extension is automatically appended if omitted. Using this command |
# requires the bibtex tool to be installed. See also |
# http://en.wikipedia.org/wiki/BibTeX for more info. For LaTeX the style |
# of the bibliography can be controlled using LATEX_BIB_STYLE. To use this |
# feature you need bibtex and perl available in the search path. |
|
CITE_BIB_FILES = |
|
#--------------------------------------------------------------------------- |
# configuration options related to warning and progress messages |
#--------------------------------------------------------------------------- |
|
# The QUIET tag can be used to turn on/off the messages that are generated |
# by doxygen. Possible values are YES and NO. If left blank NO is used. |
|
QUIET = NO |
|
# The WARNINGS tag can be used to turn on/off the warning messages that are |
# generated by doxygen. Possible values are YES and NO. If left blank |
# NO is used. |
|
WARNINGS = YES |
|
# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings |
# for undocumented members. If EXTRACT_ALL is set to YES then this flag will |
# automatically be disabled. |
|
WARN_IF_UNDOCUMENTED = YES |
|
# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for |
# potential errors in the documentation, such as not documenting some |
# parameters in a documented function, or documenting parameters that |
# don't exist or using markup commands wrongly. |
|
WARN_IF_DOC_ERROR = YES |
|
# The WARN_NO_PARAMDOC option can be enabled to get warnings for |
# functions that are documented, but have no documentation for their parameters |
# or return value. If set to NO (the default) doxygen will only warn about |
# wrong or incomplete parameter documentation, but not about the absence of |
# documentation. |
|
WARN_NO_PARAMDOC = NO |
|
# The WARN_FORMAT tag determines the format of the warning messages that |
# doxygen can produce. The string should contain the $file, $line, and $text |
# tags, which will be replaced by the file and line number from which the |
# warning originated and the warning text. Optionally the format may contain |
# $version, which will be replaced by the version of the file (if it could |
# be obtained via FILE_VERSION_FILTER) |
|
WARN_FORMAT = "$file:$line: $text" |
|
# The WARN_LOGFILE tag can be used to specify a file to which warning |
# and error messages should be written. If left blank the output is written |
# to stderr. |
|
WARN_LOGFILE = |
|
#--------------------------------------------------------------------------- |
# configuration options related to the input files |
#--------------------------------------------------------------------------- |
|
# The INPUT tag can be used to specify the files and/or directories that contain |
# documented source files. You may enter file names like "myfile.cpp" or |
# directories like "/usr/src/myproject". Separate the files or directories |
# with spaces. |
|
INPUT = ../hdl |
|
# This tag can be used to specify the character encoding of the source files |
# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is |
# also the default input encoding. Doxygen uses libiconv (or the iconv built |
# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for |
# the list of possible encodings. |
|
INPUT_ENCODING = UTF-8 |
|
# If the value of the INPUT tag contains directories, you can use the |
# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp |
# and *.h) to filter out the source-files in the directories. If left |
# blank the following patterns are tested: |
# *.c *.cc *.cxx *.cpp *.c++ *.d *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh |
# *.hxx *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.dox *.py |
# *.f90 *.f *.for *.vhd *.vhdl |
|
FILE_PATTERNS = *.vhd \ |
*.vhdl |
|
# The RECURSIVE tag can be used to turn specify whether or not subdirectories |
# should be searched for input files as well. Possible values are YES and NO. |
# If left blank NO is used. |
|
RECURSIVE = YES |
|
# The EXCLUDE tag can be used to specify files and/or directories that should be |
# excluded from the INPUT source files. This way you can easily exclude a |
# subdirectory from a directory tree whose root is specified with the INPUT tag. |
# Note that relative paths are relative to the directory from which doxygen is |
# run. |
|
EXCLUDE = |
|
# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or |
# directories that are symbolic links (a Unix file system feature) are excluded |
# from the input. |
|
EXCLUDE_SYMLINKS = NO |
|
# If the value of the INPUT tag contains directories, you can use the |
# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude |
# certain files from those directories. Note that the wildcards are matched |
# against the file with absolute path, so to exclude all test directories |
# for example use the pattern */test/* |
|
EXCLUDE_PATTERNS = |
|
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names |
# (namespaces, classes, functions, etc.) that should be excluded from the |
# output. The symbol name can be a fully qualified name, a word, or if the |
# wildcard * is used, a substring. Examples: ANamespace, AClass, |
# AClass::ANamespace, ANamespace::*Test |
|
EXCLUDE_SYMBOLS = |
|
# The EXAMPLE_PATH tag can be used to specify one or more files or |
# directories that contain example code fragments that are included (see |
# the \include command). |
|
EXAMPLE_PATH = |
|
# If the value of the EXAMPLE_PATH tag contains directories, you can use the |
# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp |
# and *.h) to filter out the source-files in the directories. If left |
# blank all files are included. |
|
EXAMPLE_PATTERNS = * |
|
# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be |
# searched for input files to be used with the \include or \dontinclude |
# commands irrespective of the value of the RECURSIVE tag. |
# Possible values are YES and NO. If left blank NO is used. |
|
EXAMPLE_RECURSIVE = NO |
|
# The IMAGE_PATH tag can be used to specify one or more files or |
# directories that contain image that are included in the documentation (see |
# the \image command). |
|
IMAGE_PATH = |
|
# The INPUT_FILTER tag can be used to specify a program that doxygen should |
# invoke to filter for each input file. Doxygen will invoke the filter program |
# by executing (via popen()) the command <filter> <input-file>, where <filter> |
# is the value of the INPUT_FILTER tag, and <input-file> is the name of an |
# input file. Doxygen will then use the output that the filter program writes |
# to standard output. If FILTER_PATTERNS is specified, this tag will be |
# ignored. |
|
INPUT_FILTER = |
|
# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern |
# basis. Doxygen will compare the file name with each pattern and apply the |
# filter if there is a match. The filters are a list of the form: |
# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further |
# info on how filters are used. If FILTER_PATTERNS is empty or if |
# non of the patterns match the file name, INPUT_FILTER is applied. |
|
FILTER_PATTERNS = |
|
# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using |
# INPUT_FILTER) will be used to filter the input files when producing source |
# files to browse (i.e. when SOURCE_BROWSER is set to YES). |
|
FILTER_SOURCE_FILES = NO |
|
# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file |
# pattern. A pattern will override the setting for FILTER_PATTERN (if any) |
# and it is also possible to disable source filtering for a specific pattern |
# using *.ext= (so without naming a filter). This option only has effect when |
# FILTER_SOURCE_FILES is enabled. |
|
FILTER_SOURCE_PATTERNS = |
|
#--------------------------------------------------------------------------- |
# configuration options related to source browsing |
#--------------------------------------------------------------------------- |
|
# If the SOURCE_BROWSER tag is set to YES then a list of source files will |
# be generated. Documented entities will be cross-referenced with these sources. |
# Note: To get rid of all source code in the generated output, make sure also |
# VERBATIM_HEADERS is set to NO. |
|
SOURCE_BROWSER = YES |
|
# Setting the INLINE_SOURCES tag to YES will include the body |
# of functions and classes directly in the documentation. |
|
INLINE_SOURCES = NO |
|
# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct |
# doxygen to hide any special comment blocks from generated source code |
# fragments. Normal C and C++ comments will always remain visible. |
|
STRIP_CODE_COMMENTS = YES |
|
# If the REFERENCED_BY_RELATION tag is set to YES |
# then for each documented function all documented |
# functions referencing it will be listed. |
|
REFERENCED_BY_RELATION = NO |
|
# If the REFERENCES_RELATION tag is set to YES |
# then for each documented function all documented entities |
# called/used by that function will be listed. |
|
REFERENCES_RELATION = NO |
|
# If the REFERENCES_LINK_SOURCE tag is set to YES (the default) |
# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from |
# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will |
# link to the source code. Otherwise they will link to the documentation. |
|
REFERENCES_LINK_SOURCE = YES |
|
# If the USE_HTAGS tag is set to YES then the references to source code |
# will point to the HTML generated by the htags(1) tool instead of doxygen |
# built-in source browser. The htags tool is part of GNU's global source |
# tagging system (see http://www.gnu.org/software/global/global.html). You |
# will need version 4.8.6 or higher. |
|
USE_HTAGS = NO |
|
# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen |
# will generate a verbatim copy of the header file for each class for |
# which an include is specified. Set to NO to disable this. |
|
VERBATIM_HEADERS = YES |
|
#--------------------------------------------------------------------------- |
# configuration options related to the alphabetical class index |
#--------------------------------------------------------------------------- |
|
# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index |
# of all compounds will be generated. Enable this if the project |
# contains a lot of classes, structs, unions or interfaces. |
|
ALPHABETICAL_INDEX = YES |
|
# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then |
# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns |
# in which this list will be split (can be a number in the range [1..20]) |
|
COLS_IN_ALPHA_INDEX = 5 |
|
# In case all classes in a project start with a common prefix, all |
# classes will be put under the same header in the alphabetical index. |
# The IGNORE_PREFIX tag can be used to specify one or more prefixes that |
# should be ignored while generating the index headers. |
|
IGNORE_PREFIX = |
|
#--------------------------------------------------------------------------- |
# configuration options related to the HTML output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_HTML tag is set to YES (the default) Doxygen will |
# generate HTML output. |
|
GENERATE_HTML = YES |
|
# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. |
# If a relative path is entered the value of OUTPUT_DIRECTORY will be |
# put in front of it. If left blank `html' will be used as the default path. |
|
HTML_OUTPUT = html |
|
# The HTML_FILE_EXTENSION tag can be used to specify the file extension for |
# each generated HTML page (for example: .htm,.php,.asp). If it is left blank |
# doxygen will generate files with .html extension. |
|
HTML_FILE_EXTENSION = .html |
|
# The HTML_HEADER tag can be used to specify a personal HTML header for |
# each generated HTML page. If it is left blank doxygen will generate a |
# standard header. Note that when using a custom header you are responsible |
# for the proper inclusion of any scripts and style sheets that doxygen |
# needs, which is dependent on the configuration options used. |
# It is advised to generate a default header using "doxygen -w html |
# header.html footer.html stylesheet.css YourConfigFile" and then modify |
# that header. Note that the header is subject to change so you typically |
# have to redo this when upgrading to a newer version of doxygen or when |
# changing the value of configuration settings such as GENERATE_TREEVIEW! |
|
HTML_HEADER = |
|
# The HTML_FOOTER tag can be used to specify a personal HTML footer for |
# each generated HTML page. If it is left blank doxygen will generate a |
# standard footer. |
|
HTML_FOOTER = |
|
# The HTML_STYLESHEET tag can be used to specify a user-defined cascading |
# style sheet that is used by each HTML page. It can be used to |
# fine-tune the look of the HTML output. If the tag is left blank doxygen |
# will generate a default style sheet. Note that doxygen will try to copy |
# the style sheet file to the HTML output directory, so don't put your own |
# style sheet in the HTML output directory as well, or it will be erased! |
|
HTML_STYLESHEET = |
|
# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or |
# other source files which should be copied to the HTML output directory. Note |
# that these files will be copied to the base HTML output directory. Use the |
# $relpath$ marker in the HTML_HEADER and/or HTML_FOOTER files to load these |
# files. In the HTML_STYLESHEET file, use the file name only. Also note that |
# the files will be copied as-is; there are no commands or markers available. |
|
HTML_EXTRA_FILES = |
|
# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. |
# Doxygen will adjust the colors in the style sheet and background images |
# according to this color. Hue is specified as an angle on a colorwheel, |
# see http://en.wikipedia.org/wiki/Hue for more information. |
# For instance the value 0 represents red, 60 is yellow, 120 is green, |
# 180 is cyan, 240 is blue, 300 purple, and 360 is red again. |
# The allowed range is 0 to 359. |
|
HTML_COLORSTYLE_HUE = 220 |
|
# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of |
# the colors in the HTML output. For a value of 0 the output will use |
# grayscales only. A value of 255 will produce the most vivid colors. |
|
HTML_COLORSTYLE_SAT = 100 |
|
# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to |
# the luminance component of the colors in the HTML output. Values below |
# 100 gradually make the output lighter, whereas values above 100 make |
# the output darker. The value divided by 100 is the actual gamma applied, |
# so 80 represents a gamma of 0.8, The value 220 represents a gamma of 2.2, |
# and 100 does not change the gamma. |
|
HTML_COLORSTYLE_GAMMA = 80 |
|
# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML |
# page will contain the date and time when the page was generated. Setting |
# this to NO can help when comparing the output of multiple runs. |
|
HTML_TIMESTAMP = YES |
|
# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, |
# files or namespaces will be aligned in HTML using tables. If set to |
# NO a bullet list will be used. |
|
HTML_ALIGN_MEMBERS = YES |
|
# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML |
# documentation will contain sections that can be hidden and shown after the |
# page has loaded. For this to work a browser that supports |
# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox |
# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari). |
|
HTML_DYNAMIC_SECTIONS = NO |
|
# If the GENERATE_DOCSET tag is set to YES, additional index files |
# will be generated that can be used as input for Apple's Xcode 3 |
# integrated development environment, introduced with OSX 10.5 (Leopard). |
# To create a documentation set, doxygen will generate a Makefile in the |
# HTML output directory. Running make will produce the docset in that |
# directory and running "make install" will install the docset in |
# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find |
# it at startup. |
# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html |
# for more information. |
|
GENERATE_DOCSET = NO |
|
# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the |
# feed. A documentation feed provides an umbrella under which multiple |
# documentation sets from a single provider (such as a company or product suite) |
# can be grouped. |
|
DOCSET_FEEDNAME = "Doxygen generated docs" |
|
# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that |
# should uniquely identify the documentation set bundle. This should be a |
# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen |
# will append .docset to the name. |
|
DOCSET_BUNDLE_ID = org.doxygen.Project |
|
# When GENERATE_PUBLISHER_ID tag specifies a string that should uniquely identify |
# the documentation publisher. This should be a reverse domain-name style |
# string, e.g. com.mycompany.MyDocSet.documentation. |
|
DOCSET_PUBLISHER_ID = org.doxygen.Publisher |
|
# The GENERATE_PUBLISHER_NAME tag identifies the documentation publisher. |
|
DOCSET_PUBLISHER_NAME = Publisher |
|
# If the GENERATE_HTMLHELP tag is set to YES, additional index files |
# will be generated that can be used as input for tools like the |
# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) |
# of the generated HTML documentation. |
|
GENERATE_HTMLHELP = NO |
|
# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can |
# be used to specify the file name of the resulting .chm file. You |
# can add a path in front of the file if the result should not be |
# written to the html output directory. |
|
CHM_FILE = |
|
# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can |
# be used to specify the location (absolute path including file name) of |
# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run |
# the HTML help compiler on the generated index.hhp. |
|
HHC_LOCATION = |
|
# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag |
# controls if a separate .chi index file is generated (YES) or that |
# it should be included in the master .chm file (NO). |
|
GENERATE_CHI = NO |
|
# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING |
# is used to encode HtmlHelp index (hhk), content (hhc) and project file |
# content. |
|
CHM_INDEX_ENCODING = |
|
# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag |
# controls whether a binary table of contents is generated (YES) or a |
# normal table of contents (NO) in the .chm file. |
|
BINARY_TOC = NO |
|
# The TOC_EXPAND flag can be set to YES to add extra items for group members |
# to the contents of the HTML help documentation and to the tree view. |
|
TOC_EXPAND = NO |
|
# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and |
# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated |
# that can be used as input for Qt's qhelpgenerator to generate a |
# Qt Compressed Help (.qch) of the generated HTML documentation. |
|
GENERATE_QHP = NO |
|
# If the QHG_LOCATION tag is specified, the QCH_FILE tag can |
# be used to specify the file name of the resulting .qch file. |
# The path specified is relative to the HTML output folder. |
|
QCH_FILE = |
|
# The QHP_NAMESPACE tag specifies the namespace to use when generating |
# Qt Help Project output. For more information please see |
# http://doc.trolltech.com/qthelpproject.html#namespace |
|
QHP_NAMESPACE = org.doxygen.Project |
|
# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating |
# Qt Help Project output. For more information please see |
# http://doc.trolltech.com/qthelpproject.html#virtual-folders |
|
QHP_VIRTUAL_FOLDER = doc |
|
# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to |
# add. For more information please see |
# http://doc.trolltech.com/qthelpproject.html#custom-filters |
|
QHP_CUST_FILTER_NAME = |
|
# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the |
# custom filter to add. For more information please see |
# <a href="http://doc.trolltech.com/qthelpproject.html#custom-filters"> |
# Qt Help Project / Custom Filters</a>. |
|
QHP_CUST_FILTER_ATTRS = |
|
# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this |
# project's |
# filter section matches. |
# <a href="http://doc.trolltech.com/qthelpproject.html#filter-attributes"> |
# Qt Help Project / Filter Attributes</a>. |
|
QHP_SECT_FILTER_ATTRS = |
|
# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can |
# be used to specify the location of Qt's qhelpgenerator. |
# If non-empty doxygen will try to run qhelpgenerator on the generated |
# .qhp file. |
|
QHG_LOCATION = |
|
# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files |
# will be generated, which together with the HTML files, form an Eclipse help |
# plugin. To install this plugin and make it available under the help contents |
# menu in Eclipse, the contents of the directory containing the HTML and XML |
# files needs to be copied into the plugins directory of eclipse. The name of |
# the directory within the plugins directory should be the same as |
# the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before |
# the help appears. |
|
GENERATE_ECLIPSEHELP = NO |
|
# A unique identifier for the eclipse help plugin. When installing the plugin |
# the directory name containing the HTML and XML files should also have |
# this name. |
|
ECLIPSE_DOC_ID = org.doxygen.Project |
|
# The DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) |
# at top of each HTML page. The value NO (the default) enables the index and |
# the value YES disables it. Since the tabs have the same information as the |
# navigation tree you can set this option to NO if you already set |
# GENERATE_TREEVIEW to YES. |
|
DISABLE_INDEX = NO |
|
# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index |
# structure should be generated to display hierarchical information. |
# If the tag value is set to YES, a side panel will be generated |
# containing a tree-like index structure (just like the one that |
# is generated for HTML Help). For this to work a browser that supports |
# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser). |
# Windows users are probably better off using the HTML help feature. |
# Since the tree basically has the same information as the tab index you |
# could consider to set DISABLE_INDEX to NO when enabling this option. |
|
GENERATE_TREEVIEW = YES |
|
# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values |
# (range [0,1..20]) that doxygen will group on one line in the generated HTML |
# documentation. Note that a value of 0 will completely suppress the enum |
# values from appearing in the overview section. |
|
ENUM_VALUES_PER_LINE = 4 |
|
# By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories, |
# and Class Hierarchy pages using a tree view instead of an ordered list. |
|
USE_INLINE_TREES = NO |
|
# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be |
# used to set the initial width (in pixels) of the frame in which the tree |
# is shown. |
|
TREEVIEW_WIDTH = 250 |
|
# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open |
# links to external symbols imported via tag files in a separate window. |
|
EXT_LINKS_IN_WINDOW = NO |
|
# Use this tag to change the font size of Latex formulas included |
# as images in the HTML documentation. The default is 10. Note that |
# when you change the font size after a successful doxygen run you need |
# to manually remove any form_*.png images from the HTML output directory |
# to force them to be regenerated. |
|
FORMULA_FONTSIZE = 10 |
|
# Use the FORMULA_TRANPARENT tag to determine whether or not the images |
# generated for formulas are transparent PNGs. Transparent PNGs are |
# not supported properly for IE 6.0, but are supported on all modern browsers. |
# Note that when changing this option you need to delete any form_*.png files |
# in the HTML output before the changes have effect. |
|
FORMULA_TRANSPARENT = YES |
|
# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax |
# (see http://www.mathjax.org) which uses client side Javascript for the |
# rendering instead of using prerendered bitmaps. Use this if you do not |
# have LaTeX installed or if you want to formulas look prettier in the HTML |
# output. When enabled you may also need to install MathJax separately and |
# configure the path to it using the MATHJAX_RELPATH option. |
|
USE_MATHJAX = NO |
|
# When MathJax is enabled you need to specify the location relative to the |
# HTML output directory using the MATHJAX_RELPATH option. The destination |
# directory should contain the MathJax.js script. For instance, if the mathjax |
# directory is located at the same level as the HTML output directory, then |
# MATHJAX_RELPATH should be ../mathjax. The default value points to |
# the MathJax Content Delivery Network so you can quickly see the result without |
# installing MathJax. However, it is strongly recommended to install a local |
# copy of MathJax from http://www.mathjax.org before deployment. |
|
MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest |
|
# The MATHJAX_EXTENSIONS tag can be used to specify one or MathJax extension |
# names that should be enabled during MathJax rendering. |
|
MATHJAX_EXTENSIONS = |
|
# When the SEARCHENGINE tag is enabled doxygen will generate a search box |
# for the HTML output. The underlying search engine uses javascript |
# and DHTML and should work on any modern browser. Note that when using |
# HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets |
# (GENERATE_DOCSET) there is already a search function so this one should |
# typically be disabled. For large projects the javascript based search engine |
# can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution. |
|
SEARCHENGINE = YES |
|
# When the SERVER_BASED_SEARCH tag is enabled the search engine will be |
# implemented using a PHP enabled web server instead of at the web client |
# using Javascript. Doxygen will generate the search PHP script and index |
# file to put on the web server. The advantage of the server |
# based approach is that it scales better to large projects and allows |
# full text search. The disadvantages are that it is more difficult to setup |
# and does not have live searching capabilities. |
|
SERVER_BASED_SEARCH = NO |
|
#--------------------------------------------------------------------------- |
# configuration options related to the LaTeX output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will |
# generate Latex output. |
|
GENERATE_LATEX = YES |
|
# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. |
# If a relative path is entered the value of OUTPUT_DIRECTORY will be |
# put in front of it. If left blank `latex' will be used as the default path. |
|
LATEX_OUTPUT = latex |
|
# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be |
# invoked. If left blank `latex' will be used as the default command name. |
# Note that when enabling USE_PDFLATEX this option is only used for |
# generating bitmaps for formulas in the HTML output, but not in the |
# Makefile that is written to the output directory. |
|
LATEX_CMD_NAME = latex |
|
# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to |
# generate index for LaTeX. If left blank `makeindex' will be used as the |
# default command name. |
|
MAKEINDEX_CMD_NAME = makeindex |
|
# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact |
# LaTeX documents. This may be useful for small projects and may help to |
# save some trees in general. |
|
COMPACT_LATEX = NO |
|
# The PAPER_TYPE tag can be used to set the paper type that is used |
# by the printer. Possible values are: a4, letter, legal and |
# executive. If left blank a4wide will be used. |
|
PAPER_TYPE = a4 |
|
# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX |
# packages that should be included in the LaTeX output. |
|
EXTRA_PACKAGES = |
|
# The LATEX_HEADER tag can be used to specify a personal LaTeX header for |
# the generated latex document. The header should contain everything until |
# the first chapter. If it is left blank doxygen will generate a |
# standard header. Notice: only use this tag if you know what you are doing! |
|
LATEX_HEADER = |
|
# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for |
# the generated latex document. The footer should contain everything after |
# the last chapter. If it is left blank doxygen will generate a |
# standard footer. Notice: only use this tag if you know what you are doing! |
|
LATEX_FOOTER = |
|
# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated |
# is prepared for conversion to pdf (using ps2pdf). The pdf file will |
# contain links (just like the HTML output) instead of page references |
# This makes the output suitable for online browsing using a pdf viewer. |
|
PDF_HYPERLINKS = NO |
|
# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of |
# plain latex in the generated Makefile. Set this option to YES to get a |
# higher quality PDF documentation. |
|
USE_PDFLATEX = YES |
|
# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. |
# command to the generated LaTeX files. This will instruct LaTeX to keep |
# running if errors occur, instead of asking the user for help. |
# This option is also used when generating formulas in HTML. |
|
LATEX_BATCHMODE = NO |
|
# If LATEX_HIDE_INDICES is set to YES then doxygen will not |
# include the index chapters (such as File Index, Compound Index, etc.) |
# in the output. |
|
LATEX_HIDE_INDICES = NO |
|
# If LATEX_SOURCE_CODE is set to YES then doxygen will include |
# source code with syntax highlighting in the LaTeX output. |
# Note that which sources are shown also depends on other settings |
# such as SOURCE_BROWSER. |
|
LATEX_SOURCE_CODE = NO |
|
# The LATEX_BIB_STYLE tag can be used to specify the style to use for the |
# bibliography, e.g. plainnat, or ieeetr. The default style is "plain". See |
# http://en.wikipedia.org/wiki/BibTeX for more info. |
|
LATEX_BIB_STYLE = plain |
|
#--------------------------------------------------------------------------- |
# configuration options related to the RTF output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output |
# The RTF output is optimized for Word 97 and may not look very pretty with |
# other RTF readers or editors. |
|
GENERATE_RTF = NO |
|
# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. |
# If a relative path is entered the value of OUTPUT_DIRECTORY will be |
# put in front of it. If left blank `rtf' will be used as the default path. |
|
RTF_OUTPUT = rtf |
|
# If the COMPACT_RTF tag is set to YES Doxygen generates more compact |
# RTF documents. This may be useful for small projects and may help to |
# save some trees in general. |
|
COMPACT_RTF = NO |
|
# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated |
# will contain hyperlink fields. The RTF file will |
# contain links (just like the HTML output) instead of page references. |
# This makes the output suitable for online browsing using WORD or other |
# programs which support those fields. |
# Note: wordpad (write) and others do not support links. |
|
RTF_HYPERLINKS = NO |
|
# Load style sheet definitions from file. Syntax is similar to doxygen's |
# config file, i.e. a series of assignments. You only have to provide |
# replacements, missing definitions are set to their default value. |
|
RTF_STYLESHEET_FILE = |
|
# Set optional variables used in the generation of an rtf document. |
# Syntax is similar to doxygen's config file. |
|
RTF_EXTENSIONS_FILE = |
|
#--------------------------------------------------------------------------- |
# configuration options related to the man page output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_MAN tag is set to YES (the default) Doxygen will |
# generate man pages |
|
GENERATE_MAN = NO |
|
# The MAN_OUTPUT tag is used to specify where the man pages will be put. |
# If a relative path is entered the value of OUTPUT_DIRECTORY will be |
# put in front of it. If left blank `man' will be used as the default path. |
|
MAN_OUTPUT = man |
|
# The MAN_EXTENSION tag determines the extension that is added to |
# the generated man pages (default is the subroutine's section .3) |
|
MAN_EXTENSION = .3 |
|
# If the MAN_LINKS tag is set to YES and Doxygen generates man output, |
# then it will generate one additional man file for each entity |
# documented in the real man page(s). These additional files |
# only source the real man page, but without them the man command |
# would be unable to find the correct page. The default is NO. |
|
MAN_LINKS = NO |
|
#--------------------------------------------------------------------------- |
# configuration options related to the XML output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_XML tag is set to YES Doxygen will |
# generate an XML file that captures the structure of |
# the code including all documentation. |
|
GENERATE_XML = NO |
|
# The XML_OUTPUT tag is used to specify where the XML pages will be put. |
# If a relative path is entered the value of OUTPUT_DIRECTORY will be |
# put in front of it. If left blank `xml' will be used as the default path. |
|
XML_OUTPUT = xml |
|
# The XML_SCHEMA tag can be used to specify an XML schema, |
# which can be used by a validating XML parser to check the |
# syntax of the XML files. |
|
XML_SCHEMA = |
|
# The XML_DTD tag can be used to specify an XML DTD, |
# which can be used by a validating XML parser to check the |
# syntax of the XML files. |
|
XML_DTD = |
|
# If the XML_PROGRAMLISTING tag is set to YES Doxygen will |
# dump the program listings (including syntax highlighting |
# and cross-referencing information) to the XML output. Note that |
# enabling this will significantly increase the size of the XML output. |
|
XML_PROGRAMLISTING = YES |
|
#--------------------------------------------------------------------------- |
# configuration options for the AutoGen Definitions output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will |
# generate an AutoGen Definitions (see autogen.sf.net) file |
# that captures the structure of the code including all |
# documentation. Note that this feature is still experimental |
# and incomplete at the moment. |
|
GENERATE_AUTOGEN_DEF = NO |
|
#--------------------------------------------------------------------------- |
# configuration options related to the Perl module output |
#--------------------------------------------------------------------------- |
|
# If the GENERATE_PERLMOD tag is set to YES Doxygen will |
# generate a Perl module file that captures the structure of |
# the code including all documentation. Note that this |
# feature is still experimental and incomplete at the |
# moment. |
|
GENERATE_PERLMOD = NO |
|
# If the PERLMOD_LATEX tag is set to YES Doxygen will generate |
# the necessary Makefile rules, Perl scripts and LaTeX code to be able |
# to generate PDF and DVI output from the Perl module output. |
|
PERLMOD_LATEX = NO |
|
# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be |
# nicely formatted so it can be parsed by a human reader. This is useful |
# if you want to understand what is going on. On the other hand, if this |
# tag is set to NO the size of the Perl module output will be much smaller |
# and Perl will parse it just the same. |
|
PERLMOD_PRETTY = YES |
|
# The names of the make variables in the generated doxyrules.make file |
# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. |
# This is useful so different doxyrules.make files included by the same |
# Makefile don't overwrite each other's variables. |
|
PERLMOD_MAKEVAR_PREFIX = |
|
#--------------------------------------------------------------------------- |
# Configuration options related to the preprocessor |
#--------------------------------------------------------------------------- |
|
# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will |
# evaluate all C-preprocessor directives found in the sources and include |
# files. |
|
ENABLE_PREPROCESSING = YES |
|
# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro |
# names in the source code. If set to NO (the default) only conditional |
# compilation will be performed. Macro expansion can be done in a controlled |
# way by setting EXPAND_ONLY_PREDEF to YES. |
|
MACRO_EXPANSION = NO |
|
# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES |
# then the macro expansion is limited to the macros specified with the |
# PREDEFINED and EXPAND_AS_DEFINED tags. |
|
EXPAND_ONLY_PREDEF = NO |
|
# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files |
# pointed to by INCLUDE_PATH will be searched when a #include is found. |
|
SEARCH_INCLUDES = YES |
|
# The INCLUDE_PATH tag can be used to specify one or more directories that |
# contain include files that are not input files but should be processed by |
# the preprocessor. |
|
INCLUDE_PATH = |
|
# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard |
# patterns (like *.h and *.hpp) to filter out the header-files in the |
# directories. If left blank, the patterns specified with FILE_PATTERNS will |
# be used. |
|
INCLUDE_FILE_PATTERNS = |
|
# The PREDEFINED tag can be used to specify one or more macro names that |
# are defined before the preprocessor is started (similar to the -D option of |
# gcc). The argument of the tag is a list of macros of the form: name |
# or name=definition (no spaces). If the definition and the = are |
# omitted =1 is assumed. To prevent a macro definition from being |
# undefined via #undef or recursively expanded use the := operator |
# instead of the = operator. |
|
PREDEFINED = |
|
# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then |
# this tag can be used to specify a list of macro names that should be expanded. |
# The macro definition that is found in the sources will be used. |
# Use the PREDEFINED tag if you want to use a different macro definition that |
# overrules the definition found in the source code. |
|
EXPAND_AS_DEFINED = |
|
# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then |
# doxygen's preprocessor will remove all references to function-like macros |
# that are alone on a line, have an all uppercase name, and do not end with a |
# semicolon, because these will confuse the parser if not removed. |
|
SKIP_FUNCTION_MACROS = YES |
|
#--------------------------------------------------------------------------- |
# Configuration::additions related to external references |
#--------------------------------------------------------------------------- |
|
# The TAGFILES option can be used to specify one or more tagfiles. For each |
# tag file the location of the external documentation should be added. The |
# format of a tag file without this location is as follows: |
# TAGFILES = file1 file2 ... |
# Adding location for the tag files is done as follows: |
# TAGFILES = file1=loc1 "file2 = loc2" ... |
# where "loc1" and "loc2" can be relative or absolute paths |
# or URLs. Note that each tag file must have a unique name (where the name does |
# NOT include the path). If a tag file is not located in the directory in which |
# doxygen is run, you must also specify the path to the tagfile here. |
|
TAGFILES = |
|
# When a file name is specified after GENERATE_TAGFILE, doxygen will create |
# a tag file that is based on the input files it reads. |
|
GENERATE_TAGFILE = |
|
# If the ALLEXTERNALS tag is set to YES all external classes will be listed |
# in the class index. If set to NO only the inherited external classes |
# will be listed. |
|
ALLEXTERNALS = NO |
|
# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed |
# in the modules index. If set to NO, only the current project's groups will |
# be listed. |
|
EXTERNAL_GROUPS = YES |
|
# The PERL_PATH should be the absolute path and name of the perl script |
# interpreter (i.e. the result of `which perl'). |
|
PERL_PATH = /usr/bin/perl |
|
#--------------------------------------------------------------------------- |
# Configuration options related to the dot tool |
#--------------------------------------------------------------------------- |
|
# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will |
# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base |
# or super classes. Setting the tag to NO turns the diagrams off. Note that |
# this option also works with HAVE_DOT disabled, but it is recommended to |
# install and use dot, since it yields more powerful graphs. |
|
CLASS_DIAGRAMS = YES |
|
# You can define message sequence charts within doxygen comments using the \msc |
# command. Doxygen will then run the mscgen tool (see |
# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the |
# documentation. The MSCGEN_PATH tag allows you to specify the directory where |
# the mscgen tool resides. If left empty the tool is assumed to be found in the |
# default search path. |
|
MSCGEN_PATH = |
|
# If set to YES, the inheritance and collaboration graphs will hide |
# inheritance and usage relations if the target is undocumented |
# or is not a class. |
|
HIDE_UNDOC_RELATIONS = YES |
|
# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is |
# available from the path. This tool is part of Graphviz, a graph visualization |
# toolkit from AT&T and Lucent Bell Labs. The other options in this section |
# have no effect if this option is set to NO (the default) |
|
HAVE_DOT = NO |
|
# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is |
# allowed to run in parallel. When set to 0 (the default) doxygen will |
# base this on the number of processors available in the system. You can set it |
# explicitly to a value larger than 0 to get control over the balance |
# between CPU load and processing speed. |
|
DOT_NUM_THREADS = 0 |
|
# By default doxygen will use the Helvetica font for all dot files that |
# doxygen generates. When you want a differently looking font you can specify |
# the font name using DOT_FONTNAME. You need to make sure dot is able to find |
# the font, which can be done by putting it in a standard location or by setting |
# the DOTFONTPATH environment variable or by setting DOT_FONTPATH to the |
# directory containing the font. |
|
DOT_FONTNAME = Helvetica |
|
# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs. |
# The default size is 10pt. |
|
DOT_FONTSIZE = 10 |
|
# By default doxygen will tell dot to use the Helvetica font. |
# If you specify a different font using DOT_FONTNAME you can use DOT_FONTPATH to |
# set the path where dot can find it. |
|
DOT_FONTPATH = |
|
# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen |
# will generate a graph for each documented class showing the direct and |
# indirect inheritance relations. Setting this tag to YES will force the |
# CLASS_DIAGRAMS tag to NO. |
|
CLASS_GRAPH = YES |
|
# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen |
# will generate a graph for each documented class showing the direct and |
# indirect implementation dependencies (inheritance, containment, and |
# class references variables) of the class with other documented classes. |
|
COLLABORATION_GRAPH = YES |
|
# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen |
# will generate a graph for groups, showing the direct groups dependencies |
|
GROUP_GRAPHS = YES |
|
# If the UML_LOOK tag is set to YES doxygen will generate inheritance and |
# collaboration diagrams in a style similar to the OMG's Unified Modeling |
# Language. |
|
UML_LOOK = NO |
|
# If the UML_LOOK tag is enabled, the fields and methods are shown inside |
# the class node. If there are many fields or methods and many nodes the |
# graph may become too big to be useful. The UML_LIMIT_NUM_FIELDS |
# threshold limits the number of items for each type to make the size more |
# managable. Set this to 0 for no limit. Note that the threshold may be |
# exceeded by 50% before the limit is enforced. |
|
UML_LIMIT_NUM_FIELDS = 10 |
|
# If set to YES, the inheritance and collaboration graphs will show the |
# relations between templates and their instances. |
|
TEMPLATE_RELATIONS = NO |
|
# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT |
# tags are set to YES then doxygen will generate a graph for each documented |
# file showing the direct and indirect include dependencies of the file with |
# other documented files. |
|
INCLUDE_GRAPH = YES |
|
# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and |
# HAVE_DOT tags are set to YES then doxygen will generate a graph for each |
# documented header file showing the documented files that directly or |
# indirectly include this file. |
|
INCLUDED_BY_GRAPH = YES |
|
# If the CALL_GRAPH and HAVE_DOT options are set to YES then |
# doxygen will generate a call dependency graph for every global function |
# or class method. Note that enabling this option will significantly increase |
# the time of a run. So in most cases it will be better to enable call graphs |
# for selected functions only using the \callgraph command. |
|
CALL_GRAPH = YES |
|
# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then |
# doxygen will generate a caller dependency graph for every global function |
# or class method. Note that enabling this option will significantly increase |
# the time of a run. So in most cases it will be better to enable caller |
# graphs for selected functions only using the \callergraph command. |
|
CALLER_GRAPH = YES |
|
# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen |
# will generate a graphical hierarchy of all classes instead of a textual one. |
|
GRAPHICAL_HIERARCHY = YES |
|
# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES |
# then doxygen will show the dependencies a directory has on other directories |
# in a graphical way. The dependency relations are determined by the #include |
# relations between the files in the directories. |
|
DIRECTORY_GRAPH = YES |
|
# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images |
# generated by dot. Possible values are svg, png, jpg, or gif. |
# If left blank png will be used. If you choose svg you need to set |
# HTML_FILE_EXTENSION to xhtml in order to make the SVG files |
# visible in IE 9+ (other browsers do not have this requirement). |
|
DOT_IMAGE_FORMAT = png |
|
# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to |
# enable generation of interactive SVG images that allow zooming and panning. |
# Note that this requires a modern browser other than Internet Explorer. |
# Tested and working are Firefox, Chrome, Safari, and Opera. For IE 9+ you |
# need to set HTML_FILE_EXTENSION to xhtml in order to make the SVG files |
# visible. Older versions of IE do not have SVG support. |
|
INTERACTIVE_SVG = NO |
|
# The tag DOT_PATH can be used to specify the path where the dot tool can be |
# found. If left blank, it is assumed the dot tool can be found in the path. |
|
DOT_PATH = |
|
# The DOTFILE_DIRS tag can be used to specify one or more directories that |
# contain dot files that are included in the documentation (see the |
# \dotfile command). |
|
DOTFILE_DIRS = |
|
# The MSCFILE_DIRS tag can be used to specify one or more directories that |
# contain msc files that are included in the documentation (see the |
# \mscfile command). |
|
MSCFILE_DIRS = |
|
# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of |
# nodes that will be shown in the graph. If the number of nodes in a graph |
# becomes larger than this value, doxygen will truncate the graph, which is |
# visualized by representing a node as a red box. Note that doxygen if the |
# number of direct children of the root node in a graph is already larger than |
# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note |
# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. |
|
DOT_GRAPH_MAX_NODES = 50 |
|
# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the |
# graphs generated by dot. A depth value of 3 means that only nodes reachable |
# from the root by following a path via at most 3 edges will be shown. Nodes |
# that lay further from the root node will be omitted. Note that setting this |
# option to 1 or 2 may greatly reduce the computation time needed for large |
# code bases. Also note that the size of a graph can be further restricted by |
# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. |
|
MAX_DOT_GRAPH_DEPTH = 0 |
|
# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent |
# background. This is disabled by default, because dot on Windows does not |
# seem to support this out of the box. Warning: Depending on the platform used, |
# enabling this option may lead to badly anti-aliased labels on the edges of |
# a graph (i.e. they become hard to read). |
|
DOT_TRANSPARENT = NO |
|
# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output |
# files in one run (i.e. multiple -o and -T options on the command line). This |
# makes dot run faster, but since only newer versions of dot (>1.8.10) |
# support this, this feature is disabled by default. |
|
DOT_MULTI_TARGETS = NO |
|
# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will |
# generate a legend page explaining the meaning of the various boxes and |
# arrows in the dot generated graphs. |
|
GENERATE_LEGEND = YES |
|
# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will |
# remove the intermediate dot files that are used to generate |
# the various graphs. |
|
DOT_CLEANUP = YES |