URL
https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk
Subversion Repositories usb_fpga_1_11
Compare Revisions
- This comparison shows the changes necessary to convert path
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/memtest
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/memtest.c
1,6 → 1,6
/*! |
memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11 |
Copyright (C) 2009-2010 ZTEX e.K. |
memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB-FPGA Module 1.11c |
Copyright (C) 2009-2011 ZTEX GmbH. |
http://www.ztex.de |
|
This program is free software; you can redistribute it and/or modify |
38,7 → 38,7
#define[PRODUCT_STRING]["memtest example for UFM 1.11"] |
|
// 0 : counter mode; 1: shift pattern mode |
xdata BYTE mode = 0; |
__xdata BYTE mode = 0; |
|
// this is called automatically after FPGA configuration |
#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG |
/fpga-11/ipcore_dir/dcm0.xise
15,13 → 15,7
<version xil_pn:ise_version="11.4" xil_pn:schema_version="2"/> |
|
<files> |
<file xil_pn:name="dcm0.v" xil_pn:type="FILE_VERILOG"> |
<association xil_pn:name="BehavioralSimulation"/> |
<association xil_pn:name="Implementation"/> |
<association xil_pn:name="PostMapSimulation"/> |
<association xil_pn:name="PostRouteSimulation"/> |
<association xil_pn:name="PostTranslateSimulation"/> |
</file> |
<file xil_pn:name="dcm0.v" xil_pn:type="FILE_VERILOG"/> |
<file xil_pn:name="dcm0.vhd" xil_pn:type="FILE_VHDL"> |
<association xil_pn:name="BehavioralSimulation"/> |
<association xil_pn:name="Implementation"/> |
/fpga-11/memtest.xise
107,7 → 107,7
<property xil_pn:name="Drive Awake Pin During Suspend/Wake Sequence spartan6" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Drive Done Pin High" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="EDIF" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="true" xil_pn:valueState="non-default"/> |
<property xil_pn:name="Enable Cyclic Redundancy Checking (CRC) spartan6" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable Debugging of Serial Mode BitStream" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable Enhanced Design Summary" xil_pn:value="true" xil_pn:valueState="default"/> |
/fpga-11/memtest.bit
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
/fpga-11/memtest.ise
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
/fpga/ipcore_dir/mem0/user_design/clean.sh
0,0 → 1,85
#!/bin/bash |
|
# This files / directories from this directory will not be removed |
# Filenames with spaces or other spuid characters will be ignored |
sourcefiles="*.sh *.prj" |
subdirs="par rtl synth" |
|
# This sould not be edited. |
list_files() { |
if [ "$2" != "" ]; then |
echo "$1" |
for i in $2; do |
echo " $i" |
done |
fi |
} |
|
rmfiles="" |
rmdirs="" |
keepfiles="" |
keepdirs="" |
allfiles=`ls -A` |
for f in $allfiles; do |
keep=false |
for i in $sourcefiles; do |
if [ "$i" == "$f" ]; then |
keep=true |
fi |
done |
for i in $subdirs; do |
if [ "$i" == "$f" ]; then |
keep=true |
fi |
done |
for i in $binfiles; do # binfiles is set by distclean.sh |
if [ "$i" == "$f" ]; then |
keep=false |
fi |
done |
if [ -d "$f" ]; then |
if $keep; then |
keepdirs+=" $f" |
else |
rmdirs+=" $f" |
fi |
fi |
if [ -f "$f" ]; then |
if $keep; then |
keepfiles+=" $f" |
else |
rmfiles+=" $f" |
fi |
fi |
done |
|
|
echo |
echo "Directory $PWD:" |
list_files "This directories will NOT be removed:" "$keepdirs" |
list_files "This files will NOT be removed:" "$keepfiles" |
list_files "This directories will be removed:" "$rmdirs" |
list_files "This files will be removed:" "$rmfiles" |
|
if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then |
c="yes" |
else |
echo -n 'Confirm this by entering "yes": ' |
read c |
fi |
|
if [ "$c" == "yes" ]; then |
[ "$rmfiles" != "" ] && rm $rmfiles |
[ "$rmdirs" != "" ] && rm -r $rmdirs |
|
for d in $subdirs; do |
if [ -x "$d/clean.sh" ]; then |
cd $d |
./clean.sh || exit 1 |
cd .. |
fi |
done |
|
exit 0 |
fi |
exit 1 |
fpga/ipcore_dir/mem0/user_design/clean.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: fpga/memtest.xise
===================================================================
--- fpga/memtest.xise (revision 4)
+++ fpga/memtest.xise (revision 5)
@@ -109,7 +109,7 @@
-
+
Index: MemTest.java
===================================================================
--- MemTest.java (revision 4)
+++ MemTest.java (revision 5)
@@ -1,6 +1,6 @@
/*!
- memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11
- Copyright (C) 2009-2010 ZTEX e.K.
+ memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB-FPGA Module 1.11c
+ Copyright (C) 2009-2011 ZTEX GmbH.
http://www.ztex.de
This program is free software; you can redistribute it and/or modify
@@ -31,7 +31,7 @@
public final static String helpMsg = new String (
"Parameters:\n"+
" -d Device Number (default: 0)\n" +
- " -c Counter test aptttern\n" +
+ " -c Counter test pattern\n" +
" -f Force uploads\n" +
" -p Print bus info\n" +
" -w Enable certain workarounds\n"+