URL
https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk
Subversion Repositories usb_fpga_1_11
Compare Revisions
- This comparison shows the changes necessary to convert path
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/ucecho
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/UCEcho.java
1,6 → 1,6
/*! |
ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2 |
Copyright (C) 2009-2010 ZTEX e.K. |
ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.2 |
Copyright (C) 2009-2011 ZTEX GmbH. |
http://www.ztex.de |
|
This program is free software; you can redistribute it and/or modify |
/ucecho.c
1,6 → 1,6
/*! |
ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2 |
Copyright (C) 2009-2010 ZTEX e.K. |
ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.2 |
Copyright (C) 2009-2011 ZTEX GmbH. |
http://www.ztex.de |
|
This program is free software; you can redistribute it and/or modify |
/Readme
9,7 → 9,7
the FPGA and can be read back from Endpoint 2. |
|
This example does the same as the example in directory ../../all/ucecho |
except that the uppercase - lowercase conversion made by the FPGA. |
except that the uppercase - lowercase conversion is made by the FPGA. |
|
The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx) |
to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the |
/fpga/ucecho.ise
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
/fpga/ucecho.xise
82,7 → 82,7
<property xil_pn:name="Do Not Escape Signal and Instance Names in Netlist" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Done (Output Events)" xil_pn:value="Default (4)" xil_pn:valueState="default"/> |
<property xil_pn:name="Drive Done Pin High" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="true" xil_pn:valueState="non-default"/> |
<property xil_pn:name="Enable Cyclic Redundancy Checking (CRC)" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable Debugging of Serial Mode BitStream" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Enable Enhanced Design Summary" xil_pn:value="true" xil_pn:valueState="default"/> |