URL
https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk
Subversion Repositories usb_fpga_1_11
Compare Revisions
- This comparison shows the changes necessary to convert path
/usb_fpga_1_11/trunk/examples
- from Rev 7 to Rev 8
- ↔ Reverse comparison
Rev 7 → Rev 8
/usb-fpga-1.15y/default/default.c
File deleted
/usb-fpga-1.15y/default/default.sh
File deleted
usb-fpga-1.15y/default/default.sh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: usb-fpga-1.15y/default/Readme
===================================================================
--- usb-fpga-1.15y/default/Readme (revision 7)
+++ usb-fpga-1.15y/default/Readme (nonexistent)
@@ -1 +0,0 @@
-Default Firmware for USB-FPGA Modules 1.15x.
Index: usb-fpga-1.15y/default/Makefile
===================================================================
--- usb-fpga-1.15y/default/Makefile (revision 7)
+++ usb-fpga-1.15y/default/Makefile (nonexistent)
@@ -1,23 +0,0 @@
-#########################
-# configuration section #
-#########################
-
-ZTEXPREFIX=../../..
-
-JARTARGET=
-CLASSTARGETS=
-CLASSEXTRADEPS=
-
-IHXTARGETS=default.ihx
-IHXEXTRADEPS=
-EXTRAJARFILES=
-EXTRADISTCLEANFILES=
-
-default: all
-
-################################
-# DO NOT CHANAGE THE FOLLOWING #
-################################
-
-include $(ZTEXPREFIX)/Makefile.mk
-
Index: usb-fpga-1.15y/Makefile
===================================================================
--- usb-fpga-1.15y/Makefile (revision 7)
+++ usb-fpga-1.15y/Makefile (revision 8)
@@ -1,4 +1,4 @@
-DIRS=intraffic ucecho default
+DIRS=intraffic ucecho
.PHONY: default all clean distclean avr avrclean avrdistclean
/usb-fpga-1.11/flashbench/FlashBench.java
87,7 → 87,7
} |
System.out.println("testRW: " + errors +" errors detected"); |
|
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testW ************************************************************** |
105,7 → 105,7
} |
flashWriteSector(i,j,buf); |
} |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testR ************************************************************** |
132,7 → 132,7
errors+=1; |
} |
System.out.println("testR: " + errors +" errors detected"); |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* main **************************************************************** |
/usb-fpga-1.2/flashbench/FlashBench.java
87,7 → 87,7
} |
System.out.println("testRW: " + errors +" errors detected"); |
|
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testW ************************************************************** |
105,7 → 105,7
} |
flashWriteSector(i,j,buf); |
} |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testR ************************************************************** |
132,7 → 132,7
errors+=1; |
} |
System.out.println("testR: " + errors +" errors detected"); |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* main **************************************************************** |
/usb-xmega-1.0/flashbench/FlashBench.java
87,7 → 87,7
} |
System.out.println("testRW: " + errors +" errors detected"); |
|
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testW ************************************************************** |
105,7 → 105,7
} |
flashWriteSector(i,j,buf); |
} |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testR ************************************************************** |
132,7 → 132,7
errors+=1; |
} |
System.out.println("testR: " + errors +" errors detected"); |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* main **************************************************************** |
/usb-1.0/flashbench/FlashBench.java
87,7 → 87,7
} |
System.out.println("testRW: " + errors +" errors detected"); |
|
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testW ************************************************************** |
105,7 → 105,7
} |
flashWriteSector(i,j,buf); |
} |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testR ************************************************************** |
132,7 → 132,7
errors+=1; |
} |
System.out.println("testR: " + errors +" errors detected"); |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* main **************************************************************** |
/usb-fpga-1.15/1.15d/intraffic/intraffic.sh
1,4 → 1,4
#make -C ../../../java distclean all || exit |
make distclean all || exit |
#make distclean all || exit |
#make || exit |
java -cp InTraffic.jar InTraffic $@ |
/usb-fpga-1.15/flashbench/FlashBench.java
87,7 → 87,7
} |
System.out.println("testRW: " + errors +" errors detected"); |
|
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testW ************************************************************** |
105,7 → 105,7
} |
flashWriteSector(i,j,buf); |
} |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* testR ************************************************************** |
132,7 → 132,7
errors+=1; |
} |
System.out.println("testR: " + errors +" errors detected"); |
return num*512.0/(new Date().getTime() - t0); |
return num*flashSectorSize()*1.0/(new Date().getTime() - t0); |
} |
|
// ******* main **************************************************************** |
/usb-fpga-2.16/flashdemo/FlashDemo.java
0,0 → 1,160
/*! |
flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB-FPGA Module 1.15 |
Copyright (C) 2009-2011 ZTEX GmbH. |
http://www.ztex.de |
|
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License version 3 as |
published by the Free Software Foundation. |
|
This program is distributed in the hope that it will be useful, but |
WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
General Public License for more details. |
|
You should have received a copy of the GNU General Public License |
along with this program; if not, see http://www.gnu.org/licenses/. |
!*/ |
|
import java.io.*; |
import java.util.*; |
|
import ch.ntb.usb.*; |
|
import ztex.*; |
|
// ***************************************************************************** |
// ******* ParameterException ************************************************** |
// ***************************************************************************** |
// Exception the prints a help message |
class ParameterException extends Exception { |
public final static String helpMsg = new String ( |
"Parameters:\n"+ |
" -d <number> Device Number (default: 0)\n" + |
" -f Force uploads\n" + |
" -p Print bus info\n" + |
" -ue Upload Firmware to EEPROM\n" + |
" -re Reset EEPROM Firmware\n" + |
" -w Enable certain workarounds\n" + |
" -h This help" ); |
|
public ParameterException (String msg) { |
super( msg + "\n" + helpMsg ); |
} |
} |
|
// ***************************************************************************** |
// ******* Test0 *************************************************************** |
// ***************************************************************************** |
class FlashDemo extends Ztex1v1 { |
|
// ******* FlashDemo *********************************************************** |
// constructor |
public FlashDemo ( ZtexDevice1 pDev ) throws UsbException { |
super ( pDev ); |
} |
|
// ******* main **************************************************************** |
public static void main (String args[]) { |
|
int devNum = 0; |
boolean force = false; |
boolean workarounds = false; |
|
try { |
// init USB stuff |
LibusbJava.usb_init(); |
|
// scan the USB bus |
ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); |
if ( bus.numberOfDevices() <= 0) { |
System.err.println("No devices found"); |
System.exit(0); |
} |
|
// scan the command line arguments |
for (int i=0; i<args.length; i++ ) { |
if ( args[i].equals("-d") ) { |
i++; |
try { |
if (i>=args.length) throw new Exception(); |
devNum = Integer.parseInt( args[i] ); |
} |
catch (Exception e) { |
throw new ParameterException("Device number expected after -d"); |
} |
} |
else if ( args[i].equals("-f") ) { |
force = true; |
} |
else if ( args[i].equals("-p") ) { |
bus.printBus(System.out); |
System.exit(0); |
} |
else if ( args[i].equals("-w") ) { |
workarounds = true; |
} |
else if ( args[i].equals("-h") ) { |
System.err.println(ParameterException.helpMsg); |
System.exit(0); |
} |
else if ( !args[i].equals("-re") && !args[i].equals("-ue") ) |
throw new ParameterException("Invalid Parameter: "+args[i]); |
} |
|
|
// create the main class |
FlashDemo ztex = new FlashDemo ( bus.device(devNum) ); |
ztex.certainWorkarounds = workarounds; |
|
// upload the firmware if necessary |
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("Flash demo for UFM 2.16") ) { |
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashdemo.ihx", force ) + " ms"); |
} |
|
for (int i=0; i<args.length; i++ ) { |
if ( args[i].equals("-re") ) { |
ztex.eepromDisable(); |
} |
else if ( args[i].equals("-ue") ) { |
System.out.println("Firmware to EEPROM upload time: " + ztex.eepromUpload( "flashdemo.ihx", force ) + " ms"); |
} |
} |
|
// print some information |
System.out.println("Capabilities: " + ztex.capabilityInfo(", ")); |
System.out.println("Enabled: " + ztex.flashEnabled()); |
System.out.println("Size: " + ztex.flashSize()); |
|
if ( ztex.getFlashEC() == ztex.FLASH_EC_PENDING ) { |
System.out.print("Another operation is pending. Waiting .."); |
int i = 20; |
do { |
System.out.print("."); |
try { |
Thread.sleep( 1000 ); |
} |
catch ( InterruptedException e) { |
} |
i--; |
} while ( ztex.getFlashEC()==ztex.FLASH_EC_PENDING && i>0 ); |
System.out.println(); |
} |
|
byte[] buf = new byte[ztex.flashSectorSize()]; |
ztex.flashReadSector(0,buf); // read out the last sector; |
int sector = (buf[0] & 255) | ((buf[1] & 255) << 8) | ((buf[1] & 255) << 16) | ((buf[1] & 255) << 24); |
System.out.println("Last sector: "+sector); |
|
ztex.flashReadSector(sector,buf); // read out the string |
int i=0; |
while ( buf[i] != '\0'&& i < ztex.flashSectorSize() ) |
i++; |
System.out.println("The string: `" + new String(buf,0,i)+ "'"); |
} |
catch (Exception e) { |
System.out.println("Error: "+e.getLocalizedMessage() ); |
} |
} |
|
} |
/usb-fpga-2.16/flashdemo/flashdemo.c
0,0 → 1,65
/*! |
flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB-FPGA Module 1.15 |
Copyright (C) 2009-2011 ZTEX GmbH. |
http://www.ztex.de |
|
This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License version 3 as |
published by the Free Software Foundation. |
|
This program is distributed in the hope that it will be useful, but |
WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
General Public License for more details. |
|
You should have received a copy of the GNU General Public License |
along with this program; if not, see http://www.gnu.org/licenses/. |
!*/ |
|
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros |
#include[ztex-utils.h] // include basic functions and variables |
|
// select ZTEX USB FPGA Module 2.16 as target (required for FPGA configuration) |
IDENTITY_UFM_2_16(10.16.0.0,0); |
|
// enable Flash support |
ENABLE_FLASH; |
|
// this product string is also used for identification by the host software |
#define[PRODUCT_STRING]["Flash demo for UFM 2.16"] |
|
__code char flash_string[] = "Hello World!"; |
|
// include the main part of the firmware kit, define the descriptors, ... |
#include[ztex.h] |
|
void main(void) |
{ |
__xdata DWORD sector; |
|
init_USB(); // init everything |
|
if ( flash_enabled ) { |
flash_read_init( 0 ); // prepare reading sector 0 |
flash_read((__xdata BYTE*) §or, 4); // read the number of last sector |
flash_read_finish(flash_sector_size - 4); // dummy-read the rest of the sector + finish read operation |
|
sector++; |
if ( sector > flash_sectors || sector == 0 ) { |
sector = 1; |
} |
|
flash_write_init( 0 ); // prepare writing sector 0 |
flash_write((__xdata BYTE*) §or, 4); // write the current sector number |
flash_write_finish_sector(flash_sector_size - 4); // dummy-write the rest of the sector + CRC |
flash_write_finish(); // finish write operation |
|
flash_write_init( sector ); // prepare writing sector sector |
flash_write((__xdata BYTE*) flash_string, sizeof(flash_string)); // write the string |
flash_write_finish_sector(flash_sector_size - sizeof(flash_string)); // dummy-write the rest of the sector + CRC |
flash_write_finish(); // finish write operation |
} |
|
while (1) { } // twiddle thumbs |
} |
|
/usb-fpga-2.16/flashdemo/flashdemo.bat
0,0 → 1,2
java -cp FlashDemo.jar FlashDemo |
pause |
/usb-fpga-2.16/flashdemo/flashdemo.sh
0,0 → 1,3
#make -C ../../../java distclean all || exit |
#make distclean all || exit |
java -cp FlashDemo.jar FlashDemo $@ |
usb-fpga-2.16/flashdemo/flashdemo.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/flashdemo/Readme
===================================================================
--- usb-fpga-2.16/flashdemo/Readme (nonexistent)
+++ usb-fpga-2.16/flashdemo/Readme (revision 8)
@@ -0,0 +1,16 @@
+flashdemo
+---------
+
+This example demonstrates how data can be read and written to/from the
+Flash memory.
+
+During the start-up the firmware (defined in flashdemo.c) reads the
+number of last sector n from sector 0 (dword at position 0) and
+increments it by one. If n is larger than or equal to the total amount
+of sectors, or if it is equal to 0, n is set to 1.
+
+Then n is written back to sector 0 and sector n is filled with the
+string "Hello World!".
+
+The host software (defined in FlashDemo.java) reads out the string from
+the last sector of the flash memory.
Index: usb-fpga-2.16/flashdemo/Makefile
===================================================================
--- usb-fpga-2.16/flashdemo/Makefile (nonexistent)
+++ usb-fpga-2.16/flashdemo/Makefile (revision 8)
@@ -0,0 +1,23 @@
+#########################
+# configuration section #
+#########################
+
+ZTEXPREFIX=../../..
+
+JARTARGET=FlashDemo.jar
+CLASSTARGETS=FlashDemo.class
+CLASSEXTRADEPS=
+
+IHXTARGETS=flashdemo.ihx
+IHXEXTRADEPS=
+EXTRAJARFILES=flashdemo.ihx
+EXTRADISTCLEANFILES=
+
+default: all
+
+################################
+# DO NOT CHANAGE THE FOLLOWING #
+################################
+
+include $(ZTEXPREFIX)/Makefile.mk
+
Index: usb-fpga-2.16/2.16b/mmio/ucecho.sh
===================================================================
--- usb-fpga-2.16/2.16b/mmio/ucecho.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/ucecho.sh (revision 8)
@@ -0,0 +1,4 @@
+#make -C ../../../java distclean all || exit
+#make distclean all || exit
+#make || exit
+java -cp UCEcho.jar UCEcho $@
usb-fpga-2.16/2.16b/mmio/ucecho.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/mmio/UCEcho.java
===================================================================
--- usb-fpga-2.16/2.16b/mmio/UCEcho.java (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/UCEcho.java (revision 8)
@@ -0,0 +1,169 @@
+/*!
+ mmio -- Memory mapped I/O example for ZTEX USB-FPGA Module 1.15b
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+import java.io.*;
+import java.util.*;
+
+import ch.ntb.usb.*;
+
+import ztex.*;
+
+// *****************************************************************************
+// ******* ParameterException **************************************************
+// *****************************************************************************
+// Exception the prints a help message
+class ParameterException extends Exception {
+ public final static String helpMsg = new String (
+ "Parameters:\n"+
+ " -d Device Number (default: 0)\n" +
+ " -f Force uploads\n" +
+ " -p Print bus info\n" +
+ " -w Enable certain workarounds\n"+
+ " -h This help" );
+
+ public ParameterException (String msg) {
+ super( msg + "\n" + helpMsg );
+ }
+}
+
+// *****************************************************************************
+// ******* Test0 ***************************************************************
+// *****************************************************************************
+class UCEcho extends Ztex1v1 {
+
+// ******* UCEcho **************************************************************
+// constructor
+ public UCEcho ( ZtexDevice1 pDev ) throws UsbException {
+ super ( pDev );
+ }
+
+// ******* echo ****************************************************************
+// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out
+ public void echo ( String input ) throws UsbException {
+ byte buf[] = input.getBytes();
+ int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000);
+ if ( i<0 )
+ throw new UsbException("Error sending data: " + LibusbJava.usb_strerror());
+ System.out.println("Send "+i+" bytes: `"+input+"'" );
+
+ try {
+ Thread.sleep( 10 );
+ }
+ catch ( InterruptedException e ) {
+ }
+
+ buf = new byte[1024];
+ i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000);
+ if ( i<0 )
+ throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror());
+ System.out.println("Read "+i+" bytes: `"+new String(buf,0,i)+"'" );
+ }
+
+// ******* main ****************************************************************
+ public static void main (String args[]) {
+
+ int devNum = 0;
+ boolean force = false;
+ boolean workarounds = false;
+
+ try {
+// init USB stuff
+ LibusbJava.usb_init();
+
+// scan the USB bus
+ ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
+ if ( bus.numberOfDevices() <= 0) {
+ System.err.println("No devices found");
+ System.exit(0);
+ }
+
+// scan the command line arguments
+ for (int i=0; i=args.length) throw new Exception();
+ devNum = Integer.parseInt( args[i] );
+ }
+ catch (Exception e) {
+ throw new ParameterException("Device number expected after -d");
+ }
+ }
+ else if ( args[i].equals("-f") ) {
+ force = true;
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-w") ) {
+ workarounds = true;
+ }
+ else if ( args[i].equals("-h") ) {
+ System.err.println(ParameterException.helpMsg);
+ System.exit(0);
+ }
+ else throw new ParameterException("Invalid Parameter: "+args[i]);
+ }
+
+
+// create the main class
+ UCEcho ztex = new UCEcho ( bus.device(devNum) );
+ ztex.certainWorkarounds = workarounds;
+
+// upload the firmware if necessary
+ if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 2.16") ) {
+ System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
+ force = true;
+ }
+
+// upload the bitstream if necessary
+ if ( force || ! ztex.getFpgaConfiguration() ) {
+ System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bit" , force ) + " ms");
+ }
+
+
+// claim interface 0
+ ztex.trySetConfiguration ( 1 );
+ ztex.claimInterface ( 0 );
+
+// read string from stdin and write it to USB device
+ String str = "";
+ BufferedReader reader = new BufferedReader( new InputStreamReader( System.in ) );
+ while ( ! str.equals("quit") ) {
+ System.out.print("Enter a string or `quit' to exit the program: ");
+ str = reader.readLine();
+ if ( ! str.equals("") )
+ ztex.echo(str);
+ System.out.println("");
+ }
+
+// release interface 0
+ ztex.releaseInterface( 0 );
+
+ }
+ catch (Exception e) {
+ System.out.println("Error: "+e.getLocalizedMessage() );
+ }
+ }
+
+}
Index: usb-fpga-2.16/2.16b/mmio/ucecho.c
===================================================================
--- usb-fpga-2.16/2.16b/mmio/ucecho.c (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/ucecho.c (revision 8)
@@ -0,0 +1,103 @@
+/*!
+ mmio -- Memory mapped I/O example for ZTEX USB-FPGA Module 1.15b
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
+#include[ztex-utils.h] // include basic functions
+
+// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host)
+EP_CONFIG(2,0,BULK,IN,512,2);
+EP_CONFIG(4,0,BULK,OUT,512,2);
+
+// select ZTEX USB FPGA Module 2.16 as target (required for FPGA configuration)
+IDENTITY_UFM_2_16(10.16.0.0,0);
+
+// enables high speed FPGA configuration, (re)use EP 4
+ENABLE_HS_FPGA_CONF(4);
+
+// this product string is also used for identification by the host software
+#define[PRODUCT_STRING]["memeory mapping example for UFM 1.15"]
+
+__xdata BYTE run;
+
+#define[PRE_FPGA_RESET][PRE_FPGA_RESET
+ run = 0;
+]
+
+#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
+ IFCONFIG = bmBIT7; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
+ SYNCDELAY;
+ EP2FIFOCFG = 0;
+ SYNCDELAY;
+ EP4FIFOCFG = 0;
+ SYNCDELAY;
+
+ REVCTL = 0x0; // reset
+ SYNCDELAY;
+ EP2CS &= ~bmBIT0; // stall = 0
+ SYNCDELAY;
+ EP4CS &= ~bmBIT0; // stall = 0
+
+ SYNCDELAY; // first two packages are waste
+ EP4BCL = 0x80; // skip package, (re)arm EP4
+ SYNCDELAY;
+ EP4BCL = 0x80; // skip package, (re)arm EP4
+
+ FIFORESET = 0x80; // reset FIFO
+ SYNCDELAY;
+ FIFORESET = 0x82;
+ SYNCDELAY;
+ FIFORESET = 0x00;
+ SYNCDELAY;
+
+ run = 1;
+]
+
+// include the main part of the firmware kit, define the descriptors, ...
+#include[ztex.h]
+
+
+__xdata __at 0x5001 volatile BYTE OUT_REG; // FPGA register where the data is written to
+__xdata __at 0x5002 volatile BYTE IN_REG; // FPGA register where the result is read from
+
+
+void main(void)
+{
+ WORD i,size;
+
+// init everything
+ init_USB();
+
+ while (1) {
+ if ( run & !(EP4CS & bmBIT2) ) { // EP4 is not empty
+ size = (EP4BCH << 8) | EP4BCL;
+ if ( size>0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full
+ for ( i=0; i> 8;
+ SYNCDELAY;
+ EP2BCL = size & 255; // arm EP2
+ SYNCDELAY;
+ INPKTEND = 0x2;
+ }
+ SYNCDELAY;
+ EP4BCL = 0x80; // (re)arm EP4
+ }
+ }
+}
Index: usb-fpga-2.16/2.16b/mmio/ucecho.bat
===================================================================
--- usb-fpga-2.16/2.16b/mmio/ucecho.bat (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/ucecho.bat (revision 8)
@@ -0,0 +1,2 @@
+java -cp UCEcho.jar UCEcho
+pause
Index: usb-fpga-2.16/2.16b/mmio/fpga/ucecho.ucf
===================================================================
--- usb-fpga-2.16/2.16b/mmio/fpga/ucecho.ucf (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/fpga/ucecho.ucf (revision 8)
@@ -0,0 +1,33 @@
+NET "fxclk_in" TNM_NET = "fxclk_in";
+TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 20 ns HIGH 50 %;
+NET "fxclk_in" LOC = "Y18" | IOSTANDARD = LVCMOS33 ;
+
+NET "MM_A<0>" LOC = "R17" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<1>" LOC = "P16" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<2>" LOC = "R16" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<3>" LOC = "T18" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<4>" LOC = "V19" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<5>" LOC = "V20" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<6>" LOC = "V22" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<7>" LOC = "W17" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<8>" LOC = "Y19" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<9>" LOC = "Y21" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<10>" LOC = "Y22" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<11>" LOC = "G20" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<12>" LOC = "G18" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<13>" LOC = "G17" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<14>" LOC = "G16" | IOSTANDARD = LVCMOS33 ;
+NET "MM_A<15>" LOC = "G15" | IOSTANDARD = LVCMOS33 ;
+
+NET "MM_D<0>" LOC = "J22" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<1>" LOC = "J21" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<2>" LOC = "J20" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<3>" LOC = "K17" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<4>" LOC = "J17" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<5>" LOC = "M17" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<6>" LOC = "N22" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+NET "MM_D<7>" LOC = "N20" | IOSTANDARD = LVCMOS33 | DRIVE = 4;
+
+NET "MM_WRN" LOC = "H14" | IOSTANDARD = LVCMOS33 ;
+NET "MM_RDN" LOC = "H17" | IOSTANDARD = LVCMOS33 ;
+NET "MM_PSENN" LOC = "H18" | IOSTANDARD = LVCMOS33 ;
Index: usb-fpga-2.16/2.16b/mmio/fpga/ucecho.vhd
===================================================================
--- usb-fpga-2.16/2.16b/mmio/fpga/ucecho.vhd (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/fpga/ucecho.vhd (revision 8)
@@ -0,0 +1,110 @@
+library ieee;
+use IEEE.std_logic_1164.all;
+use IEEE.std_logic_arith.all;
+use IEEE.std_logic_unsigned.all;
+--#use IEEE.numeric_std.all;
+Library UNISIM;
+use UNISIM.vcomponents.all;
+
+entity ucecho is
+ port(
+ fxclk_in : in std_logic;
+ MM_A : in std_logic_vector(15 downto 0);
+ MM_D : inout std_logic_vector(7 downto 0);
+ MM_WRN : in std_logic;
+ MM_RDN : in std_logic;
+ MM_PSENN : in std_logic
+ );
+end ucecho;
+
+architecture RTL of ucecho is
+
+--signal declaration
+signal rd : std_logic := '1';
+signal rd0,rd1 : std_logic := '1';
+signal wr : std_logic := '1';
+signal wr0,wr1 : std_logic := '1';
+
+signal datain : std_logic_vector(7 downto 0);
+signal dataout : std_logic_vector(7 downto 0);
+
+signal fxclk : std_logic; -- 96 MHz
+signal fxclk_fb : std_logic;
+
+begin
+ -- PLL is used as clock filter
+ fxclk_pll : PLLE2_BASE
+ generic map (
+ BANDWIDTH => "OPTIMIZED", -- OPTIMIZED, HIGH, LOW
+ CLKFBOUT_MULT => 20, -- Multiply value for all CLKOUT, (2-64)
+ CLKFBOUT_PHASE => 0.0, -- Phase offset in degrees of CLKFB, (-360.000-360.000).
+ CLKIN1_PERIOD => 0.0, -- Input clock period in ns to ps resolution (i.e. 33.333 is 30 MHz).
+ -- CLKOUT0_DIVIDE - CLKOUT5_DIVIDE: Divide amount for each CLKOUT (1-128)
+ CLKOUT0_DIVIDE => 10,
+ CLKOUT1_DIVIDE => 1,
+ CLKOUT2_DIVIDE => 1,
+ CLKOUT3_DIVIDE => 1,
+ CLKOUT4_DIVIDE => 1,
+ CLKOUT5_DIVIDE => 1,
+ -- CLKOUT0_DUTY_CYCLE - CLKOUT5_DUTY_CYCLE: Duty cycle for each CLKOUT (0.001-0.999).
+ CLKOUT0_DUTY_CYCLE => 0.5,
+ CLKOUT1_DUTY_CYCLE => 0.5,
+ CLKOUT2_DUTY_CYCLE => 0.5,
+ CLKOUT3_DUTY_CYCLE => 0.5,
+ CLKOUT4_DUTY_CYCLE => 0.5,
+ CLKOUT5_DUTY_CYCLE => 0.5,
+ -- CLKOUT0_PHASE - CLKOUT5_PHASE: Phase offset for each CLKOUT (-360.000-360.000).
+ CLKOUT0_PHASE => 0.0,
+ CLKOUT1_PHASE => 0.0,
+ CLKOUT2_PHASE => 0.0,
+ CLKOUT3_PHASE => 0.0,
+ CLKOUT4_PHASE => 0.0,
+ CLKOUT5_PHASE => 0.0,
+ DIVCLK_DIVIDE => 1, -- Master division value, (1-56)
+ REF_JITTER1 => 0.0, -- Reference input jitter in UI, (0.000-0.999).
+ STARTUP_WAIT => "FALSE" -- Delay DONE until PLL Locks, ("TRUE"/"FALSE")
+ )
+ port map (
+ CLKOUT0 => fxclk,
+ CLKFBOUT => fxclk_fb, -- 1-bit output: Feedback clock
+ CLKIN1 => fxclk_in, -- 1-bit input: Input clock
+ PWRDWN => '0', -- 1-bit input: Power-down
+ RST => '0', -- 1-bit input: Reset
+ CLKFBIN => fxclk_fb -- 1-bit input: Feedback clock
+ );
+
+ rd <= MM_RDN and MM_PSENN;
+ wr <= MM_WRN;
+
+ MM_D <= dataout when ((rd1 or rd0 or rd) = '0') else ( others => 'Z' ); -- enable output
+
+ dpUCECHO: process(fxclk)
+ begin
+ if fxclk' event and fxclk = '1' then
+ if (wr1 = '1') and (wr0 = '0') -- EZ-USB write strobe
+ then
+ if MM_A = conv_std_logic_vector(16#5001#,16) -- read data from EZ-USB if addr=0x5001
+ then
+ datain <= MM_D;
+ end if;
+ elsif (rd1 = '1') and (rd0 = '0') -- EZ-USB read strobe
+ then
+ if MM_A = conv_std_logic_vector(16#5002#,16) -- write data to EZ-USB if addr=0x5002
+ then
+ if ( datain >= conv_std_logic_vector(97,8) ) and ( datain <= conv_std_logic_vector(122,8) ) -- do the upercase conversion
+ then
+ dataout <= datain - conv_std_logic_vector(32,8);
+ else
+ dataout <= datain ;
+ end if;
+ end if;
+ end if;
+
+ rd0 <= rd;
+ rd1 <= rd0;
+ wr0 <= wr;
+ wr1 <= wr0;
+ end if;
+ end process dpUCECHO;
+
+end RTL;
Index: usb-fpga-2.16/2.16b/mmio/fpga/clean.sh
===================================================================
--- usb-fpga-2.16/2.16b/mmio/fpga/clean.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/fpga/clean.sh (revision 8)
@@ -0,0 +1,80 @@
+#!/bin/bash
+
+# This files / directories from this directory will not be removed
+# Filenames with spaces or other spuid characters will be ignored
+sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise"
+subdirs="ipcore_dir"
+
+
+# This sould not be edited.
+list_files() {
+ if [ "$2" != "" ]; then
+ echo "$1"
+ for i in $2; do
+ echo " $i"
+ done
+ fi
+}
+
+rmfiles=""
+rmdirs=""
+keepfiles=""
+keepdirs=""
+allfiles=`ls -A`
+for f in $allfiles; do
+ keep=false
+ for i in $sourcefiles; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ for i in $subdirs; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ if [ -d "$f" ]; then
+ if $keep; then
+ keepdirs+=" $f"
+ else
+ rmdirs+=" $f"
+ fi
+ fi
+ if [ -f "$f" ]; then
+ if $keep; then
+ keepfiles+=" $f"
+ else
+ rmfiles+=" $f"
+ fi
+ fi
+done
+
+echo
+echo "Directory $PWD:"
+list_files "This directories will NOT be removed:" "$keepdirs"
+list_files "This files will NOT be removed:" "$keepfiles"
+list_files "This directories will be removed:" "$rmdirs"
+list_files "This files will be removed:" "$rmfiles"
+
+if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then
+ c="yes"
+else
+ echo -n 'Confirm this by entering "yes": '
+ read c
+fi
+
+if [ "$c" == "yes" ]; then
+ [ "$rmfiles" != "" ] && rm $rmfiles
+ [ "$rmdirs" != "" ] && rm -r $rmdirs
+
+ for d in $subdirs; do
+ if [ -x "$d/clean.sh" ]; then
+ cd $d
+ ./clean.sh || exit 1
+ cd ..
+ fi
+ done
+
+ exit 0
+fi
+exit 1
usb-fpga-2.16/2.16b/mmio/fpga/clean.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/mmio/fpga/ucecho.xise
===================================================================
--- usb-fpga-2.16/2.16b/mmio/fpga/ucecho.xise (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/fpga/ucecho.xise (revision 8)
@@ -0,0 +1,67 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: usb-fpga-2.16/2.16b/mmio/Readme
===================================================================
--- usb-fpga-2.16/2.16b/mmio/Readme (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/Readme (revision 8)
@@ -0,0 +1,24 @@
+mmio
+----
+
+This example is intended for ZTEX USB-FPGA Modules 1.15. It demonstrates
+memory mapped I/O between the EZ-USB FX2 and the FPGA.
+
+The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4
+(both 512 bytes, double buffered, bulk transfer, belong to interface 0).
+All data that is written to Endpoint 4 is converted to uppercase by
+the FPGA and can be read back from Endpoint 2.
+
+This example does the same as the example in directory ../../all/ucecho
+except that the uppercase - lowercase conversion is made by the FPGA
+through memory mapped I/O: The EZ-USB FX2 writes the data to address
+0x5001 and reads the converted data back from 0x5002.
+
+The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx)
+to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the
+FPGA if necessary, sends user string to the device and reads them back.
+
+Uploading the Firmware to EEPROM is also supported by the firmware (e.g.
+using the FWLoader utility).
+
+This example may serve a good starting point for own projects.
Index: usb-fpga-2.16/2.16b/mmio/Makefile
===================================================================
--- usb-fpga-2.16/2.16b/mmio/Makefile (nonexistent)
+++ usb-fpga-2.16/2.16b/mmio/Makefile (revision 8)
@@ -0,0 +1,27 @@
+#########################
+# configuration section #
+#########################
+
+# Defines the location of the EZ-USB SDK
+ZTEXPREFIX=../../../..
+
+# The name of the jar archive
+JARTARGET=UCEcho.jar
+# Java Classes that have to be build
+CLASSTARGETS=UCEcho.class
+# Extra dependencies for Java Classes
+CLASSEXTRADEPS=
+
+# ihx files (firmware ROM files) that have to be build
+IHXTARGETS=ucecho.ihx
+# Extra Dependencies for ihx files
+IHXEXTRADEPS=
+
+# Extra files that should be included into th jar archive
+EXTRAJARFILES=ucecho.ihx fpga/ucecho.bit
+
+################################
+# DO NOT CHANAGE THE FOLLOWING #
+################################
+# includes the main Makefile
+include $(ZTEXPREFIX)/Makefile.mk
Index: usb-fpga-2.16/2.16b/intraffic/InTraffic.java
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/InTraffic.java (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/InTraffic.java (revision 8)
@@ -0,0 +1,317 @@
+/*!
+ intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+import java.io.*;
+import java.util.*;
+
+import ch.ntb.usb.*;
+
+import ztex.*;
+
+// *****************************************************************************
+// ******* ParameterException **************************************************
+// *****************************************************************************
+// Exception the prints a help message
+class ParameterException extends Exception {
+ public final static String helpMsg = new String (
+ "Parameters:\n"+
+ " -d Device Number (default: 0)\n" +
+ " -f Force uploads\n" +
+ " -p Print bus info\n" +
+ " -w Enable certain workarounds\n"+
+ " -h This help" );
+
+ public ParameterException (String msg) {
+ super( msg + "\n" + helpMsg );
+ }
+}
+
+// *****************************************************************************
+// ******* USBReader ***********************************************************
+// *****************************************************************************
+class UsbReader extends Thread {
+ private final int bufNum = 8;
+ public final int bufSize = 512*1024;
+ public byte[][] buf = new byte[bufNum][];
+ public int[] bufBytes = new int[bufNum];
+ private int readCount = -1;
+ private int getCount = -1;
+ public boolean terminate = false;
+ private Ztex1v1 ztex;
+
+ public UsbReader ( Ztex1v1 p_ztex ) {
+ super ();
+ ztex = p_ztex;
+ for (int i=0; i= readCount) {
+ try {
+ sleep(1);
+ }
+ catch ( InterruptedException e) {
+ }
+ }
+ return getCount % bufNum;
+ }
+
+ public void reset () {
+ getCount = readCount + 1;
+ }
+
+ public void run() {
+ setPriority(MAX_PRIORITY);
+
+// claim interface 0
+ try {
+ ztex.trySetConfiguration ( 1 );
+ ztex.claimInterface ( 0 );
+ }
+ catch ( Exception e) {
+ System.out.println("Error: "+e.getLocalizedMessage() );
+ System.exit(2);
+ }
+
+
+// reader loop
+ while ( !terminate ) {
+ readCount += 1;
+
+ while ( readCount - bufNum >= getCount ) {
+ try {
+ sleep(1);
+ }
+ catch ( InterruptedException e) {
+ }
+ }
+
+ int i = readCount % bufNum;
+ bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000);
+// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes");
+ }
+
+// release interface 0
+ ztex.releaseInterface( 0 );
+
+ }
+}
+
+
+// *****************************************************************************
+// ******* Test0 ***************************************************************
+// *****************************************************************************
+class InTraffic extends Ztex1v1 {
+
+// ******* InTraffic **************************************************************
+// constructor
+ public InTraffic ( ZtexDevice1 pDev ) throws UsbException {
+ super ( pDev );
+ }
+
+// ******* main ****************************************************************
+ public static void main (String args[]) {
+
+ int devNum = 0;
+ boolean force = false;
+ boolean workarounds = false;
+
+ try {
+// init USB stuff
+ LibusbJava.usb_init();
+
+// scan the USB bus
+ ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
+ if ( bus.numberOfDevices() <= 0) {
+ System.err.println("No devices found");
+ System.exit(0);
+ }
+
+// scan the command line arguments
+ for (int i=0; i=args.length) throw new Exception();
+ devNum = Integer.parseInt( args[i] );
+ }
+ catch (Exception e) {
+ throw new ParameterException("Device number expected after -d");
+ }
+ }
+ else if ( args[i].equals("-f") ) {
+ force = true;
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-w") ) {
+ workarounds = true;
+ }
+ else if ( args[i].equals("-h") ) {
+ System.err.println(ParameterException.helpMsg);
+ System.exit(0);
+ }
+ else throw new ParameterException("Invalid Parameter: "+args[i]);
+ }
+
+
+// create the main class
+ InTraffic ztex = new InTraffic ( bus.device(devNum) );
+ ztex.certainWorkarounds = workarounds;
+
+// upload the firmware if necessary
+ if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 2.16") ) {
+ System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
+ force = true;
+ }
+
+// upload the bitstream if necessary
+ if ( force || ! ztex.getFpgaConfiguration() ) {
+ System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/intraffic.bit" , force ) + " ms");
+ }
+
+// read the traffic
+ UsbReader reader = new UsbReader( ztex );
+ reader.start();
+
+// EZ-USB FIFO test (controlled mode)
+ ztex.vendorCommand (0x60, "Set test mode", 0, 0);
+ reader.reset();
+
+ int vcurrent = -1;
+ for (int i=0; i<1000; i++) {
+ int j = reader.getBuffer();
+ int bb = reader.bufBytes[j];
+ byte[] b = reader.buf[j];
+ int current = vcurrent+1;
+ int lastwi = -1;
+ int aerrors = 0;
+ int ferrors = 0;
+ int errors = 0;
+ int prevErrors = 0;
+
+ for (int k=1; k 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) );
+ if ( prevErrors == 1 )
+ ferrors +=1;
+ prevErrors = 0;
+ }
+
+ lastwi = 1;
+// System.out.println(current);
+ }
+// System.out.println(b[k]+" " +b[k+1]);
+ }
+ System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r");
+ }
+ System.out.println();
+
+// performance test (continous mode)
+ ztex.vendorCommand (0x60, "Set test mode", 1, 0);
+ reader.reset();
+
+ int words = 0;
+ int intSum = 0;
+ int intMax = 0;
+ int intAdj = 0;
+ int lastwi = -1;
+ for (int i=0; i<1000; i++) {
+ int j = reader.getBuffer();
+ int bb = reader.bufBytes[j];
+ byte[] b = reader.buf[j];
+ int current = vcurrent+1;
+
+ for (int k=1; k 0 && words > 0) {
+ intSum += it;
+ if ( it > intMax )
+ intMax = it;
+ }
+ words += 2;
+ vcurrent = current;
+ intAdj = 0;
+ }
+ lastwi = 1;
+// System.out.println(current);
+ }
+// System.out.println(b[k]+" " +b[k+1]);
+ }
+ System.out.print("Buffer " + i + ": " + Math.round(words*6000.0/(words+intSum))/100.0 + "MB/s, max. interrupt: " + Math.round(intMax/150.0)/100 + "ms \r");
+ }
+ System.out.println();
+
+
+ reader.terminate=true;
+
+ }
+ catch (Exception e) {
+ System.out.println("Error: "+e.getLocalizedMessage() );
+ }
+ }
+
+}
Index: usb-fpga-2.16/2.16b/intraffic/intraffic.c
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/intraffic.c (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/intraffic.c (revision 8)
@@ -0,0 +1,98 @@
+/*!
+ intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
+#include[ztex-utils.h] // include basic functions
+
+// configure endpoint 2, in, quad buffered, 512 bytes, interface 0
+EP_CONFIG(2,0,BULK,IN,512,4);
+
+// configure endpoint 6, out, doublebuffered, 512 bytes, interface 0
+EP_CONFIG(6,0,BULK,OUT,512,2);
+
+// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration)
+IDENTITY_UFM_2_16(10.16.0.0,0);
+
+// this product string is also used for identification by the host software
+#define[PRODUCT_STRING]["intraffic example for UFM 2.16"]
+
+// enables high speed FPGA configuration via EP6
+ENABLE_HS_FPGA_CONF(6);
+
+// this is called automatically after FPGA configuration
+#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
+ IOA7 = 1; // reset on
+ IOA3 = 0; // controlled mode
+ OEA |= bmBIT3 | bmBIT7;
+
+ EP2CS &= ~bmBIT0; // clear stall bit
+
+ REVCTL = 0x3;
+ SYNCDELAY;
+
+ IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
+ SYNCDELAY;
+ EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE
+ SYNCDELAY;
+
+#ifdef[fastmode]
+ EP2AUTOINLENH = 4; // 1024 bytes
+#else
+ EP2AUTOINLENH = 2; // 512 bytes
+#endif
+ SYNCDELAY;
+ EP2AUTOINLENL = 0;
+ SYNCDELAY;
+
+ FIFORESET = 0x80; // reset FIFO
+ SYNCDELAY;
+ FIFORESET = 2;
+ SYNCDELAY;
+ FIFORESET = 0x00;
+ SYNCDELAY;
+
+ FIFOPINPOLAR = 0;
+ SYNCDELAY;
+ PINFLAGSAB = 0;
+ SYNCDELAY;
+ PINFLAGSCD = 0;
+ SYNCDELAY;
+
+ IOA7 = 0; // reset off
+]
+
+// set mode
+ADD_EP0_VENDOR_COMMAND((0x60,,
+ IOA7 = 1; // reset on
+ IOA3 = SETUPDAT[2] ? 1 : 0;
+ IOA7 = 0; // reset off
+,,
+ NOP;
+));;
+
+// include the main part of the firmware kit, define the descriptors, ...
+#include[ztex.h]
+
+void main(void)
+{
+ init_USB();
+
+ while (1) {
+ }
+}
+
Index: usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.ucf
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.ucf (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.ucf (revision 8)
@@ -0,0 +1,33 @@
+NET "ifclk_in" TNM_NET = "ifclk_in";
+TIMESPEC "ts_ifclk_in" = PERIOD "ifclk_in" 20 ns HIGH 50 %;
+NET "ifclk_in" LOC = "J19" | IOSTANDARD = LVCMOS33 ;
+
+NET "fd<0>" LOC = "P20" | IOSTANDARD = LVCMOS33 ;
+NET "fd<1>" LOC = "N17" | IOSTANDARD = LVCMOS33 ;
+NET "fd<2>" LOC = "P21" | IOSTANDARD = LVCMOS33 ;
+NET "fd<3>" LOC = "R21" | IOSTANDARD = LVCMOS33 ;
+NET "fd<4>" LOC = "T21" | IOSTANDARD = LVCMOS33 ;
+NET "fd<5>" LOC = "U21" | IOSTANDARD = LVCMOS33 ;
+NET "fd<6>" LOC = "P19" | IOSTANDARD = LVCMOS33 ;
+NET "fd<7>" LOC = "R19" | IOSTANDARD = LVCMOS33 ;
+NET "fd<8>" LOC = "T20" | IOSTANDARD = LVCMOS33 ;
+NET "fd<9>" LOC = "U20" | IOSTANDARD = LVCMOS33 ;
+NET "fd<10>" LOC = "U18" | IOSTANDARD = LVCMOS33 ;
+NET "fd<11>" LOC = "U17" | IOSTANDARD = LVCMOS33 ;
+NET "fd<12>" LOC = "W19" | IOSTANDARD = LVCMOS33 ;
+NET "fd<13>" LOC = "W20" | IOSTANDARD = LVCMOS33 ;
+NET "fd<14>" LOC = "W21" | IOSTANDARD = LVCMOS33 ;
+NET "fd<15>" LOC = "W22" | IOSTANDARD = LVCMOS33 ;
+
+NET "FLAGB" LOC = "K18" | IOSTANDARD = LVCMOS33 ;
+
+NET "SLRD" LOC = "AB22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "SLWR" LOC = "AB21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+
+NET "SLOE" LOC = "M20" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2
+NET "FIFOADR0" LOC = "N19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4
+NET "FIFOADR1" LOC = "N18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5
+NET "PKTEND" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6
+NET "RESET" LOC = "R18" | IOSTANDARD = LVCMOS33 ; # PA7
+
+NET "CONT" LOC = "M18" | IOSTANDARD = LVCMOS33 ; # PA3
Index: usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.vhd
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.vhd (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.vhd (revision 8)
@@ -0,0 +1,151 @@
+library ieee;
+use IEEE.std_logic_1164.all;
+use IEEE.std_logic_arith.all;
+use IEEE.std_logic_unsigned.all;
+Library UNISIM;
+use UNISIM.vcomponents.all;
+
+entity intraffic is
+ port(
+ RESET : in std_logic;
+ CONT : in std_logic;
+ IFCLK_IN : in std_logic;
+
+ FD : out std_logic_vector(15 downto 0);
+
+ SLOE : out std_logic;
+ SLRD : out std_logic;
+ SLWR : out std_logic;
+ FIFOADR0 : out std_logic;
+ FIFOADR1 : out std_logic;
+ PKTEND : out std_logic;
+
+ FLAGB : in std_logic
+ );
+end intraffic;
+
+architecture RTL of intraffic is
+
+----------------------------
+-- test pattern generator --
+----------------------------
+-- 30 bit counter
+signal GEN_CNT : std_logic_vector(29 downto 0);
+signal INT_CNT : std_logic_vector(6 downto 0);
+
+signal FIFO_WORD : std_logic;
+
+signal ifclk,ifclk_fbin,ifclk_fbout,ifclk_out : std_logic;
+
+begin
+ SLOE <= '1';
+ SLRD <= '1';
+ FIFOADR0 <= '0';
+ FIFOADR1 <= '0';
+ PKTEND <= '1'; -- no data alignment
+
+-- ifclk filter + deskew
+ ifclk_fb_buf : BUFG
+ port map (
+ I => ifclk_fbout,
+ O => ifclk_fbin
+ );
+
+ ifclk_out_buf : BUFG
+ port map (
+ I => ifclk_out,
+ O => ifclk
+ );
+
+ ifclk_mmcm : MMCME2_BASE
+ generic map (
+ BANDWIDTH => "OPTIMIZED", -- OPTIMIZED, HIGH, LOW
+ CLKFBOUT_MULT_F => 20.0, -- Multiply value for all CLKOUT, (2-64)
+ CLKFBOUT_PHASE => 0.0, -- Phase offset in degrees of CLKFB, (-360.000-360.000).
+ CLKIN1_PERIOD => 0.0, -- Input clock period in ns to ps resolution (i.e. 33.333 is 30 MHz).
+ -- CLKOUT0_DIVIDE - CLKOUT5_DIVIDE: Divide amount for each CLKOUT (1-128)
+ CLKOUT0_DIVIDE_F => 20.0,
+ CLKOUT1_DIVIDE => 1,
+ CLKOUT2_DIVIDE => 1,
+ CLKOUT3_DIVIDE => 1,
+ CLKOUT4_DIVIDE => 1,
+ CLKOUT5_DIVIDE => 1,
+ -- CLKOUT0_DUTY_CYCLE - CLKOUT5_DUTY_CYCLE: Duty cycle for each CLKOUT (0.001-0.999).
+ CLKOUT0_DUTY_CYCLE => 0.5,
+ CLKOUT1_DUTY_CYCLE => 0.5,
+ CLKOUT2_DUTY_CYCLE => 0.5,
+ CLKOUT3_DUTY_CYCLE => 0.5,
+ CLKOUT4_DUTY_CYCLE => 0.5,
+ CLKOUT5_DUTY_CYCLE => 0.5,
+ -- CLKOUT0_PHASE - CLKOUT5_PHASE: Phase offset for each CLKOUT (-360.000-360.000).
+ CLKOUT0_PHASE => 0.0,
+ CLKOUT1_PHASE => 0.0,
+ CLKOUT2_PHASE => 0.0,
+ CLKOUT3_PHASE => 0.0,
+ CLKOUT4_PHASE => 0.0,
+ CLKOUT5_PHASE => 0.0,
+ CLKOUT4_CASCADE => FALSE, -- Cascade CLKOUT4 counter with CLKOUT6 (FALSE, TRUE)
+ DIVCLK_DIVIDE => 1, -- Master division value, (1-56)
+ REF_JITTER1 => 0.0, -- Reference input jitter in UI, (0.000-0.999).
+ STARTUP_WAIT => FALSE -- Delay DONE until MMCM Locks, (TRUE / FALSE)
+ )
+ port map (
+ -- Clock Outputs: 1-bit (each) output: User configurable clock outputs
+ CLKOUT0 => ifclk_out, -- 1-bit output: CLKOUT0
+ -- Feedback Clocks: 1-bit (each) output: Clock feedback ports
+ CLKFBOUT => ifclk_fbout, -- 1-bit output: Feedback clock
+ CLKIN1 => ifclk_in, -- 1-bit input: Input clock
+ -- Control Ports: 1-bit (each) input: PLL control ports
+ PWRDWN => '0', -- 1-bit input: Power-down
+ RST => RESET, -- 1-bit input: Reset
+ -- Feedback Clocks: 1-bit (each) input: Clock feedback ports
+ CLKFBIN => ifclk_fbin -- 1-bit input: Feedback clock
+ );
+
+ dpIFCLK: process (IFCLK, RESET)
+ begin
+-- reset
+ if RESET = '1'
+ then
+ GEN_CNT <= ( others => '0' );
+ INT_CNT <= ( others => '0' );
+ FIFO_WORD <= '0';
+ SLWR <= '1';
+-- IFCLK
+ elsif IFCLK'event and IFCLK = '1'
+ then
+
+ if CONT = '1' or FLAGB = '1'
+ then
+ if FIFO_WORD = '0'
+ then
+ FD(14 downto 0) <= GEN_CNT(14 downto 0);
+ else
+ FD(14 downto 0) <= GEN_CNT(29 downto 15);
+ end if;
+ FD(15) <= FIFO_WORD;
+
+ if FIFO_WORD = '1'
+ then
+ GEN_CNT <= GEN_CNT + '1';
+ if INT_CNT = conv_std_logic_vector(99,7)
+ then
+ INT_CNT <= ( others => '0' );
+ else
+ INT_CNT <= INT_CNT + '1';
+ end if;
+ end if;
+ FIFO_WORD <= not FIFO_WORD;
+ end if;
+
+ if ( INT_CNT >= conv_std_logic_vector(90,7) ) and ( CONT = '0' )
+ then
+ SLWR <= '1';
+ else
+ SLWR <= '0';
+ end if;
+
+ end if;
+ end process dpIFCLK;
+
+end RTL;
Index: usb-fpga-2.16/2.16b/intraffic/fpga/clean.sh
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/fpga/clean.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/fpga/clean.sh (revision 8)
@@ -0,0 +1,79 @@
+#!/bin/bash
+
+# This files / directories from this directory will not be removed
+# Filenames with spaces or other spuid characters will be ignored
+sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise"
+subdirs="ipcore_dir"
+
+# This sould not be edited.
+list_files() {
+ if [ "$2" != "" ]; then
+ echo "$1"
+ for i in $2; do
+ echo " $i"
+ done
+ fi
+}
+
+rmfiles=""
+rmdirs=""
+keepfiles=""
+keepdirs=""
+allfiles=`ls -A`
+for f in $allfiles; do
+ keep=false
+ for i in $sourcefiles; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ for i in $subdirs; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ if [ -d "$f" ]; then
+ if $keep; then
+ keepdirs+=" $f"
+ else
+ rmdirs+=" $f"
+ fi
+ fi
+ if [ -f "$f" ]; then
+ if $keep; then
+ keepfiles+=" $f"
+ else
+ rmfiles+=" $f"
+ fi
+ fi
+done
+
+echo
+echo "Directory $PWD:"
+list_files "This directories will NOT be removed:" "$keepdirs"
+list_files "This files will NOT be removed:" "$keepfiles"
+list_files "This directories will be removed:" "$rmdirs"
+list_files "This files will be removed:" "$rmfiles"
+
+if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then
+ c="yes"
+else
+ echo -n 'Confirm this by entering "yes": '
+ read c
+fi
+
+if [ "$c" == "yes" ]; then
+ [ "$rmfiles" != "" ] && rm $rmfiles
+ [ "$rmdirs" != "" ] && rm -r $rmdirs
+
+ for d in $subdirs; do
+ if [ -x "$d/clean.sh" ]; then
+ cd $d
+ ./clean.sh || exit 1
+ cd ..
+ fi
+ done
+
+ exit 0
+fi
+exit 1
usb-fpga-2.16/2.16b/intraffic/fpga/clean.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.xise
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.xise (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/fpga/intraffic.xise (revision 8)
@@ -0,0 +1,484 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: usb-fpga-2.16/2.16b/intraffic/Readme
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/Readme (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/Readme (revision 8)
@@ -0,0 +1,18 @@
+intraffic
+---------
+
+This example shows how the EZ-USB input FIFO interface is used.
+
+A traffic generator sends test data to the EZ-USB. The hosts PC reads
+out this data and verifies it.
+
+The traffic generator is implemented in the FPGA and supports two modes:
+
+1. (IOA3=0) This mode supports data flow control using FIFO full flag
+ (FLAGB) and SLWR control pin. Use this mode as starting point for
+ data acquisition applications.
+
+2. (IOA=3) In this mode and uninterrupted test pattern is generated,
+ i.e. flow control is disabled. This mode is used for performance
+ measurements (speed rate and interrupt measurements)
+
Index: usb-fpga-2.16/2.16b/intraffic/Makefile
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/Makefile (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/Makefile (revision 8)
@@ -0,0 +1,27 @@
+#########################
+# configuration section #
+#########################
+
+# Defines the location of the EZ-USB SDK
+ZTEXPREFIX=../../../..
+
+# The name of the jar archive
+JARTARGET=InTraffic.jar
+# Java Classes that have to be build
+CLASSTARGETS=InTraffic.class
+# Extra dependencies for Java Classes
+CLASSEXTRADEPS=
+
+# ihx files (firmware ROM files) that have to be build
+IHXTARGETS=intraffic.ihx
+# Extra Dependencies for ihx files
+IHXEXTRADEPS=
+
+# Extra files that should be included into th jar archive
+EXTRAJARFILES=intraffic.ihx fpga/intraffic.bit
+
+################################
+# DO NOT CHANAGE THE FOLLOWING #
+################################
+# includes the main Makefile
+include $(ZTEXPREFIX)/Makefile.mk
Index: usb-fpga-2.16/2.16b/intraffic/intraffic.sh
===================================================================
--- usb-fpga-2.16/2.16b/intraffic/intraffic.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/intraffic/intraffic.sh (revision 8)
@@ -0,0 +1,4 @@
+#make -C ../../../java distclean all || exit
+make distclean all || exit
+#make || exit
+java -cp InTraffic.jar InTraffic $@
usb-fpga-2.16/2.16b/intraffic/intraffic.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/ucecho.sh
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho.sh (revision 8)
@@ -0,0 +1,4 @@
+#make -C ../../../java distclean all || exit
+#make distclean all || exit
+#make || exit
+java -cp UCEcho.jar UCEcho $@
usb-fpga-2.16/2.16b/ucecho/ucecho.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.xdc
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.xdc (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.xdc (revision 8)
@@ -0,0 +1,31 @@
+create_clock -name fxclk_in -period 20 [get_ports fxclk_in]
+set_property LOC Y19 [get_ports fxclk_in]
+set_property IOSTANDARD LVCMOS33 [get_ports fxclk_in]
+
+
+# output
+set_property LOC P20 [get_ports pb[0]] ;# PB0
+set_property LOC N17 [get_ports pb[1]] ;# PB1
+set_property LOC P21 [get_ports pb[2]] ;# PB2
+set_property LOC R21 [get_ports pb[3]] ;# PB3
+set_property LOC T21 [get_ports pb[4]] ;# PB4
+set_property LOC U21 [get_ports pb[5]] ;# PB5
+set_property LOC P19 [get_ports pb[6]] ;# PB6
+set_property LOC R19 [get_ports pb[7]] ;# PB7
+
+set_property IOSTANDARD LVCMOS33 [get_ports pb[*]]
+set_property DRIVE 12 [get_ports pb[*]]
+
+
+
+# input
+set_property LOC T20 [get_ports pd[0]] ;# PD0
+set_property LOC U20 [get_ports pd[1]] ;# PD1
+set_property LOC U18 [get_ports pd[2]] ;# PD2
+set_property LOC U17 [get_ports pd[3]] ;# PD3
+set_property LOC W19 [get_ports pd[4]] ;# PD4
+set_property LOC W20 [get_ports pd[5]] ;# PD5
+set_property LOC W21 [get_ports pd[6]] ;# PD6
+set_property LOC W22 [get_ports pd[7]] ;# PD7
+
+set_property IOSTANDARD LVCMOS33 [get_ports pd[*]]
Index: usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.vhd
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.vhd (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga-vivado/ucecho.vhd (revision 8)
@@ -0,0 +1,42 @@
+library ieee;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+Library UNISIM;
+use UNISIM.vcomponents.all;
+
+entity ucecho is
+ port(
+ pd : in unsigned(7 downto 0);
+ pb : out unsigned(7 downto 0);
+ fxclk_in : in std_logic
+ );
+end ucecho;
+
+
+architecture RTL of ucecho is
+
+--signal declaration
+signal pb_buf : unsigned(7 downto 0);
+signal clk : std_logic;
+
+begin
+ clk_buf : IBUFG
+ port map (
+ I => fxclk_in,
+ O => clk
+ );
+
+ dpUCECHO: process(CLK)
+ begin
+ if CLK' event and CLK = '1' then
+ if ( pd >= 97 ) and ( pd <= 122)
+ then
+ pb_buf <= pd - 32;
+ else
+ pb_buf <= pd;
+ end if;
+ pb <= pb_buf;
+ end if;
+ end process dpUCECHO;
+
+end RTL;
Index: usb-fpga-2.16/2.16b/ucecho/ucecho-prog.sh
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho-prog.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho-prog.sh (revision 8)
@@ -0,0 +1 @@
+../../../../java/FWLoader/FWLoader -c -uu ucecho.ihx -ue ucecho.ihx -um fpga/ucecho.bit
usb-fpga-2.16/2.16b/ucecho/ucecho-prog.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/UCEcho.java
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/UCEcho.java (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/UCEcho.java (revision 8)
@@ -0,0 +1,168 @@
+/*!
+ ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.2
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+import java.io.*;
+import java.util.*;
+
+import ch.ntb.usb.*;
+
+import ztex.*;
+
+// *****************************************************************************
+// ******* ParameterException **************************************************
+// *****************************************************************************
+// Exception the prints a help message
+class ParameterException extends Exception {
+ public final static String helpMsg = new String (
+ "Parameters:\n"+
+ " -d Device Number (default: 0)\n" +
+ " -f Force uploads\n" +
+ " -p Print bus info\n" +
+ " -w Enable certain workarounds\n"+
+ " -h This help" );
+
+ public ParameterException (String msg) {
+ super( msg + "\n" + helpMsg );
+ }
+}
+
+// *****************************************************************************
+// ******* Test0 ***************************************************************
+// *****************************************************************************
+class UCEcho extends Ztex1v1 {
+
+// ******* UCEcho **************************************************************
+// constructor
+ public UCEcho ( ZtexDevice1 pDev ) throws UsbException {
+ super ( pDev );
+ }
+
+// ******* echo ****************************************************************
+// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out
+ public void echo ( String input ) throws UsbException {
+ byte buf[] = input.getBytes();
+ int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000);
+ if ( i<0 )
+ throw new UsbException("Error sending data: " + LibusbJava.usb_strerror());
+ System.out.println("Send "+i+" bytes: `"+input+"'" );
+
+ try {
+ Thread.sleep( 10 );
+ }
+ catch ( InterruptedException e ) {
+ }
+
+ buf = new byte[1024];
+ i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000);
+ if ( i<0 )
+ throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror());
+ System.out.println("Read "+i+" bytes: `"+new String(buf,0,i)+"'" );
+ }
+
+// ******* main ****************************************************************
+ public static void main (String args[]) {
+
+ int devNum = 0;
+ boolean force = false;
+ boolean workarounds = false;
+
+ try {
+// init USB stuff
+ LibusbJava.usb_init();
+
+// scan the USB bus
+ ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
+ if ( bus.numberOfDevices() <= 0) {
+ System.err.println("No devices found");
+ System.exit(0);
+ }
+
+// scan the command line arguments
+ for (int i=0; i=args.length) throw new Exception();
+ devNum = Integer.parseInt( args[i] );
+ }
+ catch (Exception e) {
+ throw new ParameterException("Device number expected after -d");
+ }
+ }
+ else if ( args[i].equals("-f") ) {
+ force = true;
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-w") ) {
+ workarounds = true;
+ }
+ else if ( args[i].equals("-h") ) {
+ System.err.println(ParameterException.helpMsg);
+ System.exit(0);
+ }
+ else throw new ParameterException("Invalid Parameter: "+args[i]);
+ }
+
+
+// create the main class
+ UCEcho ztex = new UCEcho ( bus.device(devNum) );
+ ztex.certainWorkarounds = workarounds;
+
+// upload the firmware if necessary
+ if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 2.16") ) {
+ System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
+ }
+
+// upload the bitstream if necessary
+ if ( force || ! ztex.getFpgaConfiguration() ) {
+ System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bit" , force ) + " ms");
+ }
+
+
+// claim interface 0
+ ztex.trySetConfiguration ( 1 );
+ ztex.claimInterface ( 0 );
+
+// read string from stdin and write it to USB device
+ String str = "";
+ BufferedReader reader = new BufferedReader( new InputStreamReader( System.in ) );
+ while ( ! str.equals("quit") ) {
+ System.out.print("Enter a string or `quit' to exit the program: ");
+ str = reader.readLine();
+ if ( ! str.equals("") )
+ ztex.echo(str);
+ System.out.println("");
+ }
+
+// release interface 0
+ ztex.releaseInterface( 0 );
+
+ }
+ catch (Exception e) {
+ System.out.println("Error: "+e.getLocalizedMessage() );
+ }
+ }
+
+}
Index: usb-fpga-2.16/2.16b/ucecho/ucecho-unprog.sh
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho-unprog.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho-unprog.sh (revision 8)
@@ -0,0 +1 @@
+../../../../java/FWLoader/FWLoader -c -uu ucecho.ihx -re -rm
usb-fpga-2.16/2.16b/ucecho/ucecho-unprog.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/ucecho.c
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho.c (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho.c (revision 8)
@@ -0,0 +1,100 @@
+/*!
+ ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 2.16
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
+#include[ztex-utils.h] // include basic functions
+
+// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host)
+EP_CONFIG(2,0,BULK,IN,512,2);
+EP_CONFIG(4,0,BULK,OUT,512,2);
+
+// select ZTEX USB FPGA Module 1.16 as target (required for FPGA configuration)
+IDENTITY_UFM_2_16(10.16.0.0,0);
+
+// this product string is also used for identification by the host software
+#define[PRODUCT_STRING]["ucecho example for UFM 2.16"]
+
+// enables high speed FPGA configuration via EP4
+ENABLE_HS_FPGA_CONF(4);
+
+ENABLE_FLASH;
+ENABLE_FLASH_BITSTREAM;
+
+__xdata BYTE run;
+
+#define[PRE_FPGA_RESET][PRE_FPGA_RESET
+ run = 0;
+]
+// this is called automatically after FPGA configuration
+#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
+ IFCONFIG = bmBIT7; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
+ SYNCDELAY;
+ EP2FIFOCFG = 0;
+ SYNCDELAY;
+ EP4FIFOCFG = 0;
+ SYNCDELAY;
+
+ REVCTL = 0x0; // reset
+ SYNCDELAY;
+ EP2CS &= ~bmBIT0; // stall = 0
+ SYNCDELAY;
+ EP4CS &= ~bmBIT0; // stall = 0
+
+ SYNCDELAY; // first two packages are waste
+ EP4BCL = 0x80; // skip package, (re)arm EP4
+ SYNCDELAY;
+ EP4BCL = 0x80; // skip package, (re)arm EP4
+
+ FIFORESET = 0x80; // reset FIFO
+ SYNCDELAY;
+ FIFORESET = 0x82;
+ SYNCDELAY;
+ FIFORESET = 0x00;
+ SYNCDELAY;
+
+ OED = 255;
+ run = 1;
+]
+
+// include the main part of the firmware kit, define the descriptors, ...
+#include[ztex.h]
+
+void main(void)
+{
+ WORD i,size;
+
+// init everything
+ init_USB();
+
+ while (1) {
+ if ( run && !(EP4CS & bmBIT2) ) { // EP4 is not empty
+ size = (EP4BCH << 8) | EP4BCL;
+ if ( size>0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full
+ for ( i=0; i> 8;
+ SYNCDELAY;
+ EP2BCL = size & 255; // arm EP2
+ }
+ SYNCDELAY;
+ EP4BCL = 0x80; // skip package, (re)arm EP4
+ }
+ }
+}
Index: usb-fpga-2.16/2.16b/ucecho/ucecho-encrypted.sh
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho-encrypted.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho-encrypted.sh (revision 8)
@@ -0,0 +1 @@
+../../../../java/FWLoader/FWLoader -c -uu ucecho.ihx -rf -uf fpga/ucecho-encrypted.bit
usb-fpga-2.16/2.16b/ucecho/ucecho-encrypted.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/ucecho.bat
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/ucecho.bat (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/ucecho.bat (revision 8)
@@ -0,0 +1,2 @@
+java -cp UCEcho.jar UCEcho
+pause
Index: usb-fpga-2.16/2.16b/ucecho/fpga/ucecho-encrypted.nky
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/ucecho-encrypted.nky (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/ucecho-encrypted.nky (revision 8)
@@ -0,0 +1,4 @@
+Device xc7a200tfbg484;
+Key 0 07c6ccdd81d02bee8ee1b3ccf3bbf60a32beb062ff14e0ecfe85a711a3bfd46f;
+Key StartCBC 2ad15279f8c0f74d10691a27d272be40;
+Key HMAC d9158bb00e5b47e8cf51338fff96d5dbaa8ad86a38c49e2edc23a0239768aefd;
Index: usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.ucf
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.ucf (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.ucf (revision 8)
@@ -0,0 +1,21 @@
+NET "fxclk_in" TNM_NET = "fxclk_in";
+TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 20 ns HIGH 50 %;
+NET "fxclk_in" LOC = "Y18" | IOSTANDARD = LVCMOS33 ;
+
+NET "pb<0>" LOC = "P20" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<1>" LOC = "N17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<2>" LOC = "P21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<3>" LOC = "R21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<4>" LOC = "T21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<5>" LOC = "U21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<6>" LOC = "P19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+NET "pb<7>" LOC = "R19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
+
+NET "pd<0>" LOC = "T20" | IOSTANDARD = LVCMOS33 ;
+NET "pd<1>" LOC = "U20" | IOSTANDARD = LVCMOS33 ;
+NET "pd<2>" LOC = "U18" | IOSTANDARD = LVCMOS33 ;
+NET "pd<3>" LOC = "U17" | IOSTANDARD = LVCMOS33 ;
+NET "pd<4>" LOC = "W19" | IOSTANDARD = LVCMOS33 ;
+NET "pd<5>" LOC = "W20" | IOSTANDARD = LVCMOS33 ;
+NET "pd<6>" LOC = "W21" | IOSTANDARD = LVCMOS33 ;
+NET "pd<7>" LOC = "W22" | IOSTANDARD = LVCMOS33 ;
Index: usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.nky
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.nky (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.nky (revision 8)
@@ -0,0 +1,4 @@
+Device xc7a200tfbg484;
+Key 0 5da3714bcdb2a27ae780a23680aec1976dbf9df9156a104e8157c79e46832da0;
+Key StartCBC 94dcc457ee99bd8be88890f7ba15c02a;
+Key HMAC 22b7eff4ae263fe2e3a1c605d2ce86df229908af8d1555785a6cb17fb47cac1a;
Index: usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.vhd
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.vhd (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.vhd (revision 8)
@@ -0,0 +1,78 @@
+library ieee;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+Library UNISIM;
+use UNISIM.vcomponents.all;
+
+entity ucecho is
+ port(
+ pd : in unsigned(7 downto 0);
+ pb : out unsigned(7 downto 0);
+ fxclk_in : in std_logic
+ );
+end ucecho;
+
+
+architecture RTL of ucecho is
+
+--signal declaration
+signal pb_buf : unsigned(7 downto 0);
+signal clk : std_logic;
+signal fxclk_fb : std_logic;
+
+begin
+ -- PLL used as clock filter
+ fxclk_pll : PLLE2_BASE
+ generic map (
+ BANDWIDTH => "OPTIMIZED", -- OPTIMIZED, HIGH, LOW
+ CLKFBOUT_MULT => 20, -- Multiply value for all CLKOUT, (2-64)
+ CLKFBOUT_PHASE => 0.0, -- Phase offset in degrees of CLKFB, (-360.000-360.000).
+ CLKIN1_PERIOD => 0.0, -- Input clock period in ns to ps resolution (i.e. 33.333 is 30 MHz).
+ -- CLKOUT0_DIVIDE - CLKOUT5_DIVIDE: Divide amount for each CLKOUT (1-128)
+ CLKOUT0_DIVIDE => 10,
+ CLKOUT1_DIVIDE => 1,
+ CLKOUT2_DIVIDE => 1,
+ CLKOUT3_DIVIDE => 1,
+ CLKOUT4_DIVIDE => 1,
+ CLKOUT5_DIVIDE => 1,
+ -- CLKOUT0_DUTY_CYCLE - CLKOUT5_DUTY_CYCLE: Duty cycle for each CLKOUT (0.001-0.999).
+ CLKOUT0_DUTY_CYCLE => 0.5,
+ CLKOUT1_DUTY_CYCLE => 0.5,
+ CLKOUT2_DUTY_CYCLE => 0.5,
+ CLKOUT3_DUTY_CYCLE => 0.5,
+ CLKOUT4_DUTY_CYCLE => 0.5,
+ CLKOUT5_DUTY_CYCLE => 0.5,
+ -- CLKOUT0_PHASE - CLKOUT5_PHASE: Phase offset for each CLKOUT (-360.000-360.000).
+ CLKOUT0_PHASE => 0.0,
+ CLKOUT1_PHASE => 0.0,
+ CLKOUT2_PHASE => 0.0,
+ CLKOUT3_PHASE => 0.0,
+ CLKOUT4_PHASE => 0.0,
+ CLKOUT5_PHASE => 0.0,
+ DIVCLK_DIVIDE => 1, -- Master division value, (1-56)
+ REF_JITTER1 => 0.0, -- Reference input jitter in UI, (0.000-0.999).
+ STARTUP_WAIT => "FALSE" -- Delay DONE until PLL Locks, ("TRUE"/"FALSE")
+ )
+ port map (
+ CLKOUT0 => clk,
+ CLKFBOUT => fxclk_fb, -- 1-bit output: Feedback clock
+ CLKIN1 => fxclk_in, -- 1-bit input: Input clock
+ PWRDWN => '0', -- 1-bit input: Power-down
+ RST => '0', -- 1-bit input: Reset
+ CLKFBIN => fxclk_fb -- 1-bit input: Feedback clock
+ );
+
+ dpUCECHO: process(CLK)
+ begin
+ if CLK' event and CLK = '1' then
+ if ( pd >= 97 ) and ( pd <= 122)
+ then
+ pb_buf <= pd - 32;
+ else
+ pb_buf <= pd;
+ end if;
+ pb <= pb_buf;
+ end if;
+ end process dpUCECHO;
+
+end RTL;
Index: usb-fpga-2.16/2.16b/ucecho/fpga/clean.sh
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/clean.sh (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/clean.sh (revision 8)
@@ -0,0 +1,80 @@
+#!/bin/bash
+
+# This files / directories from this directory will not be removed
+# Filenames with spaces or other spuid characters will be ignored
+sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise *.nky"
+subdirs="ipcore_dir"
+
+
+# This sould not be edited.
+list_files() {
+ if [ "$2" != "" ]; then
+ echo "$1"
+ for i in $2; do
+ echo " $i"
+ done
+ fi
+}
+
+rmfiles=""
+rmdirs=""
+keepfiles=""
+keepdirs=""
+allfiles=`ls -A`
+for f in $allfiles; do
+ keep=false
+ for i in $sourcefiles; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ for i in $subdirs; do
+ if [ "$i" == "$f" ]; then
+ keep=true
+ fi
+ done
+ if [ -d "$f" ]; then
+ if $keep; then
+ keepdirs+=" $f"
+ else
+ rmdirs+=" $f"
+ fi
+ fi
+ if [ -f "$f" ]; then
+ if $keep; then
+ keepfiles+=" $f"
+ else
+ rmfiles+=" $f"
+ fi
+ fi
+done
+
+echo
+echo "Directory $PWD:"
+list_files "This directories will NOT be removed:" "$keepdirs"
+list_files "This files will NOT be removed:" "$keepfiles"
+list_files "This directories will be removed:" "$rmdirs"
+list_files "This files will be removed:" "$rmfiles"
+
+if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then
+ c="yes"
+else
+ echo -n 'Confirm this by entering "yes": '
+ read c
+fi
+
+if [ "$c" == "yes" ]; then
+ [ "$rmfiles" != "" ] && rm $rmfiles
+ [ "$rmdirs" != "" ] && rm -r $rmdirs
+
+ for d in $subdirs; do
+ if [ -x "$d/clean.sh" ]; then
+ cd $d
+ ./clean.sh || exit 1
+ cd ..
+ fi
+ done
+
+ exit 0
+fi
+exit 1
usb-fpga-2.16/2.16b/ucecho/fpga/clean.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.xise
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.xise (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/fpga/ucecho.xise (revision 8)
@@ -0,0 +1,72 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: usb-fpga-2.16/2.16b/ucecho/Readme
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/Readme (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/Readme (revision 8)
@@ -0,0 +1,21 @@
+ucecho
+------
+
+This example is intended for ZTEX USB-FPGA-Modules.
+
+The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4
+(both 512 bytes, double buffered, bulk transfer, belong to interface 0).
+All data that is written to Endpoint 4 is converted to uppercase by
+the FPGA and can be read back from Endpoint 2.
+
+This example does the same as the example in directory ../../all/ucecho
+except that the uppercase - lowercase conversion is made by the FPGA.
+
+The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx)
+to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the
+FPGA if necessary, sends user string to the device and reads them back.
+
+Uploading the Firmware to EEPROM is also supported by the firmware (e.g.
+using the FWLoader utility).
+
+This example may serve a good starting point for own projects.
Index: usb-fpga-2.16/2.16b/ucecho/Makefile
===================================================================
--- usb-fpga-2.16/2.16b/ucecho/Makefile (nonexistent)
+++ usb-fpga-2.16/2.16b/ucecho/Makefile (revision 8)
@@ -0,0 +1,27 @@
+#########################
+# configuration section #
+#########################
+
+# Defines the location of the EZ-USB SDK
+ZTEXPREFIX=../../../..
+
+# The name of the jar archive
+JARTARGET=UCEcho.jar
+# Java Classes that have to be build
+CLASSTARGETS=UCEcho.class
+# Extra dependencies for Java Classes
+CLASSEXTRADEPS=
+
+# ihx files (firmware ROM files) that have to be build
+IHXTARGETS=ucecho.ihx
+# Extra Dependencies for ihx files
+IHXEXTRADEPS=
+
+# Extra files that should be included into th jar archive
+EXTRAJARFILES=ucecho.ihx fpga/ucecho.bit
+
+################################
+# DO NOT CHANAGE THE FOLLOWING #
+################################
+# includes the main Makefile
+include $(ZTEXPREFIX)/Makefile.mk
Index: usb-fpga-2.16/2.16b/Makefile
===================================================================
--- usb-fpga-2.16/2.16b/Makefile (nonexistent)
+++ usb-fpga-2.16/2.16b/Makefile (revision 8)
@@ -0,0 +1,26 @@
+DIRS=ucecho intraffic mmio
+
+.PHONY: default all clean distclean avr avrclean avrdistclean
+
+default:
+ @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
+ @echo "Usage: make all | clean | distclean"
+
+all:
+ set -e; for i in $(DIRS); do make -C $$i all; done
+
+clean:
+ set -e; for i in $(DIRS); do make -C $$i clean; done
+
+distclean:
+ set -e; for i in $(DIRS); do make -C $$i distclean; done
+
+avr:
+ set -e; for i in $(DIRS); do make -C $$i avr; done
+
+avrclean:
+ set -e; for i in $(DIRS); do make -C $$i avrclean; done
+
+avrdistclean:
+ set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
+
Index: usb-fpga-2.16/flashbench/flashbench.bat
===================================================================
--- usb-fpga-2.16/flashbench/flashbench.bat (nonexistent)
+++ usb-fpga-2.16/flashbench/flashbench.bat (revision 8)
@@ -0,0 +1,2 @@
+java -cp FlashBench.jar FlashBench
+pause
Index: usb-fpga-2.16/flashbench/flashbench.sh
===================================================================
--- usb-fpga-2.16/flashbench/flashbench.sh (nonexistent)
+++ usb-fpga-2.16/flashbench/flashbench.sh (revision 8)
@@ -0,0 +1,3 @@
+#make -C ../../ztex/java distclean all || exit
+#make distclean all || exit
+java -cp FlashBench.jar FlashBench $@
usb-fpga-2.16/flashbench/flashbench.sh
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: usb-fpga-2.16/flashbench/Readme
===================================================================
--- usb-fpga-2.16/flashbench/Readme (nonexistent)
+++ usb-fpga-2.16/flashbench/Readme (revision 8)
@@ -0,0 +1,18 @@
+flashbench
+----------
+
+A write / read benchmark for Flash memory on ZTEX modules.
+
+ATTENTION: The tests will destroy the data stored in Flash memory.
+
+The number of sectors to be tested can be specified using the
+-s parameter of the host software.
+
+Three tests are performed:
+1. Read/write test: Pseudo-random test data is written and immediately
+ read and compared (i.e. write sector 0, read sector 0, write sector
+ 1, read sector 1, ...)
+2. Write test: Pseudo-random test data is written (i.e. write sector 0,
+ write sector 1, ...)
+3. Write test: Pseudo-random test data is read and compared (i.e. read
+ sector 0, read sector 1, ...)
Index: usb-fpga-2.16/flashbench/FlashBench.java
===================================================================
--- usb-fpga-2.16/flashbench/FlashBench.java (nonexistent)
+++ usb-fpga-2.16/flashbench/FlashBench.java (revision 8)
@@ -0,0 +1,250 @@
+/*!
+ flashbench -- Flash memory benchmark for ZTEX USB-FPGA Module 1.15
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+import java.io.*;
+import java.util.*;
+
+import ch.ntb.usb.*;
+
+import ztex.*;
+
+// *****************************************************************************
+// ******* ParameterException **************************************************
+// *****************************************************************************
+// Exception the prints a help message
+class ParameterException extends Exception {
+ public final static String helpMsg = new String (
+ "Parameters:\n"+
+ " -d Device Number (default: 0)\n" +
+ " -s Number of sectors to be tested, -1 means all (default: 20)\n" +
+ " -f Force uploads\n" +
+ " -p Print bus info\n" +
+ " -w Enable certain workarounds which may be required for vmware + windows\n"+
+ " -h This help" );
+
+ public ParameterException (String msg) {
+ super( msg + "\n" + helpMsg );
+ }
+}
+
+// *****************************************************************************
+// ******* Test0 ***************************************************************
+// *****************************************************************************
+class FlashBench extends Ztex1v1 {
+
+// ******* FlashBench **********************************************************
+// constructor
+ public FlashBench ( ZtexDevice1 pDev ) throws UsbException {
+ super ( pDev );
+ }
+
+// ******* testRW **************************************************************
+// measures read + write performance
+ public double testRW ( int num ) throws UsbException, InvalidFirmwareException, CapabilityException {
+ int secNum = Math.max(1, 2048 / flashSectorSize());
+ byte[] buf1 = new byte[flashSectorSize() * secNum];
+ byte[] buf2 = new byte[flashSectorSize() * secNum];
+ int errors = 0;
+
+ long t0 = new Date().getTime();
+
+ for ( int i=0; i=args.length) throw new Exception();
+ devNum = Integer.parseInt( args[i] );
+ }
+ catch (Exception e) {
+ throw new ParameterException("Device number expected after -d");
+ }
+ }
+ if ( args[i].equals("-s") ) {
+ i++;
+ try {
+ if (i>=args.length) throw new Exception();
+ sectors = Integer.parseInt( args[i] );
+ }
+ catch (Exception e) {
+ throw new ParameterException("Number of sectors expected after -s");
+ }
+ }
+ else if ( args[i].equals("-f") ) {
+ force = true;
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-p") ) {
+ bus.printBus(System.out);
+ System.exit(0);
+ }
+ else if ( args[i].equals("-w") ) {
+ workarounds = true;
+ }
+ else if ( args[i].equals("-h") ) {
+ System.err.println(ParameterException.helpMsg);
+ System.exit(0);
+ }
+ else throw new ParameterException("Invalid Parameter: "+args[i]);
+ }
+
+
+// create the main class
+ FlashBench ztex = new FlashBench ( bus.device(devNum) );
+ ztex.certainWorkarounds = workarounds;
+
+// upload the firmware if necessary
+ if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("flashbench for UFM 2.16") ) {
+ System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashbench.ihx", force ) + " ms");
+ }
+
+// print some information
+ System.out.println("Capabilities: " + ztex.capabilityInfo(", "));
+ System.out.println("Enabled: " + ztex.flashEnabled());
+ System.out.println("SectorSize: " + ztex.flashSectorSize()+" Bytes");
+ System.out.println("Size: " + ztex.flashSize()+" Bytes");
+ ztex.printSpiState();
+
+
+/* byte[] buf1 = new byte[ztex.flashSectorSize()];
+ byte[] buf2 = new byte[ztex.flashSectorSize()];
+ for (int i=0; iztex.flashSectors() ) sectors = ztex.flashSectors();
+
+ System.out.println("Read + Write Performance: " + ztex.testRW(sectors) + " kb/s \n");
+ int seed = (int) Math.round(65535*Math.random());
+ System.out.println("Write Performance: " + ztex.testW(sectors, seed) + " kb/s ");
+ System.out.println("Read Performance: " + ztex.testR(sectors, seed) + " kb/s \n");
+ }
+ catch (Exception e) {
+ System.out.println("Error: "+e.getLocalizedMessage() );
+ }
+ }
+
+}
Index: usb-fpga-2.16/flashbench/Makefile
===================================================================
--- usb-fpga-2.16/flashbench/Makefile (nonexistent)
+++ usb-fpga-2.16/flashbench/Makefile (revision 8)
@@ -0,0 +1,21 @@
+#########################
+# configuration section #
+#########################
+
+ZTEXPREFIX=../../..
+
+JARTARGET=FlashBench.jar
+CLASSTARGETS=FlashBench.class
+CLASSEXTRADEPS=
+#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
+
+IHXTARGETS=flashbench.ihx
+IHXEXTRADEPS=
+#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
+EXTRAJARFILES=flashbench.ihx
+
+################################
+# DO NOT CHANAGE THE FOLLOWING #
+################################
+
+include $(ZTEXPREFIX)/Makefile.mk
Index: usb-fpga-2.16/flashbench/flashbench.c
===================================================================
--- usb-fpga-2.16/flashbench/flashbench.c (nonexistent)
+++ usb-fpga-2.16/flashbench/flashbench.c (revision 8)
@@ -0,0 +1,41 @@
+/*!
+ flashbench -- Flash memory benchmark for ZTEX USB-FPGA Module 1.15
+ Copyright (C) 2009-2011 ZTEX GmbH.
+ http://www.ztex.de
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License version 3 as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+
+#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
+#include[ztex-utils.h] // include basic functions and variables
+
+// select ZTEX USB FPGA Module 2.16 as target
+IDENTITY_UFM_2_16(10.16.0.0,0);
+
+// this product string is also used for identification by the host software
+#define[PRODUCT_STRING]["flashbench for UFM 2.16"]
+//USE_4KSECTORS;
+
+// enable Flash support
+ENABLE_FLASH;
+
+// include the main part of the firmware kit, define the descriptors, ...
+#include[ztex.h]
+
+void main(void)
+{
+ init_USB(); // init everything ...
+
+ while (1) { } // ... and twiddle thumbs
+}
+
Index: usb-fpga-2.16/Makefile
===================================================================
--- usb-fpga-2.16/Makefile (nonexistent)
+++ usb-fpga-2.16/Makefile (revision 8)
@@ -0,0 +1,25 @@
+DIRS=flashdemo flashbench 2.16b
+
+.PHONY: default all clean distclean avr avrclean avrdistclean
+
+default:
+ @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
+ @echo "Usage: make all | clean | distclean"
+
+all:
+ set -e; for i in $(DIRS); do make -C $$i all; done
+
+clean:
+ set -e; for i in $(DIRS); do make -C $$i clean; done
+
+distclean:
+ set -e; for i in $(DIRS); do make -C $$i distclean; done
+
+avr:
+ set -e; for i in $(DIRS); do make -C $$i avr; done
+
+avrclean:
+ set -e; for i in $(DIRS); do make -C $$i avrclean; done
+
+avrdistclean:
+ set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
Index: Makefile
===================================================================
--- Makefile (revision 7)
+++ Makefile (revision 8)
@@ -1,4 +1,4 @@
-DIRS=all usb-fpga-1.2 usb-1.0 usb-fpga-1.11 usb-xmega-1.0 usb-fpga-1.15 usb-fpga-1.15y
+DIRS=all usb-fpga-1.2 usb-1.0 usb-fpga-1.11 usb-xmega-1.0 usb-fpga-1.15 usb-fpga-1.15y usb-fpga-2.16
.PHONY: default all clean distclean avr avrclean avrdistclean