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Tools

URL https://opencores.org/ocsvn/usb_fpga_1_15/usb_fpga_1_15/trunk

Subversion Repositories usb_fpga_1_15

Compare Revisions

This comparison shows the changes necessary to convert path
```
/usb_fpga_1_15/trunk/include
```
from Rev 3 to Rev 4
↔ Reverse comparison
Compare Path: Rev

With Path: Rev

Rev 3 → Rev 4

/ztex-xmega.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-descriptors.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

56,6 → 56,8

 .15.*.*            // ZTEX USB-FPGA-Module 1.15y
 .16.*.*            // ZTEX USB-FPGA-Module 2.16
 .17.*.*            // ZTEX USB-FPGA-Module 2.13
+.18.*.*            // ZTEX USB-FPGA-Module 2.01
+.19.*.*            // ZTEX USB-FPGA-Module 2.04
 .20.*.*            // ZTEX USB-Module 1.0
 .30.*.*            // ZTEX USB-XMEGA-Module 1.0
 .0.1.1             // ZTEX bitminer firmware

/ztex-fpga4.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

56,6 → 56,12

 #ifeq[PRODUCT_IS][UFM-2_13]
 #define[MAC_EEPROM_ENABLED]
 #endif // PRODUCT_IS=UFM-2_13
+#ifeq[PRODUCT_IS][UFM-2_01]
+#define[MAC_EEPROM_ENABLED]
+#endif // PRODUCT_IS=UFM-2_01
+#ifeq[PRODUCT_IS][UFM-2_04]
+#define[MAC_EEPROM_ENABLED]
+#endif // PRODUCT_IS=UFM-2_04
 #endif // EEPROM_MAC_DISABLED
 #include[ztex-eeprom.h]

68,7 → 74,14

    ********************************************************************* */
 #ifeq[FLASH_ENABLED][1]
-#ifeq[PRODUCT_IS][UFM-1_1]
+#ifeq[FLASH_OVERRIDE][1]
+#include[ztex-flash1.h]
+#elifeq[FLASH_OVERRIDE][2]
+#include[ztex-flash2.h]
+#elifeq[PRODUCT_IS][UFM-1_1]
 #define[MMC_PORT][E]
 #define[MMC_BIT_CS][7]
 #define[MMC_BIT_DI][6]

142,6 → 155,24

 #define[SPI_BIT_DI][7]
 #include[ztex-flash2.h]
+#elifeq[PRODUCT_IS][UFM-2_01]
+#define[SPI_PORT][A]
+#define[SPI_OPORT][C]
+#define[SPI_BIT_DO][0]
+#define[SPI_BIT_CS][3]
+#define[SPI_BIT_CLK][0]
+#define[SPI_BIT_DI][1]
+#include[ztex-flash2.h]
+#elifeq[PRODUCT_IS][UFM-2_04]
+#define[SPI_PORT][A]
+#define[SPI_OPORT][C]
+#define[SPI_BIT_DO][0]
+#define[SPI_BIT_CS][3]
+#define[SPI_BIT_CLK][0]
+#define[SPI_BIT_DI][1]
+#include[ztex-flash2.h]
 #else
 #warning[Flash memory access is not supported by this product]
 #define[FLASH_ENABLED][0]

169,6 → 200,10

 #include[ztex-fpga6.h]
 #elifeq[PRODUCT_IS][UFM-2_13]
 #include[ztex-fpga6.h]
+#elifeq[PRODUCT_IS][UFM-2_01]
+#include[ztex-fpga7.h]
+#elifeq[PRODUCT_IS][UFM-2_04]
+#include[ztex-fpga7.h]
 #endif

346,6 → 381,10

     init_fpga();
 #elifeq[PRODUCT_IS][UFM-2_13]
     init_fpga();
+#elifeq[PRODUCT_IS][UFM-2_01]
+    init_fpga();
+#elifeq[PRODUCT_IS][UFM-2_04]
+    init_fpga();
 #endif
     INIT_CMDS;

400,6 → 439,10

 #ifeq[FLASH_ENABLED][1]
     flash_init();
+    if ( !flash_enabled ) {
+        wait(250);
+        flash_init();
+    }
 #endif
 #ifeq[DEBUG_ENABLED][1]
     debug_init();

/ztex-fpga5.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga6.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga7.h

0,0 → 1,285

+/*!
+   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
+   Copyright (C) 2009-2014 ZTEX GmbH.
+   http://www.ztex.de
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License version 3 as
+   published by the Free Software Foundation.
+   This program is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+   General Public License for more details.
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, see http://www.gnu.org/licenses/.
+!*/
+/*
+    FPGA support for ZTEX USB FPGA Modules 2.01 and 2.04
+*/
+#ifndef[ZTEX_FPGA_H]
+#define[ZTEX_FPGA_H]
+#define[@CAPABILITY_FPGA;]
+__xdata BYTE fpga_checksum;         // checksum
+__xdata DWORD fpga_bytes;           // transfered bytes
+__xdata BYTE fpga_init_b;           // init_b state (should be 222 after configuration)
+__xdata BYTE fpga_flash_result;     // result of automatic fpga configuarion from Flash
+__xdata BYTE fpga_conf_initialized; // 123 if initialized
+__xdata BYTE OOEA;
+/* *********************************************************************
+   ***** reset_fpga ****************************************************
+   ********************************************************************* */
+static void reset_fpga () {
+    OEE = (OEE & ~bmBIT6) | bmBIT7;
+    IOE = IOE & ~bmBIT7;
+    wait(1);
+    IOE = IOE | bmBIT7;
+    fpga_conf_initialized = 0;
+}
+/* *********************************************************************
+   ***** init_fpga *****************************************************
+   ********************************************************************* */
+static void init_fpga () {
+    IOE = IOE | bmBIT7;
+    OEE = (OEE & ~bmBIT6) | bmBIT7;
+    if ( ! (IOE & bmBIT6) ) {
+        // ensure that FPGA is in a proper configuration mode
+        IOE = IOE & ~bmBIT7;                    // PROG_B = 0
+        OEA = (OEA & bmBIT2 ) | bmBIT4 | bmBIT5 | bmBIT6;
+        IOA = (IOA & bmBIT2 ) | bmBIT5;
+        wait(1);
+        IOE = IOE | bmBIT7;                     // PROG_B = 1
+    }
+    fpga_conf_initialized = 0;
+}
+/* *********************************************************************
+   ***** init_fpga_configuration ***************************************
+   ********************************************************************* */
+static void init_fpga_configuration () {
+    unsigned short k;
+    {
+        PRE_FPGA_RESET
+    }
+    IFCONFIG = bmBIT7;
+    SYNCDELAY;
+    PORTACFG = 0;
+    PORTCCFG = 0;
+    OOEA = OEA;
+    fpga_conf_initialized = 123;
+    OEA &= bmBIT2;                      // only unsed PA bit
+    OEE = (OEE & ~bmBIT6) | bmBIT7;
+    IOE = IOE & ~bmBIT7;                // PROG_B = 0
+    //     CSI      M0       M1       RDWR
+    OEA |= bmBIT1 | bmBIT4 | bmBIT5 | bmBIT6;
+    IOA = ( IOA & bmBIT2 ) | bmBIT1 | bmBIT5;
+    wait(5);
+    IOE = IOE | bmBIT7;                 // PROG_B = 1
+    IOA1 = 0;                           // CS = 0
+    k=0;
+    while (!IOA7 && k<65535)
+        k++;
+    //     CCLK
+    OEA |= bmBIT0;                      // ready for configuration
+    fpga_init_b = IOA7 ? 200 : 100;
+    fpga_bytes = 0;
+    fpga_checksum = 0;
+}
+/* *********************************************************************
+   ***** post_fpga_confog **********************************************
+   ********************************************************************* */
+static void post_fpga_config () {
+    POST_FPGA_CONFIG
+}
+/* *********************************************************************
+   ***** finish_fpga_configuration *************************************
+   ********************************************************************* */
+static void finish_fpga_configuration () {
+    BYTE w;
+    fpga_init_b += IOA7 ? 22 : 11;
+    for ( w=0; w<64; w++ ) {
+        IOA0 = 1; IOA0 = 0;
+    }
+    IOA1 = 1;
+    IOA0 = 1; IOA0 = 0;
+    IOA0 = 1; IOA0 = 0;
+    IOA0 = 1; IOA0 = 0;
+    IOA0 = 1; IOA0 = 0;
+    OEA = OOEA;
+    if ( IOE & bmBIT6 )  {
+        post_fpga_config();
+    }
+}
+/* *********************************************************************
+   ***** EP0 vendor request 0x30 ***************************************
+   ********************************************************************* */
+ADD_EP0_VENDOR_REQUEST((0x30,,          // get FPGA state
+    MEM_COPY1(fpga_checksum,EP0BUF+1,7);
+    OEE = (OEE & ~bmBIT6) | bmBIT7;
+    if ( IOE & bmBIT6 )  {
+        EP0BUF[0] = 0;                  // FPGA configured
+    }
+    else {
+        EP0BUF[0] = 1;                  // FPGA unconfigured
+        reset_fpga();                   // prepare FPGA for configuration
+     }
+//    EP0BUF[8] = 0;                    // bit order for bitstream in Flash memory: non-swapped
+    EP0BUF[8] = 1;                      // bit order for bitstream in Flash memory: swapped
+    EP0BCH = 0;
+    EP0BCL = 9;
+,,));;
+/* *********************************************************************
+   ***** EP0 vendor command 0x31 ***************************************
+   ********************************************************************* */
+ADD_EP0_VENDOR_COMMAND((0x31,,reset_fpga();,,));;       // reset FPGA
+/* *********************************************************************
+   ***** EP0 vendor command 0x32 ***************************************
+   ********************************************************************* */
+void fpga_send_ep0() {
+    BYTE oOEC;
+    oOEC = OEC;
+    OEC = 255;
+    fpga_bytes += ep0_payload_transfer;
+    __asm
+        mov     dptr,#_EP0BCL
+        movx    a,@dptr
+        jz      010000$
+        mov     r2,a
+        mov     _AUTOPTRL1,#(_EP0BUF)
+        mov     _AUTOPTRH1,#(_EP0BUF >> 8)
+        mov     _AUTOPTRSETUP,#0x07
+        mov     dptr,#_fpga_checksum
+        movx    a,@dptr
+        mov     r1,a
+        mov     dptr,#_XAUTODAT1
+$:
+        movx    a,@dptr                 // 2
+        mov     _IOC,a                  // 2
+        setb    _IOA0                   // 2
+        add     a,r1                    // 1
+        mov     r1,a                    // 1
+        clr     _IOA0                   // 2
+        djnz    r2, 010001$             // 4
+        mov     dptr,#_fpga_checksum
+        mov     a,r1
+        movx    @dptr,a
+$:
+        __endasm;
+    OEC = oOEC;
+    if ( EP0BCL<64 ) {
+        finish_fpga_configuration();
+    }
+}
+ADD_EP0_VENDOR_COMMAND((0x32,,          // send FPGA configuration data
+    if ( fpga_conf_initialized != 123 )
+        init_fpga_configuration();
+,,
+    fpga_send_ep0();
+));;
+#ifeq[FLASH_BITSTREAM_ENABLED][1]
+/* *********************************************************************
+   ***** fpga_configure_from_flash *************************************
+   ********************************************************************* */
+/*
+    Configure the FPGA using a bitstream from flash.
+    If force == 0 a already configured FPGA is not re-configured.
+    Return values:
+: Configuration successful
+: FPGA already configured
+: Configuration error
+*/
+BYTE fpga_configure_from_flash( BYTE force ) {
+//    BYTE c,d;
+    WORD i;
+    if ( ( force == 0 ) && ( IOE & bmBIT6 ) ) {
+        fpga_flash_result = 1;
+        return 1;
+    }
+    fpga_flash_result = 0;
+    IFCONFIG = bmBIT7;
+    SYNCDELAY;
+    PORTACFG = 0;
+    PORTCCFG = 0;
+//    c = OEA;
+    OEA &= bmBIT2;                      // only unsed PA bit
+//    d = OEC;
+    OEC &= ~bmBIT0;
+    OEE = (OEE & ~bmBIT6) | bmBIT7;
+    IOE = IOE & ~bmBIT7;                // PROG_B = 0
+    //     M0       M1
+    OEA |= bmBIT4 | bmBIT5;
+    IOA = ( IOA & bmBIT2 ) | bmBIT4;
+    wait(1);
+    IOE = IOE | bmBIT7;                 // PROG_B = 1
+// wait up to 4s for CS going high
+    wait(20);
+    for (i=0; IOA7 && (!IOA1) && i<4000; i++ ) {
+        wait(1);
+    }
+    wait(1);
+    if ( IOE & bmBIT6 )  {
+//      IOA = ( IOA & bmBIT2 ) | bmBIT3;
+        post_fpga_config();
+//      OEC = d;
+//      OEA = c;
+    }
+    else {
+        init_fpga();
+        fpga_flash_result = 4;
+    }
+    return fpga_flash_result;
+}
+#include[ztex-fpga-flash2.h]
+#endif
+#endif  /*ZTEX_FPGA_H*/

/ezregs.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-flash1.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-flash2.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

52,7 → 52,7

 #error[SPI_BIT_CLK not defined]
 #endif
-#ifndef[SPI_DOPORT]
+#ifndef[SPI_OPORT]
 #define[SPI_OPORT][SPI_PORT]
 #endif

393,6 → 393,8

         flash_ec = FLASH_EC_PENDING;
         return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
     }
+    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
+    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
     if ( spi_wait() ) {
         return flash_ec;
     }

516,6 → 518,8

         flash_ec = FLASH_EC_PENDING;
         return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
     }
+    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
+    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
     if ( spi_wait() ) {
         return flash_ec;
     }

/ezintavecs.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-conf.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

438,6 → 438,32

 #define[NUMBER_OF_FPGAS][1]]
 /*
+   Identify as ZTEX USB FPGA Module 2.01
+   Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
+*/
+#define[IDENTITY_UFM_2_01(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
+#define[PRODUCT_ID_1][$1]
+#define[PRODUCT_ID_2][$2]
+#define[PRODUCT_ID_3][$3]
+#define[FWVER][$4]
+#define[PRODUCT_IS][UFM-2_01]
+#define[PRODUCT_STRING]["USB-FPGA Module 2.01"]
+#define[NUMBER_OF_FPGAS][1]]
+/*
+   Identify as ZTEX USB FPGA Module 2.04
+   Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
+*/
+#define[IDENTITY_UFM_2_04(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
+#define[PRODUCT_ID_1][$1]
+#define[PRODUCT_ID_2][$2]
+#define[PRODUCT_ID_3][$3]
+#define[FWVER][$4]
+#define[PRODUCT_IS][UFM-2_04]
+#define[PRODUCT_STRING]["USB-FPGA Module 2.04"]
+#define[NUMBER_OF_FPGAS][1]]
+/*
    Identify as ZTEX USB Module 1.0
    Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
 */

/ztex-temp1.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-debug.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-eeprom.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga-flash1.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga-flash2.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-isr.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga1.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga2.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-fpga3.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify

/ztex-utils.h

1,6 → 1,6

/*!

ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers

http://www.ztex.de

This program is free software; you can redistribute it and/or modify