OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /usbhostslave/trunk/usbDevice/Aldec
    from Rev 37 to Rev 40
    ↔ Reverse comparison
  •

Rev 37 → Rev 40

/design0/fsm.set
0,0 → 1,5
FSMSET_CUTHEADER=1
FSMSET_GENCOMMENTS=1
FSMSET_USEDEFINE=1
FSMSET_OMITGENNULL=0
FSMSET_ENABLEPARSING=1
/design0/design0.adf
0,0 → 1,38
[Project]
Current Flow=Generic
VCS=0
version=1
Current Config=compile
 
[Configurations]
compile=design0
 
[Library]
design0=.\design0.LIB
 
[$LibMap$]
design0=.
 
[Settings]
FLOW_TYPE=HDL
LANGUAGE=VHDL
 
[Files]
/EP0.asf=-1
/checkLineState.asf=-1
/EP1Mouse.asf=-1
 
[Files.Data]
.\src\EP0.asf=State Diagram
.\src\checkLineState.asf=State Diagram
.\src\EP1Mouse.asf=State Diagram
 
[file_out:/EP0.asf]
/\compile\EP0.v=-1
 
[file_out:/checkLineState.asf]
/\compile\checkLineState.v=-1
 
[file_out:/EP1Mouse.asf]
/\compile\EP1Mouse.v=-1
 
/design0/src/EP1Mouse.asf
0,0 → 1,172
VERSION=1.15
HEADER
FILE="EP1Mouse.asf"
FID=4788d213
LANGUAGE=VERILOG
ENTITY="EP1Mouse"
FRAMES=ON
FREEOID=1083
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// EP1Mouse.v ////\n//// ////\n//// This file is part of the usbHostSlave opencores effort.\n//// <http://www.opencores.org/cores//> ////\n//// ////\n//// Module Description: ////\n//// Implements EP1 as a IN endpoint\n//// simulating a mouse (a broken one) by \n//// responding to IN requests with a constant (x,y) = (1,1)\n//// which causes the mouse pointer to move from \n//// top left to bottom right of the screen\n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2008 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from <http://www.opencores.org/lgpl.shtml> ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n`include \"usbHostSlaveReg_define.v\"\n"
END
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OBJECTS
L 7 6 0 TEXT "Labels" | 31673,209974 1 0 0 "EP1St"
F 6 0 512 72 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,212603
A 5 0 1 TEXT "Actions" | 30400,266783 1 0 0 "-- diagram ACTION"
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 1 "Arial" 0 | 110650,276400 1 0 0 "Module: EP1Mouse"
C 591 590 0 TEXT "Conditions" | 67827,244806 1 0 0 "wbBusGnt == 1'b1"
W 590 443 0 581 579 BEZIER "Transitions" | 65586,246409 65639,243865 65740,240120 65793,237576
I 589 443 0 Builtin Entry | 46379,271133
I 588 443 0 Builtin Exit | 202013,33571
A 583 581 4 TEXT "Actions" | 83515,254558 1 0 0 "wbBusReq <= 1'b1;"
L 582 581 0 TEXT "State Labels" | 65707,252862 1 0 0 "WT_GNT\n/0/"
S 581 443 0 ELLIPSE "States" | 65707,252862 6500 6500
A 580 579 4 TEXT "Actions" | 36139,220040 1 0 0 "wb_addr <= `RA_EP1_TX_FIFO_CONTROL_REG;\nwb_data_o <= 8'h01; //force tx fifo empty\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
S 579 443 4096 ELLIPSE "States" | 66317,231102 6500 6500
W 578 443 0 589 581 BEZIER "Transitions" | 50089,271133 53640,267847 58870,261756 62421,258470
S 607 443 8192 ELLIPSE "States" | 152564,188942 6500 6500
L 606 607 0 TEXT "State Labels" | 152564,188942 1 0 0 "WR_TX_FIFO1\n/2/"
L 595 579 0 TEXT "State Labels" | 66317,231102 1 0 0 "TX_EMPTY\n/1/"
C 621 619 0 TEXT "Conditions" | 34482,100249 1 0 0 "wb_ack == 1'b1"
A 620 619 16 TEXT "Actions" | 37650,86574 1 0 0 "wb_stb <= 1'b0;\nif (dataSeq == 1'b1)\n dataSeq <= 1'b0;\nelse\n dataSeq <= 1'b1;"
W 619 443 0 616 627 BEZIER "Transitions" | 56746,103393 56799,100213 58679,65431 58646,61903
L 618 616 0 TEXT "State Labels" | 56781,109882 1 0 0 "TRANS_GO\n/3/"
A 617 616 4 TEXT "Actions" | 74666,114071 1 0 0 "wb_addr <= `RA_EP1_CONTROL_REG;\nif (dataSeq == 1'b1) \n wb_data_o <= 8'h07; \nelse\n wb_data_o <= 8'h03;\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
S 616 443 12288 ELLIPSE "States" | 56781,109882 6500 6500
A 615 613 16 TEXT "Actions" | 148458,175624 1 0 0 "wb_stb <= 1'b0;"
C 614 613 0 TEXT "Conditions" | 132068,180915 1 0 0 "wb_ack == 1'b1"
W 613 443 0 607 1043 BEZIER "Transitions" | 152678,182479 152888,177072 154384,169302 154365,163737
A 610 607 4 TEXT "Actions" | 162600,205514 1 0 0 "wb_data_o <= 8'h00;\nwb_stb <= 1'b1;"
L 71 72 0 TEXT "Labels" | 201700,272800 1 0 0 "clk"
I 72 0 3 Builtin InPort | 195700,272800 "" ""
L 73 74 0 TEXT "Labels" | 201700,267632 1 0 0 "rst"
I 74 0 2 Builtin InPort | 195700,267632 "" ""
S 627 443 16388 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 59948,55540 6500 6500
L 626 627 0 TEXT "State Labels" | 59948,55540 1 0 0 "WT_TRANS_DONE"
I 654 650 0 Builtin Exit | 197817,37572
I 653 650 0 Builtin Entry | 41566,267228
H 650 627 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
L 99 100 0 TEXT "State Labels" | 112176,193512 1 0 0 "START\n/8/"
S 100 6 36864 ELLIPSE "States" | 112176,193512 6500 6500
S 671 650 28672 ELLIPSE "States" | 74949,77688 6500 6500
L 670 671 0 TEXT "State Labels" | 74949,77688 1 0 0 "WT_UNGNT\n/6/"
C 668 666 0 TEXT "Conditions" | 57855,156703 1 0 0 "wb_ack == 1'b1"
A 667 666 16 TEXT "Actions" | 64401,127355 1 0 0 "wb_stb <= 1'b0;\ntransDone <= ~wb_data_i[`ENDPOINT_READY_BIT];"
W 666 650 0 663 671 BEZIER "Transitions" | 80766,163603 80819,160423 75553,87685 75520,84157
L 665 663 0 TEXT "State Labels" | 80801,170092 1 0 0 "GET_RDY_STS\n/5/"
A 664 663 4 TEXT "Actions" | 97363,177436 1 0 0 "wb_addr <= `RA_EP1_CONTROL_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
S 663 650 24576 ELLIPSE "States" | 80801,170092 6500 6500
L 662 660 0 TEXT "State Labels" | 80191,191852 1 0 0 "WT_GNT\n/4/"
A 661 660 4 TEXT "Actions" | 97999,193548 1 0 0 "wbBusReq <= 1'b1;"
S 660 650 20480 ELLIPSE "States" | 80191,191852 6500 6500
C 659 658 0 TEXT "Conditions" | 82311,183796 1 0 0 "wbBusGnt == 1'b1"
W 658 650 0 660 663 BEZIER "Transitions" | 80070,185399 80123,182855 80224,179110 80277,176566
W 657 443 0 627 588 BEZIER "Transitions" | 66297,56929 80114,57860 104701,61151 121933,57942\
139166,54734 178674,40919 199322,33571
I 387 6 0 Builtin Reset | 49555,202550
W 388 6 0 387 100 BEZIER "Transitions" | 49555,202550 64193,201024 91216,196545 105854,195019
C 389 388 0 TEXT "Conditions" | 59804,195952 1 0 0 "rst == 1'b1"
A 681 680 16 TEXT "Actions" | 53844,248262 1 0 0 "transDone <= 1'b0;"
W 680 650 0 653 660 BEZIER "Transitions" | 45528,267228 54483,249952 68565,215051 77520,197775
C 679 678 0 TEXT "Conditions" | 109319,51405 1 0 0 "transDone == 1'b1"
W 678 650 1 675 654 BEZIER "Transitions" | 82063,50346 110842,47087 166335,40831 195114,37572
C 677 676 0 TEXT "Conditions" | 74152,69075 1 0 0 "wbBusGnt == 1'b0"
W 676 650 0 671 675 BEZIER "Transitions" | 74787,71229 74866,66763 74949,61824 75028,57358
S 675 650 32768 ELLIPSE "States" | 75587,50892 6500 6500
L 674 675 0 TEXT "State Labels" | 75587,50892 1 0 0 "CHK_DONE\n/7/"
A 672 671 4 TEXT "Actions" | 93930,80240 1 0 0 "wbBusReq <= 1'b0;"
H 443 433 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
S 433 6 40964 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 63138,124215 6500 6500
L 432 433 0 TEXT "State Labels" | 63138,124215 1 0 0 "DO_TRANS"
I 479 0 130 Builtin InPort | 123454,253473 "" ""
L 478 477 0 TEXT "Labels" | 127232,248761 1 0 0 "wb_data_o[7:0]"
I 477 0 130 Builtin OutPort | 121232,248761 "" ""
L 476 475 0 TEXT "Labels" | 127470,239089 1 0 0 "wb_stb"
I 475 0 2 Builtin OutPort | 121470,239089 "" ""
L 474 473 0 TEXT "Labels" | 127470,234129 1 0 0 "wb_we"
I 473 0 2 Builtin OutPort | 121470,234129 "" ""
L 472 471 0 TEXT "Labels" | 126974,258272 1 0 0 "wb_addr[7:0]"
I 471 0 130 Builtin OutPort | 120974,258272 "" ""
L 482 481 0 TEXT "Labels" | 129702,243801 1 0 0 "wb_ack"
I 481 0 2 Builtin InPort | 123702,243801 "" ""
L 480 479 0 TEXT "Labels" | 129454,253473 1 0 0 "wb_data_i[7:0]"
W 1024 443 0 579 607 BEZIER "Transitions" | 72782,231770 82007,232508 99661,234789 105410,239164\
111159,243539 112232,248309 118685,249809 125138,251309\
128090,251242 129741,250062 131392,248883 150049,197658\
150541,195116
C 1026 1024 0 TEXT "Conditions" | 82933,232372 1 0 0 "wb_ack == 1'b1"
A 1027 1024 16 TEXT "Actions" | 116778,241081 1 0 0 "wb_stb <= 1'b0;\nwb_addr <= `RA_EP1_TX_FIFO_DATA_REG;\nwb_we <= 1'b1;"
L 1055 1050 0 TEXT "State Labels" | 155665,126008 1 0 0 "WR_TX_FIFO3\n/10/"
A 1051 1050 4 TEXT "Actions" | 166829,129608 1 0 0 "wb_data_o <= 8'h01;\nwb_stb <= 1'b1;"
S 1050 443 49152 ELLIPSE "States" | 155665,126008 6500 6500
A 1048 1043 4 TEXT "Actions" | 165701,160850 1 0 0 "wb_data_o <= 8'h01;\nwb_stb <= 1'b1;"
C 1047 1045 0 TEXT "Conditions" | 133976,149256 1 0 0 "wb_ack == 1'b1"
A 1046 1045 16 TEXT "Actions" | 148794,143450 1 0 0 "wb_stb <= 1'b0;"
W 1045 443 0 1043 1050 BEZIER "Transitions" | 154651,150787 154861,145380 155568,138056 155549,132491
L 1044 1043 0 TEXT "State Labels" | 154537,157250 1 0 0 "WR_TX_FIFO2\n/9/"
S 1043 443 45056 ELLIPSE "States" | 154537,157250 6500 6500
A 1042 100 4 TEXT "Actions" | 132671,207449 1 0 0 "wbBusReq <= 1'b0;\nwb_addr <= 8'h00;\nwb_data_o <= 8'h00;\nwb_stb <= 1'b0;\nwb_we <= 1'b0;\ncnt <= 8'h00;\ndataSeq <= 1'b0;\ntransDone <= 1'b0;"
I 499 0 2 Builtin InPort | 92423,247683 "" ""
L 498 499 0 TEXT "Labels" | 98423,247683 1 0 0 "wbBusGnt"
I 497 0 2 Builtin OutPort | 90212,253455 "" ""
L 496 497 0 TEXT "Labels" | 96212,253455 1 0 0 "wbBusReq"
A 1071 1068 4 TEXT "Actions" | 50300,183016 1 0 0 "cnt <= cnt + 1'b1;"
C 1070 1069 0 TEXT "Conditions" | 36497,204386 1 0 0 "cnt == `ONE_USEC_DEL"
W 1069 650 0 1068 660 BEZIER "Transitions" | 48742,195985 52744,198377 59270,198312 62858,198427\
66446,198542 72219,198397 75393,196235
S 1068 650 53248 ELLIPSE "States" | 43584,192032 6500 6500
L 1067 1068 0 TEXT "State Labels" | 43584,192032 1 0 0 "DEL\n/11/"
C 1066 1062 0 TEXT "Conditions" | 94485,177150 1 0 0 "initComplete == 1'b1"
I 1065 0 2 Builtin InPort | 93296,241632 "" ""
L 1064 1065 0 TEXT "Labels" | 99296,241632 1 0 0 "initComplete"
W 1063 6 0 433 433 BEZIER "Transitions" | 65159,118041 71226,99507 79933,144062 67336,129176
W 1062 6 0 100 433 BEZIER "Transitions" | 107408,189096 95760,179118 73464,159275 67848,151489\
62233,143703 62667,136303 63084,130709
C 1061 1059 0 TEXT "Conditions" | 116374,127702 1 0 0 "wb_ack == 1'b1"
A 1060 1059 16 TEXT "Actions" | 77646,136820 1 0 0 "wb_stb <= 1'b0;"
W 1059 443 0 1050 616 BEZIER "Transitions" | 149317,127404 130705,129989 94284,136491 82064,136021\
69844,135551 58188,128501 55720,125422 53253,122344\
54360,118827 55253,116195
I 1076 0 130 Builtin Signal | 168144,230162 "" ""
L 1075 1076 0 TEXT "Labels" | 171144,230162 1 0 0 "cnt[7:0]"
A 1074 1073 16 TEXT "Actions" | 42388,120824 1 0 0 "cnt <= 8'h00;"
W 1073 650 2 675 1068 BEZIER "Transitions" | 72301,56499 63377,75681 44228,112314 40548,128920\
36868,145526 40779,171622 42343,185652
L 1077 1078 0 TEXT "Labels" | 170639,235428 1 0 0 "localRst"
I 1078 0 2 Builtin Signal | 167639,235428 "" ""
L 1079 1080 0 TEXT "Labels" | 171425,225089 1 0 0 "dataSeq"
I 1080 0 2 Builtin Signal | 168425,225089 "" ""
L 1081 1082 0 TEXT "Labels" | 171220,218950 1 0 0 "transDone"
I 1082 0 2 Builtin Signal | 168220,218950 "" ""
END
/design0/src/EP0.asf
0,0 → 1,586
VERSION=1.15
HEADER
FILE="EP0.asf"
FID=4788d213
LANGUAGE=VERILOG
ENTITY="EP0"
FRAMES=ON
FREEOID=1113
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// EP0.v ////\n//// ////\n//// This file is part of the usbHostSlave opencores effort.\n//// <http://www.opencores.org/cores//> ////\n//// ////\n//// Module Description: ////\n//// Implements EP0 control endpoint\n//// Responds to 8-byte SETUP packets\n//// of type GET_STATUS, GET_DESCRIPTOR and\n//// SET_ADDRESS\n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2008 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from <http://www.opencores.org/lgpl.shtml> ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n`include \"usbHostSlaveReg_define.v\"\n`include \"usbDevice_define.v\"\n\n"
END
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OBJECTS
S 831 721 151552 ELLIPSE "States" | 145680,171360 6500 6500
L 830 831 0 TEXT "State Labels" | 145680,171360 1 0 0 "SET_ADDR\n/33/"
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L 828 829 0 TEXT "State Labels" | 146040,194400 1 0 0 "GET_DESC"
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L 826 827 0 TEXT "State Labels" | 145320,213120 1 0 0 "GET_STAT\n/32/"
C 825 823 0 TEXT "Conditions" | 71092,83196 1 0 0 "wb_ack == 1'b1"
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C 822 821 0 TEXT "Conditions" | 155548,85404 1 0 0 "wbBusGnt == 1'b0"
W 821 757 0 820 761 BEZIER "Transitions" | 150160,89614 163592,76044 186060,47668 199492,34098
S 820 757 139264 ELLIPSE "States" | 145888,94512 6500 6500
L 819 820 0 TEXT "State Labels" | 145888,94512 1 0 0 "WT_UNGNT\n/31/"
A 818 807 16 TEXT "Actions" | 146478,123188 1 0 0 "wb_stb <= 1'b0;\nwLength[15:8] <= wb_data_i;\nwbBusReq <= 1'b0;"
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A 816 814 4 TEXT "Actions" | 155960,185231 1 0 0 "wb_stb <= 1'b1;"
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 1 "Arial" 0 | 110650,276400 1 0 0 "Module: EP0"
A 5 0 1 TEXT "Actions" | 30400,271392 1 0 0 "-- diagram ACTION"
F 6 0 512 72 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,212603
L 7 6 0 TEXT "Labels" | 31673,209974 1 0 0 "EP0St"
W 1089 485 0 1085 1095 BEZIER "Transitions" | 125212,139108 125596,133108 49427,119475 42131,114819
C 1090 1089 0 TEXT "Conditions" | 115920,133773 1 0 0 "wb_ack == 1'b1"
A 1091 1089 16 TEXT "Actions" | 76138,128516 1 0 0 "wb_stb <= 1'b0;"
W 1092 485 0 508 515 BEZIER "Transitions" | 59048,201412 59144,196948 59459,190379 59555,185915
C 1093 1092 0 TEXT "Conditions" | 58512,198480 1 0 0 "cnt == 8'hff"
S 1095 485 229376 ELLIPSE "States" | 42368,108336 6500 6500
A 1096 1095 4 TEXT "Actions" | 55936,113636 1 0 0 "wb_addr <= `RA_SC_LINE_STATUS_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
L 1097 1095 0 TEXT "State Labels" | 42368,108336 1 0 0 "WT_CONN\n/46/"
W 1098 485 0 1095 524 BEZIER "Transitions" | 46784,103569 58928,95505 79104,78768 92568,77568\
106032,76368 134712,86356 149496,92020
C 1099 1098 0 TEXT "Conditions" | 42576,75984 1 0 0 "(wb_ack == 1'b1) && (wb_data_i[1:0] == `FULL_SPEED_CONNECT)"
A 1101 1098 16 TEXT "Actions" | 62352,94128 1 0 0 "wb_stb <= 1'b0;"
L 1102 1103 0 TEXT "State Labels" | 142449,164834 1 0 0 "DEL\n/47/"
S 1103 443 233472 ELLIPSE "States" | 142449,164834 6500 6500
C 833 832 0 TEXT "Conditions" | 88800,217260 1 0 0 "bRequest == `GET_STATUS"
W 832 721 1 756 827 BEZIER "Transitions" | 76438,243508 76438,236758 76200,225270 77055,220995\
77910,216720 81330,213120 89430,212400 97530,211680\
124335,212512 138825,212872
L 570 571 0 TEXT "Labels" | 77651,239593 1 0 0 "txDataSize[7:0]"
I 571 0 130 Builtin Signal | 74651,239593 "" ""
I 572 0 130 Builtin Signal | 74747,234627 "" ""
L 573 572 0 TEXT "Labels" | 77747,234627 1 0 0 "txDataIndex[7:0]"
A 1104 1103 4 TEXT "Actions" | 160690,166171 1 0 0 "memRdEn <= 1'b0;"
W 1105 443 0 604 1103 BEZIER "Transitions" | 134066,177905 135641,175375 137374,172840 138949,170310
W 1106 443 0 1103 607 BEZIER "Transitions" | 138698,159527 136693,156806 135613,154644 133608,151923
L 1107 1108 0 TEXT "State Labels" | 152381,67042 1 0 0 "PTR_SET\n/48/"
S 1108 721 237568 ELLIPSE "States" | 152381,67042 6500 6500
A 1110 1108 4 TEXT "Actions" | 78942,102568 1 0 0 "if (txPacketRemSize > `MAX_RESP_SIZE) begin\n txDataSize <= `MAX_RESP_SIZE;\n txPacketRemSize <= txPacketRemSize - `MAX_RESP_SIZE;\nend\nelse begin\n txDataSize <= txPacketRemSize;\n txPacketRemSize <= 8'h00;\nend"
W 1111 721 0 1108 725 BEZIER "Transitions" | 157931,63661 168818,58361 189435,47130 195069,43955\
200704,40780 200486,38998 200868,37948
W 1112 721 0 963 1108 BEZIER "Transitions" | 177140,79165 171649,76444 163667,72705 158176,69984
S 576 443 28676 ELLIPSE 0,0,0 0 0 1 255,0,0 1 | 67019,183707 3780 3780
L 577 576 0 TEXT "State Labels" | 66785,183895 1 0 0 "J2"
W 578 443 0 589 581 BEZIER "Transitions" | 50089,271133 53640,267847 58870,261756 62421,258470
S 579 443 24576 ELLIPSE "States" | 66317,231102 6500 6500
A 580 579 4 TEXT "Actions" | 78943,227786 1 0 0 "wb_addr <= `RA_EP0_TX_FIFO_CONTROL_REG;\nwb_data_o <= 8'h01; //force tx fifo empty\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
S 581 443 20480 ELLIPSE "States" | 65707,252862 6500 6500
L 582 581 0 TEXT "State Labels" | 65707,252862 1 0 0 "WT_GNT\n/5/"
A 583 581 4 TEXT "Actions" | 83515,254558 1 0 0 "wbBusReq <= 1'b1;"
W 585 443 1 576 604 BEZIER "Transitions" | 70798,183705 82453,183705 112107,183343 123816,183367
C 587 585 0 TEXT "Conditions" | 76226,189478 1 0 0 "txDataSize != 8'h00"
I 588 443 0 Builtin Exit | 202013,33571
I 589 443 0 Builtin Entry | 46379,271133
W 590 443 0 581 579 BEZIER "Transitions" | 65586,246409 65639,243865 65740,240120 65793,237576
C 591 590 0 TEXT "Conditions" | 67827,244806 1 0 0 "wbBusGnt == 1'b1"
H 599 576 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
L 595 579 0 TEXT "State Labels" | 66317,231102 1 0 0 "TX_EMPTY\n/6/"
W 596 599 0 598 597 BEZIER "Transitions" | 100230,182880 105316,175905 109388,157925 120824,149056
I 597 599 0 Builtin Exit | 123580,149056
I 598 599 0 Builtin Entry | 96520,182880
L 603 604 0 TEXT "State Labels" | 130314,183210 1 0 0 "RD_MEM\n/8/"
S 604 443 36864 ELLIPSE "States" | 130314,183210 6500 6500
A 605 604 4 TEXT "Actions" | 147534,185940 1 0 0 "memAddr <= txDataIndex;\nmemRdEn <= 1'b1;\ntxDataSize <= txDataSize - 1'b1;\ntxDataIndex <= txDataIndex + 1'b1;"
L 606 607 0 TEXT "State Labels" | 131708,145710 1 0 0 "WR_TX_FIFO\n/7/"
S 607 443 32768 ELLIPSE "States" | 131708,145710 6500 6500
I 892 889 0 Builtin Entry | 38008,268256
H 889 829 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
I 74 0 2 Builtin InPort | 195700,267632 "" ""
L 73 74 0 TEXT "Labels" | 201700,267632 1 0 0 "rst"
I 72 0 3 Builtin InPort | 195700,272800 "" ""
L 71 72 0 TEXT "Labels" | 201700,272800 1 0 0 "clk"
A 610 607 4 TEXT "Actions" | 144806,154759 1 0 0 "wb_data_o <= memData;\nwb_addr <= `RA_EP0_TX_FIFO_DATA_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
L 611 612 0 TEXT "State Labels" | 133464,116430 1 0 0 "CHK_TX_DONE\n/9/"
S 612 443 40960 ELLIPSE "States" | 133464,116430 6500 6500
W 613 443 0 607 612 BEZIER "Transitions" | 131632,139220 131812,133487 132447,128407 132428,122842
C 614 613 0 TEXT "Conditions" | 109920,137705 1 0 0 "wb_ack == 1'b1"
A 615 613 16 TEXT "Actions" | 131042,132247 1 0 0 "wb_stb <= 1'b0;"
S 616 443 45056 ELLIPSE "States" | 56781,109882 6500 6500
A 617 616 4 TEXT "Actions" | 75530,105258 1 0 0 "wb_addr <= `RA_EP0_CONTROL_REG;\nif (dataSeq == 1'b1)\n wb_data_o <= 8'h07; \nelse\n wb_data_o <= 8'h03; \nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
L 618 616 0 TEXT "State Labels" | 56781,109882 1 0 0 "TRANS_GO\n/10/"
W 619 443 0 616 627 BEZIER "Transitions" | 56746,103393 56799,100213 58679,65431 58646,61903
A 620 619 16 TEXT "Actions" | 37650,86574 1 0 0 "wb_stb <= 1'b0;"
C 621 619 0 TEXT "Conditions" | 34482,100249 1 0 0 "wb_ack == 1'b1"
W 622 443 1 612 616 BEZIER "Transitions" | 127111,117802 118659,119219 102226,122363 93695,121890\
85164,121418 70939,115628 62329,113266
C 623 622 0 TEXT "Conditions" | 87054,125880 1 0 0 "txDataSize == 8'h00"
C 897 896 0 TEXT "Conditions" | 86815,197702 1 0 0 "bRequest == `GET_DESCRIPTOR"
W 896 721 2 756 829 BEZIER "Transitions" | 76084,243537 76173,230972 75238,208651 75731,201965\
76224,195279 78020,193662 86501,193303 94982,192944\
123490,193875 139555,193964
W 624 443 2 612 604 BEZIER "Transitions" | 128097,120095 118385,125397 100126,136538 95742,142837\
91359,149137 93249,163733 97764,168536 102279,173340\
116285,178270 124370,180580
W 625 443 2 576 616 BEZIER "Transitions" | 66405,179981 64200,163339 59790,132966 57585,116324
L 626 627 0 TEXT "State Labels" | 59948,55540 1 0 0 "WT_TRANS_DONE"
S 627 443 49156 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 59948,55540 6500 6500
S 100 6 196608 ELLIPSE "States" | 112176,193512 6500 6500
L 99 100 0 TEXT "State Labels" | 112176,193512 1 0 0 "START\n/44/"
H 650 627 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
I 653 650 0 Builtin Entry | 41566,267228
I 654 650 0 Builtin Exit | 197817,37572
C 389 388 0 TEXT "Conditions" | 60416,196339 1 0 0 "rst == 1'b1"
W 388 6 0 387 100 BEZIER "Transitions" | 49555,202550 64193,201024 91216,196545 105854,195019
I 387 6 0 Builtin Reset | 49555,202550
W 657 443 0 627 588 BEZIER "Transitions" | 66297,56929 80114,57860 104701,61151 121933,57942\
139166,54734 178674,40919 199322,33571
W 658 650 0 660 663 BEZIER "Transitions" | 80070,185399 80123,182855 80224,179110 80277,176566
C 659 658 0 TEXT "Conditions" | 82311,183796 1 0 0 "wbBusGnt == 1'b1"
S 660 650 53248 ELLIPSE "States" | 80191,191852 6500 6500
A 661 660 4 TEXT "Actions" | 97999,193548 1 0 0 "wbBusReq <= 1'b1;"
L 662 660 0 TEXT "State Labels" | 80191,191852 1 0 0 "WT_GNT\n/11/"
S 663 650 57344 ELLIPSE "States" | 80801,170092 6500 6500
A 664 663 4 TEXT "Actions" | 97363,177436 1 0 0 "wb_addr <= `RA_EP0_CONTROL_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
L 665 663 0 TEXT "State Labels" | 80801,170092 1 0 0 "GET_RDY_STS\n/12/"
W 666 650 0 663 671 BEZIER "Transitions" | 80766,163603 80819,160423 75553,87685 75520,84157
A 667 666 16 TEXT "Actions" | 64401,127355 1 0 0 "wb_stb <= 1'b0;\ntransDone <= ~wb_data_i[`ENDPOINT_READY_BIT];"
C 668 666 0 TEXT "Conditions" | 57855,156703 1 0 0 "wb_ack == 1'b1"
L 670 671 0 TEXT "State Labels" | 74949,77688 1 0 0 "WT_UNGNT\n/13/"
S 671 650 61440 ELLIPSE "States" | 74949,77688 6500 6500
W 958 889 0 954 957 BEZIER "Transitions" | 96605,229505 96649,223961 97092,214792 97136,209248
I 957 889 0 Builtin Exit | 97136,207312
W 956 889 0 892 954 BEZIER "Transitions" | 38008,266320 37964,258576 37692,243392 38572,239036\
39452,234680 43060,232744 50100,232678 57140,232612\
78050,234430 90326,235266
A 955 954 4 TEXT "Actions" | 134536,257560 1 0 0 "case (wValue[15:8])\n `DEV_DESC: begin\n txPacketRemSize <= `DEV_DESC_SIZE;\n txDataIndex <= `DEV_DESC_INDEX;\n end\n `CFG_DESC: begin\n txPacketRemSize <= `CFG_DESC_SIZE;\n txDataIndex <= `CFG_DESC_INDEX;\n end\n `REP_DESC: begin\n txPacketRemSize <= `REP_DESC_SIZE;\n txDataIndex <= `REP_DESC_INDEX;\n end\n `STRING_DESC: begin\n case (wValue[3:0])\n 4'h0: begin\n txPacketRemSize <= `LANGID_DESC_SIZE;\n txDataIndex <= `LANGID_DESC_INDEX;\n end\n 4'h1: begin\n txPacketRemSize <= `STRING1_DESC_SIZE;\n txDataIndex <= `STRING1_DESC_INDEX;\n end\n 4'h2: begin\n txPacketRemSize <= `STRING2_DESC_SIZE;\n txDataIndex <= `STRING2_DESC_INDEX;\n end\n 4'h3: begin\n txPacketRemSize <= `STRING3_DESC_SIZE;\n txDataIndex <= `STRING3_DESC_INDEX;\n end\n endcase\n end\nendcase"
S 954 889 155648 ELLIPSE "States" | 96784,236000 6500 6500
L 953 954 0 TEXT "State Labels" | 96784,236000 1 0 0 "S1\n/34/"
A 952 827 4 TEXT "Actions" | 110300,270290 1 0 0 "if (bm_req_type == 2'b00) begin\n txPacketRemSize <= 8'h02;\n if (bm_req_recp == 5'b00000)\n txDataIndex <= `ONE_ZERO_STAT_INDEX;\n else\n txDataIndex <= `ZERO_ZERO_STAT_INDEX;\nend\nelse if (bm_req_type == 2'b10) begin\n txDataIndex <= `VENDOR_DATA_STAT_INDEX;\n txPacketRemSize <= 8'h02;\nend"
C 951 950 0 TEXT "Conditions" | 85803,175564 1 0 0 "bRequest == `SET_ADDRESS"
W 950 721 3 756 831 BEZIER "Transitions" | 76316,243513 76063,225937 74733,192802 75831,183169\
76930,173536 81832,170156 90112,169649 98393,169142\
125076,170390 139187,171066
A 949 831 4 TEXT "Actions" | 51283,157308 1 0 0 "if ( (wValue[15:7] == {9{1'b0}}) && (wIndex == 16'h0000) && (wLength == 16'h0000) ) begin\n USBAddress <= wValue[7:0];\n updateUSBAddress <= 1'b1; \nend"
C 687 686 0 TEXT "Conditions" | 70215,206772 1 0 0 "wb_ack == 1'b1"
W 686 450 0 683 699 BEZIER "Transitions" | 67876,208091 68035,204540 69445,190397 69388,186682
A 685 683 4 TEXT "Actions" | 81161,219883 1 0 0 "wb_addr <= `RA_EP0_STATUS_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
L 684 683 0 TEXT "State Labels" | 67593,214583 1 0 0 "RD_STAT\n/15/"
S 683 450 69632 ELLIPSE "States" | 67593,214583 6500 6500
A 672 671 4 TEXT "Actions" | 93930,80240 1 0 0 "wbBusReq <= 1'b0;"
L 674 675 0 TEXT "State Labels" | 75587,50892 1 0 0 "CHK_DONE\n/14/"
S 675 650 65536 ELLIPSE "States" | 75587,50892 6500 6500
W 676 650 0 671 675 BEZIER "Transitions" | 74787,71229 74866,66763 74949,61824 75028,57358
C 677 676 0 TEXT "Conditions" | 74152,69075 1 0 0 "wbBusGnt == 1'b0"
W 678 650 1 675 654 BEZIER "Transitions" | 82063,50346 110842,47087 166335,40831 195114,37572
C 679 678 0 TEXT "Conditions" | 109319,51405 1 0 0 "transDone == 1'b1"
W 680 650 0 653 660 BEZIER "Transitions" | 45528,267228 54483,249952 68565,215051 77520,197775
A 681 680 16 TEXT "Actions" | 53844,248262 1 0 0 "transDone <= 1'b0;"
I 974 970 0 Builtin Exit | 201084,36544
I 973 970 0 Builtin Entry | 37640,268992
H 970 718 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
W 969 721 4 756 725 BEZIER "Transitions" | 73449,244406 67774,232316 56014,209963 52272,201574\
48530,193185 44910,183808 44211,174637 43512,165467\
44335,138159 48529,122326 52724,106494 68681,70467\
82128,61502 95576,52537 133412,52702 146736,51838\
160060,50975 175524,47355 181240,45299 186956,43243\
194206,38246 197907,35943
W 967 721 0 827 963 BEZIER "Transitions" | 151749,212167 162226,211177 181853,208830 188164,207345\
194475,205860 198765,201900 197857,186761 196950,171623\
188193,116474 184233,88177
W 966 721 0 829 963 BEZIER "Transitions" | 152536,194612 160868,194447 175088,194475 180079,193650\
185070,192825 188370,189855 188535,176531 188700,163208\
185027,113403 183707,88241
W 965 721 0 831 963 BEZIER "Transitions" | 152161,171855 160246,171030 175005,170715 179088,169106\
183172,167498 183338,162712 183090,152317 182843,141923\
183278,106650 182701,88253
A 964 963 4 TEXT "Actions" | 132945,115035 1 0 0 "if (txPacketRemSize > wLength)\n txPacketRemSize <= wLength;"
S 963 721 159744 ELLIPSE "States" | 183090,81780 6500 6500
L 962 963 0 TEXT "State Labels" | 183090,81780 1 0 0 "CHK_MAX_LEN\n/35/"
W 703 450 0 705 711 BEZIER "Transitions" | 72094,140370 72253,136819 74502,121202 74445,117487
A 702 697 16 TEXT "Actions" | 67545,166122 1 0 0 "wb_stb <= 1'b0;\nrxDataSize[15:8] <= wb_data_i;"
L 701 699 0 TEXT "State Labels" | 69399,180714 1 0 0 "RD_RX_SIZE1\n/17/"
A 700 699 4 TEXT "Actions" | 82967,186014 1 0 0 "wb_addr <= `RA_EP0_RX_FIFO_DATA_COUNT_MSB;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
S 699 450 77824 ELLIPSE "States" | 69399,180714 6500 6500
C 698 697 0 TEXT "Conditions" | 72107,172903 1 0 0 "wb_ack == 1'b1"
W 697 450 0 699 705 BEZIER "Transitions" | 69682,174222 69841,170671 72070,157057 72013,153342
C 696 695 0 TEXT "Conditions" | 66173,233440 1 0 0 "wbBusGnt == 1'b1"
W 695 450 0 692 683 BEZIER "Transitions" | 66810,236404 66810,231900 67051,225557 67051,221053
A 694 693 16 TEXT "Actions" | 51431,263561 1 0 0 "wbBusReq <= 1'b1;"
W 693 450 0 453 692 BEZIER "Transitions" | 45899,268890 51404,263203 58036,254207 63541,248520
S 692 450 73728 ELLIPSE "States" | 66810,242904 6500 6500
L 691 692 0 TEXT "State Labels" | 66810,242904 1 0 0 "WT_GNT\n/16/"
A 688 686 16 TEXT "Actions" | 65257,200004 1 0 0 "wb_stb <= 1'b0;\nepStatus <= wb_data_i;"
L 991 992 0 TEXT "State Labels" | 38750,241828 1 0 0 "CHK_ACK\n/37/"
C 990 985 0 TEXT "Conditions" | 70644,44491 1 0 0 "epTransType == `SC_OUTDATA_TRANS"
C 989 984 0 TEXT "Conditions" | 70644,62738 1 0 0 "epTransType == `SC_IN_TRANS"
W 988 6 5 435 433 BEZIER "Transitions" | 68713,91889 78159,90820 94604,86977 107197,87883\
119791,88790 151260,94359 158156,99797 165052,105236\
161166,121425 155533,127996 149900,134568 131252,144670\
121119,145414 110986,146159 89099,139036 82171,136155\
75244,133274 71271,130287 68358,128086
C 987 986 0 TEXT "Conditions" | 80782,97297 1 0 0 "(epStatus & 8'h0f) != 8'h00"
W 986 6 1 435 433 BEZIER "Transitions" | 69121,93300 85505,93256 116425,90863 126363,93355\
136302,95848 143296,105690 144040,109963 144785,114237\
140770,121489 138245,123528 135720,125568 129633,126475\
120536,126733 111439,126992 84705,125187 69554,125251
W 985 6 4 435 720 BEZIER "Transitions" | 62339,87911 62513,76035 61993,54233 62811,47683\
63630,41133 66774,38251 76828,37956 86882,37661\
122506,38677 141042,39528
W 984 6 3 435 718 BEZIER "Transitions" | 62077,87922 62307,80316 61927,67398 62942,63042\
63957,58687 67757,56329 77843,56001 87930,55674\
121635,57270 139909,57794
I 981 977 0 Builtin Exit | 202766,35308
I 980 977 0 Builtin Entry | 37800,268391
L 979 978 0 TEXT "State Labels" | 38809,237911 1 0 0 "CHK_SEQ\n/36/"
S 978 977 163840 ELLIPSE "States" | 38809,237911 6500 6500
H 977 720 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
L 719 720 0 TEXT "State Labels" | 147541,39589 1 0 0 "OUT"
S 718 6 212996 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 146393,58244 6500 6500
L 717 718 0 TEXT "State Labels" | 146393,58244 1 0 0 "IN"
S 716 6 208900 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 146967,76612 6500 6500
L 715 716 0 TEXT "State Labels" | 146967,76612 1 0 0 "SETUP"
C 714 709 0 TEXT "Conditions" | 77240,102705 1 0 0 "wb_ack == 1'b1"
A 713 711 4 TEXT "Actions" | 88291,116308 1 0 0 "wb_addr <= `RA_EP0_TRANSTYPE_STATUS_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
L 712 711 0 TEXT "State Labels" | 74723,111008 1 0 0 "RD_TRANS_TYPE\n/19/"
S 711 450 86016 ELLIPSE "States" | 74723,111008 6500 6500
A 710 709 16 TEXT "Actions" | 71433,90893 1 0 0 "wb_stb <= 1'b0;\nepTransType <= wb_data_i;"
W 709 450 0 711 730 BEZIER "Transitions" | 75072,104520 75292,101661 75496,80446 76628,73323
C 708 703 0 TEXT "Conditions" | 74502,138871 1 0 0 "wb_ack == 1'b1"
A 707 705 4 TEXT "Actions" | 85379,152162 1 0 0 "wb_addr <= `RA_EP0_RX_FIFO_DATA_COUNT_LSB;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
L 706 705 0 TEXT "State Labels" | 71811,146862 1 0 0 "RD_RX_SIZE2\n/18/"
S 705 450 81920 ELLIPSE "States" | 71811,146862 6500 6500
A 704 703 16 TEXT "Actions" | 69860,131262 1 0 0 "wb_stb <= 1'b0;\nrxDataSize[7:0] <= wb_data_i;"
L 432 433 0 TEXT "State Labels" | 63138,124215 1 0 0 "DO_TRANS"
S 433 6 204804 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 63138,124215 6500 6500
L 434 435 0 TEXT "State Labels" | 62714,94389 1 0 0 "CHK_TRANS"
S 435 6 200708 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 62714,94389 6500 6500
H 443 433 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
A 1007 1005 4 TEXT "Actions" | 128957,247758 1 0 0 "wbBusReq <= 1'b1;\nupdateUSBAddress <= 1'b0;"
L 1006 1005 0 TEXT "State Labels" | 111149,246062 1 0 0 "WT_GNT\n/40/"
S 1005 970 180224 ELLIPSE "States" | 111149,246062 6500 6500
A 1004 1003 4 TEXT "Actions" | 128321,231646 1 0 0 "wb_addr <= `RA_SC_ADDRESS;\nwb_data_o <= USBAddress; \nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
S 1003 970 176128 ELLIPSE "States" | 111759,224302 6500 6500
A 1002 1000 4 TEXT "Actions" | 126800,110413 1 0 0 "if (txPacketRemSize > `MAX_RESP_SIZE) begin\n txDataSize <= `MAX_RESP_SIZE;\n txPacketRemSize <= txPacketRemSize - `MAX_RESP_SIZE;\nend\nelse begin\n txDataSize <= txPacketRemSize;\n txPacketRemSize <= 8'h00;\nend"
S 1000 970 172032 ELLIPSE "States" | 108915,107493 6500 6500
L 999 1000 0 TEXT "State Labels" | 108915,107493 1 0 0 "SET_PTR\n/38/"
I 998 0 130 Builtin Signal | 74850,244256 "" ""
L 997 998 0 TEXT "Labels" | 77850,244256 1 0 0 "txPacketRemSize[7:0]"
C 996 994 0 TEXT "Conditions" | 62939,41019 1 0 0 "epStatus[`SC_ACK_RXED_BIT] != 1'b1"
W 994 970 1 992 974 BEZIER "Transitions" | 38627,235330 37985,186795 36456,91449 37327,65989\
38199,40529 43009,35488 61615,34980 80221,34473\
159613,35810 198148,36544
W 993 970 0 973 992 BEZIER "Transitions" | 37640,266790 37640,261010 37968,254059 37968,248279
S 992 970 167936 ELLIPSE "States" | 38750,241828 6500 6500
I 735 450 0 Builtin Exit | 78396,39528
L 734 730 0 TEXT "State Labels" | 77721,66917 1 0 0 "WT_UNGNT\n/20/"
C 733 732 0 TEXT "Conditions" | 77069,57247 1 0 0 "wbBusGnt == 1'b0"
W 732 450 0 730 735 BEZIER "Transitions" | 77738,60732 77817,56266 78317,45963 78396,41497
A 731 730 4 TEXT "Actions" | 96702,69469 1 0 0 "wbBusReq <= 1'b0;"
S 730 450 90112 ELLIPSE "States" | 77721,66917 6500 6500
C 729 728 0 TEXT "Conditions" | 69199,80672 1 0 0 "epTransType == `SC_SETUP_TRANS"
W 728 6 2 435 716 BEZIER "Transitions" | 62421,87898 62634,84876 62733,80199 63665,78370\
64598,76541 68042,75248 74678,75140 81315,75033\
128875,76431 140471,76412
I 725 721 0 Builtin Exit | 200868,35943
I 724 721 0 Builtin Entry | 38956,269226
H 721 716 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
S 720 6 217092 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 147541,39589 6500 6500
H 450 435 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
I 453 450 0 Builtin Entry | 41986,268890
W 459 6 0 433 435 BEZIER "Transitions" | 62976,117735 62976,112485 62852,106294 62762,100805
S 1023 443 188416 ELLIPSE "States" | 134708,254716 6500 6500
L 1022 1023 0 TEXT "State Labels" | 134708,254716 1 0 0 "RX_EMPTY\n/42/"
W 1021 970 0 1000 974 BEZIER "Transitions" | 109274,101015 110184,89367 111582,68912 122911,60676\
134241,52441 176423,41367 198172,36544
W 1020 970 3 992 1000 BEZIER "Transitions" | 41850,236116 57411,204357 90178,144921 105739,113162
C 1019 1018 0 TEXT "Conditions" | 113493,176474 1 0 0 "wbBusGnt == 1'b0"
W 1018 970 0 1017 1000 BEZIER "Transitions" | 112403,181095 111448,163714 110127,131350 109172,113969
S 1017 970 184320 ELLIPSE "States" | 112674,187576 6500 6500
L 1016 1017 0 TEXT "State Labels" | 112674,187576 1 0 0 "WT_UNGNT\n/41/"
C 1015 1014 0 TEXT "Conditions" | 48469,252925 1 0 0 "updateUSBAddress == 1'b1"
W 1014 970 2 992 1005 BEZIER "Transitions" | 44994,243632 60509,246544 87608,250662 104654,245830
L 1013 1003 0 TEXT "State Labels" | 111759,224302 1 0 0 "SET_ADDR\n/39/"
A 1012 1010 16 TEXT "Actions" | 98203,208853 1 0 0 "wb_stb <= 1'b0;\nwbBusReq <= 1'b0;"
C 1011 1010 0 TEXT "Conditions" | 89366,216390 1 0 0 "wb_ack == 1'b1"
W 1010 970 0 1003 1017 BEZIER "Transitions" | 111724,217813 111777,214633 112420,197589 112387,194061
C 1009 1008 0 TEXT "Conditions" | 113269,238006 1 0 0 "wbBusGnt == 1'b1"
W 1008 970 0 1005 1003 BEZIER "Transitions" | 111028,239609 111081,237065 111182,233320 111235,230776
I 745 0 130 Builtin Signal | 74905,218191 "" ""
L 744 745 0 TEXT "Labels" | 77521,217999 1 0 0 "rxDataSize[15:0]"
I 743 0 130 Builtin Signal | 74936,222496 "" ""
L 742 743 0 TEXT "Labels" | 77936,222496 1 0 0 "epStatus[7:0]"
I 741 0 130 Builtin Signal | 74714,227615 "" ""
L 740 741 0 TEXT "Labels" | 78098,227423 1 0 0 "epTransType[7:0]"
S 737 721 94208 ELLIPSE "States" | 40282,250972 6500 6500
L 736 737 0 TEXT "State Labels" | 40282,250972 1 0 0 "CHK_ERR\n/21/"
I 471 0 130 Builtin OutPort | 120974,258272 "" ""
L 472 471 0 TEXT "Labels" | 126974,258272 1 0 0 "wb_addr[7:0]"
I 473 0 2 Builtin OutPort | 121470,234129 "" ""
L 474 473 0 TEXT "Labels" | 127470,234129 1 0 0 "wb_we"
I 475 0 2 Builtin OutPort | 121470,239089 "" ""
L 476 475 0 TEXT "Labels" | 127470,239089 1 0 0 "wb_stb"
I 477 0 130 Builtin OutPort | 121232,248761 "" ""
L 478 477 0 TEXT "Labels" | 127232,248761 1 0 0 "wb_data_o[7:0]"
I 479 0 130 Builtin InPort | 123454,253473 "" ""
W 1038 6 0 720 433 BEZIER "Transitions" | 151135,45004 155102,52249 162483,64635 166392,74065\
170302,83495 178008,106725 179186,115810 180365,124895\
177375,138005 173637,142777 169900,147550 157940,153530\
151960,155628 145980,157727 134020,160143 127752,160516\
121485,160890 108375,159970 101791,158619 95208,157268\
81982,152782 77382,150885 72783,148988 67607,145882\
66112,143180 64618,140478 64050,134541 63648,130689
W 1037 6 0 718 433 BEZIER "Transitions" | 150688,63120 155058,71055 164610,84875 167542,91343\
170475,97812 173465,107818 173752,113539 174040,119260\
172200,132140 168232,137430 164265,142720 150235,151000\
142731,153328 135228,155657 119242,156693 111940,156060\
104638,155428 91412,151862 85806,150022 80200,148183\
71000,144387 68441,141886 65883,139385 64872,133700\
64355,130595
W 1036 6 0 716 433 BEZIER "Transitions" | 151320,81438 156092,86728 164898,96490 166766,103016\
168635,109542 166565,125068 162482,131651 158400,138235\
144140,149045 136464,151287 128788,153530 112342,151690\
104292,150051 96243,148413 80487,143697 75600,140995\
70713,138293 67816,133136 65919,130089
A 1035 1034 16 TEXT "Actions" | 80424,187044 1 0 0 "dataSeq <= ~dataSeq;"
W 1034 977 2 978 981 BEZIER "Transitions" | 42955,232907 83215,182582 159578,85633 199838,35308
C 1033 1032 0 TEXT "Conditions" | 57366,41559 1 0 0 "epStatus[`SC_DATA_SEQUENCE_BIT] != dataSeq"
W 1032 977 1 978 981 BEZIER "Transitions" | 38745,231423 38287,184264 37373,91174 37832,66585\
38291,41997 41044,37959 61641,36858 82239,35758\
160011,35491 199830,35308
W 1031 977 0 980 978 BEZIER "Transitions" | 37800,266189 37891,260042 38628,250536 38719,244389
A 1030 1028 16 TEXT "Actions" | 158488,238316 1 0 0 "wb_stb <= 1'b0;"
C 1029 1028 0 TEXT "Conditions" | 145614,251518 1 0 0 "wb_ack == 1'b1"
W 1028 443 0 1023 576 BEZIER "Transitions" | 139970,250901 147637,245530 161973,235323 166319,229419\
170665,223515 172715,210641 168533,207443 164351,204245\
145573,204327 132535,204306 119497,204286 86123,204122\
77574,203220 69026,202318 68206,198874 67898,196639\
67591,194405 67341,190212 67136,187465
A 1027 1024 16 TEXT "Actions" | 106992,243728 1 0 0 "wb_stb <= 1'b0;"
C 1026 1024 0 TEXT "Conditions" | 82966,232330 1 0 0 "wb_ack == 1'b1"
A 1025 1023 4 TEXT "Actions" | 134708,273248 1 0 0 "wb_addr <= `RA_EP0_RX_FIFO_CONTROL_REG;\nwb_data_o <= 8'h01; //force rx fifo empty\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
W 1024 443 0 579 1023 BEZIER "Transitions" | 72756,231983 81981,232721 99735,234626 105454,239197\
111174,243769 115602,260579 118287,264863 120973,269148\
127287,269476 129111,268287 130936,267098 131897,263328\
132389,260786
A 767 765 4 TEXT "Actions" | 70225,209519 1 0 0 "wb_stb <= 1'b1;"
L 766 765 0 TEXT "State Labels" | 56657,204219 1 0 0 "DAT1\n/22/"
S 765 757 102400 ELLIPSE "States" | 56657,204219 6500 6500
W 764 721 2 737 756 BEZIER "Transitions" | 46780,251089 53551,251180 63542,250698 70313,250789
I 761 757 0 Builtin Exit | 202344,34098
I 760 757 0 Builtin Entry | 38956,270702
H 757 756 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
S 756 721 98308 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 76764,249996 6500 6500
L 755 756 0 TEXT "State Labels" | 76764,249996 1 0 0 "GET_DATA"
C 754 753 0 TEXT "Conditions" | 58464,41925 1 0 0 "rxDataSize != 16'h0008"
W 753 721 1 737 725 BEZIER "Transitions" | 40052,244483 39320,194524 36870,96093 36824,69741\
36778,43389 38060,37899 58464,36663 78868,35428\
157772,35669 197940,35943
W 752 721 0 724 737 BEZIER "Transitions" | 38956,267030 39047,264377 39176,260043 39267,257390
L 480 479 0 TEXT "Labels" | 129454,253473 1 0 0 "wb_data_i[7:0]"
I 481 0 2 Builtin InPort | 123702,243801 "" ""
L 482 481 0 TEXT "Labels" | 129702,243801 1 0 0 "wb_ack"
L 483 484 0 TEXT "State Labels" | 46548,147798 1 0 0 "INIT"
S 484 6 221188 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 46548,147798 6500 6500
H 485 484 0 RECT 0,0,0 0 0 1 255,255,255 0 | 28400,28400 212900,276400
S 486 485 0 ELLIPSE "States" | 58746,236352 6500 6500
L 487 486 0 TEXT "State Labels" | 58746,236352 1 0 0 "RST\n/0/"
I 488 485 0 Builtin Entry | 38008,268952
I 489 485 0 Builtin Exit | 156088,64010
L 494 495 0 TEXT "Labels" | 94710,263444 1 0 0 "initComplete"
I 495 0 2 Builtin OutPort | 88710,263444 "" ""
I 1051 0 130 Builtin Signal | 121948,219040 "" ""
L 1050 1051 0 TEXT "Labels" | 124948,219040 1 0 0 "cnt[7:0]"
A 1049 1043 4 TEXT "Actions" | 45197,183834 1 0 0 "cnt <= cnt + 1'b1;"
C 1048 1047 0 TEXT "Conditions" | 34477,205359 1 0 0 "cnt == `ONE_USEC_DEL"
W 1047 650 0 1043 660 BEZIER "Transitions" | 43925,196399 47927,198791 53798,199463 57386,199578\
60974,199693 71650,197679 74824,195517
A 1046 1045 16 TEXT "Actions" | 41999,121018 1 0 0 "cnt <= 8'h00;"
W 1045 650 2 675 1043 BEZIER "Transitions" | 72197,56437 63273,75619 43922,112763 40242,129369\
36562,145975 36145,172368 37709,186398
L 1044 1043 0 TEXT "State Labels" | 38481,192850 1 0 0 "DEL\n/43/"
S 1043 650 192512 ELLIPSE "States" | 38481,192850 6500 6500
W 783 757 0 786 792 BEZIER "Transitions" | 60573,120171 60732,116620 61546,98364 61489,94649
C 782 780 0 TEXT "Conditions" | 60690,157992 1 0 0 "wb_ack == 1'b1"
A 781 780 16 TEXT "Actions" | 62006,151938 1 0 0 "wb_stb <= 1'b0;\nbRequest = wb_data_i;"
W 780 757 0 777 786 BEZIER "Transitions" | 58917,159547 59076,155996 60183,136852 60126,133137
L 779 777 0 TEXT "State Labels" | 58634,166039 1 0 0 "DAT2\n/24/"
A 778 777 4 TEXT "Actions" | 72202,171339 1 0 0 "wb_stb <= 1'b1;"
S 777 757 110592 ELLIPSE "States" | 58634,166039 6500 6500
C 776 775 0 TEXT "Conditions" | 54808,221840 1 0 0 "wbBusGnt == 1'b1"
W 775 757 0 772 765 BEZIER "Transitions" | 56181,226593 56273,221349 56243,215939 56335,210695
A 774 773 16 TEXT "Actions" | 44422,267415 1 0 0 "wbBusReq <= 1'b1;\ntxDataSize <= 8'h00; \ntxPacketRemSize <= 8'h00; //default tx packet size\ndataSeq <= 1'b1;\nwb_addr <= `RA_EP0_RX_FIFO_DATA_REG;\nwb_we <= 1'b0;"
W 773 757 0 760 772 BEZIER "Transitions" | 43188,270702 46684,266746 51543,244896 53318,238645
S 772 757 106496 ELLIPSE "States" | 56648,233064 6500 6500
L 771 772 0 TEXT "State Labels" | 56648,233064 1 0 0 "WT_GNT\n/23/"
A 770 768 16 TEXT "Actions" | 60029,189673 1 0 0 "wb_stb <= 1'b0;\nbm_req_dir <= wb_data_i[7]; \nbm_req_type <= wb_data_i[6:5]; \nbm_req_recp <= wb_data_i[4:0];"
C 769 768 0 TEXT "Conditions" | 58713,196251 1 0 0 "wb_ack == 1'b1"
W 768 757 0 765 777 BEZIER "Transitions" | 56940,197727 57099,194176 58282,176236 58225,172521
L 496 497 0 TEXT "Labels" | 94710,259022 1 0 0 "wbBusReq"
I 497 0 2 Builtin OutPort | 88710,259022 "" ""
L 498 499 0 TEXT "Labels" | 96921,254399 1 0 0 "wbBusGnt"
I 499 0 2 Builtin InPort | 90921,254399 "" ""
A 500 486 4 TEXT "Actions" | 75308,243696 1 0 0 "wb_addr <= `RA_HOST_SLAVE_MODE;\nwb_data_o <= 8'h2; //reset usbHostSlave\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
L 501 502 0 TEXT "State Labels" | 58136,258112 1 0 0 "WT_GNT\n/1/"
S 502 485 4096 ELLIPSE "States" | 58136,258112 6500 6500
A 504 502 4 TEXT "Actions" | 75944,259808 1 0 0 "wbBusReq <= 1'b1;"
W 505 485 0 502 486 BEZIER "Transitions" | 58015,251659 58068,249115 58169,245370 58222,242826
C 506 505 0 TEXT "Conditions" | 60256,250056 1 0 0 "wbBusGnt == 1'b1"
L 507 508 0 TEXT "State Labels" | 58984,207868 1 0 0 "WT_RST\n/2/"
S 508 485 8192 ELLIPSE "States" | 58984,207868 6500 6500
W 509 485 0 486 508 BEZIER "Transitions" | 58314,229881 58367,226701 58553,217874 58520,214346
C 510 509 0 TEXT "Conditions" | 35664,229916 1 0 0 "wb_ack == 1'b1"
A 511 509 16 TEXT "Actions" | 35028,223980 1 0 0 "wb_stb <= 1'b0;\ncnt <= 8'h00;"
W 1040 6 0 100 484 BEZIER "Transitions" | 106850,189787 92302,180454 66213,161139 51665,151806
W 1041 6 0 484 433 BEZIER "Transitions" | 49584,142052 52512,138026 55866,133075 58794,129049
A 1042 100 4 TEXT "Actions" | 169432,209270 1 0 0 "initComplete <= 1'b0;\nwbBusReq <= 1'b0;\nwb_addr <= 8'h00;\nwb_data_o <= 8'h00;\nwb_stb <= 1'b0;\nwb_we <= 1'b0;\ntxPacketRemSize <= 8'h00;\ntxDataSize <= 8'h00;\ntxDataIndex <= 8'h00;\nepTransType <= 8'h00;\nepStatus <= 8'h00;\nrxDataSize <= 16'h0000;\ncnt <= 8'h00;\nmemRdEn <= 1'b0;\nmemAddr <= 8'h00;\nupdateUSBAddress <= 1'b0;\ntransDone <= 1'b0;\nbm_req_type <= 2'b00;\nbm_req_dir <= 1'b0;\nbm_req_recp <= 5'b00000;\nbRequest <= 8'h00;\nwLength <= 16'h0000;\nwIndex <= 16'h0000;\nwValue <= 16'h0000;\ndataSeq <= 1'b0;\nUSBAddress <= 8'h00;"
L 1052 1053 0 TEXT "Labels" | 167321,261694 1 0 0 "memRdEn"
I 1053 0 2 Builtin OutPort | 161321,261694 "" ""
L 1054 1055 0 TEXT "Labels" | 167321,256622 1 0 0 "memAddr[7:0]"
I 1055 0 130 Builtin OutPort | 161321,256622 "" ""
W 799 757 0 796 814 BEZIER "Transitions" | 140099,213919 140258,210368 142700,190140 142643,186425
L 798 796 0 TEXT "State Labels" | 139816,220411 1 0 0 "DAT6\n/27/"
A 797 796 4 TEXT "Actions" | 153384,225711 1 0 0 "wb_stb <= 1'b1;"
S 796 757 122880 ELLIPSE "States" | 139816,220411 6500 6500
W 795 757 0 802 796 BEZIER "Transitions" | 139731,252375 139890,248824 140629,230581 140572,226866
A 794 792 4 TEXT "Actions" | 74226,93507 1 0 0 "wb_stb <= 1'b1;"
L 793 792 0 TEXT "State Labels" | 60658,88207 1 0 0 "DAT4\n/26/"
S 792 757 118784 ELLIPSE "States" | 60658,88207 6500 6500
A 788 786 4 TEXT "Actions" | 73858,131963 1 0 0 "wb_stb <= 1'b1;"
L 787 786 0 TEXT "State Labels" | 60290,126663 1 0 0 "DAT3\n/25/"
S 786 757 114688 ELLIPSE "States" | 60290,126663 6500 6500
A 785 783 16 TEXT "Actions" | 63662,112637 1 0 0 "wb_stb <= 1'b0;\nwValue[7:0] <= wb_data_i;"
C 784 783 0 TEXT "Conditions" | 62346,118634 1 0 0 "wb_ack == 1'b1"
W 512 485 0 488 502 BEZIER "Transitions" | 41718,268952 45852,267256 49710,264689 53844,262993
A 513 508 4 TEXT "Actions" | 69172,209968 1 0 0 "cnt <= cnt + 1'b1;"
L 514 515 0 TEXT "State Labels" | 60256,179460 1 0 0 "WT_VBUS\n/3/"
S 515 485 12288 ELLIPSE "States" | 60256,179460 6500 6500
A 518 515 4 TEXT "Actions" | 73824,187832 1 0 0 "wb_addr <= `RA_SC_LINE_STATUS_REG;\nwb_stb <= 1'b1;\nwb_we <= 1'b0;"
W 521 485 0 515 1085 BEZIER "Transitions" | 59880,172978 59605,170845 120032,158243 121840,151345
C 522 521 0 TEXT "Conditions" | 78034,171446 1 0 0 "(wb_ack == 1'b1) && (wb_data_i[`VBUS_PRES_BIT] == 1'b1)"
A 523 521 16 TEXT "Actions" | 94249,161439 1 0 0 "wb_stb <= 1'b0;"
S 524 485 16384 ELLIPSE "States" | 155702,93951 6500 6500
L 525 524 0 TEXT "State Labels" | 155702,93951 1 0 0 "FIN\n/4/"
W 526 485 0 524 489 BEZIER "Transitions" | 155567,87487 155620,84307 156121,69428 156088,65900
L 1056 1057 0 TEXT "Labels" | 169398,251734 1 0 0 "memData[7:0]"
I 1057 0 130 Builtin InPort | 163398,251734 "" ""
L 1058 1059 0 TEXT "Labels" | 124776,224384 1 0 0 "localRst"
I 1059 0 2 Builtin Signal | 121776,224384 "" ""
L 1060 1061 0 TEXT "Labels" | 178925,227382 1 0 0 "updateUSBAddress"
I 1061 0 2 Builtin Signal | 175925,227382 "" ""
L 1062 1063 0 TEXT "Labels" | 42640,237190 1 0 0 "transDone"
I 1063 0 2 Builtin Signal | 39640,237190 "" ""
L 1064 1065 0 TEXT "Labels" | 42692,231800 1 0 0 "bm_req_type[1:0]"
I 1065 0 130 Builtin Signal | 39692,231800 "" ""
L 1066 1067 0 TEXT "Labels" | 42874,227432 1 0 0 "bm_req_dir"
I 1067 0 2 Builtin Signal | 39874,227432 "" ""
L 1068 1069 0 TEXT "Labels" | 42692,222518 1 0 0 "bm_req_recp[4:0]"
I 1069 0 130 Builtin Signal | 39692,222518 "" ""
L 1070 1071 0 TEXT "Labels" | 43056,217786 1 0 0 "bRequest[7:0]"
I 1071 0 130 Builtin Signal | 40056,217786 "" ""
L 815 814 0 TEXT "State Labels" | 142392,179931 1 0 0 "DAT7\n/30/"
S 814 757 135168 ELLIPSE "States" | 142392,179931 6500 6500
A 813 811 16 TEXT "Actions" | 145555,165828 1 0 0 "wb_stb <= 1'b0;\nwLength[7:0] <= wb_data_i;"
C 812 811 0 TEXT "Conditions" | 144402,171884 1 0 0 "wb_ack == 1'b1"
W 811 757 0 814 808 BEZIER "Transitions" | 142675,173439 142834,169888 143227,151667 143170,147952
A 810 808 4 TEXT "Actions" | 156328,146775 1 0 0 "wb_stb <= 1'b1;"
L 809 808 0 TEXT "State Labels" | 142760,141475 1 0 0 "DAT8\n/29/"
S 808 757 131072 ELLIPSE "States" | 142760,141475 6500 6500
W 807 757 0 808 820 BEZIER "Transitions" | 143043,134983 143202,131432 145225,104683 145168,100968
C 806 795 0 TEXT "Conditions" | 141488,250777 1 0 0 "wb_ack == 1'b1"
A 805 795 16 TEXT "Actions" | 142751,244567 1 0 0 "wb_stb <= 1'b0;\nwIndex[7:0] <= wb_data_i;"
L 804 802 0 TEXT "State Labels" | 139448,258867 1 0 0 "DAT5\n/28/"
A 803 802 4 TEXT "Actions" | 153016,264167 1 0 0 "wb_stb <= 1'b1;"
S 802 757 126976 ELLIPSE "States" | 139448,258867 6500 6500
C 801 799 0 TEXT "Conditions" | 141997,212219 1 0 0 "wb_ack == 1'b1"
A 800 799 16 TEXT "Actions" | 143749,205660 1 0 0 "wb_stb <= 1'b0;\nwIndex[15:8] <= wb_data_i;"
A 535 524 4 TEXT "Actions" | 174518,95411 1 0 0 "wbBusReq <= 1'b0;\ninitComplete <= 1'b1;"
C 536 526 0 TEXT "Conditions" | 155118,83142 1 0 0 "wbBusGnt == 1'b0"
L 1072 1073 0 TEXT "Labels" | 148434,218150 1 0 0 "wValue[15:0]"
I 1073 0 130 Builtin Signal | 145434,218150 "" ""
L 1074 1075 0 TEXT "Labels" | 148616,222882 1 0 0 "wIndex[15:0]"
I 1075 0 130 Builtin Signal | 145616,222882 "" ""
L 1076 1077 0 TEXT "Labels" | 148616,228342 1 0 0 "wLength[15:0]"
I 1077 0 130 Builtin Signal | 145616,228342 "" ""
L 1078 1079 0 TEXT "Labels" | 148798,233074 1 0 0 "dataSeq"
I 1079 0 2 Builtin Signal | 145798,233074 "" ""
L 1080 1081 0 TEXT "Labels" | 178414,233058 1 0 0 "USBAddress[7:0]"
I 1081 0 130 Builtin Signal | 175414,233058 "" ""
L 1084 1085 0 TEXT "State Labels" | 125040,145776 1 0 0 "CONN\n/45/"
S 1085 485 225280 ELLIPSE "States" | 124848,145584 6500 6500
A 1086 1085 4 TEXT "Actions" | 142800,149040 1 0 0 "wb_addr <= `RA_SC_CONTROL_REG;\nwb_data_o <= 8'h71; //connect to host, full speed\nwb_stb <= 1'b1;\nwb_we <= 1'b1;"
END
/design0/src/checkLineState.asf
0,0 → 1,93
VERSION=1.15
HEADER
FILE="checkLineState.asf"
FID=4788d213
LANGUAGE=VERILOG
ENTITY="checkLineState"
FRAMES=ON
FREEOID=1077
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// checkLineState.v ////\n//// ////\n//// This file is part of the usbHostSlave opencores effort.\n//// <http://www.opencores.org/cores//> ////\n//// ////\n//// Module Description: ////\n//// Checks USB line state. When reset state detected\n//// asserts usbRstDet for one clock tick\n//// usbRstDet is used to reset most of the logic.\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2008 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from <http://www.opencores.org/lgpl.shtml> ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`include \"timescale.v\"\n`include \"usbSlaveControl_h.v\"\n`include \"usbHostSlaveReg_define.v\"\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbDevice_define.v\""
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END

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