URL
https://opencores.org/ocsvn/utosnet/utosnet/trunk
Subversion Repositories utosnet
Compare Revisions
- This comparison shows the changes necessary to convert path
/utosnet/trunk/gateware/uTosNet_example/uTosNet_uart
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/uTosNet_uart_xc3s400an.ucf
File deleted
/top.vhd
5,6 → 5,7
-- Create Date: 19/03/2010 |
-- Design Name: uTosNet_uart Example |
-- Module Name: top - Behavioral |
-- File Name: top.vhd |
-- Project Name: uTosNet |
-- Target Devices: SDU XC3S50AN Board |
-- Tool versions: Xilinx ISE 11.4 |
14,7 → 15,25
-- Revision: |
-- Revision 0.10 - Initial release |
-- |
-- Copyright 2010 |
-- |
-- This file is part of the uTosNet_spi Example |
-- |
-- The uTosNet_uart Example is free software: you can redistribute it |
-- and/or modify it under the terms of the GNU Lesser General Public License as |
-- published by the Free Software Foundation, either version 3 of the License, |
-- or (at your option) any later version. |
-- |
-- The uTosNet_uart Example is distributed in the hope that it will be |
-- useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser |
-- General Public License for more details. |
-- |
-- You should have received a copy of the GNU Lesser General Public License |
-- along with the uTosNet_uart Example. If not, see |
-- <http://www.gnu.org/licenses/>. |
---------------------------------------------------------------------------------- |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.STD_LOGIC_ARITH.ALL; |
/uTosNet_uart.vhd
5,6 → 5,7
-- Create Date: 19/03/2010 |
-- Design Name: uTosNet |
-- Module Name: uTosNet_usb - Behavioral |
-- File Name: uTosNet_uart.vhd |
-- Project Name: uTosNet |
-- Target Devices: SDU XC3S50AN Board |
-- Tool versions: Xilinx ISE 11.4 |
38,7 → 39,22
-- Revision: |
-- Revision 0.10 - Initial release |
-- |
-- Copyright 2010 |
-- |
-- This module is free software: you can redistribute it and/or modify |
-- it under the terms of the GNU Lesser General Public License as published by |
-- the Free Software Foundation, either version 3 of the License, or |
-- (at your option) any later version. |
-- |
-- This module is distributed in the hope that it will be useful, |
-- but WITHOUT ANY WARRANTY; without even the implied warranty of |
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
-- GNU Lesser General Public License for more details. |
-- |
-- You should have received a copy of the GNU Lesser General Public License |
-- along with this module. If not, see <http://www.gnu.org/licenses/>. |
---------------------------------------------------------------------------------- |
|
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
use IEEE.STD_LOGIC_ARITH.ALL; |
/uTosNet_uart_xc3s50an.ucf
1,3 → 1,31
# |
# uTosNet_uart Example |
# |
# uTosNet_uart_xc3s50an.ucf |
# File created by: |
# Simon Falsig |
# University of Southern Denmark |
# Copyright 2010 |
# |
# This file is part of the uTosNet_uart Example |
# |
# The uTosNet_uart Example is free software: you can redistribute it |
# and/or modify it under the terms of the GNU Lesser General Public License as |
# published by the Free Software Foundation, either version 3 of the License, |
# or (at your option) any later version. |
# |
# The uTosNet_uart Example is distributed in the hope that it will be |
# useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser |
# General Public License for more details. |
# |
# You should have received a copy of the GNU Lesser General Public License |
# along with the uTosNet_uart Example. If not, see |
# <http://www.gnu.org/licenses/>. |
# |
|
|
|
NET "CLK_50M_I" LOC = P124; |
NET "CLK_50M_I" IOSTANDARD = LVTTL; |
NET "LEDS_O[0]" LOC = P10; |