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rtl/boot.mem Property changes : Deleted: svn:special ## -1 +0,0 ## -* \ No newline at end of property Index: rtl/notech/notech_reg_set.v =================================================================== --- rtl/notech/notech_reg_set.v (revision 117) +++ rtl/notech/notech_reg_set.v (nonexistent) @@ -1,6 +0,0 @@ -module notech_reg_set (CP,SD,D,Q); -input CP,SD,D; -output reg Q; -always @(posedge CP or negedge SD) if (SD==0) Q <= 1; else Q<=D; -endmodule - Index: rtl/notech/notech_xor2.v =================================================================== --- rtl/notech/notech_xor2.v (revision 117) +++ rtl/notech/notech_xor2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_xor2 (A,B,Z); -input A,B; -output Z; -assign Z=A^B; -endmodule Index: rtl/notech/notech_mux2.v =================================================================== --- rtl/notech/notech_mux2.v (revision 117) +++ rtl/notech/notech_mux2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_mux2 (A,B,Z,S); -input A,B,S; -output Z; -assign Z = S ? B: A; -endmodule Index: rtl/notech/notech_inv.v =================================================================== --- rtl/notech/notech_inv.v (revision 117) +++ rtl/notech/notech_inv.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_inv (A,Z); -input A; -output Z; -assign Z=~A; -endmodule Index: rtl/notech/notech_mux4.v =================================================================== --- rtl/notech/notech_mux4.v (revision 117) +++ rtl/notech/notech_mux4.v (nonexistent) @@ -1,8 +0,0 @@ -module notech_mux4 (S0,S1,A,B,C,D,Z); -input S0,S1,A,B,C,D; -output Z; -wire int1,int2; -assign int1 = S0 ? B:A; -assign int2 = S0 ? D:C; -assign Z=S1 ? int2 : int1; -endmodule Index: rtl/notech/notech_nao3.v =================================================================== --- rtl/notech/notech_nao3.v (revision 117) +++ rtl/notech/notech_nao3.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nao3 (A,B,C,Z); -input A,B,C; -output Z; -assign Z=~(A&B&~C); -endmodule Index: rtl/notech/notech_nao4.v =================================================================== --- rtl/notech/notech_nao4.v (revision 117) +++ rtl/notech/notech_nao4.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nao4 (A,B,C,D,Z); -input A,B,C,D; -output Z; -assign Z=~((A|B)&(D|C)); -endmodule Index: rtl/notech/notech_nand2.v =================================================================== --- rtl/notech/notech_nand2.v (revision 117) +++ rtl/notech/notech_nand2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nand2 (A,B,Z); -input A,B; -output Z; -assign Z=~(A&B); -endmodule Index: rtl/notech/notech_or2.v =================================================================== --- rtl/notech/notech_or2.v (revision 117) +++ rtl/notech/notech_or2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_or2 (A,B,Z); -input A,B; -output Z; -assign Z=A|B; -endmodule Index: rtl/notech/notech_nand3.v =================================================================== --- rtl/notech/notech_nand3.v (revision 117) +++ rtl/notech/notech_nand3.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nand3 (A,B,C,Z); -input A,B,C; -output Z; -assign Z=~(A&B&C); -endmodule Index: rtl/notech/notech_or4.v =================================================================== --- rtl/notech/notech_or4.v (revision 117) +++ rtl/notech/notech_or4.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_or4 (A,B,C,D,Z); -input A,B,C,D; -output Z; -assign Z=(A|B)|(D|C); -endmodule Index: rtl/notech/notech_fa2.v =================================================================== --- rtl/notech/notech_fa2.v (revision 117) +++ rtl/notech/notech_fa2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_fa2 (A,B,Z,CI,CO); -input A,B,CI; -output Z,CO; -assign {CO,Z}=A+B+CI; -endmodule Index: rtl/notech/notech_ha2.v =================================================================== --- rtl/notech/notech_ha2.v (revision 117) +++ rtl/notech/notech_ha2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_ha2 (A,B,Z,CO); -input A,B; -output Z,CO; -assign {CO,Z}=A+B; -endmodule Index: rtl/notech/notech_reg.v =================================================================== --- rtl/notech/notech_reg.v (revision 117) +++ rtl/notech/notech_reg.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_reg (CP,CD,D,Q); -input CP,CD,D; -output reg Q; -always @(posedge CP or negedge CD) if (CD==0) Q <= 0; else Q<=D; -endmodule Index: rtl/notech/notech_nor2.v =================================================================== --- rtl/notech/notech_nor2.v (revision 117) +++ rtl/notech/notech_nor2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nor2 (A,B,Z); -input A,B; -output Z; -assign Z=~(A|B); -endmodule Index: rtl/notech/notech_ao3.v =================================================================== --- rtl/notech/notech_ao3.v (revision 117) +++ rtl/notech/notech_ao3.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_ao3 (A,B,C,Z); -input A,B,C; -output Z; -assign Z=A&B&~C; -endmodule Index: rtl/notech/notech_nor4.v =================================================================== --- rtl/notech/notech_nor4.v (revision 117) +++ rtl/notech/notech_nor4.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_nor4 (A,B,C,D,Z); -input A,B,C,D; -output Z; -assign Z=~((A|B)|(D|C)); -endmodule Index: rtl/notech/notech_ao4.v =================================================================== --- rtl/notech/notech_ao4.v (revision 117) +++ rtl/notech/notech_ao4.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_ao4 (A,B,C,D,Z); -input A,B,C,D; -output Z; -assign Z=(A|B)&(D|C); -endmodule Index: rtl/notech/notech_and2.v =================================================================== --- rtl/notech/notech_and2.v (revision 117) +++ rtl/notech/notech_and2.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_and2 (A,B,Z); -input A,B; -output Z; -assign Z=A&B; -endmodule Index: rtl/notech/notech_and3.v =================================================================== --- rtl/notech/notech_and3.v (revision 117) +++ rtl/notech/notech_and3.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_and3 (A,B,C,Z); -input A,B,C; -output Z; -assign Z=A&B&C; -endmodule Index: rtl/notech/notech_and4.v =================================================================== --- rtl/notech/notech_and4.v (revision 117) +++ rtl/notech/notech_and4.v (nonexistent) @@ -1,5 +0,0 @@ -module notech_and4 (A,B,C,D,Z); -input A,B,C,D; -output Z; -assign Z=A&B&C&D; -endmodule Index: rtl/arithbox.v =================================================================== --- rtl/arithbox.v (revision 117) +++ rtl/arithbox.v (nonexistent) @@ -1,54 +0,0 @@ -/* verilator lint_off WIDTH */ -/* verilator lint_off UNUSED */ -/* verilator lint_off COMBDLY */ - -module arithbox (arithop,calc_sz,ci,co,af,ai,sa,sb,opa,opb,resa,cmp); - -input [3:0] arithop; -input [3:0] calc_sz; -input [31:0] opa,opb; -output reg [31:0] resa; -input ci,ai; -output reg co,af,sa,sb,cmp; - -wire [4:0] af2,af3,af4,af5; - -assign af2 = opa[3:0]+opb[3:0]; -assign af3 = opa[3:0]+opb[3:0]+ci; -assign af4 = opa[3:0]-opb[3:0]; -assign af5 = opa[3:0]-opb[3:0]-ci; - -always @(*) - case (arithop) - 4'b0000 : if (calc_sz==4) begin {co,resa[31:0]} <= opa[31:0] + opb[31:0]; sa<=opa[31]; sb<=opb[31]; af <= af2[4]; cmp <=0; end else - if (calc_sz==2) begin {co,resa[15:0]} <= opa[15:0] + opb[15:0]; sa<=opa[15]; sb<=opb[15]; af <= af2[4]; resa[31:16] <= opa[31:16]; cmp <=0; end else - begin {co,resa[ 7:0]} <= opa[ 7:0] + opb[ 7:0]; sa<=opa[ 7]; sb<=opb[ 7]; af <= af2[4]; resa[31: 8] <= opa[31: 8]; cmp <=0; end // add - - 4'b0001 : begin resa[31:0] <= opa[31:0] | opb[31:0]; sa<= 1 ; sb<= 0 ; af <= ai ; co <= 0; cmp <=0; end // or - - 4'b0010 : if (calc_sz==4) begin {co,resa[31:0]} <= opa[31:0] + opb[31:0] + ci; sa<=opa[31]; sb<=opb[31]; af <= af3[4]; cmp <=0; end else - if (calc_sz==2) begin {co,resa[15:0]} <= opa[15:0] + opb[15:0] + ci; sa<=opa[15]; sb<=opb[15]; af <= af3[4]; resa[31:16] <= opa[31:16]; cmp <=0; end else - begin {co,resa[ 7:0]} <= opa[ 7:0] + opb[ 7:0] + ci; sa<=opa[ 7]; sb<=opb[ 7]; af <= af3[4]; resa[31: 8] <= opa[31: 8]; cmp <=0; end // adc - - 4'b0011 : if (calc_sz==4) begin {co,resa[31:0]} <= opa[31:0] - opb[31:0] - ci; sa<=opa[31]; sb<=~opb[31];af <= af5[4]; cmp <=0; end else - if (calc_sz==2) begin {co,resa[15:0]} <= opa[15:0] - opb[15:0] - ci; sa<=opa[15]; sb<=~opb[15];af <= af5[4]; resa[31:16] <= opa[31:16]; cmp <=0; end else - begin {co,resa[ 7:0]} <= opa[ 7:0] - opb[ 7:0] - ci; sa<=opa[ 7]; sb<=~opb[ 7];af <= af5[4]; resa[31: 8] <= opa[31: 8]; cmp <=0; end // sbc & cmp - - 4'b0100 : begin resa[31:0] <= opa[31:0] & opb[31:0]; sa<=1 ; sb<= 0 ; af <= ai ; co <= 0; cmp <= 0; end // and - - 4'b0111 : begin - if (calc_sz==4) begin {co,resa[31:0]} <= opa[31:0] - opb[31:0]; sa<=opa[31]; sb<=~opb[31]; af <= af4[4]; cmp <=1; end else - if (calc_sz==2) begin {co,resa[15:0]} <= opa[15:0] - opb[15:0]; sa<=opa[15]; sb<=~opb[15]; af <= af4[4]; cmp <=1; resa[31:16] <= opa[31:16]; end else - begin {co,resa[ 7:0]} <= opa[ 7:0] - opb[ 7:0]; sa<=opa[ 7]; sb<=~opb[ 7]; af <= af4[4]; cmp <=1; resa[31: 8] <= opa[31: 8]; end // sub - end - - 4'b0101 : if (calc_sz==4) begin {co,resa[31:0]} <= opa[31:0] - opb[31:0]; sa<=opa[31]; sb<=~opb[31]; af <= af4[4]; cmp <=0; end else - if (calc_sz==2) begin {co,resa[15:0]} <= opa[15:0] - opb[15:0]; sa<=opa[15]; sb<=~opb[15]; af <= af4[4]; cmp <=0; resa[31:16] <= opa[31:16]; end else - begin {co,resa[ 7:0]} <= opa[ 7:0] - opb[ 7:0]; sa<=opa[ 7]; sb<=~opb[ 7]; af <= af4[4]; cmp <=0; resa[31: 8] <= opa[31: 8]; end // sub - - 4'b0110 : begin resa[31:0] <= opa[31:0] ^ opb[31:0]; sa<= 1 ; sb<= 0 ; af <= ai; co <= 0; cmp <=0; end // xor - default : begin resa[31:0] <= opa[31:0] ; sa <= 0 ; sb<= 0 ; af <= ai; co <= ci; cmp <=1; end - endcase - - -endmodule Index: rtl/v8042_stub.v =================================================================== --- rtl/v8042_stub.v (revision 117) +++ rtl/v8042_stub.v (nonexistent) @@ -1,17 +0,0 @@ -module v8042( -input rst_n, -input clk, -input [2:0] io_address, -input io_read, -input io_write, -input [7:0] io_writedata, -output [7:0] io_readdata, - -input ps2data, -output ps2clk -); - -assign ps2clk = 0; -assign io_readdata = 8'h42; - -endmodule Index: rtl/clk_wiz_0.v =================================================================== --- rtl/clk_wiz_0.v (revision 117) +++ rtl/clk_wiz_0.v (nonexistent) @@ -1,202 +0,0 @@ -// file: clk_wiz_0.v -// -// (c) Copyright 2008 - 2013 Xilinx, Inc. All rights reserved. -// -// This file contains confidential and proprietary information -// of Xilinx, Inc. and is protected under U.S. and -// international copyright and other intellectual property -// laws. -// -// DISCLAIMER -// This disclaimer is not a license and does not grant any -// rights to the materials distributed herewith. Except as -// otherwise provided in a valid license issued to you by -// Xilinx, and to the maximum extent permitted by applicable -// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND -// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES -// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING -// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- -// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and -// (2) Xilinx shall not be liable (whether in contract or tort, -// including negligence, or under any other theory of -// liability) for any loss or damage of any kind or nature -// related to, arising under or in connection with these -// materials, including for any direct, or any indirect, -// special, incidental, or consequential loss or damage -// (including loss of data, profits, goodwill, or any type of -// loss or damage suffered as a result of any action brought -// by a third party) even if such damage or loss was -// reasonably foreseeable or Xilinx had been advised of the -// possibility of the same. -// -// CRITICAL APPLICATIONS -// Xilinx products are not designed or intended to be fail- -// safe, or for use in any application requiring fail-safe -// performance, such as life-support or safety devices or -// systems, Class III medical devices, nuclear facilities, -// applications related to the deployment of airbags, or any -// other applications that could lead to death, personal -// injury, or severe property or environmental damage -// (individually and collectively, "Critical -// Applications"). Customer assumes the sole risk and -// liability of any use of Xilinx products in Critical -// Applications, subject only to applicable laws and -// regulations governing limitations on product liability. -// -// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS -// PART OF THIS FILE AT ALL TIMES. -// -//---------------------------------------------------------------------------- -// User entered comments -//---------------------------------------------------------------------------- -// None -// -//---------------------------------------------------------------------------- -// Output Output Phase Duty Cycle Pk-to-Pk Phase -// Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps) -//---------------------------------------------------------------------------- -// CLK_OUT1____50.000______0.000______50.0______151.636_____98.575 -// CLK_OUT2____25.000______0.000______50.0______175.402_____98.575 -// CLK_OUT3___200.000______0.000______50.0______114.829_____98.575 -// -//---------------------------------------------------------------------------- -// Input Clock Freq (MHz) Input Jitter (UI) -//---------------------------------------------------------------------------- -// __primary_________100.000____________0.010 - -`timescale 1ps/1ps - -module clk_wiz_0 - (// Clock in ports - input clk_in1, - // Clock out ports - output clk_out1, - output clk_out2, - output clk_out3, - // Status and control signals - output locked - ); - - // Input buffering - //------------------------------------ - IBUF clkin1_ibufg - (.O (clk_in1_clk_wiz_0), - .I (clk_in1)); - - - - // Clocking PRIMITIVE - //------------------------------------ - // Instantiation of the MMCM PRIMITIVE - // * Unused inputs are tied off - // * Unused outputs are labeled unused - wire [15:0] do_unused; - wire drdy_unused; - wire psdone_unused; - wire locked_int; - wire clkfbout_clk_wiz_0; - wire clkfbout_buf_clk_wiz_0; - wire clkfboutb_unused; - wire clkout0b_unused; - wire clkout1b_unused; - wire clkout2b_unused; - wire clkout3_unused; - wire clkout3b_unused; - wire clkout4_unused; - wire clkout5_unused; - wire clkout6_unused; - wire clkfbstopped_unused; - wire clkinstopped_unused; - - MMCME2_ADV - #(.BANDWIDTH ("OPTIMIZED"), - .CLKOUT4_CASCADE ("FALSE"), - .COMPENSATION ("ZHOLD"), - .STARTUP_WAIT ("FALSE"), - .DIVCLK_DIVIDE (1), - .CLKFBOUT_MULT_F (10.000), - .CLKFBOUT_PHASE (0.000), - .CLKFBOUT_USE_FINE_PS ("FALSE"), - .CLKOUT0_DIVIDE_F (10.000), - .CLKOUT0_PHASE (0.000), - .CLKOUT0_DUTY_CYCLE (0.500), - .CLKOUT0_USE_FINE_PS ("FALSE"), - .CLKOUT1_DIVIDE (40), - .CLKOUT1_PHASE (0.000), - .CLKOUT1_DUTY_CYCLE (0.500), - .CLKOUT1_USE_FINE_PS ("FALSE"), - .CLKOUT2_DIVIDE (5), - .CLKOUT2_PHASE (0.000), - .CLKOUT2_DUTY_CYCLE (0.500), - .CLKOUT2_USE_FINE_PS ("FALSE"), - .CLKIN1_PERIOD (10.0)) - mmcm_adv_inst - // Output clocks - ( - .CLKFBOUT (clkfbout_clk_wiz_0), - .CLKFBOUTB (clkfboutb_unused), - .CLKOUT0 (clk_out1_clk_wiz_0), - .CLKOUT0B (clkout0b_unused), - .CLKOUT1 (clk_out2_clk_wiz_0), - .CLKOUT1B (clkout1b_unused), - .CLKOUT2 (clk_out3_clk_wiz_0), - .CLKOUT2B (clkout2b_unused), - .CLKOUT3 (clkout3_unused), - .CLKOUT3B (clkout3b_unused), - .CLKOUT4 (clkout4_unused), - .CLKOUT5 (clkout5_unused), - .CLKOUT6 (clkout6_unused), - // Input clock control - .CLKFBIN (clkfbout_buf_clk_wiz_0), - .CLKIN1 (clk_in1_clk_wiz_0), - .CLKIN2 (1'b0), - // Tied to always select the primary input clock - .CLKINSEL (1'b1), - // Ports for dynamic reconfiguration - .DADDR (7'h0), - .DCLK (1'b0), - .DEN (1'b0), - .DI (16'h0), - .DO (do_unused), - .DRDY (drdy_unused), - .DWE (1'b0), - // Ports for dynamic phase shift - .PSCLK (1'b0), - .PSEN (1'b0), - .PSINCDEC (1'b0), - .PSDONE (psdone_unused), - // Other control and status signals - .LOCKED (locked_int), - .CLKINSTOPPED (clkinstopped_unused), - .CLKFBSTOPPED (clkfbstopped_unused), - .PWRDWN (1'b0), - .RST (1'b0)); - - - assign locked = locked_int; - - // Output buffering - //----------------------------------- - - BUFG clkf_buf - (.O (clkfbout_buf_clk_wiz_0), - .I (clkfbout_clk_wiz_0)); - - - - BUFG clkout1_buf - (.O (clk_out1), - .I (clk_out1_clk_wiz_0)); - - - BUFG clkout2_buf - (.O (clk_out2), - .I (clk_out2_clk_wiz_0)); - - BUFG clkout3_buf - (.O (clk_out3), - .I (clk_out3_clk_wiz_0)); - - - -endmodule Index: rtl/psram_axi.v =================================================================== --- rtl/psram_axi.v (revision 117) +++ rtl/psram_axi.v (nonexistent) @@ -1,6409 +0,0 @@ -/* verilator lint_off IMPLICIT */ -/* verilator lint_off UNDRIVEN */ -/* verilator lint_off UNUSED */ -/* verilator lint_off UNOPTFLAT */ - -module psram_axi(MEM_ADDR_OUT, MEM_CEN, MEM_OEN, MEM_WEN, MEM_BEN, MEM_ADV, MEM_CRE - , MEM_DATA_I, MEM_DATA_O, MEM_DATA_T, s00_axi_aclk, s00_axi_aresetn - , s00_axi_awid, s00_axi_awaddr, s00_axi_awlen, s00_axi_awsize, s00_axi_awburst - , s00_axi_awlock, s00_axi_awcache, s00_axi_awprot, s00_axi_awqos - , s00_axi_awregion, s00_axi_awuser, s00_axi_awvalid, s00_axi_awready - , s00_axi_wdata, s00_axi_wstrb, s00_axi_wlast, s00_axi_wuser, s00_axi_wvalid - , s00_axi_wready, s00_axi_bid, s00_axi_bresp, s00_axi_buser, s00_axi_bvalid - , s00_axi_bready, s00_axi_arid, s00_axi_araddr, s00_axi_arlen, s00_axi_arsize - , s00_axi_arburst, s00_axi_arlock, s00_axi_arcache, s00_axi_arprot - , s00_axi_arqos, s00_axi_arregion, s00_axi_aruser, s00_axi_arvalid - , s00_axi_arready, s00_axi_rid, s00_axi_rdata, s00_axi_rresp, s00_axi_rlast - , s00_axi_ruser, s00_axi_rvalid, s00_axi_rready); - - output [22:0] MEM_ADDR_OUT; - output MEM_CEN; - output MEM_OEN; - output MEM_WEN; - output [1:0] MEM_BEN; - output MEM_ADV; - output MEM_CRE; - input [15:0] MEM_DATA_I; - output [15:0] MEM_DATA_O; - output [15:0] MEM_DATA_T; - input s00_axi_aclk; - input s00_axi_aresetn; - input [1:0] s00_axi_awid; - input [23:0] s00_axi_awaddr; - input [7:0] s00_axi_awlen; - input [2:0] s00_axi_awsize; - input [1:0] s00_axi_awburst; - input s00_axi_awlock; - input [3:0] s00_axi_awcache; - input [2:0] s00_axi_awprot; - input [3:0] s00_axi_awqos; - input [3:0] s00_axi_awregion; - input [1:0] s00_axi_awuser; - input s00_axi_awvalid; - output s00_axi_awready; - input [31:0] s00_axi_wdata; - input [3:0] s00_axi_wstrb; - input s00_axi_wlast; - input [1:0] s00_axi_wuser; - input s00_axi_wvalid; - output s00_axi_wready; - output [1:0] s00_axi_bid; - output [1:0] s00_axi_bresp; - output [1:0] s00_axi_buser; - output s00_axi_bvalid; - input s00_axi_bready; - input [1:0] s00_axi_arid; - input [23:0] s00_axi_araddr; - input [7:0] s00_axi_arlen; - input [2:0] s00_axi_arsize; - input [1:0] s00_axi_arburst; - input s00_axi_arlock; - input [3:0] s00_axi_arcache; - input [2:0] s00_axi_arprot; - input [3:0] s00_axi_arqos; - input [3:0] s00_axi_arregion; - input [1:0] s00_axi_aruser; - input s00_axi_arvalid; - output s00_axi_arready; - output [1:0] s00_axi_rid; - output [31:0] s00_axi_rdata; - output [1:0] s00_axi_rresp; - output s00_axi_rlast; - output [1:0] s00_axi_ruser; - output s00_axi_rvalid; - input s00_axi_rready; - - wire [8:0] i_psram_sub_AsyncPSRAMinst_ce_cycle_counter; - wire [6:0] i_psram_sub_AsyncPSRAMinst_waitcount; - wire [18:0] i_psram_sub_AsyncPSRAMinst_last_page_read; - wire [1:0] i_psram_sub_AsyncPSRAMinst_state; - wire [6:0] i_psram_sub_AsyncPSRAMinst_cycle_time; - wire [1:0] i_psram_sub_mem_byte_en; - wire [22:0] i_psram_sub_mem_addr; - wire [23:0] i_psram_sub_axi_awaddr; - wire [23:0] i_psram_sub_axi_araddr; - wire [15:0] i_psram_sub_mem_data_wr; - wire [23:0] i_psram_sub_function_sub; - wire [23:0] i_psram_sub_function_sub_0; - wire [22:0] i_psram_sub_function_plus_2; - wire [7:0] i_psram_sub_axi_awlen; - wire [7:0] i_psram_sub_axi_awlen_cntr; - wire [7:0] i_psram_sub_axi_arlen; - wire [7:0] i_psram_sub_axi_arlen_cntr; - wire [2:0] i_psram_sub_state; - wire [2:0] i_psram_sub_state_5; - wire \MEM_DATA_T[0] ; - - assign s00_axi_buser[1] = 1'b0; - assign s00_axi_buser[0] = 1'b0; - assign s00_axi_ruser[1] = 1'b0; - assign s00_axi_ruser[0] = 1'b0; - - assign s00_axi_rid[0] = s00_axi_arid[0]; - assign s00_axi_rid[1] = s00_axi_arid[1]; - assign s00_axi_bid[0] = s00_axi_awid[0]; - assign s00_axi_bid[1] = s00_axi_awid[1]; - assign MEM_DATA_T[15] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[14] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[13] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[12] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[11] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[10] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[9] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[8] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[7] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[6] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[5] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[4] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[3] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[2] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[1] = \MEM_DATA_T[0] ; - assign MEM_DATA_T[0] = \MEM_DATA_T[0] ; - - notech_inv i_02687(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[0]), .Z - (i_psram_sub_AsyncPSRAMinst_n_107)); - notech_nand2 i_12686(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[0]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[1]), .Z(n_55)); - notech_nand2 i_22685(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[1]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[2]), .Z(n_56)); - notech_nand2 i_32684(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[2]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[3]), .Z(n_57)); - notech_nand2 i_42683(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[3]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[4]), .Z(n_58)); - notech_nand2 i_52682(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[4]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[5]), .Z(n_59)); - notech_nand2 i_62681(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[5]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[6]), .Z(n_60)); - notech_nand2 i_72680(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[6]), - .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[7]), .Z(n_61)); - notech_inv i_92679(.A(i_psram_sub_AsyncPSRAMinst_n_107), .Z(n_63)); - notech_inv i_102678(.A(n_55), .Z(n_100)); - notech_nor2 i_112677(.A(i_psram_sub_AsyncPSRAMinst_n_107), .B(n_56), .Z(n_65 - )); - notech_nor2 i_122676(.A(n_55), .B(n_57), .Z(n_66)); - notech_nor2 i_132675(.A(n_56), .B(n_58), .Z(n_67)); - notech_nor2 i_142674(.A(n_57), .B(n_59), .Z(n_68)); - notech_nor2 i_152673(.A(n_58), .B(n_60), .Z(n_69)); - notech_nor2 i_162672(.A(n_59), .B(n_61), .Z(n_70)); - notech_nand2 i_222671(.A(n_63), .B(n_67), .Z(n_76)); - notech_nand2 i_232670(.A(n_100), .B(n_68), .Z(n_77)); - notech_nand2 i_242669(.A(n_65), .B(n_69), .Z(n_78)); - notech_nand2 i_252668(.A(n_66), .B(n_70), .Z(n_79)); - notech_inv i_312667(.A(n_76), .Z(n_85)); - notech_inv i_322666(.A(n_77), .Z(n_86)); - notech_inv i_332665(.A(n_78), .Z(n_87)); - notech_inv i_342664(.A(n_79), .Z(n_108)); - notech_xor2 i_372663(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[1]), - .B(n_63), .Z(i_psram_sub_AsyncPSRAMinst_n_108)); - notech_xor2 i_382662(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[2]), - .B(n_100), .Z(i_psram_sub_AsyncPSRAMinst_n_109)); - notech_xor2 i_392661(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[3]), - .B(n_65), .Z(i_psram_sub_AsyncPSRAMinst_n_110)); - notech_xor2 i_402660(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[4]), - .B(n_66), .Z(i_psram_sub_AsyncPSRAMinst_n_111)); - notech_xor2 i_412659(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[5]), - .B(n_85), .Z(i_psram_sub_AsyncPSRAMinst_n_112)); - notech_xor2 i_422658(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[6]), - .B(n_86), .Z(i_psram_sub_AsyncPSRAMinst_n_113)); - notech_xor2 i_432657(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[7]), - .B(n_87), .Z(i_psram_sub_AsyncPSRAMinst_n_114)); - notech_xor2 i_442656(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[8]), - .B(n_108), .Z(i_psram_sub_AsyncPSRAMinst_n_115)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2606(.A(i_psram_sub_command), .Z - (i_psram_sub_AsyncPSRAMinst_n_2970)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2605(.A(MEM_OEN), .Z(\MEM_DATA_T[0] - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2604(.A(MEM_CEN), .Z(i_psram_sub_AsyncPSRAMinst_n_2968 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2603(.A(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_2967 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2602(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [7]), .Z(i_psram_sub_AsyncPSRAMinst_n_2966)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2601(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [6]), .Z(i_psram_sub_AsyncPSRAMinst_n_2965)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2600(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2964)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2599(.A(MEM_ADDR_OUT[22]), .Z(i_psram_sub_AsyncPSRAMinst_n_2963 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2598(.A(MEM_ADDR_OUT[21]), .Z(i_psram_sub_AsyncPSRAMinst_n_2962 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2597(.A(MEM_ADDR_OUT[20]), .Z(i_psram_sub_AsyncPSRAMinst_n_2961 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2596(.A(MEM_ADDR_OUT[19]), .Z(i_psram_sub_AsyncPSRAMinst_n_2960 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2595(.A(MEM_ADDR_OUT[18]), .Z(i_psram_sub_AsyncPSRAMinst_n_2959 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2594(.A(MEM_ADDR_OUT[17]), .Z(i_psram_sub_AsyncPSRAMinst_n_2958 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2593(.A(MEM_ADDR_OUT[16]), .Z(i_psram_sub_AsyncPSRAMinst_n_2957 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2592(.A(MEM_ADDR_OUT[15]), .Z(i_psram_sub_AsyncPSRAMinst_n_2956 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2591(.A(MEM_ADDR_OUT[14]), .Z(i_psram_sub_AsyncPSRAMinst_n_2955 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2590(.A(MEM_ADDR_OUT[13]), .Z(i_psram_sub_AsyncPSRAMinst_n_2954 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2589(.A(MEM_ADDR_OUT[12]), .Z(i_psram_sub_AsyncPSRAMinst_n_2953 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2588(.A(MEM_ADDR_OUT[11]), .Z(i_psram_sub_AsyncPSRAMinst_n_2952 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2587(.A(MEM_ADDR_OUT[10]), .Z(i_psram_sub_AsyncPSRAMinst_n_2951 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2586(.A(MEM_ADDR_OUT[9]), .Z(i_psram_sub_AsyncPSRAMinst_n_2950 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2585(.A(MEM_ADDR_OUT[8]), .Z(i_psram_sub_AsyncPSRAMinst_n_2949 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2584(.A(MEM_ADDR_OUT[6]), .Z(i_psram_sub_AsyncPSRAMinst_n_2948 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2583(.A(MEM_ADDR_OUT[5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2947 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2582(.A(MEM_ADDR_OUT[3]), .Z(i_psram_sub_AsyncPSRAMinst_n_2946 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2581(.A(MEM_ADDR_OUT[2]), .Z(i_psram_sub_AsyncPSRAMinst_n_2945 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2580(.A(MEM_ADDR_OUT[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2944 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2579(.A(MEM_ADDR_OUT[0]), .Z(i_psram_sub_AsyncPSRAMinst_n_2943 - )); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2578(.A(i_psram_sub_mem_addr[22] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2942)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2577(.A(i_psram_sub_mem_addr[21] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2941)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2576(.A(i_psram_sub_mem_addr[20] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2940)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2575(.A(i_psram_sub_mem_addr[19] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2939)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2574(.A(i_psram_sub_mem_addr[18] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2938)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2573(.A(i_psram_sub_mem_addr[17] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2937)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2572(.A(i_psram_sub_mem_addr[16] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2936)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2571(.A(i_psram_sub_mem_addr[15] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2935)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2570(.A(i_psram_sub_mem_addr[14] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2934)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2569(.A(i_psram_sub_mem_addr[13] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2933)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2568(.A(i_psram_sub_mem_addr[12] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2932)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2567(.A(i_psram_sub_mem_addr[11] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2931)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2566(.A(i_psram_sub_mem_addr[10] - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2930)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2565(.A(i_psram_sub_mem_addr[9]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2929)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2564(.A(i_psram_sub_mem_addr[8]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2928)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2563(.A(i_psram_sub_mem_addr[6]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2927)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2562(.A(i_psram_sub_mem_addr[5]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2926)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2561(.A(i_psram_sub_mem_addr[3]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2925)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2560(.A(i_psram_sub_mem_addr[2]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2924)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2559(.A(i_psram_sub_mem_addr[1]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2923)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2558(.A(i_psram_sub_mem_addr[0]) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2922)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2557(.A(i_psram_sub_AsyncPSRAMinst_cen_old - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2921)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2556(.A(i_psram_sub_AsyncPSRAMinst_state - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2920)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2555(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .Z(i_psram_sub_AsyncPSRAMinst_n_2919)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2554(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2918)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2553(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .Z(i_psram_sub_AsyncPSRAMinst_n_2917)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2552(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [3]), .Z(i_psram_sub_AsyncPSRAMinst_n_2916)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2551(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .Z(i_psram_sub_AsyncPSRAMinst_n_2915)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2550(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2914)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2549(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [0]), .Z(i_psram_sub_AsyncPSRAMinst_n_2913)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2548(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [6]), .Z(i_psram_sub_AsyncPSRAMinst_n_2912)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2547(.A(i_psram_sub_AsyncPSRAMinst_n_549 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2911)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2546(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2910)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2545(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [4]), .Z(i_psram_sub_AsyncPSRAMinst_n_2909)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2544(.A(i_psram_sub_AsyncPSRAMinst_n_539 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2908)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2543(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [3]), .Z(i_psram_sub_AsyncPSRAMinst_n_2907)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2542(.A(i_psram_sub_AsyncPSRAMinst_n_534 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2906)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2541(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .Z(i_psram_sub_AsyncPSRAMinst_n_2905)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2540(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2904)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2539(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [16]), .Z(i_psram_sub_AsyncPSRAMinst_n_2903)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2538(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [15]), .Z(i_psram_sub_AsyncPSRAMinst_n_2902)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2537(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [11]), .Z(i_psram_sub_AsyncPSRAMinst_n_2901)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2536(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [10]), .Z(i_psram_sub_AsyncPSRAMinst_n_2900)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2535(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2899)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2534(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [6]), .Z(i_psram_sub_AsyncPSRAMinst_n_2898)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2533(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2897)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2532(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2896)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2531(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [0]), .Z(i_psram_sub_AsyncPSRAMinst_n_2895)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2530(.A(i_psram_sub_AsyncPSRAMinst_n_791 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2894)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2529(.A(i_psram_sub_AsyncPSRAMinst_n_786 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2893)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2528(.A(i_psram_sub_AsyncPSRAMinst_n_781 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2892)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2527(.A(i_psram_sub_AsyncPSRAMinst_n_776 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2891)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2526(.A(i_psram_sub_AsyncPSRAMinst_n_771 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2890)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2525(.A(i_psram_sub_AsyncPSRAMinst_n_766 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2889)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2524(.A(i_psram_sub_AsyncPSRAMinst_n_761 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2888)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2523(.A(i_psram_sub_AsyncPSRAMinst_n_756 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2887)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2522(.A(i_psram_sub_AsyncPSRAMinst_n_751 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2886)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2521(.A(i_psram_sub_AsyncPSRAMinst_n_746 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2885)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2520(.A(i_psram_sub_AsyncPSRAMinst_n_741 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2884)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2519(.A(i_psram_sub_AsyncPSRAMinst_n_736 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2883)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2518(.A(i_psram_sub_AsyncPSRAMinst_n_731 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2882)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2517(.A(i_psram_sub_AsyncPSRAMinst_n_726 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2881)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2516(.A(i_psram_sub_AsyncPSRAMinst_n_721 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2880)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2515(.A(i_psram_sub_AsyncPSRAMinst_n_711 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2879)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2514(.A(i_psram_sub_AsyncPSRAMinst_n_706 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2878)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2513(.A(i_psram_sub_AsyncPSRAMinst_n_696 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2877)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2512(.A(i_psram_sub_AsyncPSRAMinst_n_691 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2876)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2511(.A(i_psram_sub_AsyncPSRAMinst_n_686 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2875)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2510(.A(i_psram_sub_AsyncPSRAMinst_n_681 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2874)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2509(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2873)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2508(.A(i_psram_sub_AsyncPSRAMinst_n_508 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2872)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2507(.A(i_psram_sub_AsyncPSRAMinst_n_505 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2871)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2506(.A(i_psram_sub_AsyncPSRAMinst_n_274 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2870)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2505(.A(i_psram_sub_AsyncPSRAMinst_n_642 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2869)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2504(.A(i_psram_sub_AsyncPSRAMinst_n_568 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2868)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2503(.A(i_psram_sub_AsyncPSRAMinst_n_247 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2867)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2502(.A(i_psram_sub_AsyncPSRAMinst_n_559 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2866)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2501(.A(i_psram_sub_AsyncPSRAMinst_n_446 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2865)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2500(.A(i_psram_sub_AsyncPSRAMinst_n_542 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2864)); - notech_inv i_psram_sub_AsyncPSRAMinst_i_2499(.A(i_psram_sub_AsyncPSRAMinst_n_637 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2863)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_2047(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_BEN[0]), .B(i_psram_sub_AsyncPSRAMinst_n_187), .Z(i_psram_sub_AsyncPSRAMinst_n_2857 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_LBN_reg(.CP(s00_axi_aclk), - .D(i_psram_sub_AsyncPSRAMinst_n_2857), .SD(1'b1), .Q(MEM_BEN[0] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_15(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[15]), .SD(1'b1), .Q(MEM_DATA_O[15] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_14(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[14]), .SD(1'b1), .Q(MEM_DATA_O[14] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_13(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[13]), .SD(1'b1), .Q(MEM_DATA_O[13] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_12(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[12]), .SD(1'b1), .Q(MEM_DATA_O[12] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_11(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[11]), .SD(1'b1), .Q(MEM_DATA_O[11] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_10(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[10]), .SD(1'b1), .Q(MEM_DATA_O[10] - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_9(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[9]), .SD(1'b1), .Q(MEM_DATA_O[9]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_8(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[8]), .SD(1'b1), .Q(MEM_DATA_O[8]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_7(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[7]), .SD(1'b1), .Q(MEM_DATA_O[7]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[6]), .SD(1'b1), .Q(MEM_DATA_O[6]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[5]), .SD(1'b1), .Q(MEM_DATA_O[5]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[4]), .SD(1'b1), .Q(MEM_DATA_O[4]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[3]), .SD(1'b1), .Q(MEM_DATA_O[3]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[2]), .SD(1'b1), .Q(MEM_DATA_O[2]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[1]), .SD(1'b1), .Q(MEM_DATA_O[1]) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_DATA_O_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_mem_data_wr[0]), .SD(1'b1), .Q(MEM_DATA_O[0]) - ); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1975(.S(i_psram_sub_AsyncPSRAMinst_n_422 - ), .A(i_psram_sub_mem_idle), .B(i_psram_sub_AsyncPSRAMinst_n_423 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2819)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_idle_reg(.CP(s00_axi_aclk) - , .D(i_psram_sub_AsyncPSRAMinst_n_2819), .SD(1'b1), .Q(i_psram_sub_mem_idle - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_102(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_2867 - ), .C(i_psram_sub_AsyncPSRAMinst_n_232), .Z(\i_psram_sub_AsyncPSRAMinst_state_3[1] - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1967(.S(i_psram_sub_AsyncPSRAMinst_n_422 - ), .A(MEM_CRE), .B(i_psram_sub_AsyncPSRAMinst_n_490), .Z(i_psram_sub_AsyncPSRAMinst_n_2813 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_CRE_reg(.CP(s00_axi_aclk), - .D(i_psram_sub_AsyncPSRAMinst_n_2813), .SD(1'b1), .Q(MEM_CRE) - ); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1959(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_BEN[1]), .B(i_psram_sub_AsyncPSRAMinst_n_443), .Z(i_psram_sub_AsyncPSRAMinst_n_2807 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_UBN_reg(.CP(s00_axi_aclk), - .D(i_psram_sub_AsyncPSRAMinst_n_2807), .SD(1'b1), .Q(MEM_BEN[1] - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_100(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_235 - ), .C(i_psram_sub_AsyncPSRAMinst_n_351), .Z(i_psram_sub_AsyncPSRAMinst_n_187 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1951(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[31] ), .B(i_psram_sub_AsyncPSRAMinst_n_376 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2801)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_15(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2801), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[31] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_99(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .Z(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1943(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[30] ), .B(i_psram_sub_AsyncPSRAMinst_n_374 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2795)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_14(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2795), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[30] - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_98(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_2919 - ), .C(i_psram_sub_AsyncPSRAMinst_n_351), .Z(i_psram_sub_AsyncPSRAMinst_n_423 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1935(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[29] ), .B(i_psram_sub_AsyncPSRAMinst_n_373 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2789)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_13(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2789), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[29] - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_97(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_238), .C(s00_axi_aresetn), - .Z(i_psram_sub_AsyncPSRAMinst_n_422)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1927(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[28] ), .B(i_psram_sub_AsyncPSRAMinst_n_372 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2783)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_12(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2783), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[28] - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_95(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_236 - ), .C(i_psram_sub_AsyncPSRAMinst_n_351), .Z(i_psram_sub_AsyncPSRAMinst_n_443 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1919(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[27] ), .B(i_psram_sub_AsyncPSRAMinst_n_371 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2777)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_11(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2777), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[27] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_93(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_237 - ), .Z(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1911(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[26] ), .B(i_psram_sub_AsyncPSRAMinst_n_369 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2771)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_10(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2771), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[26] - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_73(.A(i_psram_sub_AsyncPSRAMinst_n_451 - ), .B(i_psram_sub_AsyncPSRAMinst_state[0]), .Z(i_psram_sub_AsyncPSRAMinst_n_663 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1903(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[25] ), .B(i_psram_sub_AsyncPSRAMinst_n_368 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2765)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_9(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2765), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[25] - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_72(.A(i_psram_sub_command), .B(i_psram_sub_AsyncPSRAMinst_n_2919 - ), .C(i_psram_sub_AsyncPSRAMinst_n_498), .Z(i_psram_sub_AsyncPSRAMinst_n_803 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1895(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[24] ), .B(i_psram_sub_AsyncPSRAMinst_n_367 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2759)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_8(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2759), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[24] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_69(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_239), .Z(i_psram_sub_AsyncPSRAMinst_n_194 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1887(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[23] ), .B(i_psram_sub_AsyncPSRAMinst_n_366 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2753)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_7(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2753), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[23] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_65(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_240), .Z(i_psram_sub_AsyncPSRAMinst_n_209 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1879(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[22] ), .B(i_psram_sub_AsyncPSRAMinst_n_364 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2747)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2747), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[22] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_64(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_241), .Z(i_psram_sub_AsyncPSRAMinst_n_214 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1871(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[21] ), .B(i_psram_sub_AsyncPSRAMinst_n_363 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2741)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2741), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[21] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_63(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_242), .Z(i_psram_sub_AsyncPSRAMinst_n_219 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1863(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[20] ), .B(i_psram_sub_AsyncPSRAMinst_n_362 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2735)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2735), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[20] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_62(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_243), .Z(i_psram_sub_AsyncPSRAMinst_n_224 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1855(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[19] ), .B(i_psram_sub_AsyncPSRAMinst_n_361 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2729)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2729), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[19] - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_61(.A(i_psram_sub_AsyncPSRAMinst_n_379 - ), .B(i_psram_sub_AsyncPSRAMinst_n_244), .Z(i_psram_sub_AsyncPSRAMinst_n_229 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1847(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[18] ), .B(i_psram_sub_AsyncPSRAMinst_n_359 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2723)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2723), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[18] - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_59(.A(i_psram_sub_AsyncPSRAMinst_n_2967 - ), .B(i_psram_sub_AsyncPSRAMinst_n_383), .C(i_psram_sub_AsyncPSRAMinst_n_382 - ), .D(i_psram_sub_AsyncPSRAMinst_n_247), .Z(i_psram_sub_AsyncPSRAMinst_n_564 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1839(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[17] ), .B(i_psram_sub_AsyncPSRAMinst_n_358 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2717)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2717), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[17] - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_58(.A(i_psram_sub_AsyncPSRAMinst_state - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_2919), .C(i_psram_sub_AsyncPSRAMinst_n_2967 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2869), .Z(i_psram_sub_AsyncPSRAMinst_n_563 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1831(.S(\i_psram_sub_AsyncPSRAMinst_nbus_19[0] - ), .A(\i_psram_sub_axi_rdata_0[16] ), .B(i_psram_sub_AsyncPSRAMinst_n_357 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2711)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_data_rd_i_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2711), .SD(1'b1), .Q(\i_psram_sub_axi_rdata_0[16] - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_57(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_2920 - ), .C(i_psram_sub_AsyncPSRAMinst_n_253), .Z(i_psram_sub_AsyncPSRAMinst_n_473 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1823(.S(i_psram_sub_AsyncPSRAMinst_n_422 - ), .A(MEM_WEN), .B(i_psram_sub_AsyncPSRAMinst_n_663), .Z(i_psram_sub_AsyncPSRAMinst_n_2705 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_MEM_WEN_reg(.CP(s00_axi_aclk), - .D(i_psram_sub_AsyncPSRAMinst_n_2705), .SD(1'b1), .Q(MEM_WEN) - ); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_56(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_cem_time_expired), .C(i_psram_sub_AsyncPSRAMinst_n_2863 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2970), .Z(i_psram_sub_AsyncPSRAMinst_n_484 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1815(.S(i_psram_sub_AsyncPSRAMinst_n_422 - ), .A(MEM_OEN), .B(i_psram_sub_AsyncPSRAMinst_n_803), .Z(i_psram_sub_AsyncPSRAMinst_n_2699 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_oen_i_reg(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2699), .SD(1'b1), .Q(MEM_OEN) - ); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_55(.A(i_psram_sub_AsyncPSRAMinst_n_522 - ), .B(i_psram_sub_AsyncPSRAMinst_n_255), .Z(i_psram_sub_AsyncPSRAMinst_n_519 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1807(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_2899 - ), .B(i_psram_sub_AsyncPSRAMinst_cem_time_expired), .Z(i_psram_sub_AsyncPSRAMinst_n_2693 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cem_time_expired_reg(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2693), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cem_time_expired - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_54(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_493 - ), .Z(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1799(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_381 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[8]), .Z(i_psram_sub_AsyncPSRAMinst_n_2687 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_8(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2687), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [8])); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_53(.A(i_psram_sub_AsyncPSRAMinst_n_258 - ), .B(i_psram_sub_AsyncPSRAMinst_n_256), .Z(i_psram_sub_AsyncPSRAMinst_n_524 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1791(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_229 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[7]), .Z(i_psram_sub_AsyncPSRAMinst_n_2681 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_7(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2681), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [7])); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_52(.A(i_psram_sub_AsyncPSRAMinst_n_262 - ), .B(i_psram_sub_AsyncPSRAMinst_n_438), .C(i_psram_sub_AsyncPSRAMinst_n_437 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_529)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1783(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_224 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[6]), .Z(i_psram_sub_AsyncPSRAMinst_n_2675 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2675), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [6])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_51(.A(i_psram_sub_AsyncPSRAMinst_n_269 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2907), .C(i_psram_sub_AsyncPSRAMinst_n_561 - ), .D(i_psram_sub_AsyncPSRAMinst_n_555), .Z(i_psram_sub_AsyncPSRAMinst_n_534 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1775(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_219 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2669 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2669), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [5])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_50(.A(i_psram_sub_AsyncPSRAMinst_n_278 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2909), .C(i_psram_sub_AsyncPSRAMinst_n_551 - ), .D(i_psram_sub_AsyncPSRAMinst_n_553), .Z(i_psram_sub_AsyncPSRAMinst_n_539 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1767(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_214 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[4]), .Z(i_psram_sub_AsyncPSRAMinst_n_2663 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2663), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [4])); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_49(.A(i_psram_sub_AsyncPSRAMinst_n_450 - ), .B(i_psram_sub_AsyncPSRAMinst_n_449), .C(i_psram_sub_AsyncPSRAMinst_n_448 - ), .D(i_psram_sub_AsyncPSRAMinst_n_452), .Z(i_psram_sub_AsyncPSRAMinst_n_544 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1759(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_209 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[3]), .Z(i_psram_sub_AsyncPSRAMinst_n_2657 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2657), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [3])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_48(.A(i_psram_sub_AsyncPSRAMinst_n_291 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2912), .C(i_psram_sub_AsyncPSRAMinst_n_516 - ), .D(i_psram_sub_AsyncPSRAMinst_n_509), .Z(i_psram_sub_AsyncPSRAMinst_n_549 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1751(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_378 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[2]), .Z(i_psram_sub_AsyncPSRAMinst_n_2651 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2651), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [2])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_26(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2922), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2943), .Z(i_psram_sub_AsyncPSRAMinst_n_681 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1743(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_377 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_2645 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2645), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [1])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_25(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2923), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2944), .Z(i_psram_sub_AsyncPSRAMinst_n_686 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1735(.S(MEM_CEN), .A(i_psram_sub_AsyncPSRAMinst_n_194 - ), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[0]), .Z(i_psram_sub_AsyncPSRAMinst_n_2639 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_ce_cycle_counter_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2639), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [0])); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cen_old_reg(.CP(s00_axi_aclk), - .D(MEM_CEN), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cen_old) - ); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_24(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2924), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2945), .Z(i_psram_sub_AsyncPSRAMinst_n_691 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1723(.S(i_psram_sub_AsyncPSRAMinst_n_563 - ), .A(MEM_CEN), .B(i_psram_sub_AsyncPSRAMinst_n_564), .Z(i_psram_sub_AsyncPSRAMinst_n_2631 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_cen_i_reg(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2631), .SD(1'b1), .Q(MEM_CEN) - ); - notech_reg_set i_psram_sub_AsyncPSRAMinst_state_reg_1(.CP(s00_axi_aclk), - .D(\i_psram_sub_AsyncPSRAMinst_state_3[1] ), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_state - [1])); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_1716(.A(i_psram_sub_AsyncPSRAMinst_n_664 - ), .B(1'b1), .C(i_psram_sub_AsyncPSRAMinst_n_490), .Z(i_psram_sub_AsyncPSRAMinst_n_2628 - )); - notech_reg_set i_psram_sub_AsyncPSRAMinst_state_reg_0(.CP(s00_axi_aclk), - .D(i_psram_sub_AsyncPSRAMinst_n_2628), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_state - [0])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_23(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2925), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2946), .Z(i_psram_sub_AsyncPSRAMinst_n_696 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_1709(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [6]), .B(i_psram_sub_AsyncPSRAMinst_state[0]), .C(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2624)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2624), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [6])); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_22(.A(i_psram_sub_AsyncPSRAMinst_n_487 - ), .B(i_psram_sub_AsyncPSRAMinst_n_486), .C(i_psram_sub_AsyncPSRAMinst_n_490 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_701)); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_1701(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [5]), .Z(i_psram_sub_AsyncPSRAMinst_n_2618)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2618), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [5])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_21(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2926), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2947), .Z(i_psram_sub_AsyncPSRAMinst_n_706 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_1693(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .Z(i_psram_sub_AsyncPSRAMinst_n_2612)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2612), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [4])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_20(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2927), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2948), .Z(i_psram_sub_AsyncPSRAMinst_n_711 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_1685(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [3]), .Z(i_psram_sub_AsyncPSRAMinst_n_2606)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2606), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [3])); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_19(.A(i_psram_sub_AsyncPSRAMinst_n_489 - ), .B(i_psram_sub_AsyncPSRAMinst_n_488), .C(i_psram_sub_AsyncPSRAMinst_n_490 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_716)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1675(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(i_psram_sub_AsyncPSRAMinst_cycle_time[2]), .B(i_psram_sub_AsyncPSRAMinst_n_484 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2597)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2597), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [2])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_18(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2928), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2949), .Z(i_psram_sub_AsyncPSRAMinst_n_721 - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_1667(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_2914) - , .Z(i_psram_sub_AsyncPSRAMinst_n_2591)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2591), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [1])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_17(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2929), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2950), .Z(i_psram_sub_AsyncPSRAMinst_n_726 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1659(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(i_psram_sub_AsyncPSRAMinst_cycle_time[0]), .B(i_psram_sub_AsyncPSRAMinst_n_473 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2585)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_cycle_time_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2585), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_cycle_time - [0])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_16(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2930), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2951), .Z(i_psram_sub_AsyncPSRAMinst_n_731 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1651(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[6]), .B(i_psram_sub_AsyncPSRAMinst_n_2911 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2579)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2579), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [6])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_15(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2931), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2952), .Z(i_psram_sub_AsyncPSRAMinst_n_736 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1643(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[5]), .B(i_psram_sub_AsyncPSRAMinst_n_544 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2573)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2573), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [5])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_14(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2932), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2953), .Z(i_psram_sub_AsyncPSRAMinst_n_741 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1635(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[4]), .B(i_psram_sub_AsyncPSRAMinst_n_2908 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2567)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2567), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [4])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_13(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2933), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2954), .Z(i_psram_sub_AsyncPSRAMinst_n_746 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1627(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[3]), .B(i_psram_sub_AsyncPSRAMinst_n_2906 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2561)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2561), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [3])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_12(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2934), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2955), .Z(i_psram_sub_AsyncPSRAMinst_n_751 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1619(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[2]), .B(i_psram_sub_AsyncPSRAMinst_n_529 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2555)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2555), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [2])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_11(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2935), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2956), .Z(i_psram_sub_AsyncPSRAMinst_n_756 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1611(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[1]), .B(i_psram_sub_AsyncPSRAMinst_n_524 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2549)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2549), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [1])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_10(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2936), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2957), .Z(i_psram_sub_AsyncPSRAMinst_n_761 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1603(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_waitcount[0]), .B(i_psram_sub_AsyncPSRAMinst_n_519 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2543)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_waitcount_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2543), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_waitcount - [0])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_9(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2937), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2958), .Z(i_psram_sub_AsyncPSRAMinst_n_766 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1595(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[18]), .B(i_psram_sub_AsyncPSRAMinst_n_485 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2537)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_18(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2537), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [18])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_8(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2938), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2959), .Z(i_psram_sub_AsyncPSRAMinst_n_771 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1587(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[17]), .B(i_psram_sub_AsyncPSRAMinst_n_483 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2531)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_17(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2531), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [17])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_7(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2939), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2960), .Z(i_psram_sub_AsyncPSRAMinst_n_776 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1579(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[16]), .B(i_psram_sub_AsyncPSRAMinst_n_482 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2525)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_16(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2525), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [16])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_6(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2940), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2961), .Z(i_psram_sub_AsyncPSRAMinst_n_781 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1571(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[15]), .B(i_psram_sub_AsyncPSRAMinst_n_481 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2519)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_15(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2519), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [15])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_5(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2941), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2962), .Z(i_psram_sub_AsyncPSRAMinst_n_786 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1563(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[14]), .B(i_psram_sub_AsyncPSRAMinst_n_480 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2513)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_14(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2513), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [14])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_4(.A(i_psram_sub_AsyncPSRAMinst_n_498 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2942), .C(i_psram_sub_AsyncPSRAMinst_n_497 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2963), .Z(i_psram_sub_AsyncPSRAMinst_n_791 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1555(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[13]), .B(i_psram_sub_AsyncPSRAMinst_n_479 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2507)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_13(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2507), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [13])); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_3(.A(i_psram_sub_AsyncPSRAMinst_n_348 - ), .B(i_psram_sub_AsyncPSRAMinst_n_349), .Z(i_psram_sub_AsyncPSRAMinst_n_674 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1547(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[12]), .B(i_psram_sub_AsyncPSRAMinst_n_478 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2501)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_12(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2501), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [12])); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_2(.A(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .B(i_psram_sub_AsyncPSRAMinst_n_351), .Z(i_psram_sub_AsyncPSRAMinst_n_673 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1539(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[11]), .B(i_psram_sub_AsyncPSRAMinst_n_477 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2495)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_11(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2495), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [11])); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_1(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_352 - ), .C(i_psram_sub_AsyncPSRAMinst_n_351), .Z(i_psram_sub_AsyncPSRAMinst_n_451 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1531(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[10]), .B(i_psram_sub_AsyncPSRAMinst_n_476 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2489)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_10(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2489), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [10])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_400(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_500), .C(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .D(i_psram_sub_AsyncPSRAMinst_n_233), .Z(i_psram_sub_AsyncPSRAMinst_n_664 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1523(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[9]), .B(i_psram_sub_AsyncPSRAMinst_n_475 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2483)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_9(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2483), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [9])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1515(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[8]), .B(i_psram_sub_AsyncPSRAMinst_n_474 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2477)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_8(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2477), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [8])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1507(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[7]), .B(i_psram_sub_AsyncPSRAMinst_n_472 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2471)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_7(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2471), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [7])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1499(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[6]), .B(i_psram_sub_AsyncPSRAMinst_n_471 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2465)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2465), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [6])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1491(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[5]), .B(i_psram_sub_AsyncPSRAMinst_n_470 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2459)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2459), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [5])); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_121(.A(i_psram_sub_AsyncPSRAMinst_n_657 - ), .B(i_psram_sub_AsyncPSRAMinst_n_652), .C(i_psram_sub_AsyncPSRAMinst_n_2965 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2964), .Z(i_psram_sub_AsyncPSRAMinst_n_658 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1483(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[4]), .B(i_psram_sub_AsyncPSRAMinst_n_469 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2453)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2453), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [4])); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_426(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [2]), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[1]), .C(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [8]), .D(i_psram_sub_AsyncPSRAMinst_n_2966), .Z(i_psram_sub_AsyncPSRAMinst_n_657 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1475(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[3]), .B(i_psram_sub_AsyncPSRAMinst_n_468 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2447)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2447), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [3])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1467(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[2]), .B(i_psram_sub_AsyncPSRAMinst_n_467 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2441)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2441), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [2])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1459(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[1]), .B(i_psram_sub_AsyncPSRAMinst_n_466 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2435)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2435), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [1])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1451(.S(\i_psram_sub_AsyncPSRAMinst_nbus_15[0] - ), .A(i_psram_sub_AsyncPSRAMinst_last_page_read[0]), .B(i_psram_sub_AsyncPSRAMinst_n_465 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2429)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_last_page_read_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2429), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_last_page_read - [0])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1443(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[22]), .B(i_psram_sub_AsyncPSRAMinst_n_2894), - .Z(i_psram_sub_AsyncPSRAMinst_n_2423)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_22(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2423), .SD(1'b1), .Q(MEM_ADDR_OUT - [22])); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_429(.A(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [3]), .B(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter[0]), .C(i_psram_sub_AsyncPSRAMinst_ce_cycle_counter - [4]), .Z(i_psram_sub_AsyncPSRAMinst_n_652)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1435(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[21]), .B(i_psram_sub_AsyncPSRAMinst_n_2893), - .Z(i_psram_sub_AsyncPSRAMinst_n_2417)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_21(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2417), .SD(1'b1), .Q(MEM_ADDR_OUT - [21])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1427(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[20]), .B(i_psram_sub_AsyncPSRAMinst_n_2892), - .Z(i_psram_sub_AsyncPSRAMinst_n_2411)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_20(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2411), .SD(1'b1), .Q(MEM_ADDR_OUT - [20])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1419(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[19]), .B(i_psram_sub_AsyncPSRAMinst_n_2891), - .Z(i_psram_sub_AsyncPSRAMinst_n_2405)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_19(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2405), .SD(1'b1), .Q(MEM_ADDR_OUT - [19])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1411(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[18]), .B(i_psram_sub_AsyncPSRAMinst_n_2890), - .Z(i_psram_sub_AsyncPSRAMinst_n_2399)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_18(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2399), .SD(1'b1), .Q(MEM_ADDR_OUT - [18])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1403(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[17]), .B(i_psram_sub_AsyncPSRAMinst_n_2889), - .Z(i_psram_sub_AsyncPSRAMinst_n_2393)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_17(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2393), .SD(1'b1), .Q(MEM_ADDR_OUT - [17])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1395(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[16]), .B(i_psram_sub_AsyncPSRAMinst_n_2888), - .Z(i_psram_sub_AsyncPSRAMinst_n_2387)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_16(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2387), .SD(1'b1), .Q(MEM_ADDR_OUT - [16])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1387(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[15]), .B(i_psram_sub_AsyncPSRAMinst_n_2887), - .Z(i_psram_sub_AsyncPSRAMinst_n_2381)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_15(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2381), .SD(1'b1), .Q(MEM_ADDR_OUT - [15])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1379(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[14]), .B(i_psram_sub_AsyncPSRAMinst_n_2886), - .Z(i_psram_sub_AsyncPSRAMinst_n_2375)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_14(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2375), .SD(1'b1), .Q(MEM_ADDR_OUT - [14])); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_133(.A(i_psram_sub_AsyncPSRAMinst_n_386 - ), .B(i_psram_sub_AsyncPSRAMinst_n_384), .C(i_psram_sub_AsyncPSRAMinst_n_436 - ), .D(i_psram_sub_AsyncPSRAMinst_n_568), .Z(i_psram_sub_AsyncPSRAMinst_n_642 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1371(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[13]), .B(i_psram_sub_AsyncPSRAMinst_n_2885), - .Z(i_psram_sub_AsyncPSRAMinst_n_2369)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_13(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2369), .SD(1'b1), .Q(MEM_ADDR_OUT - [13])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1363(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[12]), .B(i_psram_sub_AsyncPSRAMinst_n_2884), - .Z(i_psram_sub_AsyncPSRAMinst_n_2363)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_12(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2363), .SD(1'b1), .Q(MEM_ADDR_OUT - [12])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1355(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[11]), .B(i_psram_sub_AsyncPSRAMinst_n_2883), - .Z(i_psram_sub_AsyncPSRAMinst_n_2357)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_11(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2357), .SD(1'b1), .Q(MEM_ADDR_OUT - [11])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1347(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[10]), .B(i_psram_sub_AsyncPSRAMinst_n_2882), - .Z(i_psram_sub_AsyncPSRAMinst_n_2351)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_10(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2351), .SD(1'b1), .Q(MEM_ADDR_OUT - [10])); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_104(.A(i_psram_sub_AsyncPSRAMinst_n_634 - ), .B(i_psram_sub_AsyncPSRAMinst_n_624), .C(i_psram_sub_AsyncPSRAMinst_n_612 - ), .D(i_psram_sub_AsyncPSRAMinst_n_601), .Z(i_psram_sub_AsyncPSRAMinst_n_637 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1339(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[9]), .B(i_psram_sub_AsyncPSRAMinst_n_2881), .Z - (i_psram_sub_AsyncPSRAMinst_n_2345)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_9(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2345), .SD(1'b1), .Q(MEM_ADDR_OUT - [9])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1331(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[8]), .B(i_psram_sub_AsyncPSRAMinst_n_2880), .Z - (i_psram_sub_AsyncPSRAMinst_n_2339)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_8(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2339), .SD(1'b1), .Q(MEM_ADDR_OUT - [8])); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_447(.A(i_psram_sub_AsyncPSRAMinst_page_valid - ), .B(i_psram_sub_AsyncPSRAMinst_n_631), .C(i_psram_sub_AsyncPSRAMinst_n_387 - ), .D(i_psram_sub_AsyncPSRAMinst_n_629), .Z(i_psram_sub_AsyncPSRAMinst_n_634 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1323(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[7]), .B(i_psram_sub_AsyncPSRAMinst_n_716), .Z - (i_psram_sub_AsyncPSRAMinst_n_2333)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_7(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2333), .SD(1'b1), .Q(MEM_ADDR_OUT - [7])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1315(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[6]), .B(i_psram_sub_AsyncPSRAMinst_n_2879), .Z - (i_psram_sub_AsyncPSRAMinst_n_2327)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_6(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2327), .SD(1'b1), .Q(MEM_ADDR_OUT - [6])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1307(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[5]), .B(i_psram_sub_AsyncPSRAMinst_n_2878), .Z - (i_psram_sub_AsyncPSRAMinst_n_2321)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_5(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2321), .SD(1'b1), .Q(MEM_ADDR_OUT - [5])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_441(.A(i_psram_sub_mem_addr[4]), - .B(i_psram_sub_AsyncPSRAMinst_n_2895), .C(i_psram_sub_AsyncPSRAMinst_n_2926 - ), .D(i_psram_sub_AsyncPSRAMinst_last_page_read[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_631 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1299(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[4]), .B(i_psram_sub_AsyncPSRAMinst_n_701), .Z - (i_psram_sub_AsyncPSRAMinst_n_2315)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_4(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2315), .SD(1'b1), .Q(MEM_ADDR_OUT - [4])); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_446(.A(i_psram_sub_AsyncPSRAMinst_n_628 - ), .B(i_psram_sub_AsyncPSRAMinst_n_396), .C(i_psram_sub_AsyncPSRAMinst_n_626 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_629)); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1291(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[3]), .B(i_psram_sub_AsyncPSRAMinst_n_2877), .Z - (i_psram_sub_AsyncPSRAMinst_n_2309)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_3(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2309), .SD(1'b1), .Q(MEM_ADDR_OUT - [3])); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_443(.A(i_psram_sub_mem_addr[5]), - .B(i_psram_sub_AsyncPSRAMinst_n_2896), .C(i_psram_sub_AsyncPSRAMinst_last_page_read - [2]), .D(i_psram_sub_AsyncPSRAMinst_n_2927), .Z(i_psram_sub_AsyncPSRAMinst_n_628 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1283(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[2]), .B(i_psram_sub_AsyncPSRAMinst_n_2876), .Z - (i_psram_sub_AsyncPSRAMinst_n_2303)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_2(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2303), .SD(1'b1), .Q(MEM_ADDR_OUT - [2])); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1275(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[1]), .B(i_psram_sub_AsyncPSRAMinst_n_2875), .Z - (i_psram_sub_AsyncPSRAMinst_n_2297)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_1(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2297), .SD(1'b1), .Q(MEM_ADDR_OUT - [1])); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_444(.A(i_psram_sub_mem_addr[7]) - , .B(i_psram_sub_AsyncPSRAMinst_last_page_read[3]), .Z(i_psram_sub_AsyncPSRAMinst_n_626 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1267(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(MEM_ADDR_OUT[0]), .B(i_psram_sub_AsyncPSRAMinst_n_2874), .Z - (i_psram_sub_AsyncPSRAMinst_n_2291)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_mem_addr_out_i_reg_0(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2291), .SD(1'b1), .Q(MEM_ADDR_OUT - [0])); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_456(.A(i_psram_sub_AsyncPSRAMinst_n_619 - ), .B(i_psram_sub_AsyncPSRAMinst_n_402), .C(i_psram_sub_AsyncPSRAMinst_n_622 - ), .D(i_psram_sub_AsyncPSRAMinst_n_618), .Z(i_psram_sub_AsyncPSRAMinst_n_624 - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1259(.S(i_psram_sub_AsyncPSRAMinst_n_673 - ), .A(i_psram_sub_AsyncPSRAMinst_page_valid), .B(i_psram_sub_AsyncPSRAMinst_n_674 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2285)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_page_valid_reg(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2285), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_page_valid - )); - notech_mux2 i_psram_sub_AsyncPSRAMinst_i_1251(.S(\i_psram_sub_AsyncPSRAMinst_nbus_16[0] - ), .A(i_psram_sub_AsyncPSRAMinst_current_cmd), .B(i_psram_sub_AsyncPSRAMinst_n_451 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_2279)); - notech_reg_set i_psram_sub_AsyncPSRAMinst_current_cmd_reg(.CP(s00_axi_aclk - ), .D(i_psram_sub_AsyncPSRAMinst_n_2279), .SD(1'b1), .Q(i_psram_sub_AsyncPSRAMinst_current_cmd - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_448(.A(i_psram_sub_AsyncPSRAMinst_n_2928 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[4]), .Z(i_psram_sub_AsyncPSRAMinst_n_622 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_449(.A(i_psram_sub_mem_addr[9]), - .B(i_psram_sub_AsyncPSRAMinst_n_2897), .C(i_psram_sub_AsyncPSRAMinst_n_2930 - ), .D(i_psram_sub_AsyncPSRAMinst_last_page_read[6]), .Z(i_psram_sub_AsyncPSRAMinst_n_619 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_455(.A(i_psram_sub_AsyncPSRAMinst_n_617 - ), .B(i_psram_sub_AsyncPSRAMinst_n_408), .C(i_psram_sub_AsyncPSRAMinst_n_614 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_618)); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_452(.A(i_psram_sub_mem_addr[10]) - , .B(i_psram_sub_AsyncPSRAMinst_n_2898), .C(i_psram_sub_AsyncPSRAMinst_last_page_read - [7]), .D(i_psram_sub_AsyncPSRAMinst_n_2931), .Z(i_psram_sub_AsyncPSRAMinst_n_617 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_453(.A(i_psram_sub_AsyncPSRAMinst_n_2932 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[8]), .Z(i_psram_sub_AsyncPSRAMinst_n_614 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_466(.A(i_psram_sub_AsyncPSRAMinst_n_607 - ), .B(i_psram_sub_AsyncPSRAMinst_n_414), .C(i_psram_sub_AsyncPSRAMinst_n_609 - ), .D(i_psram_sub_AsyncPSRAMinst_n_606), .Z(i_psram_sub_AsyncPSRAMinst_n_612 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_458(.A(i_psram_sub_AsyncPSRAMinst_n_2933 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[9]), .Z(i_psram_sub_AsyncPSRAMinst_n_609 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_459(.A(i_psram_sub_mem_addr[14]) - , .B(i_psram_sub_AsyncPSRAMinst_n_2900), .C(i_psram_sub_AsyncPSRAMinst_n_2935 - ), .D(i_psram_sub_AsyncPSRAMinst_last_page_read[11]), .Z(i_psram_sub_AsyncPSRAMinst_n_607 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_465(.A(i_psram_sub_AsyncPSRAMinst_n_604 - ), .B(i_psram_sub_AsyncPSRAMinst_n_419), .C(i_psram_sub_AsyncPSRAMinst_n_602 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_606)); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_462(.A(i_psram_sub_mem_addr[15]) - , .B(i_psram_sub_AsyncPSRAMinst_n_2901), .C(i_psram_sub_AsyncPSRAMinst_last_page_read - [12]), .D(i_psram_sub_AsyncPSRAMinst_n_2936), .Z(i_psram_sub_AsyncPSRAMinst_n_604 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_463(.A(i_psram_sub_AsyncPSRAMinst_n_2937 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[13]), .Z(i_psram_sub_AsyncPSRAMinst_n_602 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_475(.A(i_psram_sub_AsyncPSRAMinst_n_596 - ), .B(i_psram_sub_AsyncPSRAMinst_n_426), .C(i_psram_sub_AsyncPSRAMinst_n_598 - ), .D(i_psram_sub_AsyncPSRAMinst_n_594), .Z(i_psram_sub_AsyncPSRAMinst_n_601 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_467(.A(i_psram_sub_AsyncPSRAMinst_n_2938 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[14]), .Z(i_psram_sub_AsyncPSRAMinst_n_598 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_468(.A(i_psram_sub_mem_addr[19]) - , .B(i_psram_sub_AsyncPSRAMinst_n_2902), .C(i_psram_sub_AsyncPSRAMinst_n_2940 - ), .D(i_psram_sub_AsyncPSRAMinst_last_page_read[16]), .Z(i_psram_sub_AsyncPSRAMinst_n_596 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_474(.A(i_psram_sub_AsyncPSRAMinst_n_593 - ), .B(i_psram_sub_AsyncPSRAMinst_n_431), .C(i_psram_sub_AsyncPSRAMinst_n_591 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_594)); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_471(.A(i_psram_sub_mem_addr[20]) - , .B(i_psram_sub_AsyncPSRAMinst_n_2903), .C(i_psram_sub_AsyncPSRAMinst_last_page_read - [17]), .D(i_psram_sub_AsyncPSRAMinst_n_2941), .Z(i_psram_sub_AsyncPSRAMinst_n_593 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_472(.A(i_psram_sub_AsyncPSRAMinst_n_2942 - ), .B(i_psram_sub_AsyncPSRAMinst_last_page_read[18]), .Z(i_psram_sub_AsyncPSRAMinst_n_591 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_116(.A(i_psram_sub_AsyncPSRAMinst_n_2866 - ), .B(i_psram_sub_AsyncPSRAMinst_n_586), .C(i_psram_sub_AsyncPSRAMinst_n_432 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_588)); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_478(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_2915), .C(i_psram_sub_AsyncPSRAMinst_n_2916 - ), .D(i_psram_sub_AsyncPSRAMinst_waitcount[3]), .Z(i_psram_sub_AsyncPSRAMinst_n_586 - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_110(.A(i_psram_sub_AsyncPSRAMinst_n_441 - ), .B(i_psram_sub_AsyncPSRAMinst_n_433), .C(i_psram_sub_AsyncPSRAMinst_n_2866 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_568)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_497(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [3]), .B(i_psram_sub_AsyncPSRAMinst_n_2913), .Z(i_psram_sub_AsyncPSRAMinst_n_562 - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_499(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_442), - .Z(i_psram_sub_AsyncPSRAMinst_n_561)); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_105(.A(i_psram_sub_AsyncPSRAMinst_n_2864 - ), .B(i_psram_sub_AsyncPSRAMinst_n_444), .C(i_psram_sub_AsyncPSRAMinst_n_445 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2865), .Z(i_psram_sub_AsyncPSRAMinst_n_559 - )); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_137(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_556) - ); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_500(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[1]), .C(i_psram_sub_AsyncPSRAMinst_n_2907 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_555)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_505(.A(i_psram_sub_AsyncPSRAMinst_n_507 - ), .B(i_psram_sub_AsyncPSRAMinst_n_447), .Z(i_psram_sub_AsyncPSRAMinst_n_553 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_506(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_2909 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_551)); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_513(.A(i_psram_sub_AsyncPSRAMinst_n_2864 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2916), .Z(i_psram_sub_AsyncPSRAMinst_n_543 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_103(.A(i_psram_sub_AsyncPSRAMinst_n_2912 - ), .B(i_psram_sub_AsyncPSRAMinst_cycle_time[6]), .Z(i_psram_sub_AsyncPSRAMinst_n_542 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_516(.A(i_psram_sub_AsyncPSRAMinst_n_2872 - ), .B(i_psram_sub_AsyncPSRAMinst_cycle_time[6]), .C(i_psram_sub_AsyncPSRAMinst_waitcount - [5]), .D(i_psram_sub_AsyncPSRAMinst_n_293), .Z(i_psram_sub_AsyncPSRAMinst_n_538 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_517(.A(i_psram_sub_AsyncPSRAMinst_n_294 - ), .B(i_psram_sub_AsyncPSRAMinst_waitcount[4]), .C(i_psram_sub_AsyncPSRAMinst_n_507 - ), .D(i_psram_sub_AsyncPSRAMinst_n_446), .Z(i_psram_sub_AsyncPSRAMinst_n_533 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_115(.A(i_psram_sub_AsyncPSRAMinst_n_463 - ), .B(i_psram_sub_AsyncPSRAMinst_n_441), .C(i_psram_sub_AsyncPSRAMinst_n_462 - ), .D(i_psram_sub_AsyncPSRAMinst_n_461), .Z(i_psram_sub_AsyncPSRAMinst_n_532 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_518(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [3]), .B(i_psram_sub_AsyncPSRAMinst_n_295), .C(i_psram_sub_AsyncPSRAMinst_n_2871 - ), .D(i_psram_sub_AsyncPSRAMinst_n_441), .Z(i_psram_sub_AsyncPSRAMinst_n_530 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_130(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_299), .C(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .D(i_psram_sub_AsyncPSRAMinst_n_297), .Z(i_psram_sub_AsyncPSRAMinst_n_526 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_134(.A(i_psram_sub_AsyncPSRAMinst_n_231 - ), .B(i_psram_sub_AsyncPSRAMinst_n_518), .Z(i_psram_sub_AsyncPSRAMinst_n_522 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_107(.A(i_psram_sub_AsyncPSRAMinst_n_463 - ), .B(i_psram_sub_AsyncPSRAMinst_n_441), .C(i_psram_sub_AsyncPSRAMinst_n_462 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_521)); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_119(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2967), .Z(i_psram_sub_AsyncPSRAMinst_n_518 - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_528(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [5]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_464), - .Z(i_psram_sub_AsyncPSRAMinst_n_516)); - notech_nor2 i_psram_sub_AsyncPSRAMinst_i_530(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [6]), .B(i_psram_sub_AsyncPSRAMinst_n_514), .Z(i_psram_sub_AsyncPSRAMinst_n_515 - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_117(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .B(i_psram_sub_AsyncPSRAMinst_cycle_time[0]), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .Z(i_psram_sub_AsyncPSRAMinst_n_514)); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_529(.A(i_psram_sub_AsyncPSRAMinst_n_507 - ), .B(i_psram_sub_AsyncPSRAMinst_waitcount[4]), .C(i_psram_sub_AsyncPSRAMinst_n_2912 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_509)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_114(.A(i_psram_sub_AsyncPSRAMinst_n_507 - ), .B(i_psram_sub_AsyncPSRAMinst_waitcount[4]), .Z(i_psram_sub_AsyncPSRAMinst_n_508 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_106(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[2]), .C(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .D(i_psram_sub_AsyncPSRAMinst_waitcount[3]), .Z(i_psram_sub_AsyncPSRAMinst_n_507 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_113(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_505 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_136(.A(i_psram_sub_go), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_500)); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_131(.A(i_psram_sub_go), .B(s00_axi_aresetn - ), .C(i_psram_sub_AsyncPSRAMinst_n_2920), .Z(i_psram_sub_AsyncPSRAMinst_n_498 - )); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_132(.A(s00_axi_aresetn), .B(i_psram_sub_AsyncPSRAMinst_n_2920 - ), .C(i_psram_sub_go), .Z(i_psram_sub_AsyncPSRAMinst_n_497)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_139(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2920), .Z(i_psram_sub_AsyncPSRAMinst_n_493 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_140(.A(i_psram_sub_AsyncPSRAMinst_cem_time_expired - ), .B(i_psram_sub_AsyncPSRAMinst_n_2968), .Z(i_psram_sub_AsyncPSRAMinst_n_491 - )); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_96(.A(i_psram_sub_AsyncPSRAMinst_state - [1]), .B(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_490) - ); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_341(.A(i_psram_sub_go), .B(i_psram_sub_mem_addr - [7]), .C(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_489) - ); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_340(.A(MEM_ADDR_OUT[7]), .B(s00_axi_aresetn - ), .C(i_psram_sub_go), .Z(i_psram_sub_AsyncPSRAMinst_n_488)); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_335(.A(i_psram_sub_go), .B(i_psram_sub_mem_addr - [4]), .C(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_487) - ); - notech_nao3 i_psram_sub_AsyncPSRAMinst_i_334(.A(MEM_ADDR_OUT[4]), .B(s00_axi_aresetn - ), .C(i_psram_sub_go), .Z(i_psram_sub_AsyncPSRAMinst_n_486)); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_27(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[22]), .Z(i_psram_sub_AsyncPSRAMinst_n_485 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_28(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[21]), .Z(i_psram_sub_AsyncPSRAMinst_n_483 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_291590(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[20]), .Z(i_psram_sub_AsyncPSRAMinst_n_482 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_31(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[19]), .Z(i_psram_sub_AsyncPSRAMinst_n_481 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_32(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[18]), .Z(i_psram_sub_AsyncPSRAMinst_n_480 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_33(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[17]), .Z(i_psram_sub_AsyncPSRAMinst_n_479 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_34(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[16]), .Z(i_psram_sub_AsyncPSRAMinst_n_478 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_35(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[15]), .Z(i_psram_sub_AsyncPSRAMinst_n_477 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_36(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[14]), .Z(i_psram_sub_AsyncPSRAMinst_n_476 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_37(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[13]), .Z(i_psram_sub_AsyncPSRAMinst_n_475 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_38(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[12]), .Z(i_psram_sub_AsyncPSRAMinst_n_474 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_39(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[11]), .Z(i_psram_sub_AsyncPSRAMinst_n_472 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_40(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[10]), .Z(i_psram_sub_AsyncPSRAMinst_n_471 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_41(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[9]), .Z(i_psram_sub_AsyncPSRAMinst_n_470 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_42(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[8]), .Z(i_psram_sub_AsyncPSRAMinst_n_469 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_43(.A(MEM_ADDR_OUT[7]), .B(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .C(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_468)); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_44(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[6]), .Z(i_psram_sub_AsyncPSRAMinst_n_467 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_45(.A(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .B(s00_axi_aresetn), .C(MEM_ADDR_OUT[5]), .Z(i_psram_sub_AsyncPSRAMinst_n_466 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_46(.A(MEM_ADDR_OUT[4]), .B(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .C(s00_axi_aresetn), .Z(i_psram_sub_AsyncPSRAMinst_n_465)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_143(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .B(i_psram_sub_AsyncPSRAMinst_cycle_time[3]), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [5]), .D(i_psram_sub_AsyncPSRAMinst_n_515), .Z(i_psram_sub_AsyncPSRAMinst_n_464 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_129(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_2915), .Z(i_psram_sub_AsyncPSRAMinst_n_463 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_126(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_2914), .Z(i_psram_sub_AsyncPSRAMinst_n_462 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_127(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2913), .Z(i_psram_sub_AsyncPSRAMinst_n_461 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_310(.A(i_psram_sub_AsyncPSRAMinst_n_292 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2967), .Z(i_psram_sub_AsyncPSRAMinst_n_454 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_146(.A(i_psram_sub_AsyncPSRAMinst_n_514 - ), .B(i_psram_sub_AsyncPSRAMinst_n_543), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [5]), .D(i_psram_sub_AsyncPSRAMinst_n_2917), .Z(i_psram_sub_AsyncPSRAMinst_n_453 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_303(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [5]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_285), - .Z(i_psram_sub_AsyncPSRAMinst_n_452)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_302(.A(i_psram_sub_AsyncPSRAMinst_n_453 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2872), .C(s00_axi_aresetn), .D - (i_psram_sub_AsyncPSRAMinst_n_2910), .Z(i_psram_sub_AsyncPSRAMinst_n_450 - )); - notech_nor2 i_psram_sub_AsyncPSRAMinst_i_304(.A(i_psram_sub_AsyncPSRAMinst_n_522 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2910), .Z(i_psram_sub_AsyncPSRAMinst_n_449 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_125(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [5]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_508), - .D(i_psram_sub_AsyncPSRAMinst_n_2918), .Z(i_psram_sub_AsyncPSRAMinst_n_448 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_149(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .B(i_psram_sub_AsyncPSRAMinst_n_514), .C(i_psram_sub_AsyncPSRAMinst_n_543 - ), .D(i_psram_sub_AsyncPSRAMinst_n_444), .Z(i_psram_sub_AsyncPSRAMinst_n_447 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_295(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [4]), .B(i_psram_sub_AsyncPSRAMinst_n_2917), .Z(i_psram_sub_AsyncPSRAMinst_n_446 - )); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_294(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .B(i_psram_sub_AsyncPSRAMinst_n_2909), .Z(i_psram_sub_AsyncPSRAMinst_n_445 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_109(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [5]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[5]), .Z(i_psram_sub_AsyncPSRAMinst_n_444 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_153(.A(i_psram_sub_AsyncPSRAMinst_n_2866 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2916), .C(i_psram_sub_AsyncPSRAMinst_n_514 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_442)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_280(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [3]), .B(i_psram_sub_AsyncPSRAMinst_n_2916), .Z(i_psram_sub_AsyncPSRAMinst_n_441 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_158(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_568), .C(i_psram_sub_AsyncPSRAMinst_n_2914 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2913), .Z(i_psram_sub_AsyncPSRAMinst_n_440 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_159(.A(i_psram_sub_AsyncPSRAMinst_n_461 - ), .B(i_psram_sub_AsyncPSRAMinst_cycle_time[2]), .C(i_psram_sub_AsyncPSRAMinst_n_2868 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2914), .Z(i_psram_sub_AsyncPSRAMinst_n_439 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_275(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_439), .C(i_psram_sub_AsyncPSRAMinst_n_2967 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2905), .Z(i_psram_sub_AsyncPSRAMinst_n_438 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_274(.A(i_psram_sub_AsyncPSRAMinst_n_440 - ), .B(i_psram_sub_AsyncPSRAMinst_n_556), .C(i_psram_sub_AsyncPSRAMinst_waitcount - [1]), .D(i_psram_sub_AsyncPSRAMinst_n_2905), .Z(i_psram_sub_AsyncPSRAMinst_n_437 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_111(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[2]), .Z(i_psram_sub_AsyncPSRAMinst_n_436 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_267(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [3]), .B(i_psram_sub_AsyncPSRAMinst_n_2907), .Z(i_psram_sub_AsyncPSRAMinst_n_433 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_269(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_2904), .Z(i_psram_sub_AsyncPSRAMinst_n_432 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_225(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [17]), .B(i_psram_sub_AsyncPSRAMinst_n_2941), .Z(i_psram_sub_AsyncPSRAMinst_n_431 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_230(.A(i_psram_sub_mem_addr[19 - ]), .B(i_psram_sub_AsyncPSRAMinst_n_2902), .Z(i_psram_sub_AsyncPSRAMinst_n_426 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_235(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [12]), .B(i_psram_sub_AsyncPSRAMinst_n_2936), .Z(i_psram_sub_AsyncPSRAMinst_n_419 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_240(.A(i_psram_sub_mem_addr[14 - ]), .B(i_psram_sub_AsyncPSRAMinst_n_2900), .Z(i_psram_sub_AsyncPSRAMinst_n_414 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_248(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [7]), .B(i_psram_sub_AsyncPSRAMinst_n_2931), .Z(i_psram_sub_AsyncPSRAMinst_n_408 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_255(.A(i_psram_sub_mem_addr[9] - ), .B(i_psram_sub_AsyncPSRAMinst_n_2897), .Z(i_psram_sub_AsyncPSRAMinst_n_402 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_260(.A(i_psram_sub_AsyncPSRAMinst_last_page_read - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_2927), .Z(i_psram_sub_AsyncPSRAMinst_n_396 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_265(.A(i_psram_sub_mem_addr[4] - ), .B(i_psram_sub_AsyncPSRAMinst_n_2895), .Z(i_psram_sub_AsyncPSRAMinst_n_387 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_176(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [0]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[0]), .Z(i_psram_sub_AsyncPSRAMinst_n_386 - )); - notech_xor2 i_psram_sub_AsyncPSRAMinst_i_175(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .B(i_psram_sub_AsyncPSRAMinst_waitcount[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_384 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_195(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2920), .C(i_psram_sub_AsyncPSRAMinst_n_2873 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_383)); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_194(.A(i_psram_sub_AsyncPSRAMinst_n_2919 - ), .B(i_psram_sub_AsyncPSRAMinst_n_245), .C(i_psram_sub_AsyncPSRAMinst_state - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_382)); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_60(.A(i_psram_sub_AsyncPSRAMinst_n_115 - ), .B(i_psram_sub_AsyncPSRAMinst_n_658), .C(i_psram_sub_AsyncPSRAMinst_cen_old - ), .Z(i_psram_sub_AsyncPSRAMinst_n_381)); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_71(.A(i_psram_sub_AsyncPSRAMinst_cen_old - ), .B(i_psram_sub_AsyncPSRAMinst_n_658), .Z(i_psram_sub_AsyncPSRAMinst_n_379 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_66(.A(i_psram_sub_AsyncPSRAMinst_n_109 - ), .B(i_psram_sub_AsyncPSRAMinst_n_658), .C(i_psram_sub_AsyncPSRAMinst_cen_old - ), .Z(i_psram_sub_AsyncPSRAMinst_n_378)); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_67(.A(i_psram_sub_AsyncPSRAMinst_n_108 - ), .B(i_psram_sub_AsyncPSRAMinst_n_658), .C(i_psram_sub_AsyncPSRAMinst_cen_old - ), .Z(i_psram_sub_AsyncPSRAMinst_n_377)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_177(.A(i_psram_sub_AsyncPSRAMinst_n_463 - ), .B(i_psram_sub_AsyncPSRAMinst_n_441), .C(i_psram_sub_AsyncPSRAMinst_n_462 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2913), .Z(i_psram_sub_AsyncPSRAMinst_n_231 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_178(.A(i_psram_sub_go), .B(i_psram_sub_AsyncPSRAMinst_cem_time_expired - ), .C(i_psram_sub_AsyncPSRAMinst_n_2919), .D(i_psram_sub_AsyncPSRAMinst_n_2920 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_232)); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_167(.A(i_psram_sub_AsyncPSRAMinst_n_532 - ), .B(i_psram_sub_AsyncPSRAMinst_n_356), .C(i_psram_sub_AsyncPSRAMinst_n_588 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_233)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_184(.A(i_psram_sub_mem_byte_en - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2920), .Z(i_psram_sub_AsyncPSRAMinst_n_235 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_185(.A(i_psram_sub_mem_byte_en - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_2920), .Z(i_psram_sub_AsyncPSRAMinst_n_236 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_186(.A(i_psram_sub_AsyncPSRAMinst_n_642 - ), .B(i_psram_sub_AsyncPSRAMinst_state[1]), .C(i_psram_sub_AsyncPSRAMinst_n_2873 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2919), .Z(i_psram_sub_AsyncPSRAMinst_n_237 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_187(.A(i_psram_sub_AsyncPSRAMinst_state - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_642), .Z(i_psram_sub_AsyncPSRAMinst_n_238 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_188(.A(i_psram_sub_AsyncPSRAMinst_n_107 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_239 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_189(.A(i_psram_sub_AsyncPSRAMinst_n_110 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_240 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_190(.A(i_psram_sub_AsyncPSRAMinst_n_111 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_241 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_191(.A(i_psram_sub_AsyncPSRAMinst_n_112 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_242 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_192(.A(i_psram_sub_AsyncPSRAMinst_n_113 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_243 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_193(.A(i_psram_sub_AsyncPSRAMinst_n_114 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2921), .Z(i_psram_sub_AsyncPSRAMinst_n_244 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_163(.A(i_psram_sub_AsyncPSRAMinst_cem_time_expired - ), .B(i_psram_sub_AsyncPSRAMinst_n_246), .Z(i_psram_sub_AsyncPSRAMinst_n_245 - )); - notech_nor2 i_psram_sub_AsyncPSRAMinst_i_196(.A(i_psram_sub_go), .B(i_psram_sub_AsyncPSRAMinst_n_2968 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_246)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_197(.A(i_psram_sub_go), .B(i_psram_sub_AsyncPSRAMinst_n_2919 - ), .C(i_psram_sub_AsyncPSRAMinst_n_2920), .D(i_psram_sub_AsyncPSRAMinst_n_248 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_247)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_171(.A(i_psram_sub_command), .B - (i_psram_sub_AsyncPSRAMinst_n_637), .Z(i_psram_sub_AsyncPSRAMinst_n_248 - )); - notech_nand3 i_psram_sub_AsyncPSRAMinst_i_219(.A(i_psram_sub_go), .B(i_psram_sub_command - ), .C(i_psram_sub_AsyncPSRAMinst_n_254), .Z(i_psram_sub_AsyncPSRAMinst_n_253 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_162(.A(i_psram_sub_AsyncPSRAMinst_cem_time_expired - ), .B(i_psram_sub_AsyncPSRAMinst_n_2863), .Z(i_psram_sub_AsyncPSRAMinst_n_254 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_266(.A(i_psram_sub_AsyncPSRAMinst_n_588 - ), .B(i_psram_sub_AsyncPSRAMinst_n_518), .Z(i_psram_sub_AsyncPSRAMinst_n_255 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_270(.A(i_psram_sub_AsyncPSRAMinst_n_257 - ), .B(i_psram_sub_AsyncPSRAMinst_waitcount[1]), .C(i_psram_sub_AsyncPSRAMinst_n_518 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_256)); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_160(.A(i_psram_sub_AsyncPSRAMinst_n_436 - ), .B(i_psram_sub_AsyncPSRAMinst_n_568), .C(i_psram_sub_AsyncPSRAMinst_n_2914 - ), .D(i_psram_sub_AsyncPSRAMinst_cycle_time[0]), .Z(i_psram_sub_AsyncPSRAMinst_n_257 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_271(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_n_259), - .D(i_psram_sub_AsyncPSRAMinst_n_2904), .Z(i_psram_sub_AsyncPSRAMinst_n_258 - )); - notech_or4 i_psram_sub_AsyncPSRAMinst_i_161(.A(i_psram_sub_AsyncPSRAMinst_n_436 - ), .B(i_psram_sub_AsyncPSRAMinst_n_568), .C(i_psram_sub_AsyncPSRAMinst_n_2913 - ), .D(i_psram_sub_AsyncPSRAMinst_cycle_time[1]), .Z(i_psram_sub_AsyncPSRAMinst_n_259 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_276(.A(i_psram_sub_AsyncPSRAMinst_n_263 - ), .B(i_psram_sub_AsyncPSRAMinst_n_518), .Z(i_psram_sub_AsyncPSRAMinst_n_262 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_156(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .B(i_psram_sub_AsyncPSRAMinst_n_505), .C(i_psram_sub_AsyncPSRAMinst_n_2905 - ), .D(i_psram_sub_AsyncPSRAMinst_n_265), .Z(i_psram_sub_AsyncPSRAMinst_n_263 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_157(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .B(i_psram_sub_AsyncPSRAMinst_n_2913), .C(i_psram_sub_AsyncPSRAMinst_n_2868 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_265)); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_151(.A(i_psram_sub_AsyncPSRAMinst_n_273 - ), .B(i_psram_sub_AsyncPSRAMinst_n_518), .C(i_psram_sub_AsyncPSRAMinst_n_2967 - ), .D(i_psram_sub_AsyncPSRAMinst_n_271), .Z(i_psram_sub_AsyncPSRAMinst_n_269 - )); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_152(.A(i_psram_sub_AsyncPSRAMinst_n_526 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2870), .Z(i_psram_sub_AsyncPSRAMinst_n_271 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_155(.A(i_psram_sub_AsyncPSRAMinst_n_463 - ), .B(i_psram_sub_AsyncPSRAMinst_n_462), .C(i_psram_sub_AsyncPSRAMinst_n_2866 - ), .D(i_psram_sub_AsyncPSRAMinst_n_562), .Z(i_psram_sub_AsyncPSRAMinst_n_273 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_293(.A(i_psram_sub_AsyncPSRAMinst_n_2905 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2904), .C(i_psram_sub_AsyncPSRAMinst_n_2916 - ), .D(i_psram_sub_AsyncPSRAMinst_n_559), .Z(i_psram_sub_AsyncPSRAMinst_n_274 - )); - notech_ao4 i_psram_sub_AsyncPSRAMinst_i_147(.A(i_psram_sub_AsyncPSRAMinst_n_518 - ), .B(i_psram_sub_AsyncPSRAMinst_n_231), .C(i_psram_sub_AsyncPSRAMinst_n_280 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2967), .Z(i_psram_sub_AsyncPSRAMinst_n_278 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_148(.A(i_psram_sub_AsyncPSRAMinst_n_526 - ), .B(i_psram_sub_AsyncPSRAMinst_n_530), .C(i_psram_sub_AsyncPSRAMinst_n_281 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_280)); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_299(.A(i_psram_sub_AsyncPSRAMinst_n_507 - ), .B(i_psram_sub_AsyncPSRAMinst_n_282), .Z(i_psram_sub_AsyncPSRAMinst_n_281 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_150(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .B(i_psram_sub_AsyncPSRAMinst_n_542), .C(i_psram_sub_AsyncPSRAMinst_n_444 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_282)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_145(.A(i_psram_sub_AsyncPSRAMinst_n_526 - ), .B(i_psram_sub_AsyncPSRAMinst_n_530), .C(i_psram_sub_AsyncPSRAMinst_n_533 - ), .D(i_psram_sub_AsyncPSRAMinst_n_286), .Z(i_psram_sub_AsyncPSRAMinst_n_285 - )); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_305(.A(i_psram_sub_AsyncPSRAMinst_n_508 - ), .B(i_psram_sub_AsyncPSRAMinst_n_2864), .Z(i_psram_sub_AsyncPSRAMinst_n_286 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_141(.A(i_psram_sub_AsyncPSRAMinst_n_522 - ), .B(i_psram_sub_AsyncPSRAMinst_n_454), .C(i_psram_sub_AsyncPSRAMinst_n_448 - ), .Z(i_psram_sub_AsyncPSRAMinst_n_291)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_142(.A(i_psram_sub_AsyncPSRAMinst_n_526 - ), .B(i_psram_sub_AsyncPSRAMinst_n_530), .C(i_psram_sub_AsyncPSRAMinst_n_533 - ), .D(i_psram_sub_AsyncPSRAMinst_n_538), .Z(i_psram_sub_AsyncPSRAMinst_n_292 - )); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_144(.A(i_psram_sub_AsyncPSRAMinst_cycle_time - [6]), .B(i_psram_sub_AsyncPSRAMinst_n_446), .C(i_psram_sub_AsyncPSRAMinst_n_532 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2918), .Z(i_psram_sub_AsyncPSRAMinst_n_293 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_170(.A(i_psram_sub_AsyncPSRAMinst_n_461 - ), .B(i_psram_sub_AsyncPSRAMinst_n_521), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [4]), .Z(i_psram_sub_AsyncPSRAMinst_n_294)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_172(.A(i_psram_sub_AsyncPSRAMinst_n_463 - ), .B(i_psram_sub_AsyncPSRAMinst_n_461), .C(i_psram_sub_AsyncPSRAMinst_n_462 - ), .D(i_psram_sub_AsyncPSRAMinst_n_2916), .Z(i_psram_sub_AsyncPSRAMinst_n_295 - )); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_173(.A(i_psram_sub_AsyncPSRAMinst_n_461 - ), .B(i_psram_sub_AsyncPSRAMinst_n_463), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_297)); - notech_ao3 i_psram_sub_AsyncPSRAMinst_i_174(.A(i_psram_sub_AsyncPSRAMinst_n_462 - ), .B(i_psram_sub_AsyncPSRAMinst_n_461), .C(i_psram_sub_AsyncPSRAMinst_cycle_time - [2]), .Z(i_psram_sub_AsyncPSRAMinst_n_299)); - notech_and4 i_psram_sub_AsyncPSRAMinst_i_393(.A(i_psram_sub_AsyncPSRAMinst_page_valid - ), .B(i_psram_sub_AsyncPSRAMinst_n_491), .C(s00_axi_aresetn), .D - (i_psram_sub_AsyncPSRAMinst_n_2919), .Z(i_psram_sub_AsyncPSRAMinst_n_348 - )); - notech_and3 i_psram_sub_AsyncPSRAMinst_i_396(.A(i_psram_sub_AsyncPSRAMinst_state - [0]), .B(s00_axi_aresetn), .C(i_psram_sub_AsyncPSRAMinst_current_cmd - ), .Z(i_psram_sub_AsyncPSRAMinst_n_349)); - notech_nor2 i_psram_sub_AsyncPSRAMinst_i_397(.A(i_psram_sub_go), .B(i_psram_sub_AsyncPSRAMinst_state - [1]), .Z(i_psram_sub_AsyncPSRAMinst_n_351)); - notech_nand2 i_psram_sub_AsyncPSRAMinst_i_398(.A(i_psram_sub_command), .B - (i_psram_sub_AsyncPSRAMinst_n_2920), .Z(i_psram_sub_AsyncPSRAMinst_n_352 - )); - notech_or2 i_psram_sub_AsyncPSRAMinst_i_183(.A(i_psram_sub_AsyncPSRAMinst_waitcount - [0]), .B(i_psram_sub_AsyncPSRAMinst_n_2913), .Z(i_psram_sub_AsyncPSRAMinst_n_356 - )); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_94(.A(MEM_DATA_I[0]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_357)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_92(.A(MEM_DATA_I[1]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_358)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_91(.A(MEM_DATA_I[2]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_359)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_90(.A(MEM_DATA_I[3]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_361)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_89(.A(MEM_DATA_I[4]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_362)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_88(.A(MEM_DATA_I[5]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_363)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_87(.A(MEM_DATA_I[6]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_364)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_86(.A(MEM_DATA_I[7]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_366)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_85(.A(MEM_DATA_I[8]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_367)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_84(.A(MEM_DATA_I[9]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_368)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_83(.A(MEM_DATA_I[10]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_369)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_82(.A(MEM_DATA_I[11]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_371)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_81(.A(MEM_DATA_I[12]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_372)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_79(.A(MEM_DATA_I[13]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_373)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_76(.A(MEM_DATA_I[14]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_374)); - notech_and2 i_psram_sub_AsyncPSRAMinst_i_75(.A(MEM_DATA_I[15]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_AsyncPSRAMinst_n_376)); - notech_inv i_02655(.A(i_psram_sub_mem_addr[0]), .Z(i_psram_sub_function_plus_2 - [0])); - notech_nand2 i_12654(.A(i_psram_sub_mem_addr[0]), .B(i_psram_sub_mem_addr - [1]), .Z(n_1391736)); - notech_nand2 i_22653(.A(i_psram_sub_mem_addr[1]), .B(i_psram_sub_mem_addr - [2]), .Z(n_1401735)); - notech_nand2 i_32652(.A(i_psram_sub_mem_addr[2]), .B(i_psram_sub_mem_addr - [3]), .Z(n_1411734)); - notech_nand2 i_42651(.A(i_psram_sub_mem_addr[3]), .B(i_psram_sub_mem_addr - [4]), .Z(n_1421733)); - notech_nand2 i_52650(.A(i_psram_sub_mem_addr[4]), .B(i_psram_sub_mem_addr - [5]), .Z(n_1431732)); - notech_nand2 i_62649(.A(i_psram_sub_mem_addr[5]), .B(i_psram_sub_mem_addr - [6]), .Z(n_1441731)); - notech_nand2 i_72648(.A(i_psram_sub_mem_addr[6]), .B(i_psram_sub_mem_addr - [7]), .Z(n_1451730)); - notech_nand2 i_82647(.A(i_psram_sub_mem_addr[7]), .B(i_psram_sub_mem_addr - [8]), .Z(n_1461729)); - notech_nand2 i_92646(.A(i_psram_sub_mem_addr[8]), .B(i_psram_sub_mem_addr - [9]), .Z(n_1471728)); - notech_nand2 i_102645(.A(i_psram_sub_mem_addr[9]), .B(i_psram_sub_mem_addr - [10]), .Z(n_1481727)); - notech_nand2 i_112644(.A(i_psram_sub_mem_addr[10]), .B(i_psram_sub_mem_addr - [11]), .Z(n_1491726)); - notech_nand2 i_122643(.A(i_psram_sub_mem_addr[11]), .B(i_psram_sub_mem_addr - [12]), .Z(n_1501725)); - notech_nand2 i_132642(.A(i_psram_sub_mem_addr[12]), .B(i_psram_sub_mem_addr - [13]), .Z(n_1511724)); - notech_nand2 i_142641(.A(i_psram_sub_mem_addr[13]), .B(i_psram_sub_mem_addr - [14]), .Z(n_1521723)); - notech_nand2 i_152640(.A(i_psram_sub_mem_addr[14]), .B(i_psram_sub_mem_addr - [15]), .Z(n_153)); - notech_nand2 i_162639(.A(i_psram_sub_mem_addr[15]), .B(i_psram_sub_mem_addr - [16]), .Z(n_1541722)); - notech_nand2 i_172638(.A(i_psram_sub_mem_addr[16]), .B(i_psram_sub_mem_addr - [17]), .Z(n_155)); - notech_nand2 i_182637(.A(i_psram_sub_mem_addr[17]), .B(i_psram_sub_mem_addr - [18]), .Z(n_1561721)); - notech_nand2 i_192636(.A(i_psram_sub_mem_addr[18]), .B(i_psram_sub_mem_addr - [19]), .Z(n_1571720)); - notech_nand2 i_202635(.A(i_psram_sub_mem_addr[19]), .B(i_psram_sub_mem_addr - [20]), .Z(n_1581719)); - notech_nand2 i_21(.A(i_psram_sub_mem_addr[20]), .B(i_psram_sub_mem_addr[ - 21]), .Z(n_1591718)); - notech_inv i_232634(.A(i_psram_sub_function_plus_2[0]), .Z(n_1611717)); - notech_inv i_242633(.A(n_1391736), .Z(n_2771716)); - notech_nor2 i_252632(.A(i_psram_sub_function_plus_2[0]), .B(n_1401735), - .Z(n_1631715)); - notech_nor2 i_262631(.A(n_1391736), .B(n_1411734), .Z(n_1641714)); - notech_nor2 i_272630(.A(n_1401735), .B(n_1421733), .Z(n_1651713)); - notech_nor2 i_282629(.A(n_1411734), .B(n_1431732), .Z(n_1661712)); - notech_nor2 i_292628(.A(n_1421733), .B(n_1441731), .Z(n_1671711)); - notech_nor2 i_302627(.A(n_1431732), .B(n_1451730), .Z(n_1681710)); - notech_nor2 i_312626(.A(n_1441731), .B(n_1461729), .Z(n_1691709)); - notech_nor2 i_322625(.A(n_1451730), .B(n_1471728), .Z(n_1701708)); - notech_nor2 i_332624(.A(n_1461729), .B(n_1481727), .Z(n_1711707)); - notech_nor2 i_342623(.A(n_1471728), .B(n_1491726), .Z(n_1721706)); - notech_nor2 i_352622(.A(n_1481727), .B(n_1501725), .Z(n_1731705)); - notech_nor2 i_362621(.A(n_1491726), .B(n_1511724), .Z(n_1741704)); - notech_nor2 i_372620(.A(n_1501725), .B(n_1521723), .Z(n_175)); - notech_nor2 i_382619(.A(n_1511724), .B(n_153), .Z(n_1761703)); - notech_nor2 i_392618(.A(n_1521723), .B(n_1541722), .Z(n_1771702)); - notech_nor2 i_402617(.A(n_153), .B(n_155), .Z(n_1781701)); - notech_nor2 i_412616(.A(n_1541722), .B(n_1561721), .Z(n_179)); - notech_nor2 i_422615(.A(n_155), .B(n_1571720), .Z(n_1801700)); - notech_nor2 i_43(.A(n_1561721), .B(n_1581719), .Z(n_1811699)); - notech_nor2 i_442614(.A(n_1571720), .B(n_1591718), .Z(n_1821698)); - notech_inv i_462613(.A(n_1611717), .Z(n_1841697)); - notech_inv i_472612(.A(n_2771716), .Z(n_1851696)); - notech_inv i_482611(.A(n_1631715), .Z(n_1861695)); - notech_inv i_492610(.A(n_1641714), .Z(n_2781694)); - notech_nand2 i_502609(.A(n_1611717), .B(n_1651713), .Z(n_1881693)); - notech_nand2 i_512608(.A(n_2771716), .B(n_1661712), .Z(n_1891692)); - notech_nand2 i_522607(.A(n_1631715), .B(n_1671711), .Z(n_1901691)); - notech_nand2 i_532606(.A(n_1641714), .B(n_1681710), .Z(n_1911690)); - notech_nand2 i_542605(.A(n_1651713), .B(n_1691709), .Z(n_1921689)); - notech_nand2 i_552604(.A(n_1661712), .B(n_1701708), .Z(n_1931688)); - notech_nand2 i_562603(.A(n_1671711), .B(n_1711707), .Z(n_1941687)); - notech_nand2 i_572602(.A(n_1681710), .B(n_1721706), .Z(n_1951686)); - notech_nand2 i_582601(.A(n_1691709), .B(n_1731705), .Z(n_1961685)); - notech_nand2 i_592600(.A(n_1701708), .B(n_1741704), .Z(n_197)); - notech_nand2 i_602599(.A(n_1711707), .B(n_175), .Z(n_1981684)); - notech_nand2 i_612598(.A(n_1721706), .B(n_1761703), .Z(n_1991683)); - notech_nand2 i_622597(.A(n_1731705), .B(n_1771702), .Z(n_2001682)); - notech_nand2 i_632596(.A(n_1741704), .B(n_1781701), .Z(n_2011681)); - notech_nand2 i_642595(.A(n_175), .B(n_179), .Z(n_2021680)); - notech_nand2 i_652594(.A(n_1761703), .B(n_1801700), .Z(n_203)); - notech_nand2 i_662593(.A(n_1771702), .B(n_1811699), .Z(n_204)); - notech_nand2 i_672592(.A(n_1781701), .B(n_1821698), .Z(n_205)); - notech_inv i_692591(.A(n_1841697), .Z(n_2071679)); - notech_inv i_702590(.A(n_1851696), .Z(n_2081678)); - notech_inv i_71(.A(n_1861695), .Z(n_2091677)); - notech_inv i_722589(.A(n_2781694), .Z(n_2101676)); - notech_inv i_73(.A(n_1881693), .Z(n_2111675)); - notech_inv i_742588(.A(n_1891692), .Z(n_2121674)); - notech_nor2 i_772587(.A(n_1841697), .B(n_1921689), .Z(n_2151673)); - notech_nor2 i_782586(.A(n_1851696), .B(n_1931688), .Z(n_2161672)); - notech_nor2 i_792585(.A(n_1861695), .B(n_1941687), .Z(n_2171671)); - notech_nor2 i_802584(.A(n_2781694), .B(n_1951686), .Z(n_2181670)); - notech_nor2 i_812583(.A(n_1881693), .B(n_1961685), .Z(n_2191669)); - notech_nor2 i_822582(.A(n_1891692), .B(n_197), .Z(n_2201668)); - notech_nor2 i_832581(.A(n_1901691), .B(n_1981684), .Z(n_2211667)); - notech_nor2 i_842580(.A(n_1911690), .B(n_1991683), .Z(n_2221666)); - notech_nor2 i_852579(.A(n_1921689), .B(n_2001682), .Z(n_2231665)); - notech_nor2 i_862578(.A(n_1931688), .B(n_2011681), .Z(n_2241664)); - notech_nor2 i_872577(.A(n_1941687), .B(n_2021680), .Z(n_2251663)); - notech_nor2 i_882576(.A(n_1951686), .B(n_203), .Z(n_226)); - notech_nor2 i_892575(.A(n_1961685), .B(n_204), .Z(n_227)); - notech_nor2 i_902574(.A(n_197), .B(n_205), .Z(n_2281662)); - notech_inv i_922573(.A(n_2071679), .Z(n_2301661)); - notech_inv i_93(.A(n_2081678), .Z(n_2311660)); - notech_inv i_94(.A(n_2091677), .Z(n_2321659)); - notech_inv i_95(.A(n_2101676), .Z(n_2331658)); - notech_inv i_962572(.A(n_2111675), .Z(n_2341657)); - notech_inv i_972571(.A(n_2121674), .Z(n_235)); - notech_inv i_1002570(.A(n_2151673), .Z(n_2381656)); - notech_inv i_1012569(.A(n_2161672), .Z(n_2391655)); - notech_inv i_1022568(.A(n_2171671), .Z(n_2401654)); - notech_inv i_1032567(.A(n_2181670), .Z(n_241)); - notech_inv i_1042566(.A(n_2191669), .Z(n_2421653)); - notech_inv i_1052565(.A(n_2201668), .Z(n_2431652)); - notech_inv i_1062564(.A(n_2211667), .Z(n_2441651)); - notech_inv i_1072563(.A(n_2221666), .Z(n_2821650)); - notech_nand2 i_1082562(.A(n_2071679), .B(n_2231665), .Z(n_2461649)); - notech_nand2 i_109(.A(n_2081678), .B(n_2241664), .Z(n_2471648)); - notech_nand2 i_110(.A(n_2091677), .B(n_2251663), .Z(n_2481647)); - notech_nand2 i_111(.A(n_2101676), .B(n_226), .Z(n_2491646)); - notech_nand2 i_112(.A(n_2111675), .B(n_227), .Z(n_250)); - notech_nand2 i_113(.A(n_2121674), .B(n_2281662), .Z(n_251)); - notech_inv i_1382561(.A(n_2301661), .Z(n_2861645)); - notech_inv i_1392560(.A(i_psram_sub_mem_addr[1]), .Z(n_2891644)); - notech_nand2 i_1402559(.A(n_2891644), .B(n_2301661), .Z(n_2901643)); - notech_nand2 i_1412558(.A(i_psram_sub_mem_addr[1]), .B(n_2861645), .Z(n_2871642 - )); - notech_nand2 i_1422557(.A(n_2871642), .B(n_2901643), .Z(n_2881641)); - notech_inv i_1432556(.A(n_2881641), .Z(i_psram_sub_function_plus_2[1]) - ); - notech_inv i_1442555(.A(n_2311660), .Z(n_2911640)); - notech_inv i_1452554(.A(i_psram_sub_mem_addr[2]), .Z(n_2941639)); - notech_nand2 i_1462553(.A(n_2941639), .B(n_2311660), .Z(n_2951638)); - notech_nand2 i_1472552(.A(i_psram_sub_mem_addr[2]), .B(n_2911640), .Z(n_2921637 - )); - notech_nand2 i_1482551(.A(n_2921637), .B(n_2951638), .Z(n_2931636)); - notech_inv i_1492550(.A(n_2931636), .Z(i_psram_sub_function_plus_2[2]) - ); - notech_inv i_1502549(.A(n_2321659), .Z(n_2961635)); - notech_inv i_1512548(.A(i_psram_sub_mem_addr[3]), .Z(n_2991634)); - notech_nand2 i_1522547(.A(n_2991634), .B(n_2321659), .Z(n_3001633)); - notech_nand2 i_1532546(.A(i_psram_sub_mem_addr[3]), .B(n_2961635), .Z(n_2971632 - )); - notech_nand2 i_1542545(.A(n_2971632), .B(n_3001633), .Z(n_2981631)); - notech_inv i_1552544(.A(n_2981631), .Z(i_psram_sub_function_plus_2[3]) - ); - notech_inv i_1562543(.A(n_2331658), .Z(n_3011630)); - notech_inv i_1572542(.A(i_psram_sub_mem_addr[4]), .Z(n_3041629)); - notech_nand2 i_1582541(.A(n_3041629), .B(n_2331658), .Z(n_3051628)); - notech_nand2 i_1592540(.A(i_psram_sub_mem_addr[4]), .B(n_3011630), .Z(n_3021627 - )); - notech_nand2 i_1602539(.A(n_3021627), .B(n_3051628), .Z(n_3031626)); - notech_inv i_1612538(.A(n_3031626), .Z(i_psram_sub_function_plus_2[4]) - ); - notech_inv i_1622537(.A(n_2341657), .Z(n_3061625)); - notech_inv i_1632536(.A(i_psram_sub_mem_addr[5]), .Z(n_3091624)); - notech_nand2 i_1642535(.A(n_3091624), .B(n_2341657), .Z(n_3101623)); - notech_nand2 i_1652534(.A(i_psram_sub_mem_addr[5]), .B(n_3061625), .Z(n_3071622 - )); - notech_nand2 i_1662533(.A(n_3071622), .B(n_3101623), .Z(n_3081621)); - notech_inv i_1672532(.A(n_3081621), .Z(i_psram_sub_function_plus_2[5]) - ); - notech_inv i_1682531(.A(n_235), .Z(n_3111620)); - notech_inv i_1692530(.A(i_psram_sub_mem_addr[6]), .Z(n_3141619)); - notech_nand2 i_1702529(.A(n_3141619), .B(n_235), .Z(n_3151618)); - notech_nand2 i_1712528(.A(i_psram_sub_mem_addr[6]), .B(n_3111620), .Z(n_3121617 - )); - notech_nand2 i_1722527(.A(n_3121617), .B(n_3151618), .Z(n_3131616)); - notech_inv i_1732526(.A(n_3131616), .Z(i_psram_sub_function_plus_2[6]) - ); - notech_inv i_1742525(.A(n_1901691), .Z(n_3161615)); - notech_inv i_1752524(.A(i_psram_sub_mem_addr[7]), .Z(n_3191614)); - notech_nand2 i_1762523(.A(n_3191614), .B(n_1901691), .Z(n_3201613)); - notech_nand2 i_1772522(.A(i_psram_sub_mem_addr[7]), .B(n_3161615), .Z(n_3171612 - )); - notech_nand2 i_1782521(.A(n_3171612), .B(n_3201613), .Z(n_3181611)); - notech_inv i_1792520(.A(n_3181611), .Z(i_psram_sub_function_plus_2[7]) - ); - notech_inv i_1802519(.A(n_1911690), .Z(n_3211610)); - notech_inv i_1812518(.A(i_psram_sub_mem_addr[8]), .Z(n_3241609)); - notech_nand2 i_1822517(.A(n_3241609), .B(n_1911690), .Z(n_3251608)); - notech_nand2 i_1832516(.A(i_psram_sub_mem_addr[8]), .B(n_3211610), .Z(n_3221607 - )); - notech_nand2 i_1842515(.A(n_3221607), .B(n_3251608), .Z(n_3231606)); - notech_inv i_1852514(.A(n_3231606), .Z(i_psram_sub_function_plus_2[8]) - ); - notech_inv i_1862513(.A(n_2381656), .Z(n_3261605)); - notech_inv i_1872512(.A(i_psram_sub_mem_addr[9]), .Z(n_3291604)); - notech_nand2 i_1882511(.A(n_3291604), .B(n_2381656), .Z(n_3301603)); - notech_nand2 i_1892510(.A(i_psram_sub_mem_addr[9]), .B(n_3261605), .Z(n_3271602 - )); - notech_nand2 i_1902509(.A(n_3271602), .B(n_3301603), .Z(n_3281601)); - notech_inv i_1912508(.A(n_3281601), .Z(i_psram_sub_function_plus_2[9]) - ); - notech_inv i_1922507(.A(n_2391655), .Z(n_3311600)); - notech_inv i_1932506(.A(i_psram_sub_mem_addr[10]), .Z(n_3341599)); - notech_nand2 i_1942505(.A(n_3341599), .B(n_2391655), .Z(n_3351598)); - notech_nand2 i_1952504(.A(i_psram_sub_mem_addr[10]), .B(n_3311600), .Z(n_3321597 - )); - notech_nand2 i_1962503(.A(n_3321597), .B(n_3351598), .Z(n_3331596)); - notech_inv i_1972502(.A(n_3331596), .Z(i_psram_sub_function_plus_2[10]) - ); - notech_inv i_1982501(.A(n_2401654), .Z(n_3361595)); - notech_inv i_1992500(.A(i_psram_sub_mem_addr[11]), .Z(n_3391594)); - notech_nand2 i_2002499(.A(n_3391594), .B(n_2401654), .Z(n_3401593)); - notech_nand2 i_2012498(.A(i_psram_sub_mem_addr[11]), .B(n_3361595), .Z(n_3371592 - )); - notech_nand2 i_2022497(.A(n_3371592), .B(n_3401593), .Z(n_3381591)); - notech_inv i_2032496(.A(n_3381591), .Z(i_psram_sub_function_plus_2[11]) - ); - notech_inv i_2042495(.A(n_241), .Z(n_3411590)); - notech_inv i_2052494(.A(i_psram_sub_mem_addr[12]), .Z(n_3441589)); - notech_nand2 i_2062493(.A(n_3441589), .B(n_241), .Z(n_3451588)); - notech_nand2 i_2072492(.A(i_psram_sub_mem_addr[12]), .B(n_3411590), .Z(n_3421587 - )); - notech_nand2 i_2082491(.A(n_3421587), .B(n_3451588), .Z(n_3431586)); - notech_inv i_2092490(.A(n_3431586), .Z(i_psram_sub_function_plus_2[12]) - ); - notech_inv i_2102489(.A(n_2421653), .Z(n_3461585)); - notech_inv i_2112488(.A(i_psram_sub_mem_addr[13]), .Z(n_3491584)); - notech_nand2 i_2122487(.A(n_3491584), .B(n_2421653), .Z(n_3501583)); - notech_nand2 i_2132486(.A(i_psram_sub_mem_addr[13]), .B(n_3461585), .Z(n_3471582 - )); - notech_nand2 i_2142485(.A(n_3471582), .B(n_3501583), .Z(n_3481581)); - notech_inv i_2152484(.A(n_3481581), .Z(i_psram_sub_function_plus_2[13]) - ); - notech_inv i_2162483(.A(n_2431652), .Z(n_3511580)); - notech_inv i_2172482(.A(i_psram_sub_mem_addr[14]), .Z(n_3541579)); - notech_nand2 i_2182481(.A(n_3541579), .B(n_2431652), .Z(n_3551578)); - notech_nand2 i_2192480(.A(i_psram_sub_mem_addr[14]), .B(n_3511580), .Z(n_3521577 - )); - notech_nand2 i_2202479(.A(n_3521577), .B(n_3551578), .Z(n_3531576)); - notech_inv i_2212478(.A(n_3531576), .Z(i_psram_sub_function_plus_2[14]) - ); - notech_inv i_2222477(.A(n_2441651), .Z(n_3561575)); - notech_inv i_2232476(.A(i_psram_sub_mem_addr[15]), .Z(n_3591574)); - notech_nand2 i_2242475(.A(n_3591574), .B(n_2441651), .Z(n_3601573)); - notech_nand2 i_2252474(.A(i_psram_sub_mem_addr[15]), .B(n_3561575), .Z(n_3571572 - )); - notech_nand2 i_2262473(.A(n_3571572), .B(n_3601573), .Z(n_3581571)); - notech_inv i_2272472(.A(n_3581571), .Z(i_psram_sub_function_plus_2[15]) - ); - notech_inv i_2282471(.A(n_2821650), .Z(n_3611570)); - notech_inv i_2292470(.A(i_psram_sub_mem_addr[16]), .Z(n_3641569)); - notech_nand2 i_2302469(.A(n_3641569), .B(n_2821650), .Z(n_3651568)); - notech_nand2 i_2312468(.A(i_psram_sub_mem_addr[16]), .B(n_3611570), .Z(n_3621567 - )); - notech_nand2 i_2322467(.A(n_3621567), .B(n_3651568), .Z(n_3631566)); - notech_inv i_2332466(.A(n_3631566), .Z(i_psram_sub_function_plus_2[16]) - ); - notech_inv i_2342465(.A(n_2461649), .Z(n_3661565)); - notech_inv i_2352464(.A(i_psram_sub_mem_addr[17]), .Z(n_3691564)); - notech_nand2 i_2362463(.A(n_3691564), .B(n_2461649), .Z(n_3701563)); - notech_nand2 i_2372462(.A(i_psram_sub_mem_addr[17]), .B(n_3661565), .Z(n_3671562 - )); - notech_nand2 i_2382461(.A(n_3671562), .B(n_3701563), .Z(n_3681561)); - notech_inv i_2392460(.A(n_3681561), .Z(i_psram_sub_function_plus_2[17]) - ); - notech_inv i_2402459(.A(n_2471648), .Z(n_3711560)); - notech_inv i_2412458(.A(i_psram_sub_mem_addr[18]), .Z(n_3741559)); - notech_nand2 i_2422457(.A(n_3741559), .B(n_2471648), .Z(n_3751558)); - notech_nand2 i_2432456(.A(i_psram_sub_mem_addr[18]), .B(n_3711560), .Z(n_3721557 - )); - notech_nand2 i_2442455(.A(n_3721557), .B(n_3751558), .Z(n_3731556)); - notech_inv i_2452454(.A(n_3731556), .Z(i_psram_sub_function_plus_2[18]) - ); - notech_inv i_2462453(.A(n_2481647), .Z(n_3761555)); - notech_inv i_2472452(.A(i_psram_sub_mem_addr[19]), .Z(n_3791554)); - notech_nand2 i_2482451(.A(n_3791554), .B(n_2481647), .Z(n_3801553)); - notech_nand2 i_2492450(.A(i_psram_sub_mem_addr[19]), .B(n_3761555), .Z(n_3771552 - )); - notech_nand2 i_2502449(.A(n_3771552), .B(n_3801553), .Z(n_3781551)); - notech_inv i_2512448(.A(n_3781551), .Z(i_psram_sub_function_plus_2[19]) - ); - notech_inv i_2522447(.A(n_2491646), .Z(n_381)); - notech_inv i_2532446(.A(i_psram_sub_mem_addr[20]), .Z(n_384)); - notech_nand2 i_2542445(.A(n_384), .B(n_2491646), .Z(n_385)); - notech_nand2 i_2552444(.A(i_psram_sub_mem_addr[20]), .B(n_381), .Z(n_382 - )); - notech_nand2 i_2562443(.A(n_382), .B(n_385), .Z(n_383)); - notech_inv i_2572442(.A(n_383), .Z(i_psram_sub_function_plus_2[20])); - notech_inv i_258(.A(n_250), .Z(n_3861550)); - notech_inv i_259(.A(i_psram_sub_mem_addr[21]), .Z(n_3891549)); - notech_nand2 i_260(.A(n_3891549), .B(n_250), .Z(n_3901548)); - notech_nand2 i_261(.A(i_psram_sub_mem_addr[21]), .B(n_3861550), .Z(n_3871547 - )); - notech_nand2 i_262(.A(n_3871547), .B(n_3901548), .Z(n_3881546)); - notech_inv i_263(.A(n_3881546), .Z(i_psram_sub_function_plus_2[21])); - notech_inv i_2642441(.A(n_251), .Z(n_3911545)); - notech_inv i_2652440(.A(i_psram_sub_mem_addr[22]), .Z(n_3941544)); - notech_nand2 i_2662439(.A(n_3941544), .B(n_251), .Z(n_3951543)); - notech_nand2 i_2672438(.A(i_psram_sub_mem_addr[22]), .B(n_3911545), .Z(n_3921542 - )); - notech_nand2 i_2682437(.A(n_3921542), .B(n_3951543), .Z(n_3931541)); - notech_inv i_269(.A(n_3931541), .Z(i_psram_sub_function_plus_2[22])); - notech_inv i_122436(.A(n_2491525), .Z(n_3711414)); - notech_inv i_172435(.A(n_4181343), .Z(n_4691274)); - notech_inv i_492434(.A(n_2421532), .Z(n_3631422)); - notech_inv i_591707(.A(n_2421532), .Z(n_6251413)); - notech_inv i_592433(.A(i_psram_sub_axi_awaddr[1]), .Z(n_2651524)); - notech_inv i_602432(.A(i_psram_sub_axi_awaddr[10]), .Z(n_2741515)); - notech_inv i_611706(.A(n_6421389), .Z(n_6901309)); - notech_inv i_612431(.A(i_psram_sub_axi_awaddr[11]), .Z(n_2751514)); - notech_inv i_621705(.A(i_psram_sub_axi_awaddr[11]), .Z(n_6021456)); - notech_inv i_622430(.A(i_psram_sub_axi_awaddr[12]), .Z(n_2761513)); - notech_inv i_631704(.A(n_6011455), .Z(n_6491378)); - notech_inv i_632429(.A(i_psram_sub_axi_awaddr[13]), .Z(n_2771512)); - notech_inv i_641703(.A(i_psram_sub_axi_awaddr[13]), .Z(n_6061450)); - notech_inv i_642428(.A(i_psram_sub_axi_awaddr[14]), .Z(n_2781511)); - notech_inv i_651702(.A(n_6891308), .Z(n_7371232)); - notech_inv i_652427(.A(i_psram_sub_axi_awaddr[15]), .Z(n_2791510)); - notech_inv i_661701(.A(i_psram_sub_axi_awaddr[15]), .Z(n_6101444)); - notech_inv i_662426(.A(i_psram_sub_axi_awaddr[16]), .Z(n_2801509)); - notech_inv i_671700(.A(n_6091443), .Z(n_6571366)); - notech_inv i_672425(.A(i_psram_sub_axi_awaddr[17]), .Z(n_2811508)); - notech_inv i_681699(.A(i_psram_sub_axi_awaddr[17]), .Z(n_6141438)); - notech_inv i_682424(.A(i_psram_sub_axi_awaddr[18]), .Z(n_2821507)); - notech_inv i_691698(.A(n_6581365), .Z(n_7061285)); - notech_inv i_692423(.A(i_psram_sub_axi_awaddr[19]), .Z(n_2831506)); - notech_inv i_701697(.A(i_psram_sub_axi_awaddr[19]), .Z(n_6181432)); - notech_inv i_702422(.A(i_psram_sub_axi_awaddr[20]), .Z(n_2841505)); - notech_inv i_711696(.A(n_6171431), .Z(n_6651354)); - notech_inv i_711695(.A(i_psram_sub_axi_awaddr[21]), .Z(n_2851504)); - notech_inv i_741694(.A(i_psram_sub_axi_awaddr[21]), .Z(n_6221426)); - notech_inv i_741693(.A(i_psram_sub_axi_awaddr[22]), .Z(n_2861503)); - notech_inv i_741692(.A(n_4171344), .Z(n_4681275)); - notech_inv i_761691(.A(n_6401392), .Z(n_6881312)); - notech_inv i_761690(.A(i_psram_sub_axi_awaddr[10]), .Z(n_6001459)); - notech_inv i_761689(.A(n_5991458), .Z(n_6471381)); - notech_inv i_761688(.A(i_psram_sub_axi_awaddr[12]), .Z(n_6041453)); - notech_inv i_761687(.A(n_6871311), .Z(n_7351235)); - notech_inv i_761686(.A(i_psram_sub_axi_awaddr[14]), .Z(n_6081447)); - notech_inv i_761685(.A(n_6071446), .Z(n_6551369)); - notech_inv i_761684(.A(i_psram_sub_axi_awaddr[16]), .Z(n_6121441)); - notech_inv i_761683(.A(n_6561368), .Z(n_7041288)); - notech_inv i_761682(.A(i_psram_sub_axi_awaddr[18]), .Z(n_6161435)); - notech_inv i_761681(.A(n_6151434), .Z(n_6631357)); - notech_inv i_761680(.A(i_psram_sub_axi_awaddr[20]), .Z(n_6201429)); - notech_inv i_741679(.A(n_4671276), .Z(n_5221224)); - notech_inv i_761678(.A(n_5971461), .Z(n_6451384)); - notech_inv i_761677(.A(n_6851314), .Z(n_7331238)); - notech_inv i_761676(.A(n_6051449), .Z(n_6531372)); - notech_inv i_761675(.A(n_6541371), .Z(n_7021291)); - notech_inv i_761674(.A(n_6131437), .Z(n_6611360)); - notech_inv i_741673(.A(n_3701415), .Z(n_4191342)); - notech_inv i_741672(.A(n_4661277), .Z(n_5211225)); - notech_inv i_741671(.A(n_3641421), .Z(n_4111350)); - notech_inv i_761670(.A(n_5951463), .Z(n_6431387)); - notech_inv i_761669(.A(n_6831317), .Z(n_7311241)); - notech_inv i_761668(.A(n_6031452), .Z(n_6511375)); - notech_inv i_761667(.A(n_6521374), .Z(n_7001294)); - notech_inv i_761666(.A(n_6111440), .Z(n_6591363)); - notech_inv i_741665(.A(n_4651278), .Z(n_5201226)); - notech_inv i_761664(.A(n_6811320), .Z(n_7291244)); - notech_inv i_761663(.A(n_6501377), .Z(n_6981297)); - notech_inv i_761662(.A(n_4641279), .Z(n_7441213)); - notech_inv i_761661(.A(n_6791323), .Z(n_7271247)); - notech_inv i_761660(.A(n_6481380), .Z(n_6961300)); - notech_inv i_741659(.A(n_2491525), .Z(n_4711273)); - notech_inv i_761658(.A(n_6461383), .Z(n_6941303)); - notech_inv i_762421(.A(n_6441386), .Z(n_6921306)); - notech_inv i_741657(.A(n_2941500), .Z(n_7671193)); - notech_inv i_742420(.A(i_psram_sub_axi_awaddr[1]), .Z(n_7621194)); - notech_inv i_1250(.A(i_psram_sub_axi_awaddr[0]), .Z(n_7571195)); - notech_inv i_22419(.A(s00_axi_awlen[0]), .Z(n_2181540)); - notech_inv i_32418(.A(s00_axi_awlen[1]), .Z(n_2191539)); - notech_inv i_42417(.A(s00_axi_awlen[2]), .Z(n_2201538)); - notech_inv i_52416(.A(s00_axi_awlen[3]), .Z(n_2211537)); - notech_inv i_62415(.A(s00_axi_awlen[4]), .Z(n_2221536)); - notech_inv i_72414(.A(s00_axi_awlen[5]), .Z(n_2231535)); - notech_inv i_82413(.A(s00_axi_awlen[6]), .Z(n_2241534)); - notech_inv i_92412(.A(s00_axi_awlen[7]), .Z(n_2251533)); - notech_nor2 i_262411(.A(i_psram_sub_axi_awaddr[2]), .B(n_2181540), .Z(n_2421532 - )); - notech_nor2 i_272410(.A(i_psram_sub_axi_awaddr[3]), .B(n_2191539), .Z(n_2431531 - )); - notech_nor2 i_282409(.A(i_psram_sub_axi_awaddr[4]), .B(n_2201538), .Z(n_2441530 - )); - notech_nor2 i_292408(.A(i_psram_sub_axi_awaddr[5]), .B(n_2211537), .Z(n_2451529 - )); - notech_nor2 i_302407(.A(i_psram_sub_axi_awaddr[6]), .B(n_2221536), .Z(n_2461528 - )); - notech_nor2 i_312406(.A(i_psram_sub_axi_awaddr[7]), .B(n_2231535), .Z(n_2471527 - )); - notech_nor2 i_322405(.A(i_psram_sub_axi_awaddr[8]), .B(n_2241534), .Z(n_2481526 - )); - notech_nor2 i_332404(.A(i_psram_sub_axi_awaddr[9]), .B(n_2251533), .Z(n_2491525 - )); - notech_nand2 i_502403(.A(i_psram_sub_axi_awaddr[2]), .B(n_2181540), .Z(n_2661523 - )); - notech_nand2 i_512402(.A(i_psram_sub_axi_awaddr[3]), .B(n_2191539), .Z(n_2671522 - )); - notech_nand2 i_522401(.A(i_psram_sub_axi_awaddr[4]), .B(n_2201538), .Z(n_2681521 - )); - notech_nand2 i_532400(.A(i_psram_sub_axi_awaddr[5]), .B(n_2211537), .Z(n_2691520 - )); - notech_nand2 i_542399(.A(i_psram_sub_axi_awaddr[6]), .B(n_2221536), .Z(n_2701519 - )); - notech_nand2 i_552398(.A(i_psram_sub_axi_awaddr[7]), .B(n_2231535), .Z(n_2711518 - )); - notech_nand2 i_562397(.A(i_psram_sub_axi_awaddr[8]), .B(n_2241534), .Z(n_2721517 - )); - notech_nand2 i_572396(.A(i_psram_sub_axi_awaddr[9]), .B(n_2251533), .Z(n_2731516 - )); - notech_inv i_722395(.A(i_psram_sub_axi_awaddr[0]), .Z(n_2881502)); - notech_inv i_772394(.A(n_2421532), .Z(n_2931501)); - notech_nand2 i_782393(.A(n_2931501), .B(n_2661523), .Z(n_2941500)); - notech_inv i_792392(.A(n_2431531), .Z(n_2951499)); - notech_nand2 i_802391(.A(n_2951499), .B(n_2671522), .Z(n_2961498)); - notech_inv i_812390(.A(n_2441530), .Z(n_2971497)); - notech_nand2 i_822389(.A(n_2971497), .B(n_2681521), .Z(n_2981496)); - notech_inv i_832388(.A(n_2451529), .Z(n_2991495)); - notech_nand2 i_842387(.A(n_2991495), .B(n_2691520), .Z(n_3001494)); - notech_inv i_852386(.A(n_2461528), .Z(n_3011493)); - notech_nand2 i_862385(.A(n_3011493), .B(n_2701519), .Z(n_3021492)); - notech_inv i_872384(.A(n_2471527), .Z(n_3031491)); - notech_nand2 i_882383(.A(n_3031491), .B(n_2711518), .Z(n_3041490)); - notech_inv i_892382(.A(n_2481526), .Z(n_3051489)); - notech_nand2 i_902381(.A(n_3051489), .B(n_2721517), .Z(n_3061488)); - notech_inv i_912380(.A(n_2491525), .Z(n_3071487)); - notech_nand2 i_922379(.A(n_3071487), .B(n_2731516), .Z(n_3081486)); - notech_or2 i_3602378(.A(n_2421532), .B(n_2651524), .Z(n_5821485)); - notech_and2 i_3612377(.A(n_5821485), .B(n_2661523), .Z(n_5811484)); - notech_inv i_3622376(.A(n_5811484), .Z(n_3391483)); - notech_or2 i_3632375(.A(n_2431531), .B(n_2661523), .Z(n_5841482)); - notech_and2 i_3642374(.A(n_5841482), .B(n_2671522), .Z(n_5831481)); - notech_inv i_3652373(.A(n_5831481), .Z(n_3401480)); - notech_or2 i_3662372(.A(n_2441530), .B(n_2671522), .Z(n_5861479)); - notech_and2 i_3672371(.A(n_5861479), .B(n_2681521), .Z(n_5851478)); - notech_inv i_3682370(.A(n_5851478), .Z(n_3411477)); - notech_or2 i_3692369(.A(n_2451529), .B(n_2681521), .Z(n_5881476)); - notech_and2 i_3702368(.A(n_5881476), .B(n_2691520), .Z(n_5871475)); - notech_inv i_3712367(.A(n_5871475), .Z(n_3421474)); - notech_or2 i_3722366(.A(n_2461528), .B(n_2691520), .Z(n_5901473)); - notech_and2 i_3732365(.A(n_5901473), .B(n_2701519), .Z(n_5891472)); - notech_inv i_3742364(.A(n_5891472), .Z(n_3431471)); - notech_or2 i_3752363(.A(n_2471527), .B(n_2701519), .Z(n_5921470)); - notech_and2 i_3762362(.A(n_5921470), .B(n_2711518), .Z(n_5911469)); - notech_inv i_3772361(.A(n_5911469), .Z(n_3441468)); - notech_or2 i_3782360(.A(n_2481526), .B(n_2711518), .Z(n_5941467)); - notech_and2 i_3792359(.A(n_5941467), .B(n_2721517), .Z(n_5931466)); - notech_inv i_3802358(.A(n_5931466), .Z(n_3451465)); - notech_or2 i_3812357(.A(n_2491525), .B(n_2721517), .Z(n_5961464)); - notech_and2 i_3822356(.A(n_5961464), .B(n_2731516), .Z(n_5951463)); - notech_inv i_3832355(.A(n_5951463), .Z(n_3461462)); - notech_and2 i_3852354(.A(n_2731516), .B(n_2741515), .Z(n_5971461)); - notech_inv i_3862353(.A(n_5971461), .Z(n_3471460)); - notech_and2 i_3882352(.A(n_6001459), .B(n_2751514), .Z(n_5991458)); - notech_inv i_3892351(.A(n_5991458), .Z(n_3481457)); - notech_and2 i_3912350(.A(n_6021456), .B(n_2761513), .Z(n_6011455)); - notech_inv i_3922349(.A(n_6011455), .Z(n_3491454)); - notech_and2 i_3942348(.A(n_6041453), .B(n_2771512), .Z(n_6031452)); - notech_inv i_3952347(.A(n_6031452), .Z(n_3501451)); - notech_and2 i_3972346(.A(n_6061450), .B(n_2781511), .Z(n_6051449)); - notech_inv i_3982345(.A(n_6051449), .Z(n_3511448)); - notech_and2 i_4002344(.A(n_6081447), .B(n_2791510), .Z(n_6071446)); - notech_inv i_4012343(.A(n_6071446), .Z(n_3521445)); - notech_and2 i_4032342(.A(n_6101444), .B(n_2801509), .Z(n_6091443)); - notech_inv i_4042341(.A(n_6091443), .Z(n_3531442)); - notech_and2 i_4062340(.A(n_6121441), .B(n_2811508), .Z(n_6111440)); - notech_inv i_4072339(.A(n_6111440), .Z(n_3541439)); - notech_and2 i_4092338(.A(n_6141438), .B(n_2821507), .Z(n_6131437)); - notech_inv i_4102337(.A(n_6131437), .Z(n_3551436)); - notech_and2 i_4122336(.A(n_6161435), .B(n_2831506), .Z(n_6151434)); - notech_inv i_4132335(.A(n_6151434), .Z(n_3561433)); - notech_and2 i_4152334(.A(n_6181432), .B(n_2841505), .Z(n_6171431)); - notech_inv i_4162333(.A(n_6171431), .Z(n_3571430)); - notech_and2 i_4182332(.A(n_6201429), .B(n_2851504), .Z(n_6191428)); - notech_inv i_4192331(.A(n_6191428), .Z(n_3581427)); - notech_and2 i_4212330(.A(n_6221426), .B(n_2861503), .Z(n_6211425)); - notech_inv i_4222329(.A(n_6211425), .Z(n_3591424)); - notech_inv i_1442328(.A(n_2881502), .Z(n_3601423)); - notech_nor2 i_1482327(.A(n_2421532), .B(n_2431531), .Z(n_3641421)); - notech_nor2 i_1492326(.A(n_2431531), .B(n_2441530), .Z(n_3651420)); - notech_nor2 i_1502325(.A(n_2441530), .B(n_2451529), .Z(n_3661419)); - notech_nor2 i_1512324(.A(n_2451529), .B(n_2461528), .Z(n_3671418)); - notech_nor2 i_1522323(.A(n_2461528), .B(n_2471527), .Z(n_3681417)); - notech_nor2 i_1532322(.A(n_2471527), .B(n_2481526), .Z(n_3691416)); - notech_nor2 i_1542321(.A(n_2481526), .B(n_2491525), .Z(n_3701415)); - notech_or2 i_4272320(.A(n_6251413), .B(n_3391483), .Z(n_6261412)); - notech_inv i_4282319(.A(n_6261412), .Z(n_3861411)); - notech_or2 i_4302318(.A(n_3641421), .B(n_3401480), .Z(n_6281410)); - notech_inv i_4312317(.A(n_6281410), .Z(n_3871409)); - notech_and2 i_4322316(.A(n_3651420), .B(n_3391483), .Z(n_6291408)); - notech_or2 i_4332315(.A(n_6291408), .B(n_3411477), .Z(n_6301407)); - notech_inv i_4342314(.A(n_6301407), .Z(n_3881406)); - notech_and2 i_4352313(.A(n_3661419), .B(n_3401480), .Z(n_6311405)); - notech_or2 i_4362312(.A(n_6311405), .B(n_3421474), .Z(n_6321404)); - notech_inv i_4372311(.A(n_6321404), .Z(n_3891403)); - notech_and2 i_4382310(.A(n_3671418), .B(n_3411477), .Z(n_6331402)); - notech_or2 i_4392309(.A(n_6331402), .B(n_3431471), .Z(n_6341401)); - notech_inv i_4402308(.A(n_6341401), .Z(n_3901400)); - notech_and2 i_4412307(.A(n_3681417), .B(n_3421474), .Z(n_6351399)); - notech_or2 i_4422306(.A(n_6351399), .B(n_3441468), .Z(n_6361398)); - notech_inv i_4432305(.A(n_6361398), .Z(n_3911397)); - notech_and2 i_4442304(.A(n_3691416), .B(n_3431471), .Z(n_6371396)); - notech_or2 i_4452303(.A(n_6371396), .B(n_3451465), .Z(n_6381395)); - notech_inv i_4462302(.A(n_6381395), .Z(n_3921394)); - notech_and2 i_4472301(.A(n_3701415), .B(n_3441468), .Z(n_6391393)); - notech_or2 i_4482300(.A(n_6391393), .B(n_3461462), .Z(n_6401392)); - notech_inv i_4492299(.A(n_6401392), .Z(n_3931391)); - notech_and2 i_4502298(.A(n_3711414), .B(n_3451465), .Z(n_6411390)); - notech_or2 i_4512297(.A(n_6411390), .B(n_3471460), .Z(n_6421389)); - notech_inv i_4522296(.A(n_6421389), .Z(n_3941388)); - notech_or2 i_4542295(.A(n_6431387), .B(n_3481457), .Z(n_6441386)); - notech_inv i_4552294(.A(n_6441386), .Z(n_3951385)); - notech_or2 i_4572293(.A(n_6451384), .B(n_3491454), .Z(n_6461383)); - notech_inv i_4582292(.A(n_6461383), .Z(n_3961382)); - notech_or2 i_4602291(.A(n_6471381), .B(n_3501451), .Z(n_6481380)); - notech_inv i_4612290(.A(n_6481380), .Z(n_3971379)); - notech_or2 i_4632289(.A(n_6491378), .B(n_3511448), .Z(n_6501377)); - notech_inv i_4642288(.A(n_6501377), .Z(n_3981376)); - notech_or2 i_4662287(.A(n_6511375), .B(n_3521445), .Z(n_6521374)); - notech_inv i_4672286(.A(n_6521374), .Z(n_3991373)); - notech_or2 i_4692285(.A(n_6531372), .B(n_3531442), .Z(n_6541371)); - notech_inv i_4702284(.A(n_6541371), .Z(n_4001370)); - notech_or2 i_4722283(.A(n_6551369), .B(n_3541439), .Z(n_6561368)); - notech_inv i_4732282(.A(n_6561368), .Z(n_4011367)); - notech_or2 i_4752281(.A(n_6571366), .B(n_3551436), .Z(n_6581365)); - notech_inv i_4762280(.A(n_6581365), .Z(n_4021364)); - notech_or2 i_4782279(.A(n_6591363), .B(n_3561433), .Z(n_6601362)); - notech_inv i_4792278(.A(n_6601362), .Z(n_4031361)); - notech_or2 i_4812277(.A(n_6611360), .B(n_3571430), .Z(n_6621359)); - notech_inv i_4822276(.A(n_6621359), .Z(n_4041358)); - notech_or2 i_4842275(.A(n_6631357), .B(n_3581427), .Z(n_6641356)); - notech_inv i_4852274(.A(n_6641356), .Z(n_4051355)); - notech_or2 i_4872273(.A(n_6651354), .B(n_3591424), .Z(n_6661353)); - notech_inv i_4882272(.A(n_6661353), .Z(n_4061352)); - notech_inv i_1912271(.A(n_3601423), .Z(n_4071351)); - notech_nand2 i_1962270(.A(n_3631422), .B(n_3651420), .Z(n_4121349)); - notech_nand2 i_1972269(.A(n_3641421), .B(n_3661419), .Z(n_4131348)); - notech_nand2 i_1982268(.A(n_3651420), .B(n_3671418), .Z(n_4141347)); - notech_nand2 i_1992267(.A(n_3661419), .B(n_3681417), .Z(n_4151346)); - notech_nand2 i_2002266(.A(n_3671418), .B(n_3691416), .Z(n_4161345)); - notech_nand2 i_2012265(.A(n_3681417), .B(n_3701415), .Z(n_4171344)); - notech_nand2 i_2022264(.A(n_3691416), .B(n_3711414), .Z(n_4181343)); - notech_inv i_2172263(.A(n_3861411), .Z(n_4331341)); - notech_or2 i_4892262(.A(n_4111350), .B(n_4071351), .Z(n_6681340)); - notech_and2 i_4902261(.A(n_6681340), .B(n_3871409), .Z(n_6671339)); - notech_inv i_4912260(.A(n_6671339), .Z(n_4341338)); - notech_and2 i_4932259(.A(n_4121349), .B(n_3881406), .Z(n_6691337)); - notech_inv i_4942258(.A(n_6691337), .Z(n_4351336)); - notech_and2 i_4962257(.A(n_4131348), .B(n_3891403), .Z(n_6711335)); - notech_inv i_4972256(.A(n_6711335), .Z(n_4361334)); - notech_or2 i_4982255(.A(n_4141347), .B(n_3861411), .Z(n_6741333)); - notech_and2 i_4992254(.A(n_6741333), .B(n_3901400), .Z(n_6731332)); - notech_inv i_5002253(.A(n_6731332), .Z(n_4371331)); - notech_or2 i_5012252(.A(n_4151346), .B(n_3871409), .Z(n_6761330)); - notech_and2 i_5022251(.A(n_6761330), .B(n_3911397), .Z(n_6751329)); - notech_inv i_5032250(.A(n_6751329), .Z(n_4381328)); - notech_or2 i_5042249(.A(n_4161345), .B(n_3881406), .Z(n_6781327)); - notech_and2 i_5052248(.A(n_6781327), .B(n_3921394), .Z(n_6771326)); - notech_inv i_5062247(.A(n_6771326), .Z(n_4391325)); - notech_or2 i_5072246(.A(n_4171344), .B(n_3891403), .Z(n_6801324)); - notech_and2 i_5082245(.A(n_6801324), .B(n_3931391), .Z(n_6791323)); - notech_inv i_5092244(.A(n_6791323), .Z(n_4401322)); - notech_or2 i_5102243(.A(n_4181343), .B(n_3901400), .Z(n_6821321)); - notech_and2 i_5112242(.A(n_6821321), .B(n_3941388), .Z(n_6811320)); - notech_inv i_5122241(.A(n_6811320), .Z(n_4411319)); - notech_or2 i_5132240(.A(n_4191342), .B(n_3911397), .Z(n_6841318)); - notech_and2 i_5142239(.A(n_6841318), .B(n_3951385), .Z(n_6831317)); - notech_inv i_5152238(.A(n_6831317), .Z(n_4421316)); - notech_or2 i_5162237(.A(n_2491525), .B(n_3921394), .Z(n_6861315)); - notech_and2 i_5172236(.A(n_6861315), .B(n_3961382), .Z(n_6851314)); - notech_inv i_5182235(.A(n_6851314), .Z(n_4431313)); - notech_and2 i_5202234(.A(n_6881312), .B(n_3971379), .Z(n_6871311)); - notech_inv i_5212233(.A(n_6871311), .Z(n_4441310)); - notech_and2 i_5232232(.A(n_6901309), .B(n_3981376), .Z(n_6891308)); - notech_inv i_5242231(.A(n_6891308), .Z(n_4451307)); - notech_and2 i_5262230(.A(n_6921306), .B(n_3991373), .Z(n_6911305)); - notech_inv i_5272229(.A(n_6911305), .Z(n_4461304)); - notech_and2 i_5292228(.A(n_6941303), .B(n_4001370), .Z(n_6931302)); - notech_inv i_5302227(.A(n_6931302), .Z(n_4471301)); - notech_and2 i_5322226(.A(n_6961300), .B(n_4011367), .Z(n_6951299)); - notech_inv i_5332225(.A(n_6951299), .Z(n_4481298)); - notech_and2 i_5352224(.A(n_6981297), .B(n_4021364), .Z(n_6971296)); - notech_inv i_5362223(.A(n_6971296), .Z(n_4491295)); - notech_and2 i_5382222(.A(n_7001294), .B(n_4031361), .Z(n_6991293)); - notech_inv i_5392221(.A(n_6991293), .Z(n_4501292)); - notech_and2 i_5412220(.A(n_7021291), .B(n_4041358), .Z(n_7011290)); - notech_inv i_5422219(.A(n_7011290), .Z(n_4511289)); - notech_and2 i_5442218(.A(n_7041288), .B(n_4051355), .Z(n_7031287)); - notech_inv i_5452217(.A(n_7031287), .Z(n_4521286)); - notech_and2 i_5472216(.A(n_7061285), .B(n_4061352), .Z(n_7051284)); - notech_inv i_5482215(.A(n_7051284), .Z(n_4531283)); - notech_inv i_2382214(.A(n_4071351), .Z(n_4541282)); - notech_nor2 i_2462213(.A(n_4111350), .B(n_4151346), .Z(n_4621281)); - notech_nor2 i_2472212(.A(n_4121349), .B(n_4161345), .Z(n_4631280)); - notech_nor2 i_2482211(.A(n_4131348), .B(n_4171344), .Z(n_4641279)); - notech_nor2 i_2492210(.A(n_4141347), .B(n_4181343), .Z(n_4651278)); - notech_nor2 i_2502209(.A(n_4151346), .B(n_4191342), .Z(n_4661277)); - notech_nor2 i_2512208(.A(n_4161345), .B(n_2491525), .Z(n_4671276)); - notech_inv i_2642207(.A(n_4331341), .Z(n_4801272)); - notech_inv i_2652206(.A(n_4341338), .Z(n_4811271)); - notech_inv i_2662205(.A(n_4351336), .Z(n_4821270)); - notech_inv i_2672204(.A(n_4361334), .Z(n_4831269)); - notech_inv i_2682203(.A(n_4371331), .Z(n_4841268)); - notech_and2 i_5492202(.A(n_4621281), .B(n_4541282), .Z(n_7071267)); - notech_or2 i_5502201(.A(n_7071267), .B(n_4381328), .Z(n_7081266)); - notech_or2 i_5532200(.A(n_4631280), .B(n_4391325), .Z(n_7101265)); - notech_or2 i_5562199(.A(n_4641279), .B(n_4401322), .Z(n_7121264)); - notech_and2 i_5582198(.A(n_4651278), .B(n_4331341), .Z(n_7131263)); - notech_or2 i_5592197(.A(n_7131263), .B(n_4411319), .Z(n_7141262)); - notech_and2 i_5612196(.A(n_4661277), .B(n_4341338), .Z(n_7151261)); - notech_or2 i_5622195(.A(n_7151261), .B(n_4421316), .Z(n_7161260)); - notech_and2 i_5642194(.A(n_4671276), .B(n_4351336), .Z(n_7171259)); - notech_or2 i_5652193(.A(n_7171259), .B(n_4431313), .Z(n_7181258)); - notech_and2 i_5672192(.A(n_4681275), .B(n_4361334), .Z(n_7191257)); - notech_or2 i_5682191(.A(n_7191257), .B(n_4441310), .Z(n_7201256)); - notech_and2 i_5702190(.A(n_4691274), .B(n_4371331), .Z(n_7211255)); - notech_or2 i_5712189(.A(n_7211255), .B(n_4451307), .Z(n_7221254)); - notech_and2 i_5732188(.A(n_3701415), .B(n_4381328), .Z(n_7231253)); - notech_or2 i_5742187(.A(n_7231253), .B(n_4461304), .Z(n_7241252)); - notech_inv i_5752186(.A(n_7241252), .Z(n_4931251)); - notech_and2 i_5762185(.A(n_4711273), .B(n_4391325), .Z(n_7251250)); - notech_or2 i_5772184(.A(n_7251250), .B(n_4471301), .Z(n_7261249)); - notech_inv i_5782183(.A(n_7261249), .Z(n_4941248)); - notech_or2 i_5802182(.A(n_7271247), .B(n_4481298), .Z(n_7281246)); - notech_inv i_5812181(.A(n_7281246), .Z(n_4951245)); - notech_or2 i_5832180(.A(n_7291244), .B(n_4491295), .Z(n_7301243)); - notech_inv i_5842179(.A(n_7301243), .Z(n_4961242)); - notech_or2 i_5862178(.A(n_7311241), .B(n_4501292), .Z(n_7321240)); - notech_inv i_5872177(.A(n_7321240), .Z(n_4971239)); - notech_or2 i_5892176(.A(n_7331238), .B(n_4511289), .Z(n_7341237)); - notech_inv i_5902175(.A(n_7341237), .Z(n_4981236)); - notech_or2 i_5922174(.A(n_7351235), .B(n_4521286), .Z(n_7361234)); - notech_inv i_5932173(.A(n_7361234), .Z(n_4991233)); - notech_or2 i_5952172(.A(n_7371232), .B(n_4531283), .Z(n_7381231)); - notech_inv i_5962171(.A(n_7381231), .Z(n_5001230)); - notech_inv i_2852170(.A(n_4541282), .Z(n_5011229)); - notech_nand2 i_3012169(.A(n_4621281), .B(n_3701415), .Z(n_5171228)); - notech_nand2 i_3022168(.A(n_4631280), .B(n_4711273), .Z(n_5181227)); - notech_inv i_3112167(.A(n_4801272), .Z(n_5271223)); - notech_inv i_3122166(.A(n_4811271), .Z(n_5281222)); - notech_inv i_3132165(.A(n_4821270), .Z(n_5291221)); - notech_inv i_3142164(.A(n_4831269), .Z(n_5301220)); - notech_inv i_3152163(.A(n_4841268), .Z(n_5311219)); - notech_or2 i_5972162(.A(n_5171228), .B(n_5011229), .Z(n_7401218)); - notech_and2 i_5982161(.A(n_7401218), .B(n_4931251), .Z(n_7391217)); - notech_inv i_5992160(.A(n_7391217), .Z(n_5401216)); - notech_and2 i_6012159(.A(n_5181227), .B(n_4941248), .Z(n_7411215)); - notech_inv i_6022158(.A(n_7411215), .Z(n_5411214)); - notech_and2 i_6042157(.A(n_7441213), .B(n_4951245), .Z(n_7431212)); - notech_inv i_6052156(.A(n_7431212), .Z(n_5421211)); - notech_or2 i_6062155(.A(n_5201226), .B(n_4801272), .Z(n_7461210)); - notech_and2 i_6072154(.A(n_7461210), .B(n_4961242), .Z(n_7451209)); - notech_inv i_6082153(.A(n_7451209), .Z(n_5431208)); - notech_or2 i_6092152(.A(n_5211225), .B(n_4811271), .Z(n_7481207)); - notech_and2 i_6102151(.A(n_7481207), .B(n_4971239), .Z(n_7471206)); - notech_inv i_6112150(.A(n_7471206), .Z(n_5441205)); - notech_or2 i_6122149(.A(n_5221224), .B(n_4821270), .Z(n_7501204)); - notech_and2 i_6132148(.A(n_7501204), .B(n_4981236), .Z(n_7491203)); - notech_inv i_6142147(.A(n_7491203), .Z(n_5451202)); - notech_or2 i_6152146(.A(n_4171344), .B(n_4831269), .Z(n_7521201)); - notech_and2 i_6162145(.A(n_7521201), .B(n_4991233), .Z(n_7511200)); - notech_inv i_6172144(.A(n_7511200), .Z(n_5461199)); - notech_or2 i_6182143(.A(n_4181343), .B(n_4841268), .Z(n_7541198)); - notech_and2 i_6192142(.A(n_7541198), .B(n_5001230), .Z(n_7531197)); - notech_inv i_6202141(.A(n_7531197), .Z(n_5471196)); - notech_inv i_6262140(.A(n_7571195), .Z(i_psram_sub_function_sub_0[0])); - notech_inv i_6322139(.A(n_7621194), .Z(i_psram_sub_function_sub_0[1])); - notech_inv i_6382138(.A(n_7671193), .Z(i_psram_sub_function_sub_0[2])); - notech_inv i_6392137(.A(n_5271223), .Z(n_7701192)); - notech_inv i_6402136(.A(n_2961498), .Z(n_7731191)); - notech_nand2 i_6412135(.A(n_7731191), .B(n_5271223), .Z(n_7741190)); - notech_nand2 i_6422134(.A(n_2961498), .B(n_7701192), .Z(n_7711189)); - notech_nand2 i_6432133(.A(n_7711189), .B(n_7741190), .Z(n_7721188)); - notech_inv i_6442132(.A(n_7721188), .Z(i_psram_sub_function_sub_0[3])); - notech_inv i_6452131(.A(n_5281222), .Z(n_7751187)); - notech_inv i_6462130(.A(n_2981496), .Z(n_7781186)); - notech_nand2 i_6472129(.A(n_7781186), .B(n_5281222), .Z(n_7791185)); - notech_nand2 i_6482128(.A(n_2981496), .B(n_7751187), .Z(n_7761184)); - notech_nand2 i_6492127(.A(n_7761184), .B(n_7791185), .Z(n_7771183)); - notech_inv i_6502126(.A(n_7771183), .Z(i_psram_sub_function_sub_0[4])); - notech_inv i_6512125(.A(n_5291221), .Z(n_7801182)); - notech_inv i_6522124(.A(n_3001494), .Z(n_7831181)); - notech_nand2 i_6532123(.A(n_7831181), .B(n_5291221), .Z(n_7841180)); - notech_nand2 i_6542122(.A(n_3001494), .B(n_7801182), .Z(n_7811179)); - notech_nand2 i_6552121(.A(n_7811179), .B(n_7841180), .Z(n_7821178)); - notech_inv i_6562120(.A(n_7821178), .Z(i_psram_sub_function_sub_0[5])); - notech_inv i_6572119(.A(n_5301220), .Z(n_7851177)); - notech_inv i_6582118(.A(n_3021492), .Z(n_7881176)); - notech_nand2 i_6592117(.A(n_7881176), .B(n_5301220), .Z(n_7891175)); - notech_nand2 i_6602116(.A(n_3021492), .B(n_7851177), .Z(n_7861174)); - notech_nand2 i_6612115(.A(n_7861174), .B(n_7891175), .Z(n_7871173)); - notech_inv i_6622114(.A(n_7871173), .Z(i_psram_sub_function_sub_0[6])); - notech_inv i_6632113(.A(n_5311219), .Z(n_7901172)); - notech_inv i_6642112(.A(n_3041490), .Z(n_7931171)); - notech_nand2 i_6652111(.A(n_7931171), .B(n_5311219), .Z(n_7941170)); - notech_nand2 i_6662110(.A(n_3041490), .B(n_7901172), .Z(n_7911169)); - notech_nand2 i_6672109(.A(n_7911169), .B(n_7941170), .Z(n_7921168)); - notech_inv i_6682108(.A(n_7921168), .Z(i_psram_sub_function_sub_0[7])); - notech_inv i_6692107(.A(n_7081266), .Z(n_7951167)); - notech_inv i_6702106(.A(n_3061488), .Z(n_7981166)); - notech_nand2 i_6712105(.A(n_7981166), .B(n_7081266), .Z(n_7991165)); - notech_nand2 i_6722104(.A(n_3061488), .B(n_7951167), .Z(n_7961164)); - notech_nand2 i_6732103(.A(n_7961164), .B(n_7991165), .Z(n_7971163)); - notech_inv i_6742102(.A(n_7971163), .Z(i_psram_sub_function_sub_0[8])); - notech_inv i_6752101(.A(n_7101265), .Z(n_8001162)); - notech_inv i_6762100(.A(n_3081486), .Z(n_8031161)); - notech_nand2 i_6772099(.A(n_8031161), .B(n_7101265), .Z(n_8041160)); - notech_nand2 i_6782098(.A(n_3081486), .B(n_8001162), .Z(n_8011159)); - notech_nand2 i_6792097(.A(n_8011159), .B(n_8041160), .Z(n_8021158)); - notech_inv i_6802096(.A(n_8021158), .Z(i_psram_sub_function_sub_0[9])); - notech_inv i_6812095(.A(n_7121264), .Z(n_8051157)); - notech_inv i_6822094(.A(i_psram_sub_axi_awaddr[10]), .Z(n_8081156)); - notech_nand2 i_6832093(.A(n_8081156), .B(n_7121264), .Z(n_8091155)); - notech_nand2 i_6842092(.A(i_psram_sub_axi_awaddr[10]), .B(n_8051157), .Z - (n_8061154)); - notech_nand2 i_6852091(.A(n_8061154), .B(n_8091155), .Z(n_8071153)); - notech_inv i_6862090(.A(n_8071153), .Z(i_psram_sub_function_sub_0[10]) - ); - notech_inv i_6872089(.A(n_7141262), .Z(n_8101152)); - notech_inv i_6882088(.A(i_psram_sub_axi_awaddr[11]), .Z(n_8131151)); - notech_nand2 i_6892087(.A(n_8131151), .B(n_7141262), .Z(n_8141150)); - notech_nand2 i_6902086(.A(i_psram_sub_axi_awaddr[11]), .B(n_8101152), .Z - (n_8111149)); - notech_nand2 i_6912085(.A(n_8111149), .B(n_8141150), .Z(n_8121148)); - notech_inv i_6922084(.A(n_8121148), .Z(i_psram_sub_function_sub_0[11]) - ); - notech_inv i_6932083(.A(n_7161260), .Z(n_8151147)); - notech_inv i_6942082(.A(i_psram_sub_axi_awaddr[12]), .Z(n_8181146)); - notech_nand2 i_6952081(.A(n_8181146), .B(n_7161260), .Z(n_8191145)); - notech_nand2 i_6962080(.A(i_psram_sub_axi_awaddr[12]), .B(n_8151147), .Z - (n_8161144)); - notech_nand2 i_6972079(.A(n_8161144), .B(n_8191145), .Z(n_8171143)); - notech_inv i_6982078(.A(n_8171143), .Z(i_psram_sub_function_sub_0[12]) - ); - notech_inv i_6992077(.A(n_7181258), .Z(n_8201142)); - notech_inv i_7002076(.A(i_psram_sub_axi_awaddr[13]), .Z(n_8231141)); - notech_nand2 i_7012075(.A(n_8231141), .B(n_7181258), .Z(n_8241140)); - notech_nand2 i_7022074(.A(i_psram_sub_axi_awaddr[13]), .B(n_8201142), .Z - (n_8211139)); - notech_nand2 i_7032073(.A(n_8211139), .B(n_8241140), .Z(n_8221138)); - notech_inv i_7042072(.A(n_8221138), .Z(i_psram_sub_function_sub_0[13]) - ); - notech_inv i_7052071(.A(n_7201256), .Z(n_8251137)); - notech_inv i_7062070(.A(i_psram_sub_axi_awaddr[14]), .Z(n_8281136)); - notech_nand2 i_7072069(.A(n_8281136), .B(n_7201256), .Z(n_8291135)); - notech_nand2 i_7082068(.A(i_psram_sub_axi_awaddr[14]), .B(n_8251137), .Z - (n_8261134)); - notech_nand2 i_7092067(.A(n_8261134), .B(n_8291135), .Z(n_8271133)); - notech_inv i_7102066(.A(n_8271133), .Z(i_psram_sub_function_sub_0[14]) - ); - notech_inv i_7112065(.A(n_7221254), .Z(n_8301132)); - notech_inv i_7122064(.A(i_psram_sub_axi_awaddr[15]), .Z(n_8331131)); - notech_nand2 i_7132063(.A(n_8331131), .B(n_7221254), .Z(n_8341130)); - notech_nand2 i_7142062(.A(i_psram_sub_axi_awaddr[15]), .B(n_8301132), .Z - (n_8311129)); - notech_nand2 i_7152061(.A(n_8311129), .B(n_8341130), .Z(n_8321128)); - notech_inv i_7162060(.A(n_8321128), .Z(i_psram_sub_function_sub_0[15]) - ); - notech_inv i_7172059(.A(n_5401216), .Z(n_8351127)); - notech_inv i_7182058(.A(i_psram_sub_axi_awaddr[16]), .Z(n_8381126)); - notech_nand2 i_7192057(.A(n_8381126), .B(n_5401216), .Z(n_8391125)); - notech_nand2 i_7202056(.A(i_psram_sub_axi_awaddr[16]), .B(n_8351127), .Z - (n_8361124)); - notech_nand2 i_7212055(.A(n_8361124), .B(n_8391125), .Z(n_8371123)); - notech_inv i_7222054(.A(n_8371123), .Z(i_psram_sub_function_sub_0[16]) - ); - notech_inv i_7232053(.A(n_5411214), .Z(n_8401122)); - notech_inv i_7242052(.A(i_psram_sub_axi_awaddr[17]), .Z(n_8431121)); - notech_nand2 i_7252051(.A(n_8431121), .B(n_5411214), .Z(n_8441120)); - notech_nand2 i_7262050(.A(i_psram_sub_axi_awaddr[17]), .B(n_8401122), .Z - (n_8411119)); - notech_nand2 i_7272049(.A(n_8411119), .B(n_8441120), .Z(n_8421118)); - notech_inv i_7282048(.A(n_8421118), .Z(i_psram_sub_function_sub_0[17]) - ); - notech_inv i_7292047(.A(n_5421211), .Z(n_8451117)); - notech_inv i_7302046(.A(i_psram_sub_axi_awaddr[18]), .Z(n_8481116)); - notech_nand2 i_7312045(.A(n_8481116), .B(n_5421211), .Z(n_8491115)); - notech_nand2 i_7322044(.A(i_psram_sub_axi_awaddr[18]), .B(n_8451117), .Z - (n_8461114)); - notech_nand2 i_7332043(.A(n_8461114), .B(n_8491115), .Z(n_8471113)); - notech_inv i_7342042(.A(n_8471113), .Z(i_psram_sub_function_sub_0[18]) - ); - notech_inv i_7352041(.A(n_5431208), .Z(n_8501112)); - notech_inv i_7362040(.A(i_psram_sub_axi_awaddr[19]), .Z(n_8531111)); - notech_nand2 i_7372039(.A(n_8531111), .B(n_5431208), .Z(n_8541110)); - notech_nand2 i_7382038(.A(i_psram_sub_axi_awaddr[19]), .B(n_8501112), .Z - (n_8511109)); - notech_nand2 i_7392037(.A(n_8511109), .B(n_8541110), .Z(n_8521108)); - notech_inv i_7402036(.A(n_8521108), .Z(i_psram_sub_function_sub_0[19]) - ); - notech_inv i_7412035(.A(n_5441205), .Z(n_8551107)); - notech_inv i_7422034(.A(i_psram_sub_axi_awaddr[20]), .Z(n_8581106)); - notech_nand2 i_7432033(.A(n_8581106), .B(n_5441205), .Z(n_8591105)); - notech_nand2 i_7442032(.A(i_psram_sub_axi_awaddr[20]), .B(n_8551107), .Z - (n_8561104)); - notech_nand2 i_7452031(.A(n_8561104), .B(n_8591105), .Z(n_8571103)); - notech_inv i_7462030(.A(n_8571103), .Z(i_psram_sub_function_sub_0[20]) - ); - notech_inv i_7472029(.A(n_5451202), .Z(n_8601102)); - notech_inv i_7482028(.A(i_psram_sub_axi_awaddr[21]), .Z(n_8631101)); - notech_nand2 i_7492027(.A(n_8631101), .B(n_5451202), .Z(n_8641100)); - notech_nand2 i_7502026(.A(i_psram_sub_axi_awaddr[21]), .B(n_8601102), .Z - (n_8611099)); - notech_nand2 i_7512025(.A(n_8611099), .B(n_8641100), .Z(n_8621098)); - notech_inv i_7522024(.A(n_8621098), .Z(i_psram_sub_function_sub_0[21]) - ); - notech_inv i_7532023(.A(n_5461199), .Z(n_8651097)); - notech_inv i_7542022(.A(i_psram_sub_axi_awaddr[22]), .Z(n_8681096)); - notech_nand2 i_7552021(.A(n_8681096), .B(n_5461199), .Z(n_8691095)); - notech_nand2 i_7562020(.A(i_psram_sub_axi_awaddr[22]), .B(n_8651097), .Z - (n_8661094)); - notech_nand2 i_7572019(.A(n_8661094), .B(n_8691095), .Z(n_8671093)); - notech_inv i_7582018(.A(n_8671093), .Z(i_psram_sub_function_sub_0[22]) - ); - notech_inv i_7592017(.A(n_5471196), .Z(n_8701092)); - notech_inv i_7602016(.A(i_psram_sub_axi_awaddr[23]), .Z(n_8731091)); - notech_nand2 i_7612015(.A(n_8731091), .B(n_5471196), .Z(n_8741090)); - notech_nand2 i_7622014(.A(i_psram_sub_axi_awaddr[23]), .B(n_8701092), .Z - (n_8711089)); - notech_nand2 i_7632013(.A(n_8711089), .B(n_8741090), .Z(n_8721088)); - notech_inv i_7642012(.A(n_8721088), .Z(i_psram_sub_function_sub_0[23]) - ); - notech_inv i_02011(.A(i_psram_sub_axi_awaddr[2]), .Z(\i_psram_sub_axi_awaddr_0[2] - )); - notech_nand2 i_12010(.A(i_psram_sub_axi_awaddr[2]), .B(i_psram_sub_axi_awaddr - [3]), .Z(n_1331071)); - notech_nand2 i_22009(.A(i_psram_sub_axi_awaddr[3]), .B(i_psram_sub_axi_awaddr - [4]), .Z(n_1341070)); - notech_nand2 i_32008(.A(i_psram_sub_axi_awaddr[4]), .B(i_psram_sub_axi_awaddr - [5]), .Z(n_1351069)); - notech_nand2 i_42007(.A(i_psram_sub_axi_awaddr[5]), .B(i_psram_sub_axi_awaddr - [6]), .Z(n_1361068)); - notech_nand2 i_52006(.A(i_psram_sub_axi_awaddr[6]), .B(i_psram_sub_axi_awaddr - [7]), .Z(n_1371067)); - notech_nand2 i_62005(.A(i_psram_sub_axi_awaddr[7]), .B(i_psram_sub_axi_awaddr - [8]), .Z(n_1381066)); - notech_nand2 i_72004(.A(i_psram_sub_axi_awaddr[8]), .B(i_psram_sub_axi_awaddr - [9]), .Z(n_1391065)); - notech_nand2 i_82003(.A(i_psram_sub_axi_awaddr[9]), .B(i_psram_sub_axi_awaddr - [10]), .Z(n_1401064)); - notech_nand2 i_92002(.A(i_psram_sub_axi_awaddr[10]), .B(i_psram_sub_axi_awaddr - [11]), .Z(n_1411063)); - notech_nand2 i_102001(.A(i_psram_sub_axi_awaddr[11]), .B(i_psram_sub_axi_awaddr - [12]), .Z(n_1421062)); - notech_nand2 i_112000(.A(i_psram_sub_axi_awaddr[12]), .B(i_psram_sub_axi_awaddr - [13]), .Z(n_1431061)); - notech_nand2 i_121999(.A(i_psram_sub_axi_awaddr[13]), .B(i_psram_sub_axi_awaddr - [14]), .Z(n_1441060)); - notech_nand2 i_131998(.A(i_psram_sub_axi_awaddr[14]), .B(i_psram_sub_axi_awaddr - [15]), .Z(n_1451059)); - notech_nand2 i_141997(.A(i_psram_sub_axi_awaddr[15]), .B(i_psram_sub_axi_awaddr - [16]), .Z(n_1461058)); - notech_nand2 i_151996(.A(i_psram_sub_axi_awaddr[16]), .B(i_psram_sub_axi_awaddr - [17]), .Z(n_1471057)); - notech_nand2 i_161995(.A(i_psram_sub_axi_awaddr[17]), .B(i_psram_sub_axi_awaddr - [18]), .Z(n_1481056)); - notech_nand2 i_171994(.A(i_psram_sub_axi_awaddr[18]), .B(i_psram_sub_axi_awaddr - [19]), .Z(n_1491055)); - notech_nand2 i_181993(.A(i_psram_sub_axi_awaddr[19]), .B(i_psram_sub_axi_awaddr - [20]), .Z(n_1501054)); - notech_nand2 i_191992(.A(i_psram_sub_axi_awaddr[20]), .B(i_psram_sub_axi_awaddr - [21]), .Z(n_1511053)); - notech_nand2 i_201991(.A(i_psram_sub_axi_awaddr[21]), .B(i_psram_sub_axi_awaddr - [22]), .Z(n_1521052)); - notech_inv i_221990(.A(\i_psram_sub_axi_awaddr_0[2] ), .Z(n_1541051)); - notech_inv i_231989(.A(n_1331071), .Z(n_2651050)); - notech_nor2 i_241988(.A(\i_psram_sub_axi_awaddr_0[2] ), .B(n_1341070), .Z - (n_1561049)); - notech_nor2 i_251987(.A(n_1331071), .B(n_1351069), .Z(n_1571048)); - notech_nor2 i_261986(.A(n_1341070), .B(n_1361068), .Z(n_1581047)); - notech_nor2 i_271985(.A(n_1351069), .B(n_1371067), .Z(n_1591046)); - notech_nor2 i_281984(.A(n_1361068), .B(n_1381066), .Z(n_1601045)); - notech_nor2 i_291983(.A(n_1371067), .B(n_1391065), .Z(n_1611044)); - notech_nor2 i_301982(.A(n_1381066), .B(n_1401064), .Z(n_1621043)); - notech_nor2 i_311981(.A(n_1391065), .B(n_1411063), .Z(n_1631042)); - notech_nor2 i_321980(.A(n_1401064), .B(n_1421062), .Z(n_1641041)); - notech_nor2 i_331979(.A(n_1411063), .B(n_1431061), .Z(n_1651040)); - notech_nor2 i_341978(.A(n_1421062), .B(n_1441060), .Z(n_1661039)); - notech_nor2 i_351977(.A(n_1431061), .B(n_1451059), .Z(n_1671038)); - notech_nor2 i_361976(.A(n_1441060), .B(n_1461058), .Z(n_1681037)); - notech_nor2 i_371975(.A(n_1451059), .B(n_1471057), .Z(n_1691036)); - notech_nor2 i_381974(.A(n_1461058), .B(n_1481056), .Z(n_1701035)); - notech_nor2 i_391973(.A(n_1471057), .B(n_1491055), .Z(n_1711034)); - notech_nor2 i_401972(.A(n_1481056), .B(n_1501054), .Z(n_1721033)); - notech_nor2 i_411971(.A(n_1491055), .B(n_1511053), .Z(n_1731032)); - notech_nor2 i_421970(.A(n_1501054), .B(n_1521052), .Z(n_1741031)); - notech_inv i_441969(.A(n_1541051), .Z(n_1761030)); - notech_inv i_451968(.A(n_2651050), .Z(n_1771029)); - notech_inv i_461967(.A(n_1561049), .Z(n_1781028)); - notech_inv i_471966(.A(n_1571048), .Z(n_2661027)); - notech_nand2 i_481965(.A(n_1541051), .B(n_1581047), .Z(n_1801026)); - notech_nand2 i_491964(.A(n_2651050), .B(n_1591046), .Z(n_1811025)); - notech_nand2 i_501963(.A(n_1561049), .B(n_1601045), .Z(n_1821024)); - notech_nand2 i_511962(.A(n_1571048), .B(n_1611044), .Z(n_1831023)); - notech_nand2 i_521961(.A(n_1581047), .B(n_1621043), .Z(n_1841022)); - notech_nand2 i_531960(.A(n_1591046), .B(n_1631042), .Z(n_1851021)); - notech_nand2 i_541959(.A(n_1601045), .B(n_1641041), .Z(n_1861020)); - notech_nand2 i_551958(.A(n_1611044), .B(n_1651040), .Z(n_1871019)); - notech_nand2 i_561957(.A(n_1621043), .B(n_1661039), .Z(n_1881018)); - notech_nand2 i_571956(.A(n_1631042), .B(n_1671038), .Z(n_1891017)); - notech_nand2 i_581955(.A(n_1641041), .B(n_1681037), .Z(n_1901016)); - notech_nand2 i_591954(.A(n_1651040), .B(n_1691036), .Z(n_1911015)); - notech_nand2 i_601953(.A(n_1661039), .B(n_1701035), .Z(n_1921014)); - notech_nand2 i_611952(.A(n_1671038), .B(n_1711034), .Z(n_1931013)); - notech_nand2 i_621951(.A(n_1681037), .B(n_1721033), .Z(n_1941012)); - notech_nand2 i_631950(.A(n_1691036), .B(n_1731032), .Z(n_1951011)); - notech_nand2 i_641949(.A(n_1701035), .B(n_1741031), .Z(n_1961010)); - notech_inv i_661948(.A(n_1761030), .Z(n_1981009)); - notech_inv i_671947(.A(n_1771029), .Z(n_1991008)); - notech_inv i_681946(.A(n_1781028), .Z(n_2001007)); - notech_inv i_691945(.A(n_2661027), .Z(n_2011006)); - notech_inv i_701944(.A(n_1801026), .Z(n_2021005)); - notech_nor2 i_741943(.A(n_1761030), .B(n_1841022), .Z(n_2061004)); - notech_nor2 i_751942(.A(n_1771029), .B(n_1851021), .Z(n_2071003)); - notech_nor2 i_761941(.A(n_1781028), .B(n_1861020), .Z(n_2081002)); - notech_nor2 i_771940(.A(n_2661027), .B(n_1871019), .Z(n_2091001)); - notech_nor2 i_781939(.A(n_1801026), .B(n_1881018), .Z(n_2101000)); - notech_nor2 i_791938(.A(n_1811025), .B(n_1891017), .Z(n_211999)); - notech_nor2 i_801937(.A(n_1821024), .B(n_1901016), .Z(n_212998)); - notech_nor2 i_811936(.A(n_1831023), .B(n_1911015), .Z(n_213997)); - notech_nor2 i_821935(.A(n_1841022), .B(n_1921014), .Z(n_214996)); - notech_nor2 i_831934(.A(n_1851021), .B(n_1931013), .Z(n_215995)); - notech_nor2 i_841933(.A(n_1861020), .B(n_1941012), .Z(n_216994)); - notech_nor2 i_851932(.A(n_1871019), .B(n_1951011), .Z(n_217993)); - notech_nor2 i_861931(.A(n_1881018), .B(n_1961010), .Z(n_218992)); - notech_inv i_881930(.A(n_1981009), .Z(n_220991)); - notech_inv i_891929(.A(n_1991008), .Z(n_221990)); - notech_inv i_901928(.A(n_2001007), .Z(n_222989)); - notech_inv i_911927(.A(n_2011006), .Z(n_223988)); - notech_inv i_921926(.A(n_2021005), .Z(n_224987)); - notech_inv i_961925(.A(n_2061004), .Z(n_228986)); - notech_inv i_971924(.A(n_2071003), .Z(n_229985)); - notech_inv i_981923(.A(n_2081002), .Z(n_230984)); - notech_inv i_991922(.A(n_2091001), .Z(n_231983)); - notech_inv i_1001921(.A(n_2101000), .Z(n_232982)); - notech_inv i_1011920(.A(n_211999), .Z(n_233981)); - notech_inv i_1021919(.A(n_212998), .Z(n_234980)); - notech_inv i_1031918(.A(n_213997), .Z(n_272979)); - notech_nand2 i_1041917(.A(n_1981009), .B(n_214996), .Z(n_236978)); - notech_nand2 i_1051916(.A(n_1991008), .B(n_215995), .Z(n_237977)); - notech_nand2 i_1061915(.A(n_2001007), .B(n_216994), .Z(n_238976)); - notech_nand2 i_1071914(.A(n_2011006), .B(n_217993), .Z(n_239975)); - notech_nand2 i_1081913(.A(n_2021005), .B(n_218992), .Z(n_240974)); - notech_inv i_1321912(.A(n_220991), .Z(n_276973)); - notech_inv i_1331911(.A(i_psram_sub_axi_awaddr[3]), .Z(n_279972)); - notech_nand2 i_1341910(.A(n_279972), .B(n_220991), .Z(n_280971)); - notech_nand2 i_1351909(.A(i_psram_sub_axi_awaddr[3]), .B(n_276973), .Z(n_277970 - )); - notech_nand2 i_1361908(.A(n_277970), .B(n_280971), .Z(n_278969)); - notech_inv i_1371907(.A(n_278969), .Z(\i_psram_sub_axi_awaddr_0[3] )); - notech_inv i_1381906(.A(n_221990), .Z(n_281968)); - notech_inv i_1391905(.A(i_psram_sub_axi_awaddr[4]), .Z(n_284967)); - notech_nand2 i_1401904(.A(n_284967), .B(n_221990), .Z(n_285966)); - notech_nand2 i_1411903(.A(i_psram_sub_axi_awaddr[4]), .B(n_281968), .Z(n_282965 - )); - notech_nand2 i_1421902(.A(n_282965), .B(n_285966), .Z(n_283964)); - notech_inv i_1431901(.A(n_283964), .Z(\i_psram_sub_axi_awaddr_0[4] )); - notech_inv i_1441900(.A(n_222989), .Z(n_286963)); - notech_inv i_1451899(.A(i_psram_sub_axi_awaddr[5]), .Z(n_289962)); - notech_nand2 i_1461898(.A(n_289962), .B(n_222989), .Z(n_290961)); - notech_nand2 i_1471897(.A(i_psram_sub_axi_awaddr[5]), .B(n_286963), .Z(n_287960 - )); - notech_nand2 i_1481896(.A(n_287960), .B(n_290961), .Z(n_288959)); - notech_inv i_1491895(.A(n_288959), .Z(\i_psram_sub_axi_awaddr_0[5] )); - notech_inv i_1501894(.A(n_223988), .Z(n_291958)); - notech_inv i_1511893(.A(i_psram_sub_axi_awaddr[6]), .Z(n_294957)); - notech_nand2 i_1521892(.A(n_294957), .B(n_223988), .Z(n_295956)); - notech_nand2 i_1531891(.A(i_psram_sub_axi_awaddr[6]), .B(n_291958), .Z(n_292955 - )); - notech_nand2 i_1541890(.A(n_292955), .B(n_295956), .Z(n_293954)); - notech_inv i_1551889(.A(n_293954), .Z(\i_psram_sub_axi_awaddr_0[6] )); - notech_inv i_1561888(.A(n_224987), .Z(n_296953)); - notech_inv i_1571887(.A(i_psram_sub_axi_awaddr[7]), .Z(n_299952)); - notech_nand2 i_1581886(.A(n_299952), .B(n_224987), .Z(n_300951)); - notech_nand2 i_1591885(.A(i_psram_sub_axi_awaddr[7]), .B(n_296953), .Z(n_297950 - )); - notech_nand2 i_1601884(.A(n_297950), .B(n_300951), .Z(n_298949)); - notech_inv i_1611883(.A(n_298949), .Z(\i_psram_sub_axi_awaddr_0[7] )); - notech_inv i_1621882(.A(n_1811025), .Z(n_301948)); - notech_inv i_1631881(.A(i_psram_sub_axi_awaddr[8]), .Z(n_304947)); - notech_nand2 i_1641880(.A(n_304947), .B(n_1811025), .Z(n_305946)); - notech_nand2 i_1651879(.A(i_psram_sub_axi_awaddr[8]), .B(n_301948), .Z(n_302945 - )); - notech_nand2 i_1661878(.A(n_302945), .B(n_305946), .Z(n_303944)); - notech_inv i_1671877(.A(n_303944), .Z(\i_psram_sub_axi_awaddr_0[8] )); - notech_inv i_1681876(.A(n_1821024), .Z(n_306943)); - notech_inv i_1691875(.A(i_psram_sub_axi_awaddr[9]), .Z(n_309942)); - notech_nand2 i_1701874(.A(n_309942), .B(n_1821024), .Z(n_310941)); - notech_nand2 i_1711873(.A(i_psram_sub_axi_awaddr[9]), .B(n_306943), .Z(n_307940 - )); - notech_nand2 i_1721872(.A(n_307940), .B(n_310941), .Z(n_308939)); - notech_inv i_1731871(.A(n_308939), .Z(\i_psram_sub_axi_awaddr_0[9] )); - notech_inv i_1741870(.A(n_1831023), .Z(n_311938)); - notech_inv i_1751869(.A(i_psram_sub_axi_awaddr[10]), .Z(n_314937)); - notech_nand2 i_1761868(.A(n_314937), .B(n_1831023), .Z(n_315936)); - notech_nand2 i_1771867(.A(i_psram_sub_axi_awaddr[10]), .B(n_311938), .Z(n_312935 - )); - notech_nand2 i_1781866(.A(n_312935), .B(n_315936), .Z(n_313934)); - notech_inv i_1791865(.A(n_313934), .Z(\i_psram_sub_axi_awaddr_0[10] )); - notech_inv i_1801864(.A(n_228986), .Z(n_316933)); - notech_inv i_1811863(.A(i_psram_sub_axi_awaddr[11]), .Z(n_319932)); - notech_nand2 i_1821862(.A(n_319932), .B(n_228986), .Z(n_320931)); - notech_nand2 i_1831861(.A(i_psram_sub_axi_awaddr[11]), .B(n_316933), .Z(n_317930 - )); - notech_nand2 i_1841860(.A(n_317930), .B(n_320931), .Z(n_318929)); - notech_inv i_1851859(.A(n_318929), .Z(\i_psram_sub_axi_awaddr_0[11] )); - notech_inv i_1861858(.A(n_229985), .Z(n_321928)); - notech_inv i_1871857(.A(i_psram_sub_axi_awaddr[12]), .Z(n_324927)); - notech_nand2 i_1881856(.A(n_324927), .B(n_229985), .Z(n_325926)); - notech_nand2 i_1891855(.A(i_psram_sub_axi_awaddr[12]), .B(n_321928), .Z(n_322925 - )); - notech_nand2 i_1901854(.A(n_322925), .B(n_325926), .Z(n_323924)); - notech_inv i_1911853(.A(n_323924), .Z(\i_psram_sub_axi_awaddr_0[12] )); - notech_inv i_1921852(.A(n_230984), .Z(n_326923)); - notech_inv i_1931851(.A(i_psram_sub_axi_awaddr[13]), .Z(n_329922)); - notech_nand2 i_1941850(.A(n_329922), .B(n_230984), .Z(n_330921)); - notech_nand2 i_1951849(.A(i_psram_sub_axi_awaddr[13]), .B(n_326923), .Z(n_327920 - )); - notech_nand2 i_1961848(.A(n_327920), .B(n_330921), .Z(n_328919)); - notech_inv i_1971847(.A(n_328919), .Z(\i_psram_sub_axi_awaddr_0[13] )); - notech_inv i_1981846(.A(n_231983), .Z(n_331918)); - notech_inv i_1991845(.A(i_psram_sub_axi_awaddr[14]), .Z(n_334917)); - notech_nand2 i_2001844(.A(n_334917), .B(n_231983), .Z(n_335916)); - notech_nand2 i_2011843(.A(i_psram_sub_axi_awaddr[14]), .B(n_331918), .Z(n_332915 - )); - notech_nand2 i_2021842(.A(n_332915), .B(n_335916), .Z(n_333914)); - notech_inv i_2031841(.A(n_333914), .Z(\i_psram_sub_axi_awaddr_0[14] )); - notech_inv i_2041840(.A(n_232982), .Z(n_336913)); - notech_inv i_2051839(.A(i_psram_sub_axi_awaddr[15]), .Z(n_339912)); - notech_nand2 i_2061838(.A(n_339912), .B(n_232982), .Z(n_340911)); - notech_nand2 i_2071837(.A(i_psram_sub_axi_awaddr[15]), .B(n_336913), .Z(n_337910 - )); - notech_nand2 i_2081836(.A(n_337910), .B(n_340911), .Z(n_338909)); - notech_inv i_2091835(.A(n_338909), .Z(\i_psram_sub_axi_awaddr_0[15] )); - notech_inv i_2101834(.A(n_233981), .Z(n_341908)); - notech_inv i_2111833(.A(i_psram_sub_axi_awaddr[16]), .Z(n_344907)); - notech_nand2 i_2121832(.A(n_344907), .B(n_233981), .Z(n_345906)); - notech_nand2 i_2131831(.A(i_psram_sub_axi_awaddr[16]), .B(n_341908), .Z(n_342905 - )); - notech_nand2 i_2141830(.A(n_342905), .B(n_345906), .Z(n_343904)); - notech_inv i_2151829(.A(n_343904), .Z(\i_psram_sub_axi_awaddr_0[16] )); - notech_inv i_2161828(.A(n_234980), .Z(n_346903)); - notech_inv i_2171827(.A(i_psram_sub_axi_awaddr[17]), .Z(n_349902)); - notech_nand2 i_2181826(.A(n_349902), .B(n_234980), .Z(n_350901)); - notech_nand2 i_2191825(.A(i_psram_sub_axi_awaddr[17]), .B(n_346903), .Z(n_347900 - )); - notech_nand2 i_2201824(.A(n_347900), .B(n_350901), .Z(n_348899)); - notech_inv i_2211823(.A(n_348899), .Z(\i_psram_sub_axi_awaddr_0[17] )); - notech_inv i_2221822(.A(n_272979), .Z(n_351898)); - notech_inv i_2231821(.A(i_psram_sub_axi_awaddr[18]), .Z(n_354897)); - notech_nand2 i_2241820(.A(n_354897), .B(n_272979), .Z(n_355896)); - notech_nand2 i_2251819(.A(i_psram_sub_axi_awaddr[18]), .B(n_351898), .Z(n_352895 - )); - notech_nand2 i_2261818(.A(n_352895), .B(n_355896), .Z(n_353894)); - notech_inv i_2271817(.A(n_353894), .Z(\i_psram_sub_axi_awaddr_0[18] )); - notech_inv i_2281816(.A(n_236978), .Z(n_356893)); - notech_inv i_2291815(.A(i_psram_sub_axi_awaddr[19]), .Z(n_359892)); - notech_nand2 i_2301814(.A(n_359892), .B(n_236978), .Z(n_360891)); - notech_nand2 i_2311813(.A(i_psram_sub_axi_awaddr[19]), .B(n_356893), .Z(n_357890 - )); - notech_nand2 i_2321812(.A(n_357890), .B(n_360891), .Z(n_358889)); - notech_inv i_2331811(.A(n_358889), .Z(\i_psram_sub_axi_awaddr_0[19] )); - notech_inv i_2341810(.A(n_237977), .Z(n_361888)); - notech_inv i_2351809(.A(i_psram_sub_axi_awaddr[20]), .Z(n_364887)); - notech_nand2 i_2361808(.A(n_364887), .B(n_237977), .Z(n_365886)); - notech_nand2 i_2371807(.A(i_psram_sub_axi_awaddr[20]), .B(n_361888), .Z(n_362885 - )); - notech_nand2 i_2381806(.A(n_362885), .B(n_365886), .Z(n_363884)); - notech_inv i_2391805(.A(n_363884), .Z(\i_psram_sub_axi_awaddr_0[20] )); - notech_inv i_2401804(.A(n_238976), .Z(n_366883)); - notech_inv i_2411803(.A(i_psram_sub_axi_awaddr[21]), .Z(n_369882)); - notech_nand2 i_2421802(.A(n_369882), .B(n_238976), .Z(n_370881)); - notech_nand2 i_2431801(.A(i_psram_sub_axi_awaddr[21]), .B(n_366883), .Z(n_367880 - )); - notech_nand2 i_2441800(.A(n_367880), .B(n_370881), .Z(n_368879)); - notech_inv i_2451799(.A(n_368879), .Z(\i_psram_sub_axi_awaddr_0[21] )); - notech_inv i_2461798(.A(n_239975), .Z(n_371878)); - notech_inv i_2471797(.A(i_psram_sub_axi_awaddr[22]), .Z(n_374877)); - notech_nand2 i_2481796(.A(n_374877), .B(n_239975), .Z(n_375876)); - notech_nand2 i_2491795(.A(i_psram_sub_axi_awaddr[22]), .B(n_371878), .Z(n_372875 - )); - notech_nand2 i_2501794(.A(n_372875), .B(n_375876), .Z(n_373874)); - notech_inv i_2511793(.A(n_373874), .Z(\i_psram_sub_axi_awaddr_0[22] )); - notech_inv i_2521792(.A(n_240974), .Z(n_376873)); - notech_inv i_2531791(.A(i_psram_sub_axi_awaddr[23]), .Z(n_379872)); - notech_nand2 i_2541790(.A(n_379872), .B(n_240974), .Z(n_380871)); - notech_nand2 i_2551789(.A(i_psram_sub_axi_awaddr[23]), .B(n_376873), .Z(n_377870 - )); - notech_nand2 i_2561788(.A(n_377870), .B(n_380871), .Z(n_378869)); - notech_inv i_2571787(.A(n_378869), .Z(\i_psram_sub_axi_awaddr_0[23] )); - notech_inv i_121786(.A(n_249), .Z(n_371801)); - notech_inv i_171785(.A(n_418), .Z(n_469)); - notech_inv i_491784(.A(n_242), .Z(n_363809)); - notech_inv i_591656(.A(n_242), .Z(n_625)); - notech_inv i_591783(.A(i_psram_sub_axi_araddr[1]), .Z(n_265862)); - notech_inv i_601782(.A(i_psram_sub_axi_araddr[10]), .Z(n_274)); - notech_inv i_611655(.A(n_642), .Z(n_690)); - notech_inv i_611781(.A(i_psram_sub_axi_araddr[11]), .Z(n_275)); - notech_inv i_621654(.A(i_psram_sub_axi_araddr[11]), .Z(n_602)); - notech_inv i_621780(.A(i_psram_sub_axi_araddr[12]), .Z(n_276859)); - notech_inv i_631653(.A(n_601), .Z(n_649)); - notech_inv i_631779(.A(i_psram_sub_axi_araddr[13]), .Z(n_277858)); - notech_inv i_641652(.A(i_psram_sub_axi_araddr[13]), .Z(n_606)); - notech_inv i_641778(.A(i_psram_sub_axi_araddr[14]), .Z(n_278857)); - notech_inv i_651651(.A(n_689), .Z(n_737)); - notech_inv i_65(.A(i_psram_sub_axi_araddr[15]), .Z(n_279856)); - notech_inv i_661650(.A(i_psram_sub_axi_araddr[15]), .Z(n_610)); - notech_inv i_661777(.A(i_psram_sub_axi_araddr[16]), .Z(n_280855)); - notech_inv i_671649(.A(n_609), .Z(n_657)); - notech_inv i_671776(.A(i_psram_sub_axi_araddr[17]), .Z(n_281854)); - notech_inv i_681648(.A(i_psram_sub_axi_araddr[17]), .Z(n_614)); - notech_inv i_681775(.A(i_psram_sub_axi_araddr[18]), .Z(n_282853)); - notech_inv i_691647(.A(n_658), .Z(n_706)); - notech_inv i_691774(.A(i_psram_sub_axi_araddr[19]), .Z(n_283852)); - notech_inv i_701646(.A(i_psram_sub_axi_araddr[19]), .Z(n_618)); - notech_inv i_701773(.A(i_psram_sub_axi_araddr[20]), .Z(n_284851)); - notech_inv i_711645(.A(n_617), .Z(n_665)); - notech_inv i_711644(.A(i_psram_sub_axi_araddr[21]), .Z(n_285850)); - notech_inv i_741643(.A(i_psram_sub_axi_araddr[21]), .Z(n_622)); - notech_inv i_741642(.A(i_psram_sub_axi_araddr[22]), .Z(n_286849)); - notech_inv i_741641(.A(n_417), .Z(n_468)); - notech_inv i_761640(.A(n_640), .Z(n_688)); - notech_inv i_761639(.A(i_psram_sub_axi_araddr[10]), .Z(n_600)); - notech_inv i_761638(.A(n_599), .Z(n_647)); - notech_inv i_761637(.A(i_psram_sub_axi_araddr[12]), .Z(n_604)); - notech_inv i_761636(.A(n_687), .Z(n_735)); - notech_inv i_761635(.A(i_psram_sub_axi_araddr[14]), .Z(n_608)); - notech_inv i_761634(.A(n_607), .Z(n_655)); - notech_inv i_761633(.A(i_psram_sub_axi_araddr[16]), .Z(n_612)); - notech_inv i_761632(.A(n_656), .Z(n_704)); - notech_inv i_761631(.A(i_psram_sub_axi_araddr[18]), .Z(n_616)); - notech_inv i_761630(.A(n_615), .Z(n_663)); - notech_inv i_761629(.A(i_psram_sub_axi_araddr[20]), .Z(n_620)); - notech_inv i_741628(.A(n_467), .Z(n_522)); - notech_inv i_761627(.A(n_597), .Z(n_645)); - notech_inv i_761626(.A(n_685), .Z(n_733)); - notech_inv i_761625(.A(n_605), .Z(n_653)); - notech_inv i_761624(.A(n_654), .Z(n_702)); - notech_inv i_761623(.A(n_613), .Z(n_661)); - notech_inv i_741622(.A(n_370802), .Z(n_419)); - notech_inv i_741621(.A(n_466), .Z(n_521)); - notech_inv i_741620(.A(n_364808), .Z(n_411)); - notech_inv i_761619(.A(n_595), .Z(n_643)); - notech_inv i_761618(.A(n_683), .Z(n_731)); - notech_inv i_761617(.A(n_603), .Z(n_651)); - notech_inv i_761616(.A(n_652), .Z(n_700)); - notech_inv i_761615(.A(n_611), .Z(n_659)); - notech_inv i_741614(.A(n_465), .Z(n_520)); - notech_inv i_761613(.A(n_681), .Z(n_729)); - notech_inv i_761612(.A(n_650), .Z(n_698)); - notech_inv i_761611(.A(n_464), .Z(n_744)); - notech_inv i_761610(.A(n_679), .Z(n_727)); - notech_inv i_761609(.A(n_648), .Z(n_696)); - notech_inv i_741608(.A(n_249), .Z(n_471)); - notech_inv i_761607(.A(n_646), .Z(n_694)); - notech_inv i_761772(.A(n_644), .Z(n_692)); - notech_inv i_741606(.A(n_294846), .Z(n_767)); - notech_inv i_741771(.A(i_psram_sub_axi_araddr[1]), .Z(n_762)); - notech_inv i_741605(.A(i_psram_sub_axi_araddr[0]), .Z(n_757)); - notech_inv i_21770(.A(s00_axi_arlen[0]), .Z(n_218868)); - notech_inv i_31769(.A(s00_axi_arlen[1]), .Z(n_219)); - notech_inv i_41768(.A(s00_axi_arlen[2]), .Z(n_220867)); - notech_inv i_51767(.A(s00_axi_arlen[3]), .Z(n_221866)); - notech_inv i_61766(.A(s00_axi_arlen[4]), .Z(n_222865)); - notech_inv i_71765(.A(s00_axi_arlen[5]), .Z(n_223864)); - notech_inv i_81764(.A(s00_axi_arlen[6]), .Z(n_224863)); - notech_inv i_91763(.A(s00_axi_arlen[7]), .Z(n_225)); - notech_nor2 i_261762(.A(i_psram_sub_axi_araddr[2]), .B(n_218868), .Z(n_242 - )); - notech_nor2 i_271761(.A(i_psram_sub_axi_araddr[3]), .B(n_219), .Z(n_243) - ); - notech_nor2 i_281760(.A(i_psram_sub_axi_araddr[4]), .B(n_220867), .Z(n_244 - )); - notech_nor2 i_291759(.A(i_psram_sub_axi_araddr[5]), .B(n_221866), .Z(n_245 - )); - notech_nor2 i_301758(.A(i_psram_sub_axi_araddr[6]), .B(n_222865), .Z(n_246 - )); - notech_nor2 i_311757(.A(i_psram_sub_axi_araddr[7]), .B(n_223864), .Z(n_247 - )); - notech_nor2 i_321756(.A(i_psram_sub_axi_araddr[8]), .B(n_224863), .Z(n_248 - )); - notech_nor2 i_331755(.A(i_psram_sub_axi_araddr[9]), .B(n_225), .Z(n_249) - ); - notech_nand2 i_501754(.A(i_psram_sub_axi_araddr[2]), .B(n_218868), .Z(n_266861 - )); - notech_nand2 i_511753(.A(i_psram_sub_axi_araddr[3]), .B(n_219), .Z(n_267 - )); - notech_nand2 i_521752(.A(i_psram_sub_axi_araddr[4]), .B(n_220867), .Z(n_268 - )); - notech_nand2 i_531751(.A(i_psram_sub_axi_araddr[5]), .B(n_221866), .Z(n_269 - )); - notech_nand2 i_541750(.A(i_psram_sub_axi_araddr[6]), .B(n_222865), .Z(n_270 - )); - notech_nand2 i_551749(.A(i_psram_sub_axi_araddr[7]), .B(n_223864), .Z(n_271 - )); - notech_nand2 i_561748(.A(i_psram_sub_axi_araddr[8]), .B(n_224863), .Z(n_272860 - )); - notech_nand2 i_571747(.A(i_psram_sub_axi_araddr[9]), .B(n_225), .Z(n_273 - )); - notech_inv i_72(.A(i_psram_sub_axi_araddr[0]), .Z(n_288848)); - notech_inv i_771746(.A(n_242), .Z(n_293847)); - notech_nand2 i_781745(.A(n_293847), .B(n_266861), .Z(n_294846)); - notech_inv i_791744(.A(n_243), .Z(n_295845)); - notech_nand2 i_801743(.A(n_295845), .B(n_267), .Z(n_296844)); - notech_inv i_811742(.A(n_244), .Z(n_297843)); - notech_nand2 i_821741(.A(n_297843), .B(n_268), .Z(n_298842)); - notech_inv i_831740(.A(n_245), .Z(n_299841)); - notech_nand2 i_841739(.A(n_299841), .B(n_269), .Z(n_300840)); - notech_inv i_851738(.A(n_246), .Z(n_301839)); - notech_nand2 i_861737(.A(n_301839), .B(n_270), .Z(n_302838)); - notech_inv i_87(.A(n_247), .Z(n_303837)); - notech_nand2 i_881736(.A(n_303837), .B(n_271), .Z(n_304836)); - notech_inv i_891735(.A(n_248), .Z(n_305835)); - notech_nand2 i_901734(.A(n_305835), .B(n_272860), .Z(n_306834)); - notech_inv i_911733(.A(n_249), .Z(n_307833)); - notech_nand2 i_921732(.A(n_307833), .B(n_273), .Z(n_308832)); - notech_or2 i_360(.A(n_242), .B(n_265862), .Z(n_582)); - notech_and2 i_361(.A(n_582), .B(n_266861), .Z(n_581)); - notech_inv i_362(.A(n_581), .Z(n_339831)); - notech_or2 i_363(.A(n_243), .B(n_266861), .Z(n_584)); - notech_and2 i_364(.A(n_584), .B(n_267), .Z(n_583)); - notech_inv i_365(.A(n_583), .Z(n_340830)); - notech_or2 i_366(.A(n_244), .B(n_267), .Z(n_586)); - notech_and2 i_367(.A(n_586), .B(n_268), .Z(n_585)); - notech_inv i_368(.A(n_585), .Z(n_341829)); - notech_or2 i_369(.A(n_245), .B(n_268), .Z(n_588)); - notech_and2 i_370(.A(n_588), .B(n_269), .Z(n_587)); - notech_inv i_371(.A(n_587), .Z(n_342828)); - notech_or2 i_372(.A(n_246), .B(n_269), .Z(n_590)); - notech_and2 i_373(.A(n_590), .B(n_270), .Z(n_589)); - notech_inv i_374(.A(n_589), .Z(n_343827)); - notech_or2 i_375(.A(n_247), .B(n_270), .Z(n_592)); - notech_and2 i_376(.A(n_592), .B(n_271), .Z(n_591)); - notech_inv i_377(.A(n_591), .Z(n_344826)); - notech_or2 i_378(.A(n_248), .B(n_271), .Z(n_594)); - notech_and2 i_379(.A(n_594), .B(n_272860), .Z(n_593)); - notech_inv i_380(.A(n_593), .Z(n_345825)); - notech_or2 i_381(.A(n_249), .B(n_272860), .Z(n_596)); - notech_and2 i_382(.A(n_596), .B(n_273), .Z(n_595)); - notech_inv i_383(.A(n_595), .Z(n_346824)); - notech_and2 i_385(.A(n_273), .B(n_274), .Z(n_597)); - notech_inv i_386(.A(n_597), .Z(n_347823)); - notech_and2 i_388(.A(n_600), .B(n_275), .Z(n_599)); - notech_inv i_389(.A(n_599), .Z(n_348822)); - notech_and2 i_391(.A(n_602), .B(n_276859), .Z(n_601)); - notech_inv i_392(.A(n_601), .Z(n_349821)); - notech_and2 i_394(.A(n_604), .B(n_277858), .Z(n_603)); - notech_inv i_395(.A(n_603), .Z(n_350820)); - notech_and2 i_397(.A(n_606), .B(n_278857), .Z(n_605)); - notech_inv i_398(.A(n_605), .Z(n_351819)); - notech_and2 i_400(.A(n_608), .B(n_279856), .Z(n_607)); - notech_inv i_401(.A(n_607), .Z(n_352818)); - notech_and2 i_403(.A(n_610), .B(n_280855), .Z(n_609)); - notech_inv i_404(.A(n_609), .Z(n_353817)); - notech_and2 i_406(.A(n_612), .B(n_281854), .Z(n_611)); - notech_inv i_407(.A(n_611), .Z(n_354816)); - notech_and2 i_409(.A(n_614), .B(n_282853), .Z(n_613)); - notech_inv i_410(.A(n_613), .Z(n_355815)); - notech_and2 i_412(.A(n_616), .B(n_283852), .Z(n_615)); - notech_inv i_413(.A(n_615), .Z(n_356814)); - notech_and2 i_415(.A(n_618), .B(n_284851), .Z(n_617)); - notech_inv i_416(.A(n_617), .Z(n_357813)); - notech_and2 i_418(.A(n_620), .B(n_285850), .Z(n_619)); - notech_inv i_419(.A(n_619), .Z(n_358812)); - notech_and2 i_421(.A(n_622), .B(n_286849), .Z(n_621)); - notech_inv i_422(.A(n_621), .Z(n_359811)); - notech_inv i_1441731(.A(n_288848), .Z(n_360810)); - notech_nor2 i_1481730(.A(n_242), .B(n_243), .Z(n_364808)); - notech_nor2 i_1491729(.A(n_243), .B(n_244), .Z(n_365807)); - notech_nor2 i_1501728(.A(n_244), .B(n_245), .Z(n_366806)); - notech_nor2 i_1511727(.A(n_245), .B(n_246), .Z(n_367805)); - notech_nor2 i_1521726(.A(n_246), .B(n_247), .Z(n_368804)); - notech_nor2 i_1531725(.A(n_247), .B(n_248), .Z(n_369803)); - notech_nor2 i_1541724(.A(n_248), .B(n_249), .Z(n_370802)); - notech_or2 i_427(.A(n_625), .B(n_339831), .Z(n_626)); - notech_inv i_428(.A(n_626), .Z(n_386)); - notech_or2 i_430(.A(n_364808), .B(n_340830), .Z(n_628)); - notech_inv i_431(.A(n_628), .Z(n_387)); - notech_and2 i_432(.A(n_365807), .B(n_339831), .Z(n_629)); - notech_or2 i_433(.A(n_629), .B(n_341829), .Z(n_630)); - notech_inv i_434(.A(n_630), .Z(n_388)); - notech_and2 i_435(.A(n_366806), .B(n_340830), .Z(n_631)); - notech_or2 i_436(.A(n_631), .B(n_342828), .Z(n_632)); - notech_inv i_437(.A(n_632), .Z(n_389)); - notech_and2 i_438(.A(n_367805), .B(n_341829), .Z(n_633)); - notech_or2 i_439(.A(n_633), .B(n_343827), .Z(n_634)); - notech_inv i_440(.A(n_634), .Z(n_390)); - notech_and2 i_441(.A(n_368804), .B(n_342828), .Z(n_635)); - notech_or2 i_442(.A(n_635), .B(n_344826), .Z(n_636)); - notech_inv i_443(.A(n_636), .Z(n_391)); - notech_and2 i_444(.A(n_369803), .B(n_343827), .Z(n_637)); - notech_or2 i_445(.A(n_637), .B(n_345825), .Z(n_638)); - notech_inv i_446(.A(n_638), .Z(n_392)); - notech_and2 i_447(.A(n_370802), .B(n_344826), .Z(n_639)); - notech_or2 i_448(.A(n_639), .B(n_346824), .Z(n_640)); - notech_inv i_449(.A(n_640), .Z(n_393)); - notech_and2 i_450(.A(n_371801), .B(n_345825), .Z(n_641)); - notech_or2 i_451(.A(n_641), .B(n_347823), .Z(n_642)); - notech_inv i_452(.A(n_642), .Z(n_394)); - notech_or2 i_454(.A(n_643), .B(n_348822), .Z(n_644)); - notech_inv i_455(.A(n_644), .Z(n_395)); - notech_or2 i_457(.A(n_645), .B(n_349821), .Z(n_646)); - notech_inv i_458(.A(n_646), .Z(n_396)); - notech_or2 i_460(.A(n_647), .B(n_350820), .Z(n_648)); - notech_inv i_461(.A(n_648), .Z(n_397)); - notech_or2 i_463(.A(n_649), .B(n_351819), .Z(n_650)); - notech_inv i_464(.A(n_650), .Z(n_398)); - notech_or2 i_466(.A(n_651), .B(n_352818), .Z(n_652)); - notech_inv i_467(.A(n_652), .Z(n_399)); - notech_or2 i_469(.A(n_653), .B(n_353817), .Z(n_654)); - notech_inv i_470(.A(n_654), .Z(n_400)); - notech_or2 i_472(.A(n_655), .B(n_354816), .Z(n_656)); - notech_inv i_473(.A(n_656), .Z(n_401)); - notech_or2 i_475(.A(n_657), .B(n_355815), .Z(n_658)); - notech_inv i_476(.A(n_658), .Z(n_402)); - notech_or2 i_478(.A(n_659), .B(n_356814), .Z(n_660)); - notech_inv i_479(.A(n_660), .Z(n_403)); - notech_or2 i_481(.A(n_661), .B(n_357813), .Z(n_662)); - notech_inv i_482(.A(n_662), .Z(n_404)); - notech_or2 i_484(.A(n_663), .B(n_358812), .Z(n_664)); - notech_inv i_485(.A(n_664), .Z(n_405)); - notech_or2 i_487(.A(n_665), .B(n_359811), .Z(n_666)); - notech_inv i_488(.A(n_666), .Z(n_406)); - notech_inv i_1911723(.A(n_360810), .Z(n_407)); - notech_nand2 i_1961722(.A(n_363809), .B(n_365807), .Z(n_412)); - notech_nand2 i_1971721(.A(n_364808), .B(n_366806), .Z(n_413)); - notech_nand2 i_1981720(.A(n_365807), .B(n_367805), .Z(n_414)); - notech_nand2 i_1991719(.A(n_366806), .B(n_368804), .Z(n_415)); - notech_nand2 i_2001718(.A(n_367805), .B(n_369803), .Z(n_416)); - notech_nand2 i_2011717(.A(n_368804), .B(n_370802), .Z(n_417)); - notech_nand2 i_2021716(.A(n_369803), .B(n_371801), .Z(n_418)); - notech_inv i_2171715(.A(n_386), .Z(n_433)); - notech_or2 i_489(.A(n_411), .B(n_407), .Z(n_668)); - notech_and2 i_490(.A(n_668), .B(n_387), .Z(n_667)); - notech_inv i_491(.A(n_667), .Z(n_434)); - notech_and2 i_493(.A(n_412), .B(n_388), .Z(n_669)); - notech_inv i_494(.A(n_669), .Z(n_435)); - notech_and2 i_496(.A(n_413), .B(n_389), .Z(n_671)); - notech_inv i_497(.A(n_671), .Z(n_436)); - notech_or2 i_498(.A(n_414), .B(n_386), .Z(n_674)); - notech_and2 i_499(.A(n_674), .B(n_390), .Z(n_673)); - notech_inv i_500(.A(n_673), .Z(n_437)); - notech_or2 i_501(.A(n_415), .B(n_387), .Z(n_676)); - notech_and2 i_502(.A(n_676), .B(n_391), .Z(n_675)); - notech_inv i_503(.A(n_675), .Z(n_438)); - notech_or2 i_504(.A(n_416), .B(n_388), .Z(n_678)); - notech_and2 i_505(.A(n_678), .B(n_392), .Z(n_677)); - notech_inv i_506(.A(n_677), .Z(n_439)); - notech_or2 i_507(.A(n_417), .B(n_389), .Z(n_680)); - notech_and2 i_508(.A(n_680), .B(n_393), .Z(n_679)); - notech_inv i_509(.A(n_679), .Z(n_440)); - notech_or2 i_510(.A(n_418), .B(n_390), .Z(n_682)); - notech_and2 i_511(.A(n_682), .B(n_394), .Z(n_681)); - notech_inv i_512(.A(n_681), .Z(n_441)); - notech_or2 i_513(.A(n_419), .B(n_391), .Z(n_684)); - notech_and2 i_514(.A(n_684), .B(n_395), .Z(n_683)); - notech_inv i_515(.A(n_683), .Z(n_442)); - notech_or2 i_516(.A(n_249), .B(n_392), .Z(n_686)); - notech_and2 i_517(.A(n_686), .B(n_396), .Z(n_685)); - notech_inv i_518(.A(n_685), .Z(n_443)); - notech_and2 i_520(.A(n_688), .B(n_397), .Z(n_687)); - notech_inv i_521(.A(n_687), .Z(n_444)); - notech_and2 i_523(.A(n_690), .B(n_398), .Z(n_689)); - notech_inv i_524(.A(n_689), .Z(n_445)); - notech_and2 i_526(.A(n_692), .B(n_399), .Z(n_691)); - notech_inv i_527(.A(n_691), .Z(n_446)); - notech_and2 i_529(.A(n_694), .B(n_400), .Z(n_693)); - notech_inv i_530(.A(n_693), .Z(n_447)); - notech_and2 i_532(.A(n_696), .B(n_401), .Z(n_695)); - notech_inv i_533(.A(n_695), .Z(n_448)); - notech_and2 i_535(.A(n_698), .B(n_402), .Z(n_697)); - notech_inv i_536(.A(n_697), .Z(n_449)); - notech_and2 i_538(.A(n_700), .B(n_403), .Z(n_699)); - notech_inv i_539(.A(n_699), .Z(n_450)); - notech_and2 i_541(.A(n_702), .B(n_404), .Z(n_701)); - notech_inv i_542(.A(n_701), .Z(n_451)); - notech_and2 i_544(.A(n_704), .B(n_405), .Z(n_703)); - notech_inv i_545(.A(n_703), .Z(n_452)); - notech_and2 i_547(.A(n_706), .B(n_406), .Z(n_705)); - notech_inv i_548(.A(n_705), .Z(n_453)); - notech_inv i_2381714(.A(n_407), .Z(n_454)); - notech_nor2 i_2461713(.A(n_411), .B(n_415), .Z(n_462)); - notech_nor2 i_2471712(.A(n_412), .B(n_416), .Z(n_463)); - notech_nor2 i_2481711(.A(n_413), .B(n_417), .Z(n_464)); - notech_nor2 i_2491710(.A(n_414), .B(n_418), .Z(n_465)); - notech_nor2 i_2501709(.A(n_415), .B(n_419), .Z(n_466)); - notech_nor2 i_2511708(.A(n_416), .B(n_249), .Z(n_467)); - notech_inv i_264(.A(n_433), .Z(n_480)); - notech_inv i_265(.A(n_434), .Z(n_481)); - notech_inv i_266(.A(n_435), .Z(n_482)); - notech_inv i_267(.A(n_436), .Z(n_483)); - notech_inv i_268(.A(n_437), .Z(n_484)); - notech_and2 i_549(.A(n_462), .B(n_454), .Z(n_707)); - notech_or2 i_550(.A(n_707), .B(n_438), .Z(n_708)); - notech_or2 i_553(.A(n_463), .B(n_439), .Z(n_710)); - notech_or2 i_556(.A(n_464), .B(n_440), .Z(n_712)); - notech_and2 i_558(.A(n_465), .B(n_433), .Z(n_713)); - notech_or2 i_559(.A(n_713), .B(n_441), .Z(n_714)); - notech_and2 i_561(.A(n_466), .B(n_434), .Z(n_715)); - notech_or2 i_562(.A(n_715), .B(n_442), .Z(n_716)); - notech_and2 i_564(.A(n_467), .B(n_435), .Z(n_717)); - notech_or2 i_565(.A(n_717), .B(n_443), .Z(n_718)); - notech_and2 i_567(.A(n_468), .B(n_436), .Z(n_719)); - notech_or2 i_568(.A(n_719), .B(n_444), .Z(n_720)); - notech_and2 i_570(.A(n_469), .B(n_437), .Z(n_721)); - notech_or2 i_571(.A(n_721), .B(n_445), .Z(n_722)); - notech_and2 i_573(.A(n_370802), .B(n_438), .Z(n_723)); - notech_or2 i_574(.A(n_723), .B(n_446), .Z(n_724)); - notech_inv i_575(.A(n_724), .Z(n_493)); - notech_and2 i_576(.A(n_471), .B(n_439), .Z(n_725)); - notech_or2 i_577(.A(n_725), .B(n_447), .Z(n_726)); - notech_inv i_578(.A(n_726), .Z(n_494)); - notech_or2 i_580(.A(n_727), .B(n_448), .Z(n_728)); - notech_inv i_581(.A(n_728), .Z(n_495)); - notech_or2 i_583(.A(n_729), .B(n_449), .Z(n_730)); - notech_inv i_584(.A(n_730), .Z(n_496)); - notech_or2 i_586(.A(n_731), .B(n_450), .Z(n_732)); - notech_inv i_587(.A(n_732), .Z(n_497)); - notech_or2 i_589(.A(n_733), .B(n_451), .Z(n_734)); - notech_inv i_590(.A(n_734), .Z(n_498)); - notech_or2 i_592(.A(n_735), .B(n_452), .Z(n_736)); - notech_inv i_593(.A(n_736), .Z(n_499)); - notech_or2 i_595(.A(n_737), .B(n_453), .Z(n_738)); - notech_inv i_596(.A(n_738), .Z(n_500)); - notech_inv i_285(.A(n_454), .Z(n_501)); - notech_nand2 i_301(.A(n_462), .B(n_370802), .Z(n_517)); - notech_nand2 i_302(.A(n_463), .B(n_471), .Z(n_518)); - notech_inv i_311(.A(n_480), .Z(n_527)); - notech_inv i_312(.A(n_481), .Z(n_528)); - notech_inv i_313(.A(n_482), .Z(n_529)); - notech_inv i_314(.A(n_483), .Z(n_530)); - notech_inv i_315(.A(n_484), .Z(n_531)); - notech_or2 i_597(.A(n_517), .B(n_501), .Z(n_740)); - notech_and2 i_598(.A(n_740), .B(n_493), .Z(n_739)); - notech_inv i_599(.A(n_739), .Z(n_540)); - notech_and2 i_601(.A(n_518), .B(n_494), .Z(n_741)); - notech_inv i_602(.A(n_741), .Z(n_541)); - notech_and2 i_604(.A(n_744), .B(n_495), .Z(n_743)); - notech_inv i_605(.A(n_743), .Z(n_542)); - notech_or2 i_606(.A(n_520), .B(n_480), .Z(n_746)); - notech_and2 i_607(.A(n_746), .B(n_496), .Z(n_745)); - notech_inv i_608(.A(n_745), .Z(n_543)); - notech_or2 i_609(.A(n_521), .B(n_481), .Z(n_748)); - notech_and2 i_610(.A(n_748), .B(n_497), .Z(n_747)); - notech_inv i_611(.A(n_747), .Z(n_544)); - notech_or2 i_612(.A(n_522), .B(n_482), .Z(n_750)); - notech_and2 i_613(.A(n_750), .B(n_498), .Z(n_749)); - notech_inv i_614(.A(n_749), .Z(n_545)); - notech_or2 i_615(.A(n_417), .B(n_483), .Z(n_752)); - notech_and2 i_616(.A(n_752), .B(n_499), .Z(n_751)); - notech_inv i_617(.A(n_751), .Z(n_546)); - notech_or2 i_618(.A(n_418), .B(n_484), .Z(n_754)); - notech_and2 i_619(.A(n_754), .B(n_500), .Z(n_753)); - notech_inv i_620(.A(n_753), .Z(n_547)); - notech_inv i_626(.A(n_757), .Z(i_psram_sub_function_sub[0])); - notech_inv i_632(.A(n_762), .Z(i_psram_sub_function_sub[1])); - notech_inv i_638(.A(n_767), .Z(i_psram_sub_function_sub[2])); - notech_inv i_639(.A(n_527), .Z(n_770)); - notech_inv i_640(.A(n_296844), .Z(n_773)); - notech_nand2 i_641(.A(n_773), .B(n_527), .Z(n_774)); - notech_nand2 i_642(.A(n_296844), .B(n_770), .Z(n_771)); - notech_nand2 i_643(.A(n_771), .B(n_774), .Z(n_772)); - notech_inv i_644(.A(n_772), .Z(i_psram_sub_function_sub[3])); - notech_inv i_645(.A(n_528), .Z(n_775)); - notech_inv i_646(.A(n_298842), .Z(n_778)); - notech_nand2 i_647(.A(n_778), .B(n_528), .Z(n_779)); - notech_nand2 i_648(.A(n_298842), .B(n_775), .Z(n_776)); - notech_nand2 i_649(.A(n_776), .B(n_779), .Z(n_777)); - notech_inv i_650(.A(n_777), .Z(i_psram_sub_function_sub[4])); - notech_inv i_651(.A(n_529), .Z(n_780)); - notech_inv i_652(.A(n_300840), .Z(n_783)); - notech_nand2 i_653(.A(n_783), .B(n_529), .Z(n_784)); - notech_nand2 i_654(.A(n_300840), .B(n_780), .Z(n_781)); - notech_nand2 i_655(.A(n_781), .B(n_784), .Z(n_782)); - notech_inv i_656(.A(n_782), .Z(i_psram_sub_function_sub[5])); - notech_inv i_657(.A(n_530), .Z(n_785)); - notech_inv i_658(.A(n_302838), .Z(n_788)); - notech_nand2 i_659(.A(n_788), .B(n_530), .Z(n_789)); - notech_nand2 i_660(.A(n_302838), .B(n_785), .Z(n_786)); - notech_nand2 i_661(.A(n_786), .B(n_789), .Z(n_787)); - notech_inv i_662(.A(n_787), .Z(i_psram_sub_function_sub[6])); - notech_inv i_663(.A(n_531), .Z(n_790)); - notech_inv i_664(.A(n_304836), .Z(n_793)); - notech_nand2 i_665(.A(n_793), .B(n_531), .Z(n_794)); - notech_nand2 i_666(.A(n_304836), .B(n_790), .Z(n_791)); - notech_nand2 i_667(.A(n_791), .B(n_794), .Z(n_792)); - notech_inv i_668(.A(n_792), .Z(i_psram_sub_function_sub[7])); - notech_inv i_669(.A(n_708), .Z(n_795)); - notech_inv i_670(.A(n_306834), .Z(n_798)); - notech_nand2 i_671(.A(n_798), .B(n_708), .Z(n_799)); - notech_nand2 i_672(.A(n_306834), .B(n_795), .Z(n_796)); - notech_nand2 i_673(.A(n_796), .B(n_799), .Z(n_797)); - notech_inv i_674(.A(n_797), .Z(i_psram_sub_function_sub[8])); - notech_inv i_675(.A(n_710), .Z(n_800)); - notech_inv i_676(.A(n_308832), .Z(n_803)); - notech_nand2 i_677(.A(n_803), .B(n_710), .Z(n_804)); - notech_nand2 i_678(.A(n_308832), .B(n_800), .Z(n_801)); - notech_nand2 i_679(.A(n_801), .B(n_804), .Z(n_802)); - notech_inv i_680(.A(n_802), .Z(i_psram_sub_function_sub[9])); - notech_inv i_681(.A(n_712), .Z(n_805)); - notech_inv i_682(.A(i_psram_sub_axi_araddr[10]), .Z(n_808)); - notech_nand2 i_683(.A(n_808), .B(n_712), .Z(n_809)); - notech_nand2 i_684(.A(i_psram_sub_axi_araddr[10]), .B(n_805), .Z(n_806) - ); - notech_nand2 i_685(.A(n_806), .B(n_809), .Z(n_807)); - notech_inv i_686(.A(n_807), .Z(i_psram_sub_function_sub[10])); - notech_inv i_687(.A(n_714), .Z(n_810)); - notech_inv i_688(.A(i_psram_sub_axi_araddr[11]), .Z(n_813)); - notech_nand2 i_689(.A(n_813), .B(n_714), .Z(n_814)); - notech_nand2 i_690(.A(i_psram_sub_axi_araddr[11]), .B(n_810), .Z(n_811) - ); - notech_nand2 i_691(.A(n_811), .B(n_814), .Z(n_812)); - notech_inv i_692(.A(n_812), .Z(i_psram_sub_function_sub[11])); - notech_inv i_693(.A(n_716), .Z(n_815)); - notech_inv i_694(.A(i_psram_sub_axi_araddr[12]), .Z(n_818)); - notech_nand2 i_695(.A(n_818), .B(n_716), .Z(n_819)); - notech_nand2 i_696(.A(i_psram_sub_axi_araddr[12]), .B(n_815), .Z(n_816) - ); - notech_nand2 i_697(.A(n_816), .B(n_819), .Z(n_817)); - notech_inv i_698(.A(n_817), .Z(i_psram_sub_function_sub[12])); - notech_inv i_699(.A(n_718), .Z(n_820)); - notech_inv i_700(.A(i_psram_sub_axi_araddr[13]), .Z(n_823)); - notech_nand2 i_701(.A(n_823), .B(n_718), .Z(n_824)); - notech_nand2 i_702(.A(i_psram_sub_axi_araddr[13]), .B(n_820), .Z(n_821) - ); - notech_nand2 i_703(.A(n_821), .B(n_824), .Z(n_822)); - notech_inv i_704(.A(n_822), .Z(i_psram_sub_function_sub[13])); - notech_inv i_705(.A(n_720), .Z(n_825)); - notech_inv i_706(.A(i_psram_sub_axi_araddr[14]), .Z(n_828)); - notech_nand2 i_707(.A(n_828), .B(n_720), .Z(n_829)); - notech_nand2 i_708(.A(i_psram_sub_axi_araddr[14]), .B(n_825), .Z(n_826) - ); - notech_nand2 i_709(.A(n_826), .B(n_829), .Z(n_827)); - notech_inv i_710(.A(n_827), .Z(i_psram_sub_function_sub[14])); - notech_inv i_711(.A(n_722), .Z(n_830)); - notech_inv i_712(.A(i_psram_sub_axi_araddr[15]), .Z(n_833)); - notech_nand2 i_713(.A(n_833), .B(n_722), .Z(n_834)); - notech_nand2 i_714(.A(i_psram_sub_axi_araddr[15]), .B(n_830), .Z(n_831) - ); - notech_nand2 i_715(.A(n_831), .B(n_834), .Z(n_832)); - notech_inv i_716(.A(n_832), .Z(i_psram_sub_function_sub[15])); - notech_inv i_717(.A(n_540), .Z(n_835)); - notech_inv i_718(.A(i_psram_sub_axi_araddr[16]), .Z(n_838)); - notech_nand2 i_719(.A(n_838), .B(n_540), .Z(n_839)); - notech_nand2 i_720(.A(i_psram_sub_axi_araddr[16]), .B(n_835), .Z(n_836) - ); - notech_nand2 i_721(.A(n_836), .B(n_839), .Z(n_837)); - notech_inv i_722(.A(n_837), .Z(i_psram_sub_function_sub[16])); - notech_inv i_723(.A(n_541), .Z(n_840)); - notech_inv i_724(.A(i_psram_sub_axi_araddr[17]), .Z(n_843)); - notech_nand2 i_725(.A(n_843), .B(n_541), .Z(n_844)); - notech_nand2 i_726(.A(i_psram_sub_axi_araddr[17]), .B(n_840), .Z(n_841) - ); - notech_nand2 i_727(.A(n_841), .B(n_844), .Z(n_842)); - notech_inv i_728(.A(n_842), .Z(i_psram_sub_function_sub[17])); - notech_inv i_729(.A(n_542), .Z(n_845)); - notech_inv i_730(.A(i_psram_sub_axi_araddr[18]), .Z(n_848)); - notech_nand2 i_731(.A(n_848), .B(n_542), .Z(n_849)); - notech_nand2 i_732(.A(i_psram_sub_axi_araddr[18]), .B(n_845), .Z(n_846) - ); - notech_nand2 i_733(.A(n_846), .B(n_849), .Z(n_847)); - notech_inv i_734(.A(n_847), .Z(i_psram_sub_function_sub[18])); - notech_inv i_735(.A(n_543), .Z(n_850)); - notech_inv i_736(.A(i_psram_sub_axi_araddr[19]), .Z(n_853)); - notech_nand2 i_737(.A(n_853), .B(n_543), .Z(n_854)); - notech_nand2 i_738(.A(i_psram_sub_axi_araddr[19]), .B(n_850), .Z(n_851) - ); - notech_nand2 i_739(.A(n_851), .B(n_854), .Z(n_852)); - notech_inv i_740(.A(n_852), .Z(i_psram_sub_function_sub[19])); - notech_inv i_741(.A(n_544), .Z(n_855)); - notech_inv i_742(.A(i_psram_sub_axi_araddr[20]), .Z(n_858)); - notech_nand2 i_743(.A(n_858), .B(n_544), .Z(n_859)); - notech_nand2 i_744(.A(i_psram_sub_axi_araddr[20]), .B(n_855), .Z(n_856) - ); - notech_nand2 i_745(.A(n_856), .B(n_859), .Z(n_857)); - notech_inv i_746(.A(n_857), .Z(i_psram_sub_function_sub[20])); - notech_inv i_747(.A(n_545), .Z(n_860)); - notech_inv i_748(.A(i_psram_sub_axi_araddr[21]), .Z(n_863)); - notech_nand2 i_749(.A(n_863), .B(n_545), .Z(n_864)); - notech_nand2 i_750(.A(i_psram_sub_axi_araddr[21]), .B(n_860), .Z(n_861) - ); - notech_nand2 i_751(.A(n_861), .B(n_864), .Z(n_862)); - notech_inv i_752(.A(n_862), .Z(i_psram_sub_function_sub[21])); - notech_inv i_753(.A(n_546), .Z(n_865)); - notech_inv i_754(.A(i_psram_sub_axi_araddr[22]), .Z(n_868)); - notech_nand2 i_755(.A(n_868), .B(n_546), .Z(n_869)); - notech_nand2 i_756(.A(i_psram_sub_axi_araddr[22]), .B(n_865), .Z(n_866) - ); - notech_nand2 i_757(.A(n_866), .B(n_869), .Z(n_867)); - notech_inv i_758(.A(n_867), .Z(i_psram_sub_function_sub[22])); - notech_inv i_759(.A(n_547), .Z(n_870)); - notech_inv i_760(.A(i_psram_sub_axi_araddr[23]), .Z(n_873)); - notech_nand2 i_761(.A(n_873), .B(n_547), .Z(n_874)); - notech_nand2 i_762(.A(i_psram_sub_axi_araddr[23]), .B(n_870), .Z(n_871) - ); - notech_nand2 i_763(.A(n_871), .B(n_874), .Z(n_872)); - notech_inv i_764(.A(n_872), .Z(i_psram_sub_function_sub[23])); - notech_inv i_0(.A(i_psram_sub_axi_araddr[2]), .Z(\i_psram_sub_axi_araddr_0[2] - )); - notech_nand2 i_1(.A(i_psram_sub_axi_araddr[2]), .B(i_psram_sub_axi_araddr - [3]), .Z(n_133)); - notech_nand2 i_2(.A(i_psram_sub_axi_araddr[3]), .B(i_psram_sub_axi_araddr - [4]), .Z(n_134)); - notech_nand2 i_3(.A(i_psram_sub_axi_araddr[4]), .B(i_psram_sub_axi_araddr - [5]), .Z(n_135)); - notech_nand2 i_4(.A(i_psram_sub_axi_araddr[5]), .B(i_psram_sub_axi_araddr - [6]), .Z(n_136)); - notech_nand2 i_5(.A(i_psram_sub_axi_araddr[6]), .B(i_psram_sub_axi_araddr - [7]), .Z(n_137)); - notech_nand2 i_6(.A(i_psram_sub_axi_araddr[7]), .B(i_psram_sub_axi_araddr - [8]), .Z(n_138)); - notech_nand2 i_7(.A(i_psram_sub_axi_araddr[8]), .B(i_psram_sub_axi_araddr - [9]), .Z(n_139)); - notech_nand2 i_8(.A(i_psram_sub_axi_araddr[9]), .B(i_psram_sub_axi_araddr - [10]), .Z(n_140)); - notech_nand2 i_9(.A(i_psram_sub_axi_araddr[10]), .B(i_psram_sub_axi_araddr - [11]), .Z(n_141)); - notech_nand2 i_10(.A(i_psram_sub_axi_araddr[11]), .B(i_psram_sub_axi_araddr - [12]), .Z(n_142)); - notech_nand2 i_11(.A(i_psram_sub_axi_araddr[12]), .B(i_psram_sub_axi_araddr - [13]), .Z(n_143)); - notech_nand2 i_12(.A(i_psram_sub_axi_araddr[13]), .B(i_psram_sub_axi_araddr - [14]), .Z(n_144)); - notech_nand2 i_13(.A(i_psram_sub_axi_araddr[14]), .B(i_psram_sub_axi_araddr - [15]), .Z(n_145)); - notech_nand2 i_14(.A(i_psram_sub_axi_araddr[15]), .B(i_psram_sub_axi_araddr - [16]), .Z(n_146)); - notech_nand2 i_15(.A(i_psram_sub_axi_araddr[16]), .B(i_psram_sub_axi_araddr - [17]), .Z(n_147)); - notech_nand2 i_16(.A(i_psram_sub_axi_araddr[17]), .B(i_psram_sub_axi_araddr - [18]), .Z(n_148)); - notech_nand2 i_17(.A(i_psram_sub_axi_araddr[18]), .B(i_psram_sub_axi_araddr - [19]), .Z(n_149)); - notech_nand2 i_18(.A(i_psram_sub_axi_araddr[19]), .B(i_psram_sub_axi_araddr - [20]), .Z(n_150)); - notech_nand2 i_19(.A(i_psram_sub_axi_araddr[20]), .B(i_psram_sub_axi_araddr - [21]), .Z(n_151)); - notech_nand2 i_20(.A(i_psram_sub_axi_araddr[21]), .B(i_psram_sub_axi_araddr - [22]), .Z(n_152)); - notech_inv i_22(.A(\i_psram_sub_axi_araddr_0[2] ), .Z(n_154)); - notech_inv i_23(.A(n_133), .Z(n_265)); - notech_nor2 i_24(.A(\i_psram_sub_axi_araddr_0[2] ), .B(n_134), .Z(n_156) - ); - notech_nor2 i_25(.A(n_133), .B(n_135), .Z(n_157)); - notech_nor2 i_26(.A(n_134), .B(n_136), .Z(n_158)); - notech_nor2 i_27(.A(n_135), .B(n_137), .Z(n_159)); - notech_nor2 i_28(.A(n_136), .B(n_138), .Z(n_160)); - notech_nor2 i_29(.A(n_137), .B(n_139), .Z(n_161)); - notech_nor2 i_30(.A(n_138), .B(n_140), .Z(n_162)); - notech_nor2 i_31(.A(n_139), .B(n_141), .Z(n_163)); - notech_nor2 i_32(.A(n_140), .B(n_142), .Z(n_164)); - notech_nor2 i_33(.A(n_141), .B(n_143), .Z(n_165)); - notech_nor2 i_34(.A(n_142), .B(n_144), .Z(n_166)); - notech_nor2 i_35(.A(n_143), .B(n_145), .Z(n_167)); - notech_nor2 i_36(.A(n_144), .B(n_146), .Z(n_168)); - notech_nor2 i_37(.A(n_145), .B(n_147), .Z(n_169)); - notech_nor2 i_38(.A(n_146), .B(n_148), .Z(n_170)); - notech_nor2 i_39(.A(n_147), .B(n_149), .Z(n_171)); - notech_nor2 i_40(.A(n_148), .B(n_150), .Z(n_172)); - notech_nor2 i_41(.A(n_149), .B(n_151), .Z(n_173)); - notech_nor2 i_42(.A(n_150), .B(n_152), .Z(n_174)); - notech_inv i_44(.A(n_154), .Z(n_176)); - notech_inv i_45(.A(n_265), .Z(n_177)); - notech_inv i_46(.A(n_156), .Z(n_178)); - notech_inv i_47(.A(n_157), .Z(n_266)); - notech_nand2 i_48(.A(n_154), .B(n_158), .Z(n_180)); - notech_nand2 i_49(.A(n_265), .B(n_159), .Z(n_181)); - notech_nand2 i_50(.A(n_156), .B(n_160), .Z(n_182)); - notech_nand2 i_51(.A(n_157), .B(n_161), .Z(n_183)); - notech_nand2 i_52(.A(n_158), .B(n_162), .Z(n_184)); - notech_nand2 i_53(.A(n_159), .B(n_163), .Z(n_185)); - notech_nand2 i_54(.A(n_160), .B(n_164), .Z(n_186)); - notech_nand2 i_55(.A(n_161), .B(n_165), .Z(n_187)); - notech_nand2 i_56(.A(n_162), .B(n_166), .Z(n_188)); - notech_nand2 i_57(.A(n_163), .B(n_167), .Z(n_189)); - notech_nand2 i_58(.A(n_164), .B(n_168), .Z(n_190)); - notech_nand2 i_59(.A(n_165), .B(n_169), .Z(n_191)); - notech_nand2 i_60(.A(n_166), .B(n_170), .Z(n_192)); - notech_nand2 i_61(.A(n_167), .B(n_171), .Z(n_193)); - notech_nand2 i_62(.A(n_168), .B(n_172), .Z(n_194)); - notech_nand2 i_63(.A(n_169), .B(n_173), .Z(n_195)); - notech_nand2 i_64(.A(n_170), .B(n_174), .Z(n_196)); - notech_inv i_66(.A(n_176), .Z(n_198)); - notech_inv i_67(.A(n_177), .Z(n_199)); - notech_inv i_68(.A(n_178), .Z(n_200)); - notech_inv i_69(.A(n_266), .Z(n_201)); - notech_inv i_70(.A(n_180), .Z(n_202)); - notech_nor2 i_74(.A(n_176), .B(n_184), .Z(n_206)); - notech_nor2 i_75(.A(n_177), .B(n_185), .Z(n_207)); - notech_nor2 i_76(.A(n_178), .B(n_186), .Z(n_208)); - notech_nor2 i_77(.A(n_266), .B(n_187), .Z(n_209)); - notech_nor2 i_78(.A(n_180), .B(n_188), .Z(n_210)); - notech_nor2 i_79(.A(n_181), .B(n_189), .Z(n_211)); - notech_nor2 i_80(.A(n_182), .B(n_190), .Z(n_212)); - notech_nor2 i_81(.A(n_183), .B(n_191), .Z(n_213)); - notech_nor2 i_82(.A(n_184), .B(n_192), .Z(n_214)); - notech_nor2 i_83(.A(n_185), .B(n_193), .Z(n_215)); - notech_nor2 i_84(.A(n_186), .B(n_194), .Z(n_216)); - notech_nor2 i_85(.A(n_187), .B(n_195), .Z(n_217)); - notech_nor2 i_86(.A(n_188), .B(n_196), .Z(n_218)); - notech_inv i_88(.A(n_198), .Z(n_220)); - notech_inv i_89(.A(n_199), .Z(n_221)); - notech_inv i_90(.A(n_200), .Z(n_222)); - notech_inv i_91(.A(n_201), .Z(n_223)); - notech_inv i_92(.A(n_202), .Z(n_224)); - notech_inv i_96(.A(n_206), .Z(n_228)); - notech_inv i_97(.A(n_207), .Z(n_229)); - notech_inv i_98(.A(n_208), .Z(n_230)); - notech_inv i_99(.A(n_209), .Z(n_231)); - notech_inv i_100(.A(n_210), .Z(n_232)); - notech_inv i_101(.A(n_211), .Z(n_233)); - notech_inv i_102(.A(n_212), .Z(n_234)); - notech_inv i_103(.A(n_213), .Z(n_272)); - notech_nand2 i_104(.A(n_198), .B(n_214), .Z(n_236)); - notech_nand2 i_105(.A(n_199), .B(n_215), .Z(n_237)); - notech_nand2 i_106(.A(n_200), .B(n_216), .Z(n_238)); - notech_nand2 i_107(.A(n_201), .B(n_217), .Z(n_239)); - notech_nand2 i_108(.A(n_202), .B(n_218), .Z(n_240)); - notech_inv i_132(.A(n_220), .Z(n_276)); - notech_inv i_133(.A(i_psram_sub_axi_araddr[3]), .Z(n_279)); - notech_nand2 i_134(.A(n_279), .B(n_220), .Z(n_280)); - notech_nand2 i_135(.A(i_psram_sub_axi_araddr[3]), .B(n_276), .Z(n_277) - ); - notech_nand2 i_136(.A(n_277), .B(n_280), .Z(n_278)); - notech_inv i_137(.A(n_278), .Z(\i_psram_sub_axi_araddr_0[3] )); - notech_inv i_138(.A(n_221), .Z(n_281)); - notech_inv i_139(.A(i_psram_sub_axi_araddr[4]), .Z(n_284)); - notech_nand2 i_140(.A(n_284), .B(n_221), .Z(n_285)); - notech_nand2 i_141(.A(i_psram_sub_axi_araddr[4]), .B(n_281), .Z(n_282) - ); - notech_nand2 i_142(.A(n_282), .B(n_285), .Z(n_283)); - notech_inv i_143(.A(n_283), .Z(\i_psram_sub_axi_araddr_0[4] )); - notech_inv i_144(.A(n_222), .Z(n_286)); - notech_inv i_145(.A(i_psram_sub_axi_araddr[5]), .Z(n_289)); - notech_nand2 i_146(.A(n_289), .B(n_222), .Z(n_290)); - notech_nand2 i_147(.A(i_psram_sub_axi_araddr[5]), .B(n_286), .Z(n_287) - ); - notech_nand2 i_148(.A(n_287), .B(n_290), .Z(n_288)); - notech_inv i_149(.A(n_288), .Z(\i_psram_sub_axi_araddr_0[5] )); - notech_inv i_150(.A(n_223), .Z(n_291)); - notech_inv i_151(.A(i_psram_sub_axi_araddr[6]), .Z(n_294)); - notech_nand2 i_152(.A(n_294), .B(n_223), .Z(n_295)); - notech_nand2 i_153(.A(i_psram_sub_axi_araddr[6]), .B(n_291), .Z(n_292) - ); - notech_nand2 i_154(.A(n_292), .B(n_295), .Z(n_293)); - notech_inv i_155(.A(n_293), .Z(\i_psram_sub_axi_araddr_0[6] )); - notech_inv i_156(.A(n_224), .Z(n_296)); - notech_inv i_157(.A(i_psram_sub_axi_araddr[7]), .Z(n_299)); - notech_nand2 i_158(.A(n_299), .B(n_224), .Z(n_300)); - notech_nand2 i_159(.A(i_psram_sub_axi_araddr[7]), .B(n_296), .Z(n_297) - ); - notech_nand2 i_160(.A(n_297), .B(n_300), .Z(n_298)); - notech_inv i_161(.A(n_298), .Z(\i_psram_sub_axi_araddr_0[7] )); - notech_inv i_162(.A(n_181), .Z(n_301)); - notech_inv i_163(.A(i_psram_sub_axi_araddr[8]), .Z(n_304)); - notech_nand2 i_164(.A(n_304), .B(n_181), .Z(n_305)); - notech_nand2 i_165(.A(i_psram_sub_axi_araddr[8]), .B(n_301), .Z(n_302) - ); - notech_nand2 i_166(.A(n_302), .B(n_305), .Z(n_303)); - notech_inv i_167(.A(n_303), .Z(\i_psram_sub_axi_araddr_0[8] )); - notech_inv i_168(.A(n_182), .Z(n_306)); - notech_inv i_169(.A(i_psram_sub_axi_araddr[9]), .Z(n_309)); - notech_nand2 i_170(.A(n_309), .B(n_182), .Z(n_310)); - notech_nand2 i_171(.A(i_psram_sub_axi_araddr[9]), .B(n_306), .Z(n_307) - ); - notech_nand2 i_172(.A(n_307), .B(n_310), .Z(n_308)); - notech_inv i_173(.A(n_308), .Z(\i_psram_sub_axi_araddr_0[9] )); - notech_inv i_174(.A(n_183), .Z(n_311)); - notech_inv i_175(.A(i_psram_sub_axi_araddr[10]), .Z(n_314)); - notech_nand2 i_176(.A(n_314), .B(n_183), .Z(n_315)); - notech_nand2 i_177(.A(i_psram_sub_axi_araddr[10]), .B(n_311), .Z(n_312) - ); - notech_nand2 i_178(.A(n_312), .B(n_315), .Z(n_313)); - notech_inv i_179(.A(n_313), .Z(\i_psram_sub_axi_araddr_0[10] )); - notech_inv i_180(.A(n_228), .Z(n_316)); - notech_inv i_181(.A(i_psram_sub_axi_araddr[11]), .Z(n_319)); - notech_nand2 i_182(.A(n_319), .B(n_228), .Z(n_320)); - notech_nand2 i_183(.A(i_psram_sub_axi_araddr[11]), .B(n_316), .Z(n_317) - ); - notech_nand2 i_184(.A(n_317), .B(n_320), .Z(n_318)); - notech_inv i_185(.A(n_318), .Z(\i_psram_sub_axi_araddr_0[11] )); - notech_inv i_186(.A(n_229), .Z(n_321)); - notech_inv i_187(.A(i_psram_sub_axi_araddr[12]), .Z(n_324)); - notech_nand2 i_188(.A(n_324), .B(n_229), .Z(n_325)); - notech_nand2 i_189(.A(i_psram_sub_axi_araddr[12]), .B(n_321), .Z(n_322) - ); - notech_nand2 i_190(.A(n_322), .B(n_325), .Z(n_323)); - notech_inv i_191(.A(n_323), .Z(\i_psram_sub_axi_araddr_0[12] )); - notech_inv i_192(.A(n_230), .Z(n_326)); - notech_inv i_193(.A(i_psram_sub_axi_araddr[13]), .Z(n_329)); - notech_nand2 i_194(.A(n_329), .B(n_230), .Z(n_330)); - notech_nand2 i_195(.A(i_psram_sub_axi_araddr[13]), .B(n_326), .Z(n_327) - ); - notech_nand2 i_196(.A(n_327), .B(n_330), .Z(n_328)); - notech_inv i_197(.A(n_328), .Z(\i_psram_sub_axi_araddr_0[13] )); - notech_inv i_198(.A(n_231), .Z(n_331)); - notech_inv i_199(.A(i_psram_sub_axi_araddr[14]), .Z(n_334)); - notech_nand2 i_200(.A(n_334), .B(n_231), .Z(n_335)); - notech_nand2 i_201(.A(i_psram_sub_axi_araddr[14]), .B(n_331), .Z(n_332) - ); - notech_nand2 i_202(.A(n_332), .B(n_335), .Z(n_333)); - notech_inv i_203(.A(n_333), .Z(\i_psram_sub_axi_araddr_0[14] )); - notech_inv i_204(.A(n_232), .Z(n_336)); - notech_inv i_205(.A(i_psram_sub_axi_araddr[15]), .Z(n_339)); - notech_nand2 i_206(.A(n_339), .B(n_232), .Z(n_340)); - notech_nand2 i_207(.A(i_psram_sub_axi_araddr[15]), .B(n_336), .Z(n_337) - ); - notech_nand2 i_208(.A(n_337), .B(n_340), .Z(n_338)); - notech_inv i_209(.A(n_338), .Z(\i_psram_sub_axi_araddr_0[15] )); - notech_inv i_210(.A(n_233), .Z(n_341)); - notech_inv i_211(.A(i_psram_sub_axi_araddr[16]), .Z(n_344)); - notech_nand2 i_212(.A(n_344), .B(n_233), .Z(n_345)); - notech_nand2 i_213(.A(i_psram_sub_axi_araddr[16]), .B(n_341), .Z(n_342) - ); - notech_nand2 i_214(.A(n_342), .B(n_345), .Z(n_343)); - notech_inv i_215(.A(n_343), .Z(\i_psram_sub_axi_araddr_0[16] )); - notech_inv i_216(.A(n_234), .Z(n_346)); - notech_inv i_217(.A(i_psram_sub_axi_araddr[17]), .Z(n_349)); - notech_nand2 i_218(.A(n_349), .B(n_234), .Z(n_350)); - notech_nand2 i_219(.A(i_psram_sub_axi_araddr[17]), .B(n_346), .Z(n_347) - ); - notech_nand2 i_220(.A(n_347), .B(n_350), .Z(n_348)); - notech_inv i_221(.A(n_348), .Z(\i_psram_sub_axi_araddr_0[17] )); - notech_inv i_222(.A(n_272), .Z(n_351)); - notech_inv i_223(.A(i_psram_sub_axi_araddr[18]), .Z(n_354)); - notech_nand2 i_224(.A(n_354), .B(n_272), .Z(n_355)); - notech_nand2 i_225(.A(i_psram_sub_axi_araddr[18]), .B(n_351), .Z(n_352) - ); - notech_nand2 i_226(.A(n_352), .B(n_355), .Z(n_353)); - notech_inv i_227(.A(n_353), .Z(\i_psram_sub_axi_araddr_0[18] )); - notech_inv i_228(.A(n_236), .Z(n_356)); - notech_inv i_229(.A(i_psram_sub_axi_araddr[19]), .Z(n_359)); - notech_nand2 i_230(.A(n_359), .B(n_236), .Z(n_360)); - notech_nand2 i_231(.A(i_psram_sub_axi_araddr[19]), .B(n_356), .Z(n_357) - ); - notech_nand2 i_232(.A(n_357), .B(n_360), .Z(n_358)); - notech_inv i_233(.A(n_358), .Z(\i_psram_sub_axi_araddr_0[19] )); - notech_inv i_234(.A(n_237), .Z(n_361)); - notech_inv i_235(.A(i_psram_sub_axi_araddr[20]), .Z(n_364)); - notech_nand2 i_236(.A(n_364), .B(n_237), .Z(n_365)); - notech_nand2 i_237(.A(i_psram_sub_axi_araddr[20]), .B(n_361), .Z(n_362) - ); - notech_nand2 i_238(.A(n_362), .B(n_365), .Z(n_363)); - notech_inv i_239(.A(n_363), .Z(\i_psram_sub_axi_araddr_0[20] )); - notech_inv i_240(.A(n_238), .Z(n_366)); - notech_inv i_241(.A(i_psram_sub_axi_araddr[21]), .Z(n_369)); - notech_nand2 i_242(.A(n_369), .B(n_238), .Z(n_370)); - notech_nand2 i_243(.A(i_psram_sub_axi_araddr[21]), .B(n_366), .Z(n_367) - ); - notech_nand2 i_244(.A(n_367), .B(n_370), .Z(n_368)); - notech_inv i_245(.A(n_368), .Z(\i_psram_sub_axi_araddr_0[21] )); - notech_inv i_246(.A(n_239), .Z(n_371)); - notech_inv i_247(.A(i_psram_sub_axi_araddr[22]), .Z(n_374)); - notech_nand2 i_248(.A(n_374), .B(n_239), .Z(n_375)); - notech_nand2 i_249(.A(i_psram_sub_axi_araddr[22]), .B(n_371), .Z(n_372) - ); - notech_nand2 i_250(.A(n_372), .B(n_375), .Z(n_373)); - notech_inv i_251(.A(n_373), .Z(\i_psram_sub_axi_araddr_0[22] )); - notech_inv i_252(.A(n_240), .Z(n_376)); - notech_inv i_253(.A(i_psram_sub_axi_araddr[23]), .Z(n_379)); - notech_nand2 i_254(.A(n_379), .B(n_240), .Z(n_380)); - notech_nand2 i_255(.A(i_psram_sub_axi_araddr[23]), .B(n_376), .Z(n_377) - ); - notech_nand2 i_256(.A(n_377), .B(n_380), .Z(n_378)); - notech_inv i_257(.A(n_378), .Z(\i_psram_sub_axi_araddr_0[23] )); - notech_inv i_psram_sub_i_5222(.A(s00_axi_awready), .Z(i_psram_sub_n_4399 - )); - notech_inv i_psram_sub_i_5221(.A(i_psram_sub_go), .Z(i_psram_sub_n_4398) - ); - notech_inv i_psram_sub_i_5220(.A(\i_psram_sub_axi_rdata_0[16] ), .Z(i_psram_sub_n_4397 - )); - notech_inv i_psram_sub_i_5219(.A(\i_psram_sub_axi_rdata_0[17] ), .Z(i_psram_sub_n_4396 - )); - notech_inv i_psram_sub_i_5218(.A(\i_psram_sub_axi_rdata_0[18] ), .Z(i_psram_sub_n_4395 - )); - notech_inv i_psram_sub_i_5217(.A(\i_psram_sub_axi_rdata_0[19] ), .Z(i_psram_sub_n_4394 - )); - notech_inv i_psram_sub_i_5216(.A(\i_psram_sub_axi_rdata_0[20] ), .Z(i_psram_sub_n_4393 - )); - notech_inv i_psram_sub_i_5215(.A(\i_psram_sub_axi_rdata_0[21] ), .Z(i_psram_sub_n_4392 - )); - notech_inv i_psram_sub_i_5214(.A(\i_psram_sub_axi_rdata_0[22] ), .Z(i_psram_sub_n_4391 - )); - notech_inv i_psram_sub_i_5213(.A(\i_psram_sub_axi_rdata_0[23] ), .Z(i_psram_sub_n_4390 - )); - notech_inv i_psram_sub_i_5212(.A(\i_psram_sub_axi_rdata_0[24] ), .Z(i_psram_sub_n_4389 - )); - notech_inv i_psram_sub_i_5211(.A(\i_psram_sub_axi_rdata_0[25] ), .Z(i_psram_sub_n_4388 - )); - notech_inv i_psram_sub_i_5210(.A(\i_psram_sub_axi_rdata_0[26] ), .Z(i_psram_sub_n_4387 - )); - notech_inv i_psram_sub_i_5209(.A(\i_psram_sub_axi_rdata_0[27] ), .Z(i_psram_sub_n_4386 - )); - notech_inv i_psram_sub_i_5208(.A(\i_psram_sub_axi_rdata_0[28] ), .Z(i_psram_sub_n_4385 - )); - notech_inv i_psram_sub_i_5207(.A(\i_psram_sub_axi_rdata_0[29] ), .Z(i_psram_sub_n_4384 - )); - notech_inv i_psram_sub_i_5206(.A(\i_psram_sub_axi_rdata_0[30] ), .Z(i_psram_sub_n_4383 - )); - notech_inv i_psram_sub_i_5205(.A(\i_psram_sub_axi_rdata_0[31] ), .Z(i_psram_sub_n_4382 - )); - notech_inv i_psram_sub_i_5204(.A(\i_psram_sub_axi_awaddr_0[2] ), .Z(i_psram_sub_n_4381 - )); - notech_inv i_psram_sub_i_5203(.A(\i_psram_sub_axi_awaddr_0[3] ), .Z(i_psram_sub_n_4380 - )); - notech_inv i_psram_sub_i_5202(.A(\i_psram_sub_axi_awaddr_0[4] ), .Z(i_psram_sub_n_4379 - )); - notech_inv i_psram_sub_i_5201(.A(\i_psram_sub_axi_awaddr_0[5] ), .Z(i_psram_sub_n_4378 - )); - notech_inv i_psram_sub_i_5200(.A(\i_psram_sub_axi_awaddr_0[6] ), .Z(i_psram_sub_n_4377 - )); - notech_inv i_psram_sub_i_5199(.A(\i_psram_sub_axi_awaddr_0[7] ), .Z(i_psram_sub_n_4376 - )); - notech_inv i_psram_sub_i_5198(.A(\i_psram_sub_axi_awaddr_0[8] ), .Z(i_psram_sub_n_4375 - )); - notech_inv i_psram_sub_i_5197(.A(\i_psram_sub_axi_awaddr_0[9] ), .Z(i_psram_sub_n_4374 - )); - notech_inv i_psram_sub_i_5196(.A(\i_psram_sub_axi_awaddr_0[10] ), .Z(i_psram_sub_n_4373 - )); - notech_inv i_psram_sub_i_5195(.A(\i_psram_sub_axi_awaddr_0[11] ), .Z(i_psram_sub_n_4372 - )); - notech_inv i_psram_sub_i_5194(.A(\i_psram_sub_axi_awaddr_0[12] ), .Z(i_psram_sub_n_4371 - )); - notech_inv i_psram_sub_i_5193(.A(\i_psram_sub_axi_awaddr_0[13] ), .Z(i_psram_sub_n_4370 - )); - notech_inv i_psram_sub_i_5192(.A(\i_psram_sub_axi_awaddr_0[14] ), .Z(i_psram_sub_n_4369 - )); - notech_inv i_psram_sub_i_5191(.A(\i_psram_sub_axi_awaddr_0[15] ), .Z(i_psram_sub_n_4368 - )); - notech_inv i_psram_sub_i_5190(.A(\i_psram_sub_axi_awaddr_0[16] ), .Z(i_psram_sub_n_4367 - )); - notech_inv i_psram_sub_i_5189(.A(\i_psram_sub_axi_awaddr_0[17] ), .Z(i_psram_sub_n_4366 - )); - notech_inv i_psram_sub_i_5188(.A(\i_psram_sub_axi_awaddr_0[18] ), .Z(i_psram_sub_n_4365 - )); - notech_inv i_psram_sub_i_5187(.A(\i_psram_sub_axi_awaddr_0[19] ), .Z(i_psram_sub_n_4364 - )); - notech_inv i_psram_sub_i_5186(.A(\i_psram_sub_axi_awaddr_0[20] ), .Z(i_psram_sub_n_4363 - )); - notech_inv i_psram_sub_i_5185(.A(\i_psram_sub_axi_awaddr_0[21] ), .Z(i_psram_sub_n_4362 - )); - notech_inv i_psram_sub_i_5184(.A(\i_psram_sub_axi_awaddr_0[22] ), .Z(i_psram_sub_n_4361 - )); - notech_inv i_psram_sub_i_5183(.A(\i_psram_sub_axi_awaddr_0[23] ), .Z(i_psram_sub_n_4360 - )); - notech_inv i_psram_sub_i_5182(.A(s00_axi_awlen[0]), .Z(i_psram_sub_n_4359 - )); - notech_inv i_psram_sub_i_5181(.A(s00_axi_awlen[1]), .Z(i_psram_sub_n_4358 - )); - notech_inv i_psram_sub_i_5180(.A(s00_axi_awlen[2]), .Z(i_psram_sub_n_4357 - )); - notech_inv i_psram_sub_i_5179(.A(s00_axi_awlen[3]), .Z(i_psram_sub_n_4356 - )); - notech_inv i_psram_sub_i_5178(.A(s00_axi_awlen[4]), .Z(i_psram_sub_n_4355 - )); - notech_inv i_psram_sub_i_5177(.A(s00_axi_awlen[5]), .Z(i_psram_sub_n_4354 - )); - notech_inv i_psram_sub_i_5176(.A(s00_axi_awlen[6]), .Z(i_psram_sub_n_4353 - )); - notech_inv i_psram_sub_i_5175(.A(s00_axi_awlen[7]), .Z(i_psram_sub_n_4352 - )); - notech_inv i_psram_sub_i_5174(.A(\i_psram_sub_axi_araddr_0[2] ), .Z(i_psram_sub_n_4351 - )); - notech_inv i_psram_sub_i_5173(.A(\i_psram_sub_axi_araddr_0[3] ), .Z(i_psram_sub_n_4350 - )); - notech_inv i_psram_sub_i_5172(.A(\i_psram_sub_axi_araddr_0[4] ), .Z(i_psram_sub_n_4349 - )); - notech_inv i_psram_sub_i_5171(.A(\i_psram_sub_axi_araddr_0[5] ), .Z(i_psram_sub_n_4348 - )); - notech_inv i_psram_sub_i_5170(.A(\i_psram_sub_axi_araddr_0[6] ), .Z(i_psram_sub_n_4347 - )); - notech_inv i_psram_sub_i_5169(.A(\i_psram_sub_axi_araddr_0[7] ), .Z(i_psram_sub_n_4346 - )); - notech_inv i_psram_sub_i_5168(.A(\i_psram_sub_axi_araddr_0[8] ), .Z(i_psram_sub_n_4345 - )); - notech_inv i_psram_sub_i_5167(.A(\i_psram_sub_axi_araddr_0[9] ), .Z(i_psram_sub_n_4344 - )); - notech_inv i_psram_sub_i_5166(.A(\i_psram_sub_axi_araddr_0[10] ), .Z(i_psram_sub_n_4343 - )); - notech_inv i_psram_sub_i_5165(.A(\i_psram_sub_axi_araddr_0[11] ), .Z(i_psram_sub_n_4342 - )); - notech_inv i_psram_sub_i_5164(.A(\i_psram_sub_axi_araddr_0[12] ), .Z(i_psram_sub_n_4341 - )); - notech_inv i_psram_sub_i_5163(.A(\i_psram_sub_axi_araddr_0[13] ), .Z(i_psram_sub_n_4340 - )); - notech_inv i_psram_sub_i_5162(.A(\i_psram_sub_axi_araddr_0[14] ), .Z(i_psram_sub_n_4339 - )); - notech_inv i_psram_sub_i_5161(.A(\i_psram_sub_axi_araddr_0[15] ), .Z(i_psram_sub_n_4338 - )); - notech_inv i_psram_sub_i_5160(.A(\i_psram_sub_axi_araddr_0[16] ), .Z(i_psram_sub_n_4337 - )); - notech_inv i_psram_sub_i_5159(.A(\i_psram_sub_axi_araddr_0[17] ), .Z(i_psram_sub_n_4336 - )); - notech_inv i_psram_sub_i_5158(.A(\i_psram_sub_axi_araddr_0[18] ), .Z(i_psram_sub_n_4335 - )); - notech_inv i_psram_sub_i_5157(.A(\i_psram_sub_axi_araddr_0[19] ), .Z(i_psram_sub_n_4334 - )); - notech_inv i_psram_sub_i_5156(.A(\i_psram_sub_axi_araddr_0[20] ), .Z(i_psram_sub_n_4333 - )); - notech_inv i_psram_sub_i_5155(.A(\i_psram_sub_axi_araddr_0[21] ), .Z(i_psram_sub_n_4332 - )); - notech_inv i_psram_sub_i_5154(.A(\i_psram_sub_axi_araddr_0[22] ), .Z(i_psram_sub_n_4331 - )); - notech_inv i_psram_sub_i_5153(.A(\i_psram_sub_axi_araddr_0[23] ), .Z(i_psram_sub_n_4330 - )); - notech_inv i_psram_sub_i_5152(.A(s00_axi_arlen[0]), .Z(i_psram_sub_n_4329 - )); - notech_inv i_psram_sub_i_5151(.A(s00_axi_arlen[1]), .Z(i_psram_sub_n_4328 - )); - notech_inv i_psram_sub_i_5150(.A(s00_axi_arlen[2]), .Z(i_psram_sub_n_4327 - )); - notech_inv i_psram_sub_i_5149(.A(s00_axi_arlen[3]), .Z(i_psram_sub_n_4326 - )); - notech_inv i_psram_sub_i_5148(.A(s00_axi_arlen[4]), .Z(i_psram_sub_n_4325 - )); - notech_inv i_psram_sub_i_5147(.A(s00_axi_arlen[5]), .Z(i_psram_sub_n_4324 - )); - notech_inv i_psram_sub_i_5146(.A(s00_axi_arlen[6]), .Z(i_psram_sub_n_4323 - )); - notech_inv i_psram_sub_i_5145(.A(s00_axi_arlen[7]), .Z(i_psram_sub_n_4322 - )); - notech_inv i_psram_sub_i_5144(.A(s00_axi_wvalid), .Z(i_psram_sub_n_4321) - ); - notech_inv i_psram_sub_i_5143(.A(i_psram_sub_mem_idle), .Z(i_psram_sub_n_4320 - )); - notech_inv i_psram_sub_i_5142(.A(s00_axi_aresetn), .Z(i_psram_sub_n_4319 - )); - notech_inv i_psram_sub_i_5141(.A(s00_axi_arburst[1]), .Z(i_psram_sub_n_4318 - )); - notech_inv i_psram_sub_i_5140(.A(s00_axi_awburst[1]), .Z(i_psram_sub_n_4317 - )); - notech_inv i_psram_sub_i_5139(.A(s00_axi_awburst[0]), .Z(i_psram_sub_n_4316 - )); - notech_inv i_psram_sub_i_5138(.A(s00_axi_wstrb[3]), .Z(i_psram_sub_n_4315 - )); - notech_inv i_psram_sub_i_5137(.A(s00_axi_wstrb[2]), .Z(i_psram_sub_n_4314 - )); - notech_inv i_psram_sub_i_5136(.A(s00_axi_rdata[31]), .Z(i_psram_sub_n_4313 - )); - notech_inv i_psram_sub_i_5135(.A(s00_axi_rdata[30]), .Z(i_psram_sub_n_4312 - )); - notech_inv i_psram_sub_i_5134(.A(s00_axi_rdata[29]), .Z(i_psram_sub_n_4311 - )); - notech_inv i_psram_sub_i_5133(.A(s00_axi_rdata[28]), .Z(i_psram_sub_n_4310 - )); - notech_inv i_psram_sub_i_5132(.A(s00_axi_rdata[27]), .Z(i_psram_sub_n_4309 - )); - notech_inv i_psram_sub_i_5131(.A(s00_axi_rdata[26]), .Z(i_psram_sub_n_4308 - )); - notech_inv i_psram_sub_i_5130(.A(s00_axi_rdata[25]), .Z(i_psram_sub_n_4307 - )); - notech_inv i_psram_sub_i_5129(.A(s00_axi_rdata[24]), .Z(i_psram_sub_n_4306 - )); - notech_inv i_psram_sub_i_5128(.A(s00_axi_rdata[23]), .Z(i_psram_sub_n_4305 - )); - notech_inv i_psram_sub_i_5127(.A(s00_axi_rdata[22]), .Z(i_psram_sub_n_4304 - )); - notech_inv i_psram_sub_i_5126(.A(s00_axi_rdata[21]), .Z(i_psram_sub_n_4303 - )); - notech_inv i_psram_sub_i_5125(.A(s00_axi_rdata[20]), .Z(i_psram_sub_n_4302 - )); - notech_inv i_psram_sub_i_5124(.A(s00_axi_rdata[19]), .Z(i_psram_sub_n_4301 - )); - notech_inv i_psram_sub_i_5123(.A(s00_axi_rdata[18]), .Z(i_psram_sub_n_4300 - )); - notech_inv i_psram_sub_i_5122(.A(s00_axi_rdata[17]), .Z(i_psram_sub_n_4299 - )); - notech_inv i_psram_sub_i_5121(.A(s00_axi_rdata[16]), .Z(i_psram_sub_n_4298 - )); - notech_inv i_psram_sub_i_5120(.A(s00_axi_rdata[15]), .Z(i_psram_sub_n_4297 - )); - notech_inv i_psram_sub_i_5119(.A(s00_axi_rdata[14]), .Z(i_psram_sub_n_4296 - )); - notech_inv i_psram_sub_i_5118(.A(s00_axi_rdata[13]), .Z(i_psram_sub_n_4295 - )); - notech_inv i_psram_sub_i_5117(.A(s00_axi_rdata[12]), .Z(i_psram_sub_n_4294 - )); - notech_inv i_psram_sub_i_5116(.A(s00_axi_rdata[11]), .Z(i_psram_sub_n_4293 - )); - notech_inv i_psram_sub_i_5115(.A(s00_axi_rdata[10]), .Z(i_psram_sub_n_4292 - )); - notech_inv i_psram_sub_i_5114(.A(s00_axi_rdata[9]), .Z(i_psram_sub_n_4291 - )); - notech_inv i_psram_sub_i_5113(.A(s00_axi_rdata[8]), .Z(i_psram_sub_n_4290 - )); - notech_inv i_psram_sub_i_5112(.A(s00_axi_rdata[7]), .Z(i_psram_sub_n_4289 - )); - notech_inv i_psram_sub_i_5111(.A(s00_axi_rdata[6]), .Z(i_psram_sub_n_4288 - )); - notech_inv i_psram_sub_i_5110(.A(s00_axi_rdata[5]), .Z(i_psram_sub_n_4287 - )); - notech_inv i_psram_sub_i_5109(.A(s00_axi_rdata[4]), .Z(i_psram_sub_n_4286 - )); - notech_inv i_psram_sub_i_5108(.A(s00_axi_rdata[3]), .Z(i_psram_sub_n_4285 - )); - notech_inv i_psram_sub_i_5107(.A(s00_axi_rdata[2]), .Z(i_psram_sub_n_4284 - )); - notech_inv i_psram_sub_i_5106(.A(s00_axi_rdata[1]), .Z(i_psram_sub_n_4283 - )); - notech_inv i_psram_sub_i_5105(.A(s00_axi_rdata[0]), .Z(i_psram_sub_n_4282 - )); - notech_inv i_psram_sub_i_5104(.A(s00_axi_awaddr[23]), .Z(i_psram_sub_n_4281 - )); - notech_inv i_psram_sub_i_5103(.A(s00_axi_awaddr[22]), .Z(i_psram_sub_n_4280 - )); - notech_inv i_psram_sub_i_5102(.A(s00_axi_awaddr[21]), .Z(i_psram_sub_n_4279 - )); - notech_inv i_psram_sub_i_5101(.A(s00_axi_awaddr[20]), .Z(i_psram_sub_n_4278 - )); - notech_inv i_psram_sub_i_5100(.A(s00_axi_awaddr[19]), .Z(i_psram_sub_n_4277 - )); - notech_inv i_psram_sub_i_5099(.A(s00_axi_awaddr[18]), .Z(i_psram_sub_n_4276 - )); - notech_inv i_psram_sub_i_5098(.A(s00_axi_awaddr[17]), .Z(i_psram_sub_n_4275 - )); - notech_inv i_psram_sub_i_5097(.A(s00_axi_awaddr[16]), .Z(i_psram_sub_n_4274 - )); - notech_inv i_psram_sub_i_5096(.A(s00_axi_awaddr[15]), .Z(i_psram_sub_n_4273 - )); - notech_inv i_psram_sub_i_5095(.A(s00_axi_awaddr[14]), .Z(i_psram_sub_n_4272 - )); - notech_inv i_psram_sub_i_5094(.A(s00_axi_awaddr[13]), .Z(i_psram_sub_n_4271 - )); - notech_inv i_psram_sub_i_5093(.A(s00_axi_awaddr[12]), .Z(i_psram_sub_n_4270 - )); - notech_inv i_psram_sub_i_5092(.A(s00_axi_awaddr[11]), .Z(i_psram_sub_n_4269 - )); - notech_inv i_psram_sub_i_5091(.A(s00_axi_awaddr[10]), .Z(i_psram_sub_n_4268 - )); - notech_inv i_psram_sub_i_5090(.A(s00_axi_awaddr[9]), .Z(i_psram_sub_n_4267 - )); - notech_inv i_psram_sub_i_5089(.A(s00_axi_awaddr[8]), .Z(i_psram_sub_n_4266 - )); - notech_inv i_psram_sub_i_5088(.A(s00_axi_awaddr[7]), .Z(i_psram_sub_n_4265 - )); - notech_inv i_psram_sub_i_5087(.A(s00_axi_awaddr[6]), .Z(i_psram_sub_n_4264 - )); - notech_inv i_psram_sub_i_5086(.A(s00_axi_awaddr[5]), .Z(i_psram_sub_n_4263 - )); - notech_inv i_psram_sub_i_5085(.A(s00_axi_awaddr[4]), .Z(i_psram_sub_n_4262 - )); - notech_inv i_psram_sub_i_5084(.A(s00_axi_awaddr[3]), .Z(i_psram_sub_n_4261 - )); - notech_inv i_psram_sub_i_5083(.A(s00_axi_awaddr[2]), .Z(i_psram_sub_n_4260 - )); - notech_inv i_psram_sub_i_5082(.A(s00_axi_araddr[23]), .Z(i_psram_sub_n_4259 - )); - notech_inv i_psram_sub_i_5081(.A(s00_axi_araddr[22]), .Z(i_psram_sub_n_4258 - )); - notech_inv i_psram_sub_i_5080(.A(s00_axi_araddr[21]), .Z(i_psram_sub_n_4257 - )); - notech_inv i_psram_sub_i_5079(.A(s00_axi_araddr[20]), .Z(i_psram_sub_n_4256 - )); - notech_inv i_psram_sub_i_5078(.A(s00_axi_araddr[19]), .Z(i_psram_sub_n_4255 - )); - notech_inv i_psram_sub_i_5077(.A(s00_axi_araddr[18]), .Z(i_psram_sub_n_4254 - )); - notech_inv i_psram_sub_i_5076(.A(s00_axi_araddr[17]), .Z(i_psram_sub_n_4253 - )); - notech_inv i_psram_sub_i_5075(.A(s00_axi_araddr[16]), .Z(i_psram_sub_n_4252 - )); - notech_inv i_psram_sub_i_5074(.A(s00_axi_araddr[15]), .Z(i_psram_sub_n_4251 - )); - notech_inv i_psram_sub_i_5073(.A(s00_axi_araddr[14]), .Z(i_psram_sub_n_4250 - )); - notech_inv i_psram_sub_i_5072(.A(s00_axi_araddr[13]), .Z(i_psram_sub_n_4249 - )); - notech_inv i_psram_sub_i_5071(.A(s00_axi_araddr[12]), .Z(i_psram_sub_n_4248 - )); - notech_inv i_psram_sub_i_5070(.A(s00_axi_araddr[11]), .Z(i_psram_sub_n_4247 - )); - notech_inv i_psram_sub_i_5069(.A(s00_axi_araddr[10]), .Z(i_psram_sub_n_4246 - )); - notech_inv i_psram_sub_i_5068(.A(s00_axi_araddr[9]), .Z(i_psram_sub_n_4245 - )); - notech_inv i_psram_sub_i_5067(.A(s00_axi_araddr[8]), .Z(i_psram_sub_n_4244 - )); - notech_inv i_psram_sub_i_5066(.A(s00_axi_araddr[7]), .Z(i_psram_sub_n_4243 - )); - notech_inv i_psram_sub_i_5065(.A(s00_axi_araddr[6]), .Z(i_psram_sub_n_4242 - )); - notech_inv i_psram_sub_i_5064(.A(s00_axi_araddr[5]), .Z(i_psram_sub_n_4241 - )); - notech_inv i_psram_sub_i_5063(.A(s00_axi_araddr[4]), .Z(i_psram_sub_n_4240 - )); - notech_inv i_psram_sub_i_5062(.A(s00_axi_araddr[3]), .Z(i_psram_sub_n_4239 - )); - notech_inv i_psram_sub_i_5061(.A(s00_axi_araddr[2]), .Z(i_psram_sub_n_4238 - )); - notech_inv i_psram_sub_i_5060(.A(s00_axi_wdata[15]), .Z(i_psram_sub_n_4237 - )); - notech_inv i_psram_sub_i_5059(.A(s00_axi_wdata[14]), .Z(i_psram_sub_n_4236 - )); - notech_inv i_psram_sub_i_5058(.A(s00_axi_wdata[13]), .Z(i_psram_sub_n_4235 - )); - notech_inv i_psram_sub_i_5057(.A(s00_axi_wdata[12]), .Z(i_psram_sub_n_4234 - )); - notech_inv i_psram_sub_i_5056(.A(s00_axi_wdata[11]), .Z(i_psram_sub_n_4233 - )); - notech_inv i_psram_sub_i_5055(.A(s00_axi_wdata[10]), .Z(i_psram_sub_n_4232 - )); - notech_inv i_psram_sub_i_5054(.A(s00_axi_wdata[9]), .Z(i_psram_sub_n_4231 - )); - notech_inv i_psram_sub_i_5053(.A(s00_axi_wdata[8]), .Z(i_psram_sub_n_4230 - )); - notech_inv i_psram_sub_i_5052(.A(s00_axi_wdata[7]), .Z(i_psram_sub_n_4229 - )); - notech_inv i_psram_sub_i_5051(.A(s00_axi_wdata[6]), .Z(i_psram_sub_n_4228 - )); - notech_inv i_psram_sub_i_5050(.A(s00_axi_wdata[5]), .Z(i_psram_sub_n_4227 - )); - notech_inv i_psram_sub_i_5049(.A(s00_axi_wdata[4]), .Z(i_psram_sub_n_4226 - )); - notech_inv i_psram_sub_i_5048(.A(s00_axi_wdata[3]), .Z(i_psram_sub_n_4225 - )); - notech_inv i_psram_sub_i_5047(.A(s00_axi_wdata[2]), .Z(i_psram_sub_n_4224 - )); - notech_inv i_psram_sub_i_5046(.A(s00_axi_wdata[1]), .Z(i_psram_sub_n_4223 - )); - notech_inv i_psram_sub_i_5045(.A(s00_axi_wdata[0]), .Z(i_psram_sub_n_4222 - )); - notech_inv i_psram_sub_i_5044(.A(i_psram_sub_mem_addr[22]), .Z(i_psram_sub_n_4221 - )); - notech_inv i_psram_sub_i_5043(.A(i_psram_sub_mem_addr[21]), .Z(i_psram_sub_n_4220 - )); - notech_inv i_psram_sub_i_5042(.A(i_psram_sub_mem_addr[20]), .Z(i_psram_sub_n_4219 - )); - notech_inv i_psram_sub_i_5041(.A(i_psram_sub_mem_addr[19]), .Z(i_psram_sub_n_4218 - )); - notech_inv i_psram_sub_i_5040(.A(i_psram_sub_mem_addr[18]), .Z(i_psram_sub_n_4217 - )); - notech_inv i_psram_sub_i_5039(.A(i_psram_sub_mem_addr[17]), .Z(i_psram_sub_n_4216 - )); - notech_inv i_psram_sub_i_5038(.A(i_psram_sub_mem_addr[16]), .Z(i_psram_sub_n_4215 - )); - notech_inv i_psram_sub_i_5037(.A(i_psram_sub_mem_addr[15]), .Z(i_psram_sub_n_4214 - )); - notech_inv i_psram_sub_i_5036(.A(i_psram_sub_mem_addr[14]), .Z(i_psram_sub_n_4213 - )); - notech_inv i_psram_sub_i_5035(.A(i_psram_sub_mem_addr[13]), .Z(i_psram_sub_n_4212 - )); - notech_inv i_psram_sub_i_5034(.A(i_psram_sub_mem_addr[12]), .Z(i_psram_sub_n_4211 - )); - notech_inv i_psram_sub_i_5033(.A(i_psram_sub_mem_addr[11]), .Z(i_psram_sub_n_4210 - )); - notech_inv i_psram_sub_i_5032(.A(i_psram_sub_mem_addr[10]), .Z(i_psram_sub_n_4209 - )); - notech_inv i_psram_sub_i_5031(.A(i_psram_sub_mem_addr[9]), .Z(i_psram_sub_n_4208 - )); - notech_inv i_psram_sub_i_5030(.A(i_psram_sub_mem_addr[8]), .Z(i_psram_sub_n_4207 - )); - notech_inv i_psram_sub_i_5029(.A(i_psram_sub_mem_addr[7]), .Z(i_psram_sub_n_4206 - )); - notech_inv i_psram_sub_i_5028(.A(i_psram_sub_mem_addr[6]), .Z(i_psram_sub_n_4205 - )); - notech_inv i_psram_sub_i_5027(.A(i_psram_sub_mem_addr[5]), .Z(i_psram_sub_n_4204 - )); - notech_inv i_psram_sub_i_5026(.A(i_psram_sub_mem_addr[4]), .Z(i_psram_sub_n_4203 - )); - notech_inv i_psram_sub_i_5025(.A(i_psram_sub_mem_addr[3]), .Z(i_psram_sub_n_4202 - )); - notech_inv i_psram_sub_i_5024(.A(i_psram_sub_mem_addr[2]), .Z(i_psram_sub_n_4201 - )); - notech_inv i_psram_sub_i_5023(.A(i_psram_sub_mem_addr[1]), .Z(i_psram_sub_n_4200 - )); - notech_inv i_psram_sub_i_5022(.A(i_psram_sub_mem_addr[0]), .Z(i_psram_sub_n_4199 - )); - notech_inv i_psram_sub_i_5021(.A(i_psram_sub_function_plus_2[22]), .Z(i_psram_sub_n_4198 - )); - notech_inv i_psram_sub_i_5020(.A(i_psram_sub_function_plus_2[21]), .Z(i_psram_sub_n_4197 - )); - notech_inv i_psram_sub_i_5019(.A(i_psram_sub_function_plus_2[20]), .Z(i_psram_sub_n_4196 - )); - notech_inv i_psram_sub_i_5018(.A(i_psram_sub_function_plus_2[19]), .Z(i_psram_sub_n_4195 - )); - notech_inv i_psram_sub_i_5017(.A(i_psram_sub_function_plus_2[18]), .Z(i_psram_sub_n_4194 - )); - notech_inv i_psram_sub_i_5016(.A(i_psram_sub_function_plus_2[17]), .Z(i_psram_sub_n_4193 - )); - notech_inv i_psram_sub_i_5015(.A(i_psram_sub_function_plus_2[16]), .Z(i_psram_sub_n_4192 - )); - notech_inv i_psram_sub_i_5014(.A(i_psram_sub_function_plus_2[15]), .Z(i_psram_sub_n_4191 - )); - notech_inv i_psram_sub_i_5013(.A(i_psram_sub_function_plus_2[14]), .Z(i_psram_sub_n_4190 - )); - notech_inv i_psram_sub_i_5012(.A(i_psram_sub_function_plus_2[13]), .Z(i_psram_sub_n_4189 - )); - notech_inv i_psram_sub_i_5011(.A(i_psram_sub_function_plus_2[12]), .Z(i_psram_sub_n_4188 - )); - notech_inv i_psram_sub_i_5010(.A(i_psram_sub_function_plus_2[11]), .Z(i_psram_sub_n_4187 - )); - notech_inv i_psram_sub_i_5009(.A(i_psram_sub_function_plus_2[10]), .Z(i_psram_sub_n_4186 - )); - notech_inv i_psram_sub_i_5008(.A(i_psram_sub_function_plus_2[9]), .Z(i_psram_sub_n_4185 - )); - notech_inv i_psram_sub_i_5007(.A(i_psram_sub_function_plus_2[8]), .Z(i_psram_sub_n_4184 - )); - notech_inv i_psram_sub_i_5006(.A(i_psram_sub_function_plus_2[7]), .Z(i_psram_sub_n_4183 - )); - notech_inv i_psram_sub_i_5005(.A(i_psram_sub_function_plus_2[6]), .Z(i_psram_sub_n_4182 - )); - notech_inv i_psram_sub_i_5004(.A(i_psram_sub_function_plus_2[5]), .Z(i_psram_sub_n_4181 - )); - notech_inv i_psram_sub_i_5003(.A(i_psram_sub_function_plus_2[4]), .Z(i_psram_sub_n_4180 - )); - notech_inv i_psram_sub_i_5002(.A(i_psram_sub_function_plus_2[3]), .Z(i_psram_sub_n_4179 - )); - notech_inv i_psram_sub_i_5001(.A(i_psram_sub_function_plus_2[2]), .Z(i_psram_sub_n_4178 - )); - notech_inv i_psram_sub_i_5000(.A(i_psram_sub_function_plus_2[1]), .Z(i_psram_sub_n_4177 - )); - notech_inv i_psram_sub_i_4999(.A(i_psram_sub_function_plus_2[0]), .Z(i_psram_sub_n_4176 - )); - notech_inv i_psram_sub_i_4998(.A(i_psram_sub_axi_awaddr[23]), .Z(i_psram_sub_n_4175 - )); - notech_inv i_psram_sub_i_4997(.A(i_psram_sub_axi_awaddr[22]), .Z(i_psram_sub_n_4174 - )); - notech_inv i_psram_sub_i_4995(.A(i_psram_sub_axi_awaddr[21]), .Z(i_psram_sub_n_4173 - )); - notech_inv i_psram_sub_i_4994(.A(i_psram_sub_axi_awaddr[20]), .Z(i_psram_sub_n_4172 - )); - notech_inv i_psram_sub_i_4993(.A(i_psram_sub_axi_awaddr[19]), .Z(i_psram_sub_n_4171 - )); - notech_inv i_psram_sub_i_4992(.A(i_psram_sub_axi_awaddr[18]), .Z(i_psram_sub_n_4170 - )); - notech_inv i_psram_sub_i_4991(.A(i_psram_sub_axi_awaddr[17]), .Z(i_psram_sub_n_4169 - )); - notech_inv i_psram_sub_i_4990(.A(i_psram_sub_axi_awaddr[16]), .Z(i_psram_sub_n_4168 - )); - notech_inv i_psram_sub_i_4989(.A(i_psram_sub_axi_awaddr[15]), .Z(i_psram_sub_n_4167 - )); - notech_inv i_psram_sub_i_4988(.A(i_psram_sub_axi_awaddr[14]), .Z(i_psram_sub_n_4166 - )); - notech_inv i_psram_sub_i_4987(.A(i_psram_sub_axi_awaddr[13]), .Z(i_psram_sub_n_4165 - )); - notech_inv i_psram_sub_i_4986(.A(i_psram_sub_axi_awaddr[12]), .Z(i_psram_sub_n_4164 - )); - notech_inv i_psram_sub_i_4985(.A(i_psram_sub_axi_awaddr[11]), .Z(i_psram_sub_n_4163 - )); - notech_inv i_psram_sub_i_4984(.A(i_psram_sub_axi_awaddr[10]), .Z(i_psram_sub_n_4162 - )); - notech_inv i_psram_sub_i_4983(.A(i_psram_sub_axi_awaddr[9]), .Z(i_psram_sub_n_4161 - )); - notech_inv i_psram_sub_i_4982(.A(i_psram_sub_axi_awaddr[8]), .Z(i_psram_sub_n_4160 - )); - notech_inv i_psram_sub_i_4981(.A(i_psram_sub_axi_awaddr[7]), .Z(i_psram_sub_n_4159 - )); - notech_inv i_psram_sub_i_4980(.A(i_psram_sub_axi_awaddr[6]), .Z(i_psram_sub_n_4158 - )); - notech_inv i_psram_sub_i_4979(.A(i_psram_sub_axi_awaddr[5]), .Z(i_psram_sub_n_4157 - )); - notech_inv i_psram_sub_i_4978(.A(i_psram_sub_axi_awaddr[4]), .Z(i_psram_sub_n_4156 - )); - notech_inv i_psram_sub_i_4977(.A(i_psram_sub_axi_awaddr[3]), .Z(i_psram_sub_n_4155 - )); - notech_inv i_psram_sub_i_4976(.A(i_psram_sub_axi_awaddr[2]), .Z(i_psram_sub_n_4154 - )); - notech_inv i_psram_sub_i_4975(.A(i_psram_sub_axi_awaddr[1]), .Z(i_psram_sub_n_4153 - )); - notech_inv i_psram_sub_i_4974(.A(i_psram_sub_axi_awaddr[0]), .Z(i_psram_sub_n_4152 - )); - notech_inv i_psram_sub_i_4973(.A(i_psram_sub_function_sub_0[23]), .Z(i_psram_sub_n_4151 - )); - notech_inv i_psram_sub_i_4972(.A(i_psram_sub_function_sub_0[22]), .Z(i_psram_sub_n_4150 - )); - notech_inv i_psram_sub_i_4971(.A(i_psram_sub_function_sub_0[21]), .Z(i_psram_sub_n_4149 - )); - notech_inv i_psram_sub_i_4970(.A(i_psram_sub_function_sub_0[20]), .Z(i_psram_sub_n_4148 - )); - notech_inv i_psram_sub_i_4969(.A(i_psram_sub_function_sub_0[19]), .Z(i_psram_sub_n_4147 - )); - notech_inv i_psram_sub_i_4968(.A(i_psram_sub_function_sub_0[18]), .Z(i_psram_sub_n_4146 - )); - notech_inv i_psram_sub_i_4967(.A(i_psram_sub_function_sub_0[17]), .Z(i_psram_sub_n_4145 - )); - notech_inv i_psram_sub_i_4966(.A(i_psram_sub_function_sub_0[16]), .Z(i_psram_sub_n_4144 - )); - notech_inv i_psram_sub_i_4965(.A(i_psram_sub_function_sub_0[15]), .Z(i_psram_sub_n_4143 - )); - notech_inv i_psram_sub_i_4964(.A(i_psram_sub_function_sub_0[14]), .Z(i_psram_sub_n_4142 - )); - notech_inv i_psram_sub_i_4963(.A(i_psram_sub_function_sub_0[13]), .Z(i_psram_sub_n_4141 - )); - notech_inv i_psram_sub_i_4962(.A(i_psram_sub_function_sub_0[12]), .Z(i_psram_sub_n_4140 - )); - notech_inv i_psram_sub_i_4961(.A(i_psram_sub_function_sub_0[11]), .Z(i_psram_sub_n_4139 - )); - notech_inv i_psram_sub_i_4960(.A(i_psram_sub_function_sub_0[10]), .Z(i_psram_sub_n_4138 - )); - notech_inv i_psram_sub_i_4959(.A(i_psram_sub_function_sub_0[9]), .Z(i_psram_sub_n_4137 - )); - notech_inv i_psram_sub_i_4958(.A(i_psram_sub_function_sub_0[8]), .Z(i_psram_sub_n_4136 - )); - notech_inv i_psram_sub_i_4957(.A(i_psram_sub_function_sub_0[7]), .Z(i_psram_sub_n_4135 - )); - notech_inv i_psram_sub_i_4956(.A(i_psram_sub_function_sub_0[6]), .Z(i_psram_sub_n_4134 - )); - notech_inv i_psram_sub_i_4955(.A(i_psram_sub_function_sub_0[5]), .Z(i_psram_sub_n_4133 - )); - notech_inv i_psram_sub_i_4954(.A(i_psram_sub_function_sub_0[4]), .Z(i_psram_sub_n_4132 - )); - notech_inv i_psram_sub_i_4953(.A(i_psram_sub_function_sub_0[3]), .Z(i_psram_sub_n_4131 - )); - notech_inv i_psram_sub_i_4952(.A(i_psram_sub_function_sub_0[2]), .Z(i_psram_sub_n_4130 - )); - notech_inv i_psram_sub_i_4951(.A(i_psram_sub_function_sub_0[1]), .Z(i_psram_sub_n_4129 - )); - notech_inv i_psram_sub_i_4950(.A(i_psram_sub_function_sub_0[0]), .Z(i_psram_sub_n_4128 - )); - notech_inv i_psram_sub_i_4949(.A(i_psram_sub_axi_araddr[23]), .Z(i_psram_sub_n_4127 - )); - notech_inv i_psram_sub_i_4948(.A(i_psram_sub_axi_araddr[22]), .Z(i_psram_sub_n_4126 - )); - notech_inv i_psram_sub_i_4947(.A(i_psram_sub_axi_araddr[21]), .Z(i_psram_sub_n_4125 - )); - notech_inv i_psram_sub_i_4946(.A(i_psram_sub_axi_araddr[20]), .Z(i_psram_sub_n_4124 - )); - notech_inv i_psram_sub_i_4945(.A(i_psram_sub_axi_araddr[19]), .Z(i_psram_sub_n_4123 - )); - notech_inv i_psram_sub_i_4944(.A(i_psram_sub_axi_araddr[18]), .Z(i_psram_sub_n_4122 - )); - notech_inv i_psram_sub_i_4943(.A(i_psram_sub_axi_araddr[17]), .Z(i_psram_sub_n_4121 - )); - notech_inv i_psram_sub_i_4942(.A(i_psram_sub_axi_araddr[16]), .Z(i_psram_sub_n_4120 - )); - notech_inv i_psram_sub_i_4941(.A(i_psram_sub_axi_araddr[15]), .Z(i_psram_sub_n_4119 - )); - notech_inv i_psram_sub_i_4940(.A(i_psram_sub_axi_araddr[14]), .Z(i_psram_sub_n_4118 - )); - notech_inv i_psram_sub_i_4939(.A(i_psram_sub_axi_araddr[13]), .Z(i_psram_sub_n_4117 - )); - notech_inv i_psram_sub_i_4938(.A(i_psram_sub_axi_araddr[12]), .Z(i_psram_sub_n_4116 - )); - notech_inv i_psram_sub_i_4937(.A(i_psram_sub_axi_araddr[11]), .Z(i_psram_sub_n_4115 - )); - notech_inv i_psram_sub_i_4936(.A(i_psram_sub_axi_araddr[10]), .Z(i_psram_sub_n_4114 - )); - notech_inv i_psram_sub_i_4935(.A(i_psram_sub_axi_araddr[9]), .Z(i_psram_sub_n_4113 - )); - notech_inv i_psram_sub_i_4934(.A(i_psram_sub_axi_araddr[8]), .Z(i_psram_sub_n_4112 - )); - notech_inv i_psram_sub_i_4933(.A(i_psram_sub_axi_araddr[7]), .Z(i_psram_sub_n_4111 - )); - notech_inv i_psram_sub_i_4932(.A(i_psram_sub_axi_araddr[6]), .Z(i_psram_sub_n_4110 - )); - notech_inv i_psram_sub_i_4931(.A(i_psram_sub_axi_araddr[5]), .Z(i_psram_sub_n_4109 - )); - notech_inv i_psram_sub_i_4930(.A(i_psram_sub_axi_araddr[4]), .Z(i_psram_sub_n_4108 - )); - notech_inv i_psram_sub_i_4929(.A(i_psram_sub_axi_araddr[3]), .Z(i_psram_sub_n_4107 - )); - notech_inv i_psram_sub_i_4928(.A(i_psram_sub_axi_araddr[2]), .Z(i_psram_sub_n_4106 - )); - notech_inv i_psram_sub_i_4927(.A(i_psram_sub_axi_araddr[1]), .Z(i_psram_sub_n_4105 - )); - notech_inv i_psram_sub_i_4926(.A(i_psram_sub_axi_araddr[0]), .Z(i_psram_sub_n_4104 - )); - notech_inv i_psram_sub_i_4925(.A(i_psram_sub_function_sub[23]), .Z(i_psram_sub_n_4103 - )); - notech_inv i_psram_sub_i_4924(.A(i_psram_sub_function_sub[22]), .Z(i_psram_sub_n_4102 - )); - notech_inv i_psram_sub_i_4923(.A(i_psram_sub_function_sub[21]), .Z(i_psram_sub_n_4101 - )); - notech_inv i_psram_sub_i_4922(.A(i_psram_sub_function_sub[20]), .Z(i_psram_sub_n_4100 - )); - notech_inv i_psram_sub_i_4921(.A(i_psram_sub_function_sub[19]), .Z(i_psram_sub_n_4099 - )); - notech_inv i_psram_sub_i_4920(.A(i_psram_sub_function_sub[18]), .Z(i_psram_sub_n_4098 - )); - notech_inv i_psram_sub_i_4919(.A(i_psram_sub_function_sub[17]), .Z(i_psram_sub_n_4097 - )); - notech_inv i_psram_sub_i_4918(.A(i_psram_sub_function_sub[16]), .Z(i_psram_sub_n_4096 - )); - notech_inv i_psram_sub_i_4917(.A(i_psram_sub_function_sub[15]), .Z(i_psram_sub_n_4095 - )); - notech_inv i_psram_sub_i_4916(.A(i_psram_sub_function_sub[14]), .Z(i_psram_sub_n_4094 - )); - notech_inv i_psram_sub_i_4915(.A(i_psram_sub_function_sub[13]), .Z(i_psram_sub_n_4093 - )); - notech_inv i_psram_sub_i_4914(.A(i_psram_sub_function_sub[12]), .Z(i_psram_sub_n_4092 - )); - notech_inv i_psram_sub_i_4913(.A(i_psram_sub_function_sub[11]), .Z(i_psram_sub_n_4091 - )); - notech_inv i_psram_sub_i_4912(.A(i_psram_sub_function_sub[10]), .Z(i_psram_sub_n_4090 - )); - notech_inv i_psram_sub_i_4911(.A(i_psram_sub_function_sub[9]), .Z(i_psram_sub_n_4089 - )); - notech_inv i_psram_sub_i_4910(.A(i_psram_sub_function_sub[8]), .Z(i_psram_sub_n_4088 - )); - notech_inv i_psram_sub_i_4909(.A(i_psram_sub_function_sub[7]), .Z(i_psram_sub_n_4087 - )); - notech_inv i_psram_sub_i_4908(.A(i_psram_sub_function_sub[6]), .Z(i_psram_sub_n_4086 - )); - notech_inv i_psram_sub_i_4907(.A(i_psram_sub_function_sub[5]), .Z(i_psram_sub_n_4085 - )); - notech_inv i_psram_sub_i_4906(.A(i_psram_sub_function_sub[4]), .Z(i_psram_sub_n_4084 - )); - notech_inv i_psram_sub_i_4905(.A(i_psram_sub_function_sub[3]), .Z(i_psram_sub_n_4083 - )); - notech_inv i_psram_sub_i_4904(.A(i_psram_sub_function_sub[2]), .Z(i_psram_sub_n_4082 - )); - notech_inv i_psram_sub_i_4903(.A(i_psram_sub_function_sub[1]), .Z(i_psram_sub_n_4081 - )); - notech_inv i_psram_sub_i_4902(.A(i_psram_sub_function_sub[0]), .Z(i_psram_sub_n_4080 - )); - notech_inv i_psram_sub_i_4901(.A(i_psram_sub_mem_data_wr[15]), .Z(i_psram_sub_n_4079 - )); - notech_inv i_psram_sub_i_4900(.A(i_psram_sub_mem_data_wr[14]), .Z(i_psram_sub_n_4078 - )); - notech_inv i_psram_sub_i_4899(.A(i_psram_sub_mem_data_wr[13]), .Z(i_psram_sub_n_4077 - )); - notech_inv i_psram_sub_i_4898(.A(i_psram_sub_mem_data_wr[12]), .Z(i_psram_sub_n_4076 - )); - notech_inv i_psram_sub_i_4897(.A(i_psram_sub_mem_data_wr[11]), .Z(i_psram_sub_n_4075 - )); - notech_inv i_psram_sub_i_4896(.A(i_psram_sub_mem_data_wr[10]), .Z(i_psram_sub_n_4074 - )); - notech_inv i_psram_sub_i_4895(.A(i_psram_sub_mem_data_wr[9]), .Z(i_psram_sub_n_4073 - )); - notech_inv i_psram_sub_i_4894(.A(i_psram_sub_mem_data_wr[8]), .Z(i_psram_sub_n_4072 - )); - notech_inv i_psram_sub_i_4893(.A(i_psram_sub_mem_data_wr[7]), .Z(i_psram_sub_n_4071 - )); - notech_inv i_psram_sub_i_4892(.A(i_psram_sub_mem_data_wr[6]), .Z(i_psram_sub_n_4070 - )); - notech_inv i_psram_sub_i_4891(.A(i_psram_sub_mem_data_wr[5]), .Z(i_psram_sub_n_4069 - )); - notech_inv i_psram_sub_i_4890(.A(i_psram_sub_mem_data_wr[4]), .Z(i_psram_sub_n_4068 - )); - notech_inv i_psram_sub_i_4889(.A(i_psram_sub_mem_data_wr[3]), .Z(i_psram_sub_n_4067 - )); - notech_inv i_psram_sub_i_4888(.A(i_psram_sub_mem_data_wr[2]), .Z(i_psram_sub_n_4066 - )); - notech_inv i_psram_sub_i_4887(.A(i_psram_sub_mem_data_wr[1]), .Z(i_psram_sub_n_4065 - )); - notech_inv i_psram_sub_i_4886(.A(i_psram_sub_mem_data_wr[0]), .Z(i_psram_sub_n_4064 - )); - notech_inv i_psram_sub_i_4885(.A(i_psram_sub_n_1521), .Z(i_psram_sub_n_4063 - )); - notech_inv i_psram_sub_i_4884(.A(i_psram_sub_n_1516), .Z(i_psram_sub_n_4062 - )); - notech_inv i_psram_sub_i_4883(.A(i_psram_sub_n_951), .Z(i_psram_sub_n_4061 - )); - notech_inv i_psram_sub_i_4882(.A(i_psram_sub_n_1511), .Z(i_psram_sub_n_4060 - )); - notech_inv i_psram_sub_i_4881(.A(i_psram_sub_n_1506), .Z(i_psram_sub_n_4059 - )); - notech_inv i_psram_sub_i_4880(.A(i_psram_sub_n_1501), .Z(i_psram_sub_n_4058 - )); - notech_inv i_psram_sub_i_4879(.A(i_psram_sub_n_1496), .Z(i_psram_sub_n_4057 - )); - notech_inv i_psram_sub_i_4878(.A(i_psram_sub_n_1491), .Z(i_psram_sub_n_4056 - )); - notech_inv i_psram_sub_i_4877(.A(i_psram_sub_n_1486), .Z(i_psram_sub_n_4055 - )); - notech_inv i_psram_sub_i_4876(.A(i_psram_sub_n_1481), .Z(i_psram_sub_n_4054 - )); - notech_inv i_psram_sub_i_4875(.A(i_psram_sub_n_1476), .Z(i_psram_sub_n_4053 - )); - notech_inv i_psram_sub_i_4874(.A(i_psram_sub_n_1471), .Z(i_psram_sub_n_4052 - )); - notech_inv i_psram_sub_i_4873(.A(i_psram_sub_n_1466), .Z(i_psram_sub_n_4051 - )); - notech_inv i_psram_sub_i_4872(.A(i_psram_sub_n_1461), .Z(i_psram_sub_n_4050 - )); - notech_inv i_psram_sub_i_4871(.A(i_psram_sub_n_1456), .Z(i_psram_sub_n_4049 - )); - notech_inv i_psram_sub_i_4870(.A(i_psram_sub_n_1451), .Z(i_psram_sub_n_4048 - )); - notech_inv i_psram_sub_i_4869(.A(i_psram_sub_n_1446), .Z(i_psram_sub_n_4047 - )); - notech_inv i_psram_sub_i_4868(.A(i_psram_sub_n_1441), .Z(i_psram_sub_n_4046 - )); - notech_inv i_psram_sub_i_4867(.A(i_psram_sub_n_1436), .Z(i_psram_sub_n_4045 - )); - notech_inv i_psram_sub_i_4866(.A(i_psram_sub_n_1431), .Z(i_psram_sub_n_4044 - )); - notech_inv i_psram_sub_i_4865(.A(i_psram_sub_n_1426), .Z(i_psram_sub_n_4043 - )); - notech_inv i_psram_sub_i_4864(.A(i_psram_sub_n_1421), .Z(i_psram_sub_n_4042 - )); - notech_inv i_psram_sub_i_4863(.A(i_psram_sub_n_1416), .Z(i_psram_sub_n_4041 - )); - notech_inv i_psram_sub_i_4862(.A(i_psram_sub_n_1411), .Z(i_psram_sub_n_4040 - )); - notech_inv i_psram_sub_i_4861(.A(i_psram_sub_n_1406), .Z(i_psram_sub_n_4039 - )); - notech_inv i_psram_sub_i_4860(.A(i_psram_sub_n_1401), .Z(i_psram_sub_n_4038 - )); - notech_inv i_psram_sub_i_4859(.A(i_psram_sub_n_1396), .Z(i_psram_sub_n_4037 - )); - notech_inv i_psram_sub_i_4858(.A(i_psram_sub_n_1391), .Z(i_psram_sub_n_4036 - )); - notech_inv i_psram_sub_i_4857(.A(i_psram_sub_n_1386), .Z(i_psram_sub_n_4035 - )); - notech_inv i_psram_sub_i_4856(.A(i_psram_sub_n_1381), .Z(i_psram_sub_n_4034 - )); - notech_inv i_psram_sub_i_4855(.A(i_psram_sub_n_1376), .Z(i_psram_sub_n_4033 - )); - notech_inv i_psram_sub_i_4854(.A(i_psram_sub_n_1371), .Z(i_psram_sub_n_4032 - )); - notech_inv i_psram_sub_i_4853(.A(i_psram_sub_n_1366), .Z(i_psram_sub_n_4031 - )); - notech_inv i_psram_sub_i_4852(.A(i_psram_sub_n_913), .Z(i_psram_sub_n_4030 - )); - notech_inv i_psram_sub_i_4851(.A(i_psram_sub_axi_awv_awr_flag), .Z(i_psram_sub_n_4029 - )); - notech_inv i_psram_sub_i_4850(.A(i_psram_sub_n_1639), .Z(i_psram_sub_n_4028 - )); - notech_inv i_psram_sub_i_4849(.A(i_psram_sub_state[2]), .Z(i_psram_sub_n_4027 - )); - notech_inv i_psram_sub_i_4848(.A(i_psram_sub_state_5[0]), .Z(i_psram_sub_n_4026 - )); - notech_inv i_psram_sub_i_4847(.A(i_psram_sub_state[0]), .Z(i_psram_sub_n_4025 - )); - notech_inv i_psram_sub_i_4846(.A(i_psram_sub_axi_arv_arr_flag), .Z(i_psram_sub_n_4024 - )); - notech_inv i_psram_sub_i_4845(.A(i_psram_sub_axi_awlen[7]), .Z(i_psram_sub_n_4023 - )); - notech_inv i_psram_sub_i_4844(.A(i_psram_sub_axi_awlen[6]), .Z(i_psram_sub_n_4022 - )); - notech_inv i_psram_sub_i_4843(.A(i_psram_sub_axi_awlen[5]), .Z(i_psram_sub_n_4021 - )); - notech_inv i_psram_sub_i_4842(.A(i_psram_sub_axi_awlen[4]), .Z(i_psram_sub_n_4020 - )); - notech_inv i_psram_sub_i_4841(.A(i_psram_sub_axi_awlen[0]), .Z(i_psram_sub_n_4019 - )); - notech_inv i_psram_sub_i_4839(.A(i_psram_sub_axi_awlen_cntr[3]), .Z(i_psram_sub_n_4018 - )); - notech_inv i_psram_sub_i_4838(.A(i_psram_sub_axi_awlen_cntr[2]), .Z(i_psram_sub_n_4017 - )); - notech_inv i_psram_sub_i_4837(.A(i_psram_sub_n_1931), .Z(i_psram_sub_n_4016 - )); - notech_inv i_psram_sub_i_4836(.A(i_psram_sub_axi_awlen_cntr[1]), .Z(i_psram_sub_n_4015 - )); - notech_inv i_psram_sub_i_4835(.A(i_psram_sub_n_1926), .Z(i_psram_sub_n_4014 - )); - notech_inv i_psram_sub_i_4834(.A(i_psram_sub_axi_arlen[7]), .Z(i_psram_sub_n_4013 - )); - notech_inv i_psram_sub_i_4833(.A(i_psram_sub_n_799775), .Z(i_psram_sub_n_4012 - )); - notech_inv i_psram_sub_i_4832(.A(i_psram_sub_axi_arlen[6]), .Z(i_psram_sub_n_4011 - )); - notech_inv i_psram_sub_i_4831(.A(i_psram_sub_axi_arlen[5]), .Z(i_psram_sub_n_4010 - )); - notech_inv i_psram_sub_i_4830(.A(i_psram_sub_axi_arlen[4]), .Z(i_psram_sub_n_4009 - )); - notech_inv i_psram_sub_i_4829(.A(i_psram_sub_axi_arlen[0]), .Z(i_psram_sub_n_4008 - )); - notech_inv i_psram_sub_i_4828(.A(i_psram_sub_axi_arlen_cntr[3]), .Z(i_psram_sub_n_4007 - )); - notech_inv i_psram_sub_i_4827(.A(i_psram_sub_axi_arlen_cntr[2]), .Z(i_psram_sub_n_4006 - )); - notech_inv i_psram_sub_i_4826(.A(i_psram_sub_n_2072), .Z(i_psram_sub_n_4005 - )); - notech_inv i_psram_sub_i_4825(.A(i_psram_sub_axi_arlen_cntr[1]), .Z(i_psram_sub_n_4004 - )); - notech_inv i_psram_sub_i_4824(.A(i_psram_sub_n_2067), .Z(i_psram_sub_n_4003 - )); - notech_inv i_psram_sub_i_4823(.A(i_psram_sub_go_7), .Z(i_psram_sub_n_4002 - )); - notech_inv i_psram_sub_i_4822(.A(i_psram_sub_n_1015), .Z(i_psram_sub_n_4001 - )); - notech_inv i_psram_sub_i_4821(.A(i_psram_sub_n_1086), .Z(i_psram_sub_n_4000 - )); - notech_inv i_psram_sub_i_4820(.A(i_psram_sub_n_1022), .Z(i_psram_sub_n_3999 - )); - notech_inv i_psram_sub_i_4819(.A(i_psram_sub_n_1094), .Z(i_psram_sub_n_3998 - )); - notech_inv i_psram_sub_i_4818(.A(i_psram_sub_n_588), .Z(i_psram_sub_n_3997 - )); - notech_inv i_psram_sub_i_4817(.A(i_psram_sub_n_965), .Z(i_psram_sub_n_3996 - )); - notech_inv i_psram_sub_i_4816(.A(i_psram_sub_n_968), .Z(i_psram_sub_n_3995 - )); - notech_inv i_psram_sub_i_4815(.A(i_psram_sub_n_960), .Z(i_psram_sub_n_3994 - )); - notech_inv i_psram_sub_i_4814(.A(i_psram_sub_n_458), .Z(i_psram_sub_n_3993 - )); - notech_inv i_psram_sub_i_4813(.A(i_psram_sub_n_1220), .Z(i_psram_sub_n_3992 - )); - notech_inv i_psram_sub_i_4812(.A(i_psram_sub_n_1077), .Z(i_psram_sub_n_3991 - )); - notech_inv i_psram_sub_i_4811(.A(i_psram_sub_n_1006), .Z(i_psram_sub_n_3990 - )); - notech_mux2 i_psram_sub_i_3952(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [31]), .B(i_psram_sub_n_4063), .Z(i_psram_sub_n_3984)); - notech_reg_set i_psram_sub_axi_rdata_reg_31(.CP(s00_axi_aclk), .D(i_psram_sub_n_3984 - ), .SD(1'b1), .Q(s00_axi_rdata[31])); - notech_mux2 i_psram_sub_i_3944(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [30]), .B(i_psram_sub_n_4062), .Z(i_psram_sub_n_3978)); - notech_reg_set i_psram_sub_axi_rdata_reg_30(.CP(s00_axi_aclk), .D(i_psram_sub_n_3978 - ), .SD(1'b1), .Q(s00_axi_rdata[30])); - notech_ao4 i_psram_sub_i_1993(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4282 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4397), .Z(i_psram_sub_n_1366 - )); - notech_mux2 i_psram_sub_i_3936(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [29]), .B(i_psram_sub_n_4060), .Z(i_psram_sub_n_3972)); - notech_reg_set i_psram_sub_axi_rdata_reg_29(.CP(s00_axi_aclk), .D(i_psram_sub_n_3972 - ), .SD(1'b1), .Q(s00_axi_rdata[29])); - notech_ao4 i_psram_sub_i_2994(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4283 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4396), .Z(i_psram_sub_n_1371 - )); - notech_mux2 i_psram_sub_i_3928(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [28]), .B(i_psram_sub_n_4059), .Z(i_psram_sub_n_3966)); - notech_reg_set i_psram_sub_axi_rdata_reg_28(.CP(s00_axi_aclk), .D(i_psram_sub_n_3966 - ), .SD(1'b1), .Q(s00_axi_rdata[28])); - notech_ao4 i_psram_sub_i_3995(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4284 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4395), .Z(i_psram_sub_n_1376 - )); - notech_mux2 i_psram_sub_i_3920(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [27]), .B(i_psram_sub_n_4058), .Z(i_psram_sub_n_3960)); - notech_reg_set i_psram_sub_axi_rdata_reg_27(.CP(s00_axi_aclk), .D(i_psram_sub_n_3960 - ), .SD(1'b1), .Q(s00_axi_rdata[27])); - notech_ao4 i_psram_sub_i_4996(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4285 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4394), .Z(i_psram_sub_n_1381 - )); - notech_mux2 i_psram_sub_i_3912(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [26]), .B(i_psram_sub_n_4057), .Z(i_psram_sub_n_3954)); - notech_reg_set i_psram_sub_axi_rdata_reg_26(.CP(s00_axi_aclk), .D(i_psram_sub_n_3954 - ), .SD(1'b1), .Q(s00_axi_rdata[26])); - notech_ao4 i_psram_sub_i_5997(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4286 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4393), .Z(i_psram_sub_n_1386 - )); - notech_mux2 i_psram_sub_i_3904(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [25]), .B(i_psram_sub_n_4056), .Z(i_psram_sub_n_3948)); - notech_reg_set i_psram_sub_axi_rdata_reg_25(.CP(s00_axi_aclk), .D(i_psram_sub_n_3948 - ), .SD(1'b1), .Q(s00_axi_rdata[25])); - notech_ao4 i_psram_sub_i_6998(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4287 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4392), .Z(i_psram_sub_n_1391 - )); - notech_mux2 i_psram_sub_i_3895(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [24]), .B(i_psram_sub_n_4055), .Z(i_psram_sub_n_3942)); - notech_reg_set i_psram_sub_axi_rdata_reg_24(.CP(s00_axi_aclk), .D(i_psram_sub_n_3942 - ), .SD(1'b1), .Q(s00_axi_rdata[24])); - notech_ao4 i_psram_sub_i_7999(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4288 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4391), .Z(i_psram_sub_n_1396 - )); - notech_mux2 i_psram_sub_i_3887(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [23]), .B(i_psram_sub_n_4054), .Z(i_psram_sub_n_3936)); - notech_reg_set i_psram_sub_axi_rdata_reg_23(.CP(s00_axi_aclk), .D(i_psram_sub_n_3936 - ), .SD(1'b1), .Q(s00_axi_rdata[23])); - notech_ao4 i_psram_sub_i_81000(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4289 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4390), .Z(i_psram_sub_n_1401 - )); - notech_mux2 i_psram_sub_i_3879(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [22]), .B(i_psram_sub_n_4053), .Z(i_psram_sub_n_3930)); - notech_reg_set i_psram_sub_axi_rdata_reg_22(.CP(s00_axi_aclk), .D(i_psram_sub_n_3930 - ), .SD(1'b1), .Q(s00_axi_rdata[22])); - notech_ao4 i_psram_sub_i_91001(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4290 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4389), .Z(i_psram_sub_n_1406 - )); - notech_mux2 i_psram_sub_i_3871(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [21]), .B(i_psram_sub_n_4052), .Z(i_psram_sub_n_3924)); - notech_reg_set i_psram_sub_axi_rdata_reg_21(.CP(s00_axi_aclk), .D(i_psram_sub_n_3924 - ), .SD(1'b1), .Q(s00_axi_rdata[21])); - notech_ao4 i_psram_sub_i_101002(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4291 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4388), .Z(i_psram_sub_n_1411 - )); - notech_mux2 i_psram_sub_i_3863(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [20]), .B(i_psram_sub_n_4051), .Z(i_psram_sub_n_3918)); - notech_reg_set i_psram_sub_axi_rdata_reg_20(.CP(s00_axi_aclk), .D(i_psram_sub_n_3918 - ), .SD(1'b1), .Q(s00_axi_rdata[20])); - notech_ao4 i_psram_sub_i_111003(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4292 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4387), .Z(i_psram_sub_n_1416 - )); - notech_mux2 i_psram_sub_i_3855(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [19]), .B(i_psram_sub_n_4050), .Z(i_psram_sub_n_3912)); - notech_reg_set i_psram_sub_axi_rdata_reg_19(.CP(s00_axi_aclk), .D(i_psram_sub_n_3912 - ), .SD(1'b1), .Q(s00_axi_rdata[19])); - notech_ao4 i_psram_sub_i_121004(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4293 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4386), .Z(i_psram_sub_n_1421 - )); - notech_mux2 i_psram_sub_i_3847(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [18]), .B(i_psram_sub_n_4049), .Z(i_psram_sub_n_3906)); - notech_reg_set i_psram_sub_axi_rdata_reg_18(.CP(s00_axi_aclk), .D(i_psram_sub_n_3906 - ), .SD(1'b1), .Q(s00_axi_rdata[18])); - notech_ao4 i_psram_sub_i_131005(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4294 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4385), .Z(i_psram_sub_n_1426 - )); - notech_mux2 i_psram_sub_i_3838(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [17]), .B(i_psram_sub_n_4048), .Z(i_psram_sub_n_3900)); - notech_reg_set i_psram_sub_axi_rdata_reg_17(.CP(s00_axi_aclk), .D(i_psram_sub_n_3900 - ), .SD(1'b1), .Q(s00_axi_rdata[17])); - notech_ao4 i_psram_sub_i_141006(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4295 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4384), .Z(i_psram_sub_n_1431 - )); - notech_mux2 i_psram_sub_i_3830(.S(\i_psram_sub_nbus_58[16] ), .A(s00_axi_rdata - [16]), .B(i_psram_sub_n_4047), .Z(i_psram_sub_n_3894)); - notech_reg_set i_psram_sub_axi_rdata_reg_16(.CP(s00_axi_aclk), .D(i_psram_sub_n_3894 - ), .SD(1'b1), .Q(s00_axi_rdata[16])); - notech_ao4 i_psram_sub_i_151007(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4296 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4383), .Z(i_psram_sub_n_1436 - )); - notech_mux2 i_psram_sub_i_3822(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [15]), .B(i_psram_sub_n_4046), .Z(i_psram_sub_n_3888)); - notech_reg_set i_psram_sub_axi_rdata_reg_15(.CP(s00_axi_aclk), .D(i_psram_sub_n_3888 - ), .SD(1'b1), .Q(s00_axi_rdata[15])); - notech_ao4 i_psram_sub_i_161008(.A(i_psram_sub_n_413), .B(i_psram_sub_n_4297 - ), .C(i_psram_sub_n_976), .D(i_psram_sub_n_4382), .Z(i_psram_sub_n_1441 - )); - notech_mux2 i_psram_sub_i_3814(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [14]), .B(i_psram_sub_n_4045), .Z(i_psram_sub_n_3882)); - notech_reg_set i_psram_sub_axi_rdata_reg_14(.CP(s00_axi_aclk), .D(i_psram_sub_n_3882 - ), .SD(1'b1), .Q(s00_axi_rdata[14])); - notech_ao4 i_psram_sub_i_171009(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4298 - ), .C(i_psram_sub_n_4397), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1446 - )); - notech_mux2 i_psram_sub_i_3806(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [13]), .B(i_psram_sub_n_4044), .Z(i_psram_sub_n_3876)); - notech_reg_set i_psram_sub_axi_rdata_reg_13(.CP(s00_axi_aclk), .D(i_psram_sub_n_3876 - ), .SD(1'b1), .Q(s00_axi_rdata[13])); - notech_ao4 i_psram_sub_i_181010(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4299 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4396), .Z(i_psram_sub_n_1451 - )); - notech_mux2 i_psram_sub_i_3798(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [12]), .B(i_psram_sub_n_4043), .Z(i_psram_sub_n_3870)); - notech_reg_set i_psram_sub_axi_rdata_reg_12(.CP(s00_axi_aclk), .D(i_psram_sub_n_3870 - ), .SD(1'b1), .Q(s00_axi_rdata[12])); - notech_ao4 i_psram_sub_i_191011(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4300 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4395), .Z(i_psram_sub_n_1456 - )); - notech_mux2 i_psram_sub_i_3790(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [11]), .B(i_psram_sub_n_4042), .Z(i_psram_sub_n_3864)); - notech_reg_set i_psram_sub_axi_rdata_reg_11(.CP(s00_axi_aclk), .D(i_psram_sub_n_3864 - ), .SD(1'b1), .Q(s00_axi_rdata[11])); - notech_ao4 i_psram_sub_i_201012(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4301 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4394), .Z(i_psram_sub_n_1461 - )); - notech_mux2 i_psram_sub_i_3782(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [10]), .B(i_psram_sub_n_4041), .Z(i_psram_sub_n_3858)); - notech_reg_set i_psram_sub_axi_rdata_reg_10(.CP(s00_axi_aclk), .D(i_psram_sub_n_3858 - ), .SD(1'b1), .Q(s00_axi_rdata[10])); - notech_ao4 i_psram_sub_i_211013(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4302 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4393), .Z(i_psram_sub_n_1466 - )); - notech_mux2 i_psram_sub_i_3774(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [9]), .B(i_psram_sub_n_4040), .Z(i_psram_sub_n_3852)); - notech_reg_set i_psram_sub_axi_rdata_reg_9(.CP(s00_axi_aclk), .D(i_psram_sub_n_3852 - ), .SD(1'b1), .Q(s00_axi_rdata[9])); - notech_ao4 i_psram_sub_i_221014(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4303 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4392), .Z(i_psram_sub_n_1471 - )); - notech_mux2 i_psram_sub_i_3765(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [8]), .B(i_psram_sub_n_4039), .Z(i_psram_sub_n_3846)); - notech_reg_set i_psram_sub_axi_rdata_reg_8(.CP(s00_axi_aclk), .D(i_psram_sub_n_3846 - ), .SD(1'b1), .Q(s00_axi_rdata[8])); - notech_ao4 i_psram_sub_i_231015(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4304 - ), .C(i_psram_sub_n_951), .D(i_psram_sub_n_4391), .Z(i_psram_sub_n_1476 - )); - notech_mux2 i_psram_sub_i_3757(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [7]), .B(i_psram_sub_n_4038), .Z(i_psram_sub_n_3840)); - notech_reg_set i_psram_sub_axi_rdata_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3840 - ), .SD(1'b1), .Q(s00_axi_rdata[7])); - notech_ao4 i_psram_sub_i_241016(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4305 - ), .C(i_psram_sub_n_4390), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1481 - )); - notech_mux2 i_psram_sub_i_3749(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [6]), .B(i_psram_sub_n_4037), .Z(i_psram_sub_n_3834)); - notech_reg_set i_psram_sub_axi_rdata_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3834 - ), .SD(1'b1), .Q(s00_axi_rdata[6])); - notech_ao4 i_psram_sub_i_251017(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4306 - ), .C(i_psram_sub_n_4389), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1486 - )); - notech_mux2 i_psram_sub_i_3741(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [5]), .B(i_psram_sub_n_4036), .Z(i_psram_sub_n_3828)); - notech_reg_set i_psram_sub_axi_rdata_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3828 - ), .SD(1'b1), .Q(s00_axi_rdata[5])); - notech_ao4 i_psram_sub_i_261018(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4307 - ), .C(i_psram_sub_n_4388), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1491 - )); - notech_mux2 i_psram_sub_i_3733(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [4]), .B(i_psram_sub_n_4035), .Z(i_psram_sub_n_3822)); - notech_reg_set i_psram_sub_axi_rdata_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3822 - ), .SD(1'b1), .Q(s00_axi_rdata[4])); - notech_ao4 i_psram_sub_i_271019(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4308 - ), .C(i_psram_sub_n_4387), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1496 - )); - notech_mux2 i_psram_sub_i_3725(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [3]), .B(i_psram_sub_n_4034), .Z(i_psram_sub_n_3816)); - notech_reg_set i_psram_sub_axi_rdata_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3816 - ), .SD(1'b1), .Q(s00_axi_rdata[3])); - notech_ao4 i_psram_sub_i_281020(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4309 - ), .C(i_psram_sub_n_4386), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1501 - )); - notech_mux2 i_psram_sub_i_3717(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [2]), .B(i_psram_sub_n_4033), .Z(i_psram_sub_n_3810)); - notech_reg_set i_psram_sub_axi_rdata_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3810 - ), .SD(1'b1), .Q(s00_axi_rdata[2])); - notech_ao4 i_psram_sub_i_291021(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4310 - ), .C(i_psram_sub_n_4385), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1506 - )); - notech_mux2 i_psram_sub_i_3709(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [1]), .B(i_psram_sub_n_4032), .Z(i_psram_sub_n_3804)); - notech_reg_set i_psram_sub_axi_rdata_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3804 - ), .SD(1'b1), .Q(s00_axi_rdata[1])); - notech_ao4 i_psram_sub_i_301022(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4311 - ), .C(i_psram_sub_n_4384), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1511 - )); - notech_mux2 i_psram_sub_i_3701(.S(\i_psram_sub_nbus_58[0] ), .A(s00_axi_rdata - [0]), .B(i_psram_sub_n_4031), .Z(i_psram_sub_n_3798)); - notech_reg_set i_psram_sub_axi_rdata_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3798 - ), .SD(1'b1), .Q(s00_axi_rdata[0])); - notech_ao4 i_psram_sub_i_311023(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4312 - ), .C(i_psram_sub_n_4383), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1516 - )); - notech_and3 i_psram_sub_i_3694(.A(s00_axi_aresetn), .B(i_psram_sub_n_569 - ), .C(s00_axi_bresp[1]), .Z(i_psram_sub_n_3795)); - notech_reg_set i_psram_sub_axi_bresp_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3795 - ), .SD(1'b1), .Q(s00_axi_bresp[1])); - notech_ao4 i_psram_sub_i_321024(.A(i_psram_sub_n_448), .B(i_psram_sub_n_4313 - ), .C(i_psram_sub_n_4382), .D(i_psram_sub_n_951), .Z(i_psram_sub_n_1521 - )); - notech_and3 i_psram_sub_i_3686(.A(s00_axi_aresetn), .B(s00_axi_bresp[0]) - , .C(i_psram_sub_n_569), .Z(i_psram_sub_n_3789)); - notech_reg_set i_psram_sub_axi_bresp_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3789 - ), .SD(1'b1), .Q(s00_axi_bresp[0])); - notech_nand3 i_psram_sub_i_1379(.A(i_psram_sub_n_1198), .B(i_psram_sub_n_1202 - ), .C(i_psram_sub_n_593), .Z(i_psram_sub_n_2037)); - notech_nao3 i_psram_sub_i_3678(.A(s00_axi_bvalid), .B(\i_psram_sub_nbus_68[0] - ), .C(s00_axi_bready), .Z(i_psram_sub_n_3783)); - notech_nao3 i_psram_sub_i_3677(.A(s00_axi_aresetn), .B(i_psram_sub_n_2024 - ), .C(s00_axi_bvalid), .Z(i_psram_sub_n_3782)); - notech_nand2 i_psram_sub_i_3676(.A(i_psram_sub_n_3782), .B(i_psram_sub_n_3783 - ), .Z(i_psram_sub_n_3780)); - notech_reg_set i_psram_sub_axi_bvalid_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3780 - ), .SD(1'b1), .Q(s00_axi_bvalid)); - notech_nand3 i_psram_sub_i_2380(.A(i_psram_sub_n_1198), .B(i_psram_sub_n_1196 - ), .C(i_psram_sub_n_597), .Z(i_psram_sub_n_2042)); - notech_mux2 i_psram_sub_i_3668(.S(i_psram_sub_n_2173), .A(s00_axi_rlast) - , .B(i_psram_sub_n_579), .Z(i_psram_sub_n_3774)); - notech_reg_set i_psram_sub_axi_rlast_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3774 - ), .SD(1'b1), .Q(s00_axi_rlast)); - notech_nand2 i_psram_sub_i_1694(.A(i_psram_sub_n_1194), .B(i_psram_sub_n_1193 - ), .Z(i_psram_sub_n_1237)); - notech_and3 i_psram_sub_i_3662(.A(s00_axi_aresetn), .B(i_psram_sub_n_568 - ), .C(s00_axi_rresp[1]), .Z(i_psram_sub_n_3771)); - notech_reg_set i_psram_sub_axi_rresp_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3771 - ), .SD(1'b1), .Q(s00_axi_rresp[1])); - notech_nand2 i_psram_sub_i_2695(.A(i_psram_sub_n_1192), .B(i_psram_sub_n_1191 - ), .Z(i_psram_sub_n_1242)); - notech_and3 i_psram_sub_i_3654(.A(s00_axi_aresetn), .B(s00_axi_rresp[0]) - , .C(i_psram_sub_n_568), .Z(i_psram_sub_n_3765)); - notech_reg_set i_psram_sub_axi_rresp_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3765 - ), .SD(1'b1), .Q(s00_axi_rresp[0])); - notech_nand2 i_psram_sub_i_3696(.A(i_psram_sub_n_1190), .B(i_psram_sub_n_1189 - ), .Z(i_psram_sub_n_1247)); - notech_mux2 i_psram_sub_i_3644(.S(i_psram_sub_n_2198), .A(s00_axi_awready - ), .B(i_psram_sub_n_580), .Z(i_psram_sub_n_3756)); - notech_reg_set i_psram_sub_axi_awready_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3756 - ), .SD(1'b1), .Q(s00_axi_awready)); - notech_nand2 i_psram_sub_i_4697(.A(i_psram_sub_n_1188), .B(i_psram_sub_n_1187 - ), .Z(i_psram_sub_n_1252)); - notech_mux2 i_psram_sub_i_3636(.S(i_psram_sub_n_1786), .A(i_psram_sub_axi_awv_awr_flag - ), .B(i_psram_sub_n_580), .Z(i_psram_sub_n_3750)); - notech_reg_set i_psram_sub_axi_awv_awr_flag_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3750 - ), .SD(1'b1), .Q(i_psram_sub_axi_awv_awr_flag)); - notech_nand2 i_psram_sub_i_5698(.A(i_psram_sub_n_1186), .B(i_psram_sub_n_1185 - ), .Z(i_psram_sub_n_1257)); - notech_mux2 i_psram_sub_i_3628(.S(\i_psram_sub_nbus_56[0] ), .A(s00_axi_wready - ), .B(i_psram_sub_n_4028), .Z(i_psram_sub_n_3744)); - notech_reg_set i_psram_sub_axi_wready_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3744 - ), .SD(1'b1), .Q(s00_axi_wready)); - notech_reg_set i_psram_sub_state_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_state_5 - [2]), .SD(1'b1), .Q(i_psram_sub_state[2])); - notech_reg_set i_psram_sub_state_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_state_5 - [1]), .SD(1'b1), .Q(i_psram_sub_state[1])); - notech_reg_set i_psram_sub_state_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_4026 - ), .SD(1'b1), .Q(i_psram_sub_state[0])); - notech_nand2 i_psram_sub_i_6699(.A(i_psram_sub_n_1184), .B(i_psram_sub_n_1183 - ), .Z(i_psram_sub_n_1262)); - notech_mux2 i_psram_sub_i_3608(.S(i_psram_sub_n_2159), .A(i_psram_sub_axi_arv_arr_flag - ), .B(i_psram_sub_n_581), .Z(i_psram_sub_n_3732)); - notech_reg_set i_psram_sub_axi_arv_arr_flag_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3732 - ), .SD(1'b1), .Q(i_psram_sub_axi_arv_arr_flag)); - notech_nand2 i_psram_sub_i_7700(.A(i_psram_sub_n_1182), .B(i_psram_sub_n_1181 - ), .Z(i_psram_sub_n_1267)); - notech_mux2 i_psram_sub_i_3600(.S(i_psram_sub_n_1970), .A(s00_axi_arready - ), .B(i_psram_sub_n_581), .Z(i_psram_sub_n_3726)); - notech_reg_set i_psram_sub_axi_arready_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3726 - ), .SD(1'b1), .Q(s00_axi_arready)); - notech_reg_set i_psram_sub_axi_rvalid_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_4061 - ), .SD(1'b1), .Q(s00_axi_rvalid)); - notech_nand2 i_psram_sub_i_8701(.A(i_psram_sub_n_1180), .B(i_psram_sub_n_1179 - ), .Z(i_psram_sub_n_1272)); - notech_mux2 i_psram_sub_i_3588(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_command - ), .B(i_psram_sub_n_2054), .Z(i_psram_sub_n_3718)); - notech_reg_set i_psram_sub_command_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_3718 - ), .SD(1'b1), .Q(i_psram_sub_command)); - notech_nand2 i_psram_sub_i_9702(.A(i_psram_sub_n_1178), .B(i_psram_sub_n_1177 - ), .Z(i_psram_sub_n_1277)); - notech_mux2 i_psram_sub_i_3580(.S(\i_psram_sub_nbus_64[0] ), .A(i_psram_sub_mem_byte_en - [1]), .B(i_psram_sub_n_2042), .Z(i_psram_sub_n_3712)); - notech_reg_set i_psram_sub_mem_byte_en_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3712 - ), .SD(1'b1), .Q(i_psram_sub_mem_byte_en[1])); - notech_nand2 i_psram_sub_i_10703(.A(i_psram_sub_n_1176), .B(i_psram_sub_n_1175 - ), .Z(i_psram_sub_n_1282)); - notech_mux2 i_psram_sub_i_3572(.S(\i_psram_sub_nbus_64[0] ), .A(i_psram_sub_mem_byte_en - [0]), .B(i_psram_sub_n_2037), .Z(i_psram_sub_n_3706)); - notech_reg_set i_psram_sub_mem_byte_en_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3706 - ), .SD(1'b1), .Q(i_psram_sub_mem_byte_en[0])); - notech_nand2 i_psram_sub_i_11704(.A(i_psram_sub_n_1174), .B(i_psram_sub_n_1173 - ), .Z(i_psram_sub_n_1287)); - notech_mux2 i_psram_sub_i_3564(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [22]), .B(i_psram_sub_n_1347), .Z(i_psram_sub_n_3700)); - notech_reg_set i_psram_sub_mem_addr_reg_22(.CP(s00_axi_aclk), .D(i_psram_sub_n_3700 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[22])); - notech_nand2 i_psram_sub_i_12705(.A(i_psram_sub_n_1172), .B(i_psram_sub_n_1171 - ), .Z(i_psram_sub_n_1292)); - notech_mux2 i_psram_sub_i_3556(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [21]), .B(i_psram_sub_n_1342), .Z(i_psram_sub_n_3694)); - notech_reg_set i_psram_sub_mem_addr_reg_21(.CP(s00_axi_aclk), .D(i_psram_sub_n_3694 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[21])); - notech_nand2 i_psram_sub_i_13706(.A(i_psram_sub_n_1170), .B(i_psram_sub_n_1169 - ), .Z(i_psram_sub_n_1297)); - notech_mux2 i_psram_sub_i_3548(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [20]), .B(i_psram_sub_n_1337), .Z(i_psram_sub_n_3688)); - notech_reg_set i_psram_sub_mem_addr_reg_20(.CP(s00_axi_aclk), .D(i_psram_sub_n_3688 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[20])); - notech_nand2 i_psram_sub_i_14707(.A(i_psram_sub_n_1168), .B(i_psram_sub_n_1167 - ), .Z(i_psram_sub_n_1302)); - notech_mux2 i_psram_sub_i_3540(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [19]), .B(i_psram_sub_n_1332), .Z(i_psram_sub_n_3682)); - notech_reg_set i_psram_sub_mem_addr_reg_19(.CP(s00_axi_aclk), .D(i_psram_sub_n_3682 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[19])); - notech_nand2 i_psram_sub_i_15708(.A(i_psram_sub_n_1166), .B(i_psram_sub_n_1165 - ), .Z(i_psram_sub_n_1307)); - notech_mux2 i_psram_sub_i_3532(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [18]), .B(i_psram_sub_n_1327), .Z(i_psram_sub_n_3676)); - notech_reg_set i_psram_sub_mem_addr_reg_18(.CP(s00_axi_aclk), .D(i_psram_sub_n_3676 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[18])); - notech_nand2 i_psram_sub_i_16709(.A(i_psram_sub_n_1164), .B(i_psram_sub_n_1163 - ), .Z(i_psram_sub_n_1312)); - notech_mux2 i_psram_sub_i_3524(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [17]), .B(i_psram_sub_n_1322), .Z(i_psram_sub_n_3670)); - notech_reg_set i_psram_sub_mem_addr_reg_17(.CP(s00_axi_aclk), .D(i_psram_sub_n_3670 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[17])); - notech_nand2 i_psram_sub_i_17710(.A(i_psram_sub_n_1162), .B(i_psram_sub_n_1161 - ), .Z(i_psram_sub_n_1317)); - notech_mux2 i_psram_sub_i_3516(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [16]), .B(i_psram_sub_n_1317), .Z(i_psram_sub_n_3664)); - notech_reg_set i_psram_sub_mem_addr_reg_16(.CP(s00_axi_aclk), .D(i_psram_sub_n_3664 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[16])); - notech_nand2 i_psram_sub_i_18711(.A(i_psram_sub_n_1160), .B(i_psram_sub_n_1159 - ), .Z(i_psram_sub_n_1322)); - notech_mux2 i_psram_sub_i_3508(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [15]), .B(i_psram_sub_n_1312), .Z(i_psram_sub_n_3658)); - notech_reg_set i_psram_sub_mem_addr_reg_15(.CP(s00_axi_aclk), .D(i_psram_sub_n_3658 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[15])); - notech_nand2 i_psram_sub_i_19712(.A(i_psram_sub_n_1158), .B(i_psram_sub_n_1157 - ), .Z(i_psram_sub_n_1327)); - notech_mux2 i_psram_sub_i_3500(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [14]), .B(i_psram_sub_n_1307), .Z(i_psram_sub_n_3652)); - notech_reg_set i_psram_sub_mem_addr_reg_14(.CP(s00_axi_aclk), .D(i_psram_sub_n_3652 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[14])); - notech_nand2 i_psram_sub_i_20713(.A(i_psram_sub_n_1156), .B(i_psram_sub_n_1155 - ), .Z(i_psram_sub_n_1332)); - notech_mux2 i_psram_sub_i_3492(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [13]), .B(i_psram_sub_n_1302), .Z(i_psram_sub_n_3646)); - notech_reg_set i_psram_sub_mem_addr_reg_13(.CP(s00_axi_aclk), .D(i_psram_sub_n_3646 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[13])); - notech_nand2 i_psram_sub_i_21714(.A(i_psram_sub_n_1154), .B(i_psram_sub_n_1153 - ), .Z(i_psram_sub_n_1337)); - notech_mux2 i_psram_sub_i_3484(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [12]), .B(i_psram_sub_n_1297), .Z(i_psram_sub_n_3640)); - notech_reg_set i_psram_sub_mem_addr_reg_12(.CP(s00_axi_aclk), .D(i_psram_sub_n_3640 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[12])); - notech_nand2 i_psram_sub_i_22715(.A(i_psram_sub_n_1152), .B(i_psram_sub_n_1151 - ), .Z(i_psram_sub_n_1342)); - notech_mux2 i_psram_sub_i_3476(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [11]), .B(i_psram_sub_n_1292), .Z(i_psram_sub_n_3634)); - notech_reg_set i_psram_sub_mem_addr_reg_11(.CP(s00_axi_aclk), .D(i_psram_sub_n_3634 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[11])); - notech_nand2 i_psram_sub_i_23716(.A(i_psram_sub_n_1150), .B(i_psram_sub_n_1148 - ), .Z(i_psram_sub_n_1347)); - notech_mux2 i_psram_sub_i_3468(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [10]), .B(i_psram_sub_n_1287), .Z(i_psram_sub_n_3628)); - notech_reg_set i_psram_sub_mem_addr_reg_10(.CP(s00_axi_aclk), .D(i_psram_sub_n_3628 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[10])); - notech_nand2 i_psram_sub_i_1837(.A(i_psram_sub_n_1147), .B(i_psram_sub_n_460 - ), .Z(i_psram_sub_n_1660)); - notech_mux2 i_psram_sub_i_3460(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [9]), .B(i_psram_sub_n_1282), .Z(i_psram_sub_n_3622)); - notech_reg_set i_psram_sub_mem_addr_reg_9(.CP(s00_axi_aclk), .D(i_psram_sub_n_3622 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[9])); - notech_nand2 i_psram_sub_i_2838(.A(i_psram_sub_n_1146), .B(i_psram_sub_n_461 - ), .Z(i_psram_sub_n_1665)); - notech_mux2 i_psram_sub_i_3452(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [8]), .B(i_psram_sub_n_1277), .Z(i_psram_sub_n_3616)); - notech_reg_set i_psram_sub_mem_addr_reg_8(.CP(s00_axi_aclk), .D(i_psram_sub_n_3616 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[8])); - notech_nand2 i_psram_sub_i_3839(.A(i_psram_sub_n_1145), .B(i_psram_sub_n_1144 - ), .Z(i_psram_sub_n_1670)); - notech_mux2 i_psram_sub_i_3444(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [7]), .B(i_psram_sub_n_1272), .Z(i_psram_sub_n_3610)); - notech_reg_set i_psram_sub_mem_addr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3610 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[7])); - notech_nand2 i_psram_sub_i_4840(.A(i_psram_sub_n_1143), .B(i_psram_sub_n_1142 - ), .Z(i_psram_sub_n_1675)); - notech_mux2 i_psram_sub_i_3436(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [6]), .B(i_psram_sub_n_1267), .Z(i_psram_sub_n_3604)); - notech_reg_set i_psram_sub_mem_addr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3604 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[6])); - notech_nand2 i_psram_sub_i_5841(.A(i_psram_sub_n_1141), .B(i_psram_sub_n_1140 - ), .Z(i_psram_sub_n_1680)); - notech_mux2 i_psram_sub_i_3428(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [5]), .B(i_psram_sub_n_1262), .Z(i_psram_sub_n_3598)); - notech_reg_set i_psram_sub_mem_addr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3598 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[5])); - notech_nand2 i_psram_sub_i_6842(.A(i_psram_sub_n_1139), .B(i_psram_sub_n_1138 - ), .Z(i_psram_sub_n_1685)); - notech_mux2 i_psram_sub_i_3420(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [4]), .B(i_psram_sub_n_1257), .Z(i_psram_sub_n_3592)); - notech_reg_set i_psram_sub_mem_addr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3592 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[4])); - notech_nand2 i_psram_sub_i_7843(.A(i_psram_sub_n_1137), .B(i_psram_sub_n_1136 - ), .Z(i_psram_sub_n_1690)); - notech_mux2 i_psram_sub_i_3412(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [3]), .B(i_psram_sub_n_1252), .Z(i_psram_sub_n_3586)); - notech_reg_set i_psram_sub_mem_addr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3586 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[3])); - notech_nand2 i_psram_sub_i_8844(.A(i_psram_sub_n_1135), .B(i_psram_sub_n_1134 - ), .Z(i_psram_sub_n_1695)); - notech_mux2 i_psram_sub_i_3404(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [2]), .B(i_psram_sub_n_1247), .Z(i_psram_sub_n_3580)); - notech_reg_set i_psram_sub_mem_addr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3580 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[2])); - notech_nand2 i_psram_sub_i_9845(.A(i_psram_sub_n_1133), .B(i_psram_sub_n_1132 - ), .Z(i_psram_sub_n_1700)); - notech_mux2 i_psram_sub_i_3396(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [1]), .B(i_psram_sub_n_1242), .Z(i_psram_sub_n_3574)); - notech_reg_set i_psram_sub_mem_addr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3574 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[1])); - notech_nand2 i_psram_sub_i_10846(.A(i_psram_sub_n_1131), .B(i_psram_sub_n_1130 - ), .Z(i_psram_sub_n_1705)); - notech_mux2 i_psram_sub_i_3388(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_addr - [0]), .B(i_psram_sub_n_1237), .Z(i_psram_sub_n_3568)); - notech_reg_set i_psram_sub_mem_addr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3568 - ), .SD(1'b1), .Q(i_psram_sub_mem_addr[0])); - notech_nand2 i_psram_sub_i_11847(.A(i_psram_sub_n_1129), .B(i_psram_sub_n_1128 - ), .Z(i_psram_sub_n_1710)); - notech_mux2 i_psram_sub_i_3380(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [23]), .B(i_psram_sub_n_1775), .Z(i_psram_sub_n_3562)); - notech_reg_set i_psram_sub_axi_awaddr_reg_23(.CP(s00_axi_aclk), .D(i_psram_sub_n_3562 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[23])); - notech_nand2 i_psram_sub_i_12848(.A(i_psram_sub_n_1127), .B(i_psram_sub_n_1126 - ), .Z(i_psram_sub_n_1715)); - notech_mux2 i_psram_sub_i_3372(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [22]), .B(i_psram_sub_n_1770), .Z(i_psram_sub_n_3556)); - notech_reg_set i_psram_sub_axi_awaddr_reg_22(.CP(s00_axi_aclk), .D(i_psram_sub_n_3556 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[22])); - notech_nand2 i_psram_sub_i_13849(.A(i_psram_sub_n_1125), .B(i_psram_sub_n_1124 - ), .Z(i_psram_sub_n_1720)); - notech_mux2 i_psram_sub_i_3364(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [21]), .B(i_psram_sub_n_1765), .Z(i_psram_sub_n_3550)); - notech_reg_set i_psram_sub_axi_awaddr_reg_21(.CP(s00_axi_aclk), .D(i_psram_sub_n_3550 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[21])); - notech_nand2 i_psram_sub_i_14850(.A(i_psram_sub_n_1123), .B(i_psram_sub_n_1122 - ), .Z(i_psram_sub_n_1725)); - notech_mux2 i_psram_sub_i_3356(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [20]), .B(i_psram_sub_n_1760), .Z(i_psram_sub_n_3544)); - notech_reg_set i_psram_sub_axi_awaddr_reg_20(.CP(s00_axi_aclk), .D(i_psram_sub_n_3544 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[20])); - notech_nand2 i_psram_sub_i_15851(.A(i_psram_sub_n_1121), .B(i_psram_sub_n_1120 - ), .Z(i_psram_sub_n_1730)); - notech_mux2 i_psram_sub_i_3348(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [19]), .B(i_psram_sub_n_1755), .Z(i_psram_sub_n_3538)); - notech_reg_set i_psram_sub_axi_awaddr_reg_19(.CP(s00_axi_aclk), .D(i_psram_sub_n_3538 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[19])); - notech_nand2 i_psram_sub_i_16852(.A(i_psram_sub_n_1119), .B(i_psram_sub_n_1118 - ), .Z(i_psram_sub_n_1735)); - notech_mux2 i_psram_sub_i_3340(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [18]), .B(i_psram_sub_n_1750), .Z(i_psram_sub_n_3532)); - notech_reg_set i_psram_sub_axi_awaddr_reg_18(.CP(s00_axi_aclk), .D(i_psram_sub_n_3532 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[18])); - notech_nand2 i_psram_sub_i_17853(.A(i_psram_sub_n_1117), .B(i_psram_sub_n_1116 - ), .Z(i_psram_sub_n_1740)); - notech_mux2 i_psram_sub_i_3332(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [17]), .B(i_psram_sub_n_1745), .Z(i_psram_sub_n_3526)); - notech_reg_set i_psram_sub_axi_awaddr_reg_17(.CP(s00_axi_aclk), .D(i_psram_sub_n_3526 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[17])); - notech_nand2 i_psram_sub_i_18854(.A(i_psram_sub_n_1115), .B(i_psram_sub_n_1114 - ), .Z(i_psram_sub_n_1745)); - notech_mux2 i_psram_sub_i_3323(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [16]), .B(i_psram_sub_n_1740), .Z(i_psram_sub_n_3520)); - notech_reg_set i_psram_sub_axi_awaddr_reg_16(.CP(s00_axi_aclk), .D(i_psram_sub_n_3520 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[16])); - notech_nand2 i_psram_sub_i_19855(.A(i_psram_sub_n_1113), .B(i_psram_sub_n_1112 - ), .Z(i_psram_sub_n_1750)); - notech_mux2 i_psram_sub_i_3315(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [15]), .B(i_psram_sub_n_1735), .Z(i_psram_sub_n_3514)); - notech_reg_set i_psram_sub_axi_awaddr_reg_15(.CP(s00_axi_aclk), .D(i_psram_sub_n_3514 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[15])); - notech_nand2 i_psram_sub_i_20856(.A(i_psram_sub_n_1111), .B(i_psram_sub_n_1110 - ), .Z(i_psram_sub_n_1755)); - notech_mux2 i_psram_sub_i_3307(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [14]), .B(i_psram_sub_n_1730), .Z(i_psram_sub_n_3508)); - notech_reg_set i_psram_sub_axi_awaddr_reg_14(.CP(s00_axi_aclk), .D(i_psram_sub_n_3508 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[14])); - notech_nand2 i_psram_sub_i_21857(.A(i_psram_sub_n_1109), .B(i_psram_sub_n_1108 - ), .Z(i_psram_sub_n_1760)); - notech_mux2 i_psram_sub_i_3299(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [13]), .B(i_psram_sub_n_1725), .Z(i_psram_sub_n_3502)); - notech_reg_set i_psram_sub_axi_awaddr_reg_13(.CP(s00_axi_aclk), .D(i_psram_sub_n_3502 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[13])); - notech_nand2 i_psram_sub_i_22858(.A(i_psram_sub_n_1107), .B(i_psram_sub_n_1106 - ), .Z(i_psram_sub_n_1765)); - notech_mux2 i_psram_sub_i_3291(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [12]), .B(i_psram_sub_n_1720), .Z(i_psram_sub_n_3496)); - notech_reg_set i_psram_sub_axi_awaddr_reg_12(.CP(s00_axi_aclk), .D(i_psram_sub_n_3496 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[12])); - notech_nand2 i_psram_sub_i_23859(.A(i_psram_sub_n_1105), .B(i_psram_sub_n_1104 - ), .Z(i_psram_sub_n_1770)); - notech_mux2 i_psram_sub_i_3283(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [11]), .B(i_psram_sub_n_1715), .Z(i_psram_sub_n_3490)); - notech_reg_set i_psram_sub_axi_awaddr_reg_11(.CP(s00_axi_aclk), .D(i_psram_sub_n_3490 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[11])); - notech_nand2 i_psram_sub_i_24860(.A(i_psram_sub_n_1103), .B(i_psram_sub_n_1098 - ), .Z(i_psram_sub_n_1775)); - notech_mux2 i_psram_sub_i_3275(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [10]), .B(i_psram_sub_n_1710), .Z(i_psram_sub_n_3484)); - notech_reg_set i_psram_sub_axi_awaddr_reg_10(.CP(s00_axi_aclk), .D(i_psram_sub_n_3484 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[10])); - notech_ao4 i_psram_sub_i_21066(.A(i_psram_sub_n_4015), .B(i_psram_sub_n_799775 - ), .C(\i_psram_sub_nbus_63[0] ), .D(i_psram_sub_n_1084), .Z(i_psram_sub_n_1926 - )); - notech_mux2 i_psram_sub_i_3267(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [9]), .B(i_psram_sub_n_1705), .Z(i_psram_sub_n_3478)); - notech_reg_set i_psram_sub_axi_awaddr_reg_9(.CP(s00_axi_aclk), .D(i_psram_sub_n_3478 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[9])); - notech_ao4 i_psram_sub_i_31067(.A(i_psram_sub_n_4017), .B(i_psram_sub_n_799775 - ), .C(\i_psram_sub_nbus_63[0] ), .D(i_psram_sub_n_494), .Z(i_psram_sub_n_1931 - )); - notech_mux2 i_psram_sub_i_3259(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [8]), .B(i_psram_sub_n_1700), .Z(i_psram_sub_n_3472)); - notech_reg_set i_psram_sub_axi_awaddr_reg_8(.CP(s00_axi_aclk), .D(i_psram_sub_n_3472 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[8])); - notech_nand2 i_psram_sub_i_1765(.A(i_psram_sub_n_1075), .B(i_psram_sub_n_508 - ), .Z(i_psram_sub_n_1797)); - notech_mux2 i_psram_sub_i_3251(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [7]), .B(i_psram_sub_n_1695), .Z(i_psram_sub_n_3466)); - notech_reg_set i_psram_sub_axi_awaddr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3466 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[7])); - notech_nand2 i_psram_sub_i_2766(.A(i_psram_sub_n_1074), .B(i_psram_sub_n_509 - ), .Z(i_psram_sub_n_1802)); - notech_mux2 i_psram_sub_i_3243(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [6]), .B(i_psram_sub_n_1690), .Z(i_psram_sub_n_3460)); - notech_reg_set i_psram_sub_axi_awaddr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3460 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[6])); - notech_nand2 i_psram_sub_i_3767(.A(i_psram_sub_n_1073), .B(i_psram_sub_n_1072 - ), .Z(i_psram_sub_n_1807)); - notech_mux2 i_psram_sub_i_3235(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [5]), .B(i_psram_sub_n_1685), .Z(i_psram_sub_n_3454)); - notech_reg_set i_psram_sub_axi_awaddr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3454 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[5])); - notech_nand2 i_psram_sub_i_4768(.A(i_psram_sub_n_1071), .B(i_psram_sub_n_1070 - ), .Z(i_psram_sub_n_1812)); - notech_mux2 i_psram_sub_i_3227(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [4]), .B(i_psram_sub_n_1680), .Z(i_psram_sub_n_3448)); - notech_reg_set i_psram_sub_axi_awaddr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3448 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[4])); - notech_nand2 i_psram_sub_i_5769(.A(i_psram_sub_n_1069), .B(i_psram_sub_n_1068 - ), .Z(i_psram_sub_n_1817)); - notech_mux2 i_psram_sub_i_3219(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [3]), .B(i_psram_sub_n_1675), .Z(i_psram_sub_n_3442)); - notech_reg_set i_psram_sub_axi_awaddr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3442 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[3])); - notech_nand2 i_psram_sub_i_6770(.A(i_psram_sub_n_1067), .B(i_psram_sub_n_1066 - ), .Z(i_psram_sub_n_1822)); - notech_mux2 i_psram_sub_i_3211(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [2]), .B(i_psram_sub_n_1670), .Z(i_psram_sub_n_3436)); - notech_reg_set i_psram_sub_axi_awaddr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3436 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[2])); - notech_nand2 i_psram_sub_i_7771(.A(i_psram_sub_n_1065), .B(i_psram_sub_n_1064 - ), .Z(i_psram_sub_n_1827)); - notech_mux2 i_psram_sub_i_3203(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [1]), .B(i_psram_sub_n_1665), .Z(i_psram_sub_n_3430)); - notech_reg_set i_psram_sub_axi_awaddr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3430 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[1])); - notech_nand2 i_psram_sub_i_8772(.A(i_psram_sub_n_1063), .B(i_psram_sub_n_1062 - ), .Z(i_psram_sub_n_1832)); - notech_mux2 i_psram_sub_i_3195(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awaddr - [0]), .B(i_psram_sub_n_1660), .Z(i_psram_sub_n_3424)); - notech_reg_set i_psram_sub_axi_awaddr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3424 - ), .SD(1'b1), .Q(i_psram_sub_axi_awaddr[0])); - notech_nand2 i_psram_sub_i_9773(.A(i_psram_sub_n_1061), .B(i_psram_sub_n_1060 - ), .Z(i_psram_sub_n_1837)); - notech_mux2 i_psram_sub_i_3187(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [7]), .B(i_psram_sub_n_798774), .Z(i_psram_sub_n_3418)); - notech_reg_set i_psram_sub_axi_awlen_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3418 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[7])); - notech_nand2 i_psram_sub_i_10774(.A(i_psram_sub_n_1059), .B(i_psram_sub_n_1058 - ), .Z(i_psram_sub_n_1842)); - notech_mux2 i_psram_sub_i_3179(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [6]), .B(i_psram_sub_n_797773), .Z(i_psram_sub_n_3412)); - notech_reg_set i_psram_sub_axi_awlen_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3412 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[6])); - notech_nand2 i_psram_sub_i_11775(.A(i_psram_sub_n_1057), .B(i_psram_sub_n_1056 - ), .Z(i_psram_sub_n_1847)); - notech_mux2 i_psram_sub_i_3171(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [5]), .B(i_psram_sub_n_796772), .Z(i_psram_sub_n_3406)); - notech_reg_set i_psram_sub_axi_awlen_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3406 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[5])); - notech_nand2 i_psram_sub_i_12776(.A(i_psram_sub_n_1055), .B(i_psram_sub_n_1054 - ), .Z(i_psram_sub_n_1852)); - notech_mux2 i_psram_sub_i_3163(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [4]), .B(i_psram_sub_n_795771), .Z(i_psram_sub_n_3400)); - notech_reg_set i_psram_sub_axi_awlen_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3400 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[4])); - notech_nand2 i_psram_sub_i_13777(.A(i_psram_sub_n_1053), .B(i_psram_sub_n_1052 - ), .Z(i_psram_sub_n_1857)); - notech_mux2 i_psram_sub_i_3155(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [3]), .B(i_psram_sub_n_794770), .Z(i_psram_sub_n_3394)); - notech_reg_set i_psram_sub_axi_awlen_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3394 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[3])); - notech_nand2 i_psram_sub_i_14778(.A(i_psram_sub_n_1051), .B(i_psram_sub_n_1050 - ), .Z(i_psram_sub_n_1862)); - notech_mux2 i_psram_sub_i_3147(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [2]), .B(i_psram_sub_n_793769), .Z(i_psram_sub_n_3388)); - notech_reg_set i_psram_sub_axi_awlen_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3388 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[2])); - notech_nand2 i_psram_sub_i_15779(.A(i_psram_sub_n_1049), .B(i_psram_sub_n_1048 - ), .Z(i_psram_sub_n_1867)); - notech_mux2 i_psram_sub_i_3139(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [1]), .B(i_psram_sub_n_792768), .Z(i_psram_sub_n_3382)); - notech_reg_set i_psram_sub_axi_awlen_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3382 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[1])); - notech_nand2 i_psram_sub_i_16780(.A(i_psram_sub_n_1047), .B(i_psram_sub_n_1046 - ), .Z(i_psram_sub_n_1872)); - notech_mux2 i_psram_sub_i_3131(.S(\i_psram_sub_nbus_63[0] ), .A(i_psram_sub_axi_awlen - [0]), .B(i_psram_sub_n_791767), .Z(i_psram_sub_n_3376)); - notech_reg_set i_psram_sub_axi_awlen_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3376 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen[0])); - notech_nand2 i_psram_sub_i_17781(.A(i_psram_sub_n_1045), .B(i_psram_sub_n_1044 - ), .Z(i_psram_sub_n_1877)); - notech_mux2 i_psram_sub_i_3123(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [7]), .B(i_psram_sub_n_804780), .Z(i_psram_sub_n_3370)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3370 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[7])); - notech_nand2 i_psram_sub_i_18782(.A(i_psram_sub_n_1043), .B(i_psram_sub_n_1042 - ), .Z(i_psram_sub_n_1882)); - notech_mux2 i_psram_sub_i_3115(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [6]), .B(i_psram_sub_n_803779), .Z(i_psram_sub_n_3364)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3364 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[6])); - notech_nand2 i_psram_sub_i_19783(.A(i_psram_sub_n_1041), .B(i_psram_sub_n_1040 - ), .Z(i_psram_sub_n_1887)); - notech_mux2 i_psram_sub_i_3107(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [5]), .B(i_psram_sub_n_802778), .Z(i_psram_sub_n_3358)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3358 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[5])); - notech_nand2 i_psram_sub_i_20784(.A(i_psram_sub_n_1039), .B(i_psram_sub_n_1038 - ), .Z(i_psram_sub_n_1892)); - notech_mux2 i_psram_sub_i_3099(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [4]), .B(i_psram_sub_n_801777), .Z(i_psram_sub_n_3352)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3352 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[4])); - notech_nand2 i_psram_sub_i_21785(.A(i_psram_sub_n_1037), .B(i_psram_sub_n_1036 - ), .Z(i_psram_sub_n_1897)); - notech_mux2 i_psram_sub_i_3091(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [3]), .B(i_psram_sub_n_800776), .Z(i_psram_sub_n_3346)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3346 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[3])); - notech_nand2 i_psram_sub_i_22786(.A(i_psram_sub_n_1035), .B(i_psram_sub_n_1034 - ), .Z(i_psram_sub_n_1902)); - notech_mux2 i_psram_sub_i_3083(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [2]), .B(i_psram_sub_n_4016), .Z(i_psram_sub_n_3340)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3340 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[2])); - notech_nand2 i_psram_sub_i_23787(.A(i_psram_sub_n_1033), .B(i_psram_sub_n_1032 - ), .Z(i_psram_sub_n_1907)); - notech_mux2 i_psram_sub_i_3075(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [1]), .B(i_psram_sub_n_4014), .Z(i_psram_sub_n_3334)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3334 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[1])); - notech_nand2 i_psram_sub_i_24788(.A(i_psram_sub_n_1031), .B(i_psram_sub_n_1026 - ), .Z(i_psram_sub_n_1912)); - notech_mux2 i_psram_sub_i_3067(.S(\i_psram_sub_nbus_60[0] ), .A(i_psram_sub_axi_awlen_cntr - [0]), .B(i_psram_sub_n_4012), .Z(i_psram_sub_n_3328)); - notech_reg_set i_psram_sub_axi_awlen_cntr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3328 - ), .SD(1'b1), .Q(i_psram_sub_axi_awlen_cntr[0])); - notech_ao4 i_psram_sub_i_21050(.A(i_psram_sub_n_913), .B(i_psram_sub_n_4004 - ), .C(\i_psram_sub_nbus_67[0] ), .D(i_psram_sub_n_1013), .Z(i_psram_sub_n_2067 - )); - notech_mux2 i_psram_sub_i_3059(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [23]), .B(i_psram_sub_n_1912), .Z(i_psram_sub_n_3322)); - notech_reg_set i_psram_sub_axi_araddr_reg_23(.CP(s00_axi_aclk), .D(i_psram_sub_n_3322 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[23])); - notech_ao4 i_psram_sub_i_31051(.A(i_psram_sub_n_4006), .B(i_psram_sub_n_913 - ), .C(i_psram_sub_n_535), .D(\i_psram_sub_nbus_67[0] ), .Z(i_psram_sub_n_2072 - )); - notech_mux2 i_psram_sub_i_3051(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [22]), .B(i_psram_sub_n_1907), .Z(i_psram_sub_n_3316)); - notech_reg_set i_psram_sub_axi_araddr_reg_22(.CP(s00_axi_aclk), .D(i_psram_sub_n_3316 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[22])); - notech_nand2 i_psram_sub_i_1329(.A(i_psram_sub_n_1004), .B(i_psram_sub_n_549 - ), .Z(i_psram_sub_n_1553)); - notech_mux2 i_psram_sub_i_3043(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [21]), .B(i_psram_sub_n_1902), .Z(i_psram_sub_n_3310)); - notech_reg_set i_psram_sub_axi_araddr_reg_21(.CP(s00_axi_aclk), .D(i_psram_sub_n_3310 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[21])); - notech_nand2 i_psram_sub_i_2330(.A(i_psram_sub_n_1001), .B(i_psram_sub_n_550 - ), .Z(i_psram_sub_n_1558)); - notech_mux2 i_psram_sub_i_3035(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [20]), .B(i_psram_sub_n_1897), .Z(i_psram_sub_n_3304)); - notech_reg_set i_psram_sub_axi_araddr_reg_20(.CP(s00_axi_aclk), .D(i_psram_sub_n_3304 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[20])); - notech_nand2 i_psram_sub_i_3331(.A(i_psram_sub_n_1000), .B(i_psram_sub_n_551 - ), .Z(i_psram_sub_n_1563)); - notech_mux2 i_psram_sub_i_3027(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [19]), .B(i_psram_sub_n_1892), .Z(i_psram_sub_n_3298)); - notech_reg_set i_psram_sub_axi_araddr_reg_19(.CP(s00_axi_aclk), .D(i_psram_sub_n_3298 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[19])); - notech_nand2 i_psram_sub_i_4332(.A(i_psram_sub_n_999), .B(i_psram_sub_n_552 - ), .Z(i_psram_sub_n_1568)); - notech_mux2 i_psram_sub_i_3019(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [18]), .B(i_psram_sub_n_1887), .Z(i_psram_sub_n_3292)); - notech_reg_set i_psram_sub_axi_araddr_reg_18(.CP(s00_axi_aclk), .D(i_psram_sub_n_3292 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[18])); - notech_nand2 i_psram_sub_i_5333(.A(i_psram_sub_n_998), .B(i_psram_sub_n_553 - ), .Z(i_psram_sub_n_1573)); - notech_mux2 i_psram_sub_i_3011(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [17]), .B(i_psram_sub_n_1882), .Z(i_psram_sub_n_3286)); - notech_reg_set i_psram_sub_axi_araddr_reg_17(.CP(s00_axi_aclk), .D(i_psram_sub_n_3286 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[17])); - notech_nand2 i_psram_sub_i_6334(.A(i_psram_sub_n_997), .B(i_psram_sub_n_554 - ), .Z(i_psram_sub_n_1578)); - notech_mux2 i_psram_sub_i_3003(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [16]), .B(i_psram_sub_n_1877), .Z(i_psram_sub_n_3280)); - notech_reg_set i_psram_sub_axi_araddr_reg_16(.CP(s00_axi_aclk), .D(i_psram_sub_n_3280 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[16])); - notech_nand2 i_psram_sub_i_7335(.A(i_psram_sub_n_996), .B(i_psram_sub_n_555 - ), .Z(i_psram_sub_n_1583)); - notech_mux2 i_psram_sub_i_2995(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [15]), .B(i_psram_sub_n_1872), .Z(i_psram_sub_n_3274)); - notech_reg_set i_psram_sub_axi_araddr_reg_15(.CP(s00_axi_aclk), .D(i_psram_sub_n_3274 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[15])); - notech_nand2 i_psram_sub_i_8336(.A(i_psram_sub_n_995), .B(i_psram_sub_n_556 - ), .Z(i_psram_sub_n_1588)); - notech_mux2 i_psram_sub_i_2986(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [14]), .B(i_psram_sub_n_1867), .Z(i_psram_sub_n_3268)); - notech_reg_set i_psram_sub_axi_araddr_reg_14(.CP(s00_axi_aclk), .D(i_psram_sub_n_3268 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[14])); - notech_nand2 i_psram_sub_i_9337(.A(i_psram_sub_n_994), .B(i_psram_sub_n_557 - ), .Z(i_psram_sub_n_1593)); - notech_mux2 i_psram_sub_i_2978(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [13]), .B(i_psram_sub_n_1862), .Z(i_psram_sub_n_3262)); - notech_reg_set i_psram_sub_axi_araddr_reg_13(.CP(s00_axi_aclk), .D(i_psram_sub_n_3262 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[13])); - notech_nand2 i_psram_sub_i_10338(.A(i_psram_sub_n_993), .B(i_psram_sub_n_558 - ), .Z(i_psram_sub_n_1598)); - notech_mux2 i_psram_sub_i_2970(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [12]), .B(i_psram_sub_n_1857), .Z(i_psram_sub_n_3256)); - notech_reg_set i_psram_sub_axi_araddr_reg_12(.CP(s00_axi_aclk), .D(i_psram_sub_n_3256 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[12])); - notech_nand2 i_psram_sub_i_11339(.A(i_psram_sub_n_992), .B(i_psram_sub_n_559 - ), .Z(i_psram_sub_n_1603)); - notech_mux2 i_psram_sub_i_2962(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [11]), .B(i_psram_sub_n_1852), .Z(i_psram_sub_n_3250)); - notech_reg_set i_psram_sub_axi_araddr_reg_11(.CP(s00_axi_aclk), .D(i_psram_sub_n_3250 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[11])); - notech_nand2 i_psram_sub_i_12340(.A(i_psram_sub_n_991), .B(i_psram_sub_n_560 - ), .Z(i_psram_sub_n_1608)); - notech_mux2 i_psram_sub_i_2954(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [10]), .B(i_psram_sub_n_1847), .Z(i_psram_sub_n_3244)); - notech_reg_set i_psram_sub_axi_araddr_reg_10(.CP(s00_axi_aclk), .D(i_psram_sub_n_3244 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[10])); - notech_nand2 i_psram_sub_i_13341(.A(i_psram_sub_n_990), .B(i_psram_sub_n_561 - ), .Z(i_psram_sub_n_1613)); - notech_mux2 i_psram_sub_i_2946(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [9]), .B(i_psram_sub_n_1842), .Z(i_psram_sub_n_3238)); - notech_reg_set i_psram_sub_axi_araddr_reg_9(.CP(s00_axi_aclk), .D(i_psram_sub_n_3238 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[9])); - notech_nand2 i_psram_sub_i_14342(.A(i_psram_sub_n_989), .B(i_psram_sub_n_562 - ), .Z(i_psram_sub_n_1618)); - notech_mux2 i_psram_sub_i_2938(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [8]), .B(i_psram_sub_n_1837), .Z(i_psram_sub_n_3232)); - notech_reg_set i_psram_sub_axi_araddr_reg_8(.CP(s00_axi_aclk), .D(i_psram_sub_n_3232 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[8])); - notech_nand2 i_psram_sub_i_15343(.A(i_psram_sub_n_988), .B(i_psram_sub_n_563 - ), .Z(i_psram_sub_n_1623)); - notech_mux2 i_psram_sub_i_2930(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [7]), .B(i_psram_sub_n_1832), .Z(i_psram_sub_n_3226)); - notech_reg_set i_psram_sub_axi_araddr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3226 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[7])); - notech_nand2 i_psram_sub_i_16344(.A(i_psram_sub_n_987), .B(i_psram_sub_n_565 - ), .Z(i_psram_sub_n_1628)); - notech_mux2 i_psram_sub_i_2922(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [6]), .B(i_psram_sub_n_1827), .Z(i_psram_sub_n_3220)); - notech_reg_set i_psram_sub_axi_araddr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3220 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[6])); - notech_ao4 i_psram_sub_i_811(.A(i_psram_sub_n_451), .B(i_psram_sub_n_985 - ), .C(i_psram_sub_n_961), .D(i_psram_sub_n_984), .Z(i_psram_sub_n_1639 - )); - notech_mux2 i_psram_sub_i_2914(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [5]), .B(i_psram_sub_n_1822), .Z(i_psram_sub_n_3214)); - notech_reg_set i_psram_sub_axi_araddr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3214 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[5])); - notech_nao3 i_psram_sub_i_798(.A(s00_axi_aresetn), .B(i_psram_sub_n_1205 - ), .C(i_psram_sub_n_975), .Z(i_psram_sub_n_2054)); - notech_mux2 i_psram_sub_i_2906(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [4]), .B(i_psram_sub_n_1817), .Z(i_psram_sub_n_3208)); - notech_reg_set i_psram_sub_axi_araddr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3208 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[4])); - notech_nao3 i_psram_sub_i_3896(.A(i_psram_sub_n_570), .B(i_psram_sub_n_372 - ), .C(i_psram_sub_n_571), .Z(i_psram_sub_state_5[2])); - notech_mux2 i_psram_sub_i_2898(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [3]), .B(i_psram_sub_n_1812), .Z(i_psram_sub_n_3202)); - notech_reg_set i_psram_sub_axi_araddr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3202 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[3])); - notech_nao3 i_psram_sub_i_2895(.A(i_psram_sub_n_1235), .B(i_psram_sub_n_574 - ), .C(i_psram_sub_n_573), .Z(i_psram_sub_state_5[1])); - notech_mux2 i_psram_sub_i_2889(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [2]), .B(i_psram_sub_n_1807), .Z(i_psram_sub_n_3196)); - notech_reg_set i_psram_sub_axi_araddr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3196 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[2])); - notech_ao4 i_psram_sub_i_1894(.A(i_psram_sub_n_1231), .B(i_psram_sub_axi_araddr - [1]), .C(i_psram_sub_n_377), .D(i_psram_sub_mem_idle), .Z(i_psram_sub_state_5 - [0])); - notech_mux2 i_psram_sub_i_2881(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [1]), .B(i_psram_sub_n_1802), .Z(i_psram_sub_n_3190)); - notech_reg_set i_psram_sub_axi_araddr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3190 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[1])); - notech_nao3 i_psram_sub_i_860(.A(i_psram_sub_n_954), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_382), .Z(\i_psram_sub_nbus_58[0] )); - notech_mux2 i_psram_sub_i_2873(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_araddr - [0]), .B(i_psram_sub_n_1797), .Z(i_psram_sub_n_3184)); - notech_reg_set i_psram_sub_axi_araddr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3184 - ), .SD(1'b1), .Q(i_psram_sub_axi_araddr[0])); - notech_nand3 i_psram_sub_i_862(.A(i_psram_sub_n_954), .B(s00_axi_aresetn - ), .C(i_psram_sub_n_416), .Z(\i_psram_sub_nbus_58[16] )); - notech_mux2 i_psram_sub_i_2865(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [7]), .B(i_psram_sub_n_912), .Z(i_psram_sub_n_3178)); - notech_reg_set i_psram_sub_axi_arlen_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3178 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[7])); - notech_nand3 i_psram_sub_i_1021(.A(s00_axi_aresetn), .B(i_psram_sub_n_569 - ), .C(i_psram_sub_n_449), .Z(i_psram_sub_n_2024)); - notech_mux2 i_psram_sub_i_2857(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [6]), .B(i_psram_sub_n_911), .Z(i_psram_sub_n_3172)); - notech_reg_set i_psram_sub_axi_arlen_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3172 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[6])); - notech_nand3 i_psram_sub_i_1113(.A(i_psram_sub_n_954), .B(i_psram_sub_n_374 - ), .C(s00_axi_aresetn), .Z(i_psram_sub_n_2173)); - notech_mux2 i_psram_sub_i_2849(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [5]), .B(i_psram_sub_n_910), .Z(i_psram_sub_n_3166)); - notech_reg_set i_psram_sub_axi_arlen_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3166 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[5])); - notech_nao3 i_psram_sub_i_1122(.A(s00_axi_aresetn), .B(i_psram_sub_n_1225 - ), .C(i_psram_sub_n_982), .Z(i_psram_sub_n_2198)); - notech_mux2 i_psram_sub_i_2841(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [4]), .B(i_psram_sub_n_909), .Z(i_psram_sub_n_3160)); - notech_reg_set i_psram_sub_axi_arlen_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3160 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[4])); - notech_nand3 i_psram_sub_i_957(.A(s00_axi_aresetn), .B(i_psram_sub_n_1225 - ), .C(i_psram_sub_n_982), .Z(i_psram_sub_n_1786)); - notech_mux2 i_psram_sub_i_2832(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [3]), .B(i_psram_sub_n_908), .Z(i_psram_sub_n_3154)); - notech_reg_set i_psram_sub_axi_arlen_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3154 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[3])); - notech_or4 i_psram_sub_i_922(.A(i_psram_sub_state[1]), .B(i_psram_sub_n_958 - ), .C(i_psram_sub_mem_idle), .D(i_psram_sub_state[2]), .Z(\i_psram_sub_nbus_56[0] - )); - notech_mux2 i_psram_sub_i_2824(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [2]), .B(i_psram_sub_n_907), .Z(i_psram_sub_n_3148)); - notech_reg_set i_psram_sub_axi_arlen_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3148 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[2])); - notech_nao3 i_psram_sub_i_1102(.A(s00_axi_aresetn), .B(i_psram_sub_n_1223 - ), .C(i_psram_sub_n_1222), .Z(i_psram_sub_n_2159)); - notech_mux2 i_psram_sub_i_2816(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [1]), .B(i_psram_sub_n_906), .Z(i_psram_sub_n_3142)); - notech_reg_set i_psram_sub_axi_arlen_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3142 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[1])); - notech_nand3 i_psram_sub_i_1002(.A(s00_axi_aresetn), .B(i_psram_sub_n_1222 - ), .C(i_psram_sub_n_1223), .Z(i_psram_sub_n_1970)); - notech_mux2 i_psram_sub_i_2808(.S(\i_psram_sub_nbus_67[0] ), .A(i_psram_sub_axi_arlen - [0]), .B(i_psram_sub_n_905), .Z(i_psram_sub_n_3136)); - notech_reg_set i_psram_sub_axi_arlen_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3136 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen[0])); - notech_nao3 i_psram_sub_i_1029(.A(i_psram_sub_n_985), .B(i_psram_sub_n_596 - ), .C(i_psram_sub_n_958), .Z(\i_psram_sub_nbus_64[0] )); - notech_mux2 i_psram_sub_i_2800(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [7]), .B(i_psram_sub_n_918), .Z(i_psram_sub_n_3130)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3130 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[7])); - notech_nand3 i_psram_sub_i_929(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_463), .Z(\i_psram_sub_nbus_60[0] )); - notech_mux2 i_psram_sub_i_2792(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [6]), .B(i_psram_sub_n_917), .Z(i_psram_sub_n_3124)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3124 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[6])); - notech_nand2 i_psram_sub_i_1007(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .Z(\i_psram_sub_nbus_63[0] )); - notech_mux2 i_psram_sub_i_2784(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [5]), .B(i_psram_sub_n_916), .Z(i_psram_sub_n_3118)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3118 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[5])); - notech_nand3 i_psram_sub_i_962(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_511), .Z(\i_psram_sub_nbus_61[0] )); - notech_mux2 i_psram_sub_i_2776(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [4]), .B(i_psram_sub_n_915), .Z(i_psram_sub_n_3112)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3112 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[4])); - notech_nand2 i_psram_sub_i_1085(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .Z(\i_psram_sub_nbus_67[0] )); - notech_mux2 i_psram_sub_i_2768(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [3]), .B(i_psram_sub_n_914), .Z(i_psram_sub_n_3106)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3106 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[3])); - notech_mux2 i_psram_sub_i_2759(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [2]), .B(i_psram_sub_n_4005), .Z(i_psram_sub_n_3100)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3100 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[2])); - notech_and2 i_psram_sub_i_1095(.A(s00_axi_aresetn), .B(i_psram_sub_n_569 - ), .Z(\i_psram_sub_nbus_68[0] )); - notech_mux2 i_psram_sub_i_2751(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [1]), .B(i_psram_sub_n_4003), .Z(i_psram_sub_n_3094)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_3094 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[1])); - notech_and4 i_psram_sub_i_765(.A(i_psram_sub_n_976), .B(i_psram_sub_n_972 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_952), .Z(i_psram_sub_go_7 - )); - notech_mux2 i_psram_sub_i_2743(.S(\i_psram_sub_nbus_61[0] ), .A(i_psram_sub_axi_arlen_cntr - [0]), .B(i_psram_sub_n_4030), .Z(i_psram_sub_n_3088)); - notech_reg_set i_psram_sub_axi_arlen_cntr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_3088 - ), .SD(1'b1), .Q(i_psram_sub_axi_arlen_cntr[0])); - notech_mux2 i_psram_sub_i_2735(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [15]), .B(i_psram_sub_n_1628), .Z(i_psram_sub_n_3082)); - notech_reg_set i_psram_sub_mem_data_wr_reg_15(.CP(s00_axi_aclk), .D(i_psram_sub_n_3082 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[15])); - notech_ao4 i_psram_sub_i_651(.A(i_psram_sub_mem_idle), .B(i_psram_sub_n_970 - ), .C(i_psram_sub_n_1231), .D(i_psram_sub_axi_araddr[1]), .Z(i_psram_sub_n_1235 - )); - notech_mux2 i_psram_sub_i_2727(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [14]), .B(i_psram_sub_n_1623), .Z(i_psram_sub_n_3076)); - notech_reg_set i_psram_sub_mem_data_wr_reg_14(.CP(s00_axi_aclk), .D(i_psram_sub_n_3076 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[14])); - notech_mux2 i_psram_sub_i_2719(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [13]), .B(i_psram_sub_n_1618), .Z(i_psram_sub_n_3070)); - notech_reg_set i_psram_sub_mem_data_wr_reg_13(.CP(s00_axi_aclk), .D(i_psram_sub_n_3070 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[13])); - notech_mux2 i_psram_sub_i_2711(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [12]), .B(i_psram_sub_n_1613), .Z(i_psram_sub_n_3064)); - notech_reg_set i_psram_sub_mem_data_wr_reg_12(.CP(s00_axi_aclk), .D(i_psram_sub_n_3064 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[12])); - notech_mux2 i_psram_sub_i_2703(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [11]), .B(i_psram_sub_n_1608), .Z(i_psram_sub_n_3058)); - notech_reg_set i_psram_sub_mem_data_wr_reg_11(.CP(s00_axi_aclk), .D(i_psram_sub_n_3058 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[11])); - notech_or4 i_psram_sub_i_86(.A(i_psram_sub_n_954), .B(i_psram_sub_n_4319 - ), .C(i_psram_sub_n_4024), .D(i_psram_sub_mem_idle), .Z(i_psram_sub_n_1231 - )); - notech_mux2 i_psram_sub_i_2694(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [10]), .B(i_psram_sub_n_1603), .Z(i_psram_sub_n_3052)); - notech_reg_set i_psram_sub_mem_data_wr_reg_10(.CP(s00_axi_aclk), .D(i_psram_sub_n_3052 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[10])); - notech_mux2 i_psram_sub_i_2686(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [9]), .B(i_psram_sub_n_1598), .Z(i_psram_sub_n_3046)); - notech_reg_set i_psram_sub_mem_data_wr_reg_9(.CP(s00_axi_aclk), .D(i_psram_sub_n_3046 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[9])); - notech_mux2 i_psram_sub_i_2678(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [8]), .B(i_psram_sub_n_1593), .Z(i_psram_sub_n_3040)); - notech_reg_set i_psram_sub_mem_data_wr_reg_8(.CP(s00_axi_aclk), .D(i_psram_sub_n_3040 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[8])); - notech_ao4 i_psram_sub_i_658(.A(i_psram_sub_n_974), .B(i_psram_sub_n_4319 - ), .C(i_psram_sub_n_979), .D(i_psram_sub_n_1227), .Z(i_psram_sub_n_1228 - )); - notech_mux2 i_psram_sub_i_2670(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [7]), .B(i_psram_sub_n_1588), .Z(i_psram_sub_n_3034)); - notech_reg_set i_psram_sub_mem_data_wr_reg_7(.CP(s00_axi_aclk), .D(i_psram_sub_n_3034 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[7])); - notech_or4 i_psram_sub_i_85(.A(i_psram_sub_state[1]), .B(i_psram_sub_state - [0]), .C(i_psram_sub_n_4027), .D(i_psram_sub_n_4319), .Z(i_psram_sub_n_1227 - )); - notech_mux2 i_psram_sub_i_2662(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [6]), .B(i_psram_sub_n_1583), .Z(i_psram_sub_n_3028)); - notech_reg_set i_psram_sub_mem_data_wr_reg_6(.CP(s00_axi_aclk), .D(i_psram_sub_n_3028 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[6])); - notech_mux2 i_psram_sub_i_2654(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [5]), .B(i_psram_sub_n_1578), .Z(i_psram_sub_n_3022)); - notech_reg_set i_psram_sub_mem_data_wr_reg_5(.CP(s00_axi_aclk), .D(i_psram_sub_n_3022 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[5])); - notech_nand2 i_psram_sub_i_47(.A(i_psram_sub_n_4024), .B(i_psram_sub_n_3991 - ), .Z(i_psram_sub_n_1225)); - notech_mux2 i_psram_sub_i_2646(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [4]), .B(i_psram_sub_n_1573), .Z(i_psram_sub_n_3016)); - notech_reg_set i_psram_sub_mem_data_wr_reg_4(.CP(s00_axi_aclk), .D(i_psram_sub_n_3016 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[4])); - notech_mux2 i_psram_sub_i_2638(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [3]), .B(i_psram_sub_n_1568), .Z(i_psram_sub_n_3010)); - notech_reg_set i_psram_sub_mem_data_wr_reg_3(.CP(s00_axi_aclk), .D(i_psram_sub_n_3010 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[3])); - notech_or2 i_psram_sub_i_44(.A(i_psram_sub_n_1006), .B(i_psram_sub_axi_awv_awr_flag - ), .Z(i_psram_sub_n_1223)); - notech_mux2 i_psram_sub_i_2630(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [2]), .B(i_psram_sub_n_1563), .Z(i_psram_sub_n_3004)); - notech_reg_set i_psram_sub_mem_data_wr_reg_2(.CP(s00_axi_aclk), .D(i_psram_sub_n_3004 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[2])); - notech_and4 i_psram_sub_i_77(.A(i_psram_sub_n_1213), .B(s00_axi_rvalid), - .C(s00_axi_rready), .D(i_psram_sub_n_3992), .Z(i_psram_sub_n_1222 - )); - notech_mux2 i_psram_sub_i_2622(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [1]), .B(i_psram_sub_n_1558), .Z(i_psram_sub_n_2998)); - notech_reg_set i_psram_sub_mem_data_wr_reg_1(.CP(s00_axi_aclk), .D(i_psram_sub_n_2998 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[1])); - notech_mux2 i_psram_sub_i_2614(.S(\i_psram_sub_nbus_56[0] ), .A(i_psram_sub_mem_data_wr - [0]), .B(i_psram_sub_n_1553), .Z(i_psram_sub_n_2992)); - notech_reg_set i_psram_sub_mem_data_wr_reg_0(.CP(s00_axi_aclk), .D(i_psram_sub_n_2992 - ), .SD(1'b1), .Q(i_psram_sub_mem_data_wr[0])); - notech_reg_set i_psram_sub_go_reg(.CP(s00_axi_aclk), .D(i_psram_sub_n_4002 - ), .SD(1'b1), .Q(i_psram_sub_go)); - notech_or4 i_psram_sub_i_673(.A(i_psram_sub_n_587), .B(i_psram_sub_n_586 - ), .C(i_psram_sub_n_1219), .D(i_psram_sub_n_1214), .Z(i_psram_sub_n_1220 - )); - notech_or4 i_psram_sub_i_669(.A(i_psram_sub_n_583), .B(i_psram_sub_n_582 - ), .C(i_psram_sub_n_585), .D(i_psram_sub_n_584), .Z(i_psram_sub_n_1219 - )); - notech_nand2 i_psram_sub_i_671(.A(i_psram_sub_n_589), .B(i_psram_sub_n_588 - ), .Z(i_psram_sub_n_1214)); - notech_and4 i_psram_sub_i_680(.A(i_psram_sub_n_1211), .B(i_psram_sub_n_1210 - ), .C(i_psram_sub_n_1208), .D(i_psram_sub_n_1207), .Z(i_psram_sub_n_1213 - )); - notech_ao4 i_psram_sub_i_674(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_n_4008 - ), .C(i_psram_sub_axi_arlen[1]), .D(i_psram_sub_n_4004), .Z(i_psram_sub_n_1211 - )); - notech_ao4 i_psram_sub_i_675(.A(i_psram_sub_axi_arlen[2]), .B(i_psram_sub_n_4006 - ), .C(i_psram_sub_axi_arlen[3]), .D(i_psram_sub_n_4007), .Z(i_psram_sub_n_1210 - )); - notech_ao4 i_psram_sub_i_677(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_n_4009 - ), .C(i_psram_sub_axi_arlen_cntr[5]), .D(i_psram_sub_n_4010), .Z - (i_psram_sub_n_1208)); - notech_ao4 i_psram_sub_i_678(.A(i_psram_sub_axi_arlen_cntr[6]), .B(i_psram_sub_n_4011 - ), .C(i_psram_sub_axi_arlen_cntr[7]), .D(i_psram_sub_n_4013), .Z - (i_psram_sub_n_1207)); - notech_ao4 i_psram_sub_i_682(.A(i_psram_sub_n_3995), .B(i_psram_sub_n_954 - ), .C(i_psram_sub_n_962), .D(i_psram_sub_n_1204), .Z(i_psram_sub_n_1205 - )); - notech_nand2 i_psram_sub_i_683(.A(i_psram_sub_command), .B(i_psram_sub_n_954 - ), .Z(i_psram_sub_n_1204)); - notech_ao4 i_psram_sub_i_685(.A(s00_axi_wstrb[0]), .B(i_psram_sub_n_971) - , .C(i_psram_sub_n_962), .D(i_psram_sub_n_1201), .Z(i_psram_sub_n_1202 - )); - notech_nand3 i_psram_sub_i_686(.A(s00_axi_aresetn), .B(i_psram_sub_n_954 - ), .C(i_psram_sub_mem_byte_en[0]), .Z(i_psram_sub_n_1201)); - notech_ao4 i_psram_sub_i_57(.A(i_psram_sub_n_3994), .B(i_psram_sub_n_980 - ), .C(i_psram_sub_n_3995), .D(i_psram_sub_n_1197), .Z(i_psram_sub_n_1198 - )); - notech_nao3 i_psram_sub_i_690(.A(i_psram_sub_n_568), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_954), .Z(i_psram_sub_n_1197)); - notech_ao4 i_psram_sub_i_689(.A(s00_axi_wstrb[1]), .B(i_psram_sub_n_971) - , .C(i_psram_sub_n_962), .D(i_psram_sub_n_1195), .Z(i_psram_sub_n_1196 - )); - notech_nand3 i_psram_sub_i_691(.A(s00_axi_aresetn), .B(i_psram_sub_n_954 - ), .C(i_psram_sub_mem_byte_en[1]), .Z(i_psram_sub_n_1195)); - notech_ao4 i_psram_sub_i_692(.A(i_psram_sub_n_969), .B(i_psram_sub_n_965 - ), .C(i_psram_sub_n_456), .D(i_psram_sub_n_4199), .Z(i_psram_sub_n_1194 - )); - notech_ao4 i_psram_sub_i_693(.A(i_psram_sub_n_455), .B(i_psram_sub_n_4176 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4105), .Z(i_psram_sub_n_1193 - )); - notech_ao4 i_psram_sub_i_694(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4200 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4177), .Z(i_psram_sub_n_1192 - )); - notech_ao4 i_psram_sub_i_695(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4154 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4106), .Z(i_psram_sub_n_1191 - )); - notech_ao4 i_psram_sub_i_696(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4201 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4178), .Z(i_psram_sub_n_1190 - )); - notech_ao4 i_psram_sub_i_697(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4155 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4107), .Z(i_psram_sub_n_1189 - )); - notech_ao4 i_psram_sub_i_698(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4202 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4179), .Z(i_psram_sub_n_1188 - )); - notech_ao4 i_psram_sub_i_699(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4156 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4108), .Z(i_psram_sub_n_1187 - )); - notech_ao4 i_psram_sub_i_700(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4203 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4180), .Z(i_psram_sub_n_1186 - )); - notech_ao4 i_psram_sub_i_701(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4157 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4109), .Z(i_psram_sub_n_1185 - )); - notech_ao4 i_psram_sub_i_702(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4204 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4181), .Z(i_psram_sub_n_1184 - )); - notech_ao4 i_psram_sub_i_703(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4158 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4110), .Z(i_psram_sub_n_1183 - )); - notech_ao4 i_psram_sub_i_704(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4205 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4182), .Z(i_psram_sub_n_1182 - )); - notech_ao4 i_psram_sub_i_705(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4159 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4111), .Z(i_psram_sub_n_1181 - )); - notech_ao4 i_psram_sub_i_706(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4206 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4183), .Z(i_psram_sub_n_1180 - )); - notech_ao4 i_psram_sub_i_707(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4160 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4112), .Z(i_psram_sub_n_1179 - )); - notech_ao4 i_psram_sub_i_708(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4207 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4184), .Z(i_psram_sub_n_1178 - )); - notech_ao4 i_psram_sub_i_709(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4161 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4113), .Z(i_psram_sub_n_1177 - )); - notech_ao4 i_psram_sub_i_710(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4208 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4185), .Z(i_psram_sub_n_1176 - )); - notech_ao4 i_psram_sub_i_711(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4162 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4114), .Z(i_psram_sub_n_1175 - )); - notech_ao4 i_psram_sub_i_712(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4209 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4186), .Z(i_psram_sub_n_1174 - )); - notech_ao4 i_psram_sub_i_713(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4163 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4115), .Z(i_psram_sub_n_1173 - )); - notech_ao4 i_psram_sub_i_714(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4210 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4187), .Z(i_psram_sub_n_1172 - )); - notech_ao4 i_psram_sub_i_715(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4164 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4116), .Z(i_psram_sub_n_1171 - )); - notech_ao4 i_psram_sub_i_716(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4211 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4188), .Z(i_psram_sub_n_1170 - )); - notech_ao4 i_psram_sub_i_717(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4165 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4117), .Z(i_psram_sub_n_1169 - )); - notech_ao4 i_psram_sub_i_718(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4212 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4189), .Z(i_psram_sub_n_1168 - )); - notech_ao4 i_psram_sub_i_719(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4166 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4118), .Z(i_psram_sub_n_1167 - )); - notech_ao4 i_psram_sub_i_720(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4213 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4190), .Z(i_psram_sub_n_1166 - )); - notech_ao4 i_psram_sub_i_721(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4167 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4119), .Z(i_psram_sub_n_1165 - )); - notech_ao4 i_psram_sub_i_722(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4214 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4191), .Z(i_psram_sub_n_1164 - )); - notech_ao4 i_psram_sub_i_723(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4168 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4120), .Z(i_psram_sub_n_1163 - )); - notech_ao4 i_psram_sub_i_724(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4215 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4192), .Z(i_psram_sub_n_1162 - )); - notech_ao4 i_psram_sub_i_725(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4169 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4121), .Z(i_psram_sub_n_1161 - )); - notech_ao4 i_psram_sub_i_726(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4216 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4193), .Z(i_psram_sub_n_1160 - )); - notech_ao4 i_psram_sub_i_727(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4170 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4122), .Z(i_psram_sub_n_1159 - )); - notech_ao4 i_psram_sub_i_728(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4217 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4194), .Z(i_psram_sub_n_1158 - )); - notech_ao4 i_psram_sub_i_729(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4171 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4123), .Z(i_psram_sub_n_1157 - )); - notech_ao4 i_psram_sub_i_730(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4218 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4195), .Z(i_psram_sub_n_1156 - )); - notech_ao4 i_psram_sub_i_731(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4172 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4124), .Z(i_psram_sub_n_1155 - )); - notech_ao4 i_psram_sub_i_732(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4219 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4196), .Z(i_psram_sub_n_1154 - )); - notech_ao4 i_psram_sub_i_733(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4173 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4125), .Z(i_psram_sub_n_1153 - )); - notech_ao4 i_psram_sub_i_734(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4220 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4197), .Z(i_psram_sub_n_1152 - )); - notech_ao4 i_psram_sub_i_735(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4174 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4126), .Z(i_psram_sub_n_1151 - )); - notech_ao4 i_psram_sub_i_736(.A(i_psram_sub_n_456), .B(i_psram_sub_n_4221 - ), .C(i_psram_sub_n_455), .D(i_psram_sub_n_4198), .Z(i_psram_sub_n_1150 - )); - notech_and2 i_psram_sub_i_48(.A(i_psram_sub_n_974), .B(i_psram_sub_n_960 - ), .Z(i_psram_sub_n_1149)); - notech_ao4 i_psram_sub_i_737(.A(i_psram_sub_n_972), .B(i_psram_sub_n_4175 - ), .C(i_psram_sub_n_957), .D(i_psram_sub_n_4127), .Z(i_psram_sub_n_1148 - )); - notech_ao4 i_psram_sub_i_738(.A(i_psram_sub_n_1101), .B(i_psram_sub_n_4128 - ), .C(i_psram_sub_n_1097), .D(i_psram_sub_n_4152), .Z(i_psram_sub_n_1147 - )); - notech_ao4 i_psram_sub_i_739(.A(i_psram_sub_n_4129), .B(i_psram_sub_n_1101 - ), .C(i_psram_sub_n_1097), .D(i_psram_sub_n_4153), .Z(i_psram_sub_n_1146 - )); - notech_ao4 i_psram_sub_i_740(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4260 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4130), .Z(i_psram_sub_n_1145 - )); - notech_ao4 i_psram_sub_i_741(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4154 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4381), .Z(i_psram_sub_n_1144 - )); - notech_ao4 i_psram_sub_i_742(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4261 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4131), .Z(i_psram_sub_n_1143 - )); - notech_ao4 i_psram_sub_i_743(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4155 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4380), .Z(i_psram_sub_n_1142 - )); - notech_ao4 i_psram_sub_i_744(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4262 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4132), .Z(i_psram_sub_n_1141 - )); - notech_ao4 i_psram_sub_i_745(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4156 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4379), .Z(i_psram_sub_n_1140 - )); - notech_ao4 i_psram_sub_i_746(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4263 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4133), .Z(i_psram_sub_n_1139 - )); - notech_ao4 i_psram_sub_i_747(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4157 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4378), .Z(i_psram_sub_n_1138 - )); - notech_ao4 i_psram_sub_i_749(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4264 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4134), .Z(i_psram_sub_n_1137 - )); - notech_ao4 i_psram_sub_i_750(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4158 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4377), .Z(i_psram_sub_n_1136 - )); - notech_ao4 i_psram_sub_i_751(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4265 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4135), .Z(i_psram_sub_n_1135 - )); - notech_ao4 i_psram_sub_i_752(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4159 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4376), .Z(i_psram_sub_n_1134 - )); - notech_ao4 i_psram_sub_i_753(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4266 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4136), .Z(i_psram_sub_n_1133 - )); - notech_ao4 i_psram_sub_i_754(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4160 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4375), .Z(i_psram_sub_n_1132 - )); - notech_ao4 i_psram_sub_i_755(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4267 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4137), .Z(i_psram_sub_n_1131 - )); - notech_ao4 i_psram_sub_i_756(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4161 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4374), .Z(i_psram_sub_n_1130 - )); - notech_ao4 i_psram_sub_i_757(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4268 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4138), .Z(i_psram_sub_n_1129 - )); - notech_ao4 i_psram_sub_i_758(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4162 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4373), .Z(i_psram_sub_n_1128 - )); - notech_ao4 i_psram_sub_i_759(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4269 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4139), .Z(i_psram_sub_n_1127 - )); - notech_ao4 i_psram_sub_i_760(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4163 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4372), .Z(i_psram_sub_n_1126 - )); - notech_ao4 i_psram_sub_i_761(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4270 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4140), .Z(i_psram_sub_n_1125 - )); - notech_ao4 i_psram_sub_i_762(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4164 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4371), .Z(i_psram_sub_n_1124 - )); - notech_ao4 i_psram_sub_i_763(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4271 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4141), .Z(i_psram_sub_n_1123 - )); - notech_ao4 i_psram_sub_i_764(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4165 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4370), .Z(i_psram_sub_n_1122 - )); - notech_ao4 i_psram_sub_i_766(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4272 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4142), .Z(i_psram_sub_n_1121 - )); - notech_ao4 i_psram_sub_i_767(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4166 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4369), .Z(i_psram_sub_n_1120 - )); - notech_ao4 i_psram_sub_i_768(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4273 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4143), .Z(i_psram_sub_n_1119 - )); - notech_ao4 i_psram_sub_i_769(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4167 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4368), .Z(i_psram_sub_n_1118 - )); - notech_ao4 i_psram_sub_i_770(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4274 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4144), .Z(i_psram_sub_n_1117 - )); - notech_ao4 i_psram_sub_i_771(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4168 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4367), .Z(i_psram_sub_n_1116 - )); - notech_ao4 i_psram_sub_i_772(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4275 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4145), .Z(i_psram_sub_n_1115 - )); - notech_ao4 i_psram_sub_i_773(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4169 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4366), .Z(i_psram_sub_n_1114 - )); - notech_ao4 i_psram_sub_i_774(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4276 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4146), .Z(i_psram_sub_n_1113 - )); - notech_ao4 i_psram_sub_i_775(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4170 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4365), .Z(i_psram_sub_n_1112 - )); - notech_ao4 i_psram_sub_i_776(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4277 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4147), .Z(i_psram_sub_n_1111 - )); - notech_ao4 i_psram_sub_i_777(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4171 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4364), .Z(i_psram_sub_n_1110 - )); - notech_ao4 i_psram_sub_i_778(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4278 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4148), .Z(i_psram_sub_n_1109 - )); - notech_ao4 i_psram_sub_i_779(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4172 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4363), .Z(i_psram_sub_n_1108 - )); - notech_ao4 i_psram_sub_i_780(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4279 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4149), .Z(i_psram_sub_n_1107 - )); - notech_ao4 i_psram_sub_i_781(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4173 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4362), .Z(i_psram_sub_n_1106 - )); - notech_ao4 i_psram_sub_i_782(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4280 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4150), .Z(i_psram_sub_n_1105 - )); - notech_ao4 i_psram_sub_i_783(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4174 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4361), .Z(i_psram_sub_n_1104 - )); - notech_ao4 i_psram_sub_i_784(.A(i_psram_sub_n_1102), .B(i_psram_sub_n_4281 - ), .C(i_psram_sub_n_1101), .D(i_psram_sub_n_4151), .Z(i_psram_sub_n_1103 - )); - notech_nand2 i_psram_sub_i_5(.A(s00_axi_aresetn), .B(i_psram_sub_n_3991) - , .Z(i_psram_sub_n_1102)); - notech_or4 i_psram_sub_i_8(.A(\i_psram_sub_nbus_63[0] ), .B(s00_axi_awburst - [0]), .C(i_psram_sub_n_3998), .D(i_psram_sub_n_4317), .Z(i_psram_sub_n_1101 - )); - notech_ao4 i_psram_sub_i_785(.A(i_psram_sub_n_1097), .B(i_psram_sub_n_4175 - ), .C(i_psram_sub_n_1095), .D(i_psram_sub_n_4360), .Z(i_psram_sub_n_1098 - )); - notech_nao3 i_psram_sub_i_9(.A(i_psram_sub_n_4317), .B(i_psram_sub_n_4316 - ), .C(\i_psram_sub_nbus_63[0] ), .Z(i_psram_sub_n_1097)); - notech_nand3 i_psram_sub_i_13(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_370), .Z(i_psram_sub_n_1095)); - notech_and4 i_psram_sub_i_491563(.A(i_psram_sub_n_1092), .B(i_psram_sub_n_1091 - ), .C(i_psram_sub_n_1089), .D(i_psram_sub_n_1088), .Z(i_psram_sub_n_1094 - )); - notech_ao4 i_psram_sub_i_789(.A(i_psram_sub_axi_awaddr[2]), .B(i_psram_sub_n_4359 - ), .C(i_psram_sub_axi_awaddr[3]), .D(i_psram_sub_n_4358), .Z(i_psram_sub_n_1092 - )); - notech_ao4 i_psram_sub_i_790(.A(i_psram_sub_axi_awaddr[4]), .B(i_psram_sub_n_4357 - ), .C(i_psram_sub_axi_awaddr[5]), .D(i_psram_sub_n_4356), .Z(i_psram_sub_n_1091 - )); - notech_ao4 i_psram_sub_i_792(.A(i_psram_sub_axi_awaddr[6]), .B(i_psram_sub_n_4355 - ), .C(i_psram_sub_axi_awaddr[7]), .D(i_psram_sub_n_4354), .Z(i_psram_sub_n_1089 - )); - notech_ao4 i_psram_sub_i_793(.A(i_psram_sub_axi_awaddr[8]), .B(i_psram_sub_n_4353 - ), .C(i_psram_sub_axi_awaddr[9]), .D(i_psram_sub_n_4352), .Z(i_psram_sub_n_1088 - )); - notech_ao4 i_psram_sub_i_22(.A(i_psram_sub_axi_awlen[3]), .B(i_psram_sub_n_4018 - ), .C(i_psram_sub_n_482), .D(i_psram_sub_n_481), .Z(i_psram_sub_n_1086 - )); - notech_nand2 i_psram_sub_i_806(.A(i_psram_sub_axi_awlen_cntr[0]), .B(i_psram_sub_n_4019 - ), .Z(i_psram_sub_n_1085)); - notech_nand2 i_psram_sub_i_807(.A(i_psram_sub_axi_awlen_cntr[0]), .B(i_psram_sub_n_4015 - ), .Z(i_psram_sub_n_1084)); - notech_and3 i_psram_sub_i_70(.A(i_psram_sub_axi_awlen_cntr[5]), .B(i_psram_sub_n_1081 - ), .C(i_psram_sub_axi_awlen_cntr[6]), .Z(i_psram_sub_n_1083)); - notech_and3 i_psram_sub_i_53(.A(i_psram_sub_axi_awlen_cntr[4]), .B(i_psram_sub_n_1080 - ), .C(i_psram_sub_axi_awlen_cntr[5]), .Z(i_psram_sub_n_1082)); - notech_ao3 i_psram_sub_i_46(.A(i_psram_sub_axi_awlen_cntr[4]), .B(i_psram_sub_axi_awlen_cntr - [3]), .C(i_psram_sub_n_1079), .Z(i_psram_sub_n_1081)); - notech_and4 i_psram_sub_i_40(.A(i_psram_sub_axi_awlen_cntr[0]), .B(i_psram_sub_axi_awlen_cntr - [1]), .C(i_psram_sub_axi_awlen_cntr[2]), .D(i_psram_sub_axi_awlen_cntr - [3]), .Z(i_psram_sub_n_1080)); - notech_nand3 i_psram_sub_i_101507(.A(i_psram_sub_axi_awlen_cntr[0]), .B(i_psram_sub_axi_awlen_cntr - [1]), .C(i_psram_sub_axi_awlen_cntr[2]), .Z(i_psram_sub_n_1079) - ); - notech_nand2 i_psram_sub_i_818(.A(i_psram_sub_axi_awlen_cntr[0]), .B(i_psram_sub_axi_awlen_cntr - [1]), .Z(i_psram_sub_n_1078)); - notech_nao3 i_psram_sub_i_472(.A(s00_axi_awvalid), .B(i_psram_sub_n_4399 - ), .C(i_psram_sub_axi_awv_awr_flag), .Z(i_psram_sub_n_1077)); - notech_ao4 i_psram_sub_i_826(.A(i_psram_sub_n_4080), .B(i_psram_sub_n_1029 - ), .C(i_psram_sub_n_1025), .D(i_psram_sub_n_4104), .Z(i_psram_sub_n_1075 - )); - notech_ao4 i_psram_sub_i_827(.A(i_psram_sub_n_1029), .B(i_psram_sub_n_4081 - ), .C(i_psram_sub_n_1025), .D(i_psram_sub_n_4105), .Z(i_psram_sub_n_1074 - )); - notech_ao4 i_psram_sub_i_828(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4238 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4082), .Z(i_psram_sub_n_1073 - )); - notech_ao4 i_psram_sub_i_829(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4106 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4351), .Z(i_psram_sub_n_1072 - )); - notech_ao4 i_psram_sub_i_830(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4239 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4083), .Z(i_psram_sub_n_1071 - )); - notech_ao4 i_psram_sub_i_831(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4107 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4350), .Z(i_psram_sub_n_1070 - )); - notech_ao4 i_psram_sub_i_832(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4240 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4084), .Z(i_psram_sub_n_1069 - )); - notech_ao4 i_psram_sub_i_833(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4108 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4349), .Z(i_psram_sub_n_1068 - )); - notech_ao4 i_psram_sub_i_834(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4241 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4085), .Z(i_psram_sub_n_1067 - )); - notech_ao4 i_psram_sub_i_835(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4109 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4348), .Z(i_psram_sub_n_1066 - )); - notech_ao4 i_psram_sub_i_836(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4242 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4086), .Z(i_psram_sub_n_1065 - )); - notech_ao4 i_psram_sub_i_837(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4110 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4347), .Z(i_psram_sub_n_1064 - )); - notech_ao4 i_psram_sub_i_838(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4243 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4087), .Z(i_psram_sub_n_1063 - )); - notech_ao4 i_psram_sub_i_839(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4111 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4346), .Z(i_psram_sub_n_1062 - )); - notech_ao4 i_psram_sub_i_840(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4244 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4088), .Z(i_psram_sub_n_1061 - )); - notech_ao4 i_psram_sub_i_841(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4112 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4345), .Z(i_psram_sub_n_1060 - )); - notech_ao4 i_psram_sub_i_842(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4245 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4089), .Z(i_psram_sub_n_1059 - )); - notech_ao4 i_psram_sub_i_843(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4113 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4344), .Z(i_psram_sub_n_1058 - )); - notech_ao4 i_psram_sub_i_844(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4246 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4090), .Z(i_psram_sub_n_1057 - )); - notech_ao4 i_psram_sub_i_845(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4114 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4343), .Z(i_psram_sub_n_1056 - )); - notech_ao4 i_psram_sub_i_846(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4247 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4091), .Z(i_psram_sub_n_1055 - )); - notech_ao4 i_psram_sub_i_847(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4115 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4342), .Z(i_psram_sub_n_1054 - )); - notech_ao4 i_psram_sub_i_848(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4248 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4092), .Z(i_psram_sub_n_1053 - )); - notech_ao4 i_psram_sub_i_849(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4116 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4341), .Z(i_psram_sub_n_1052 - )); - notech_ao4 i_psram_sub_i_863(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4249 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4093), .Z(i_psram_sub_n_1051 - )); - notech_ao4 i_psram_sub_i_864(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4117 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4340), .Z(i_psram_sub_n_1050 - )); - notech_ao4 i_psram_sub_i_865(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4250 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4094), .Z(i_psram_sub_n_1049 - )); - notech_ao4 i_psram_sub_i_866(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4118 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4339), .Z(i_psram_sub_n_1048 - )); - notech_ao4 i_psram_sub_i_867(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4251 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4095), .Z(i_psram_sub_n_1047 - )); - notech_ao4 i_psram_sub_i_868(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4119 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4338), .Z(i_psram_sub_n_1046 - )); - notech_ao4 i_psram_sub_i_869(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4252 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4096), .Z(i_psram_sub_n_1045 - )); - notech_ao4 i_psram_sub_i_870(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4120 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4337), .Z(i_psram_sub_n_1044 - )); - notech_ao4 i_psram_sub_i_871(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4253 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4097), .Z(i_psram_sub_n_1043 - )); - notech_ao4 i_psram_sub_i_872(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4121 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4336), .Z(i_psram_sub_n_1042 - )); - notech_ao4 i_psram_sub_i_873(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4254 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4098), .Z(i_psram_sub_n_1041 - )); - notech_ao4 i_psram_sub_i_874(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4122 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4335), .Z(i_psram_sub_n_1040 - )); - notech_ao4 i_psram_sub_i_875(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4255 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4099), .Z(i_psram_sub_n_1039 - )); - notech_ao4 i_psram_sub_i_876(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4123 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4334), .Z(i_psram_sub_n_1038 - )); - notech_ao4 i_psram_sub_i_877(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4256 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4100), .Z(i_psram_sub_n_1037 - )); - notech_ao4 i_psram_sub_i_878(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4124 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4333), .Z(i_psram_sub_n_1036 - )); - notech_ao4 i_psram_sub_i_879(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4257 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4101), .Z(i_psram_sub_n_1035 - )); - notech_ao4 i_psram_sub_i_880(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4125 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4332), .Z(i_psram_sub_n_1034 - )); - notech_ao4 i_psram_sub_i_881(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4258 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4102), .Z(i_psram_sub_n_1033 - )); - notech_ao4 i_psram_sub_i_882(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4126 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4331), .Z(i_psram_sub_n_1032 - )); - notech_ao4 i_psram_sub_i_883(.A(i_psram_sub_n_1030), .B(i_psram_sub_n_4259 - ), .C(i_psram_sub_n_1029), .D(i_psram_sub_n_4103), .Z(i_psram_sub_n_1031 - )); - notech_nand2 i_psram_sub_i_6(.A(s00_axi_aresetn), .B(i_psram_sub_n_3990) - , .Z(i_psram_sub_n_1030)); - notech_or4 i_psram_sub_i_7(.A(\i_psram_sub_nbus_67[0] ), .B(s00_axi_arburst - [0]), .C(i_psram_sub_n_3999), .D(i_psram_sub_n_4318), .Z(i_psram_sub_n_1029 - )); - notech_ao4 i_psram_sub_i_884(.A(i_psram_sub_n_1025), .B(i_psram_sub_n_4127 - ), .C(i_psram_sub_n_1023), .D(i_psram_sub_n_4330), .Z(i_psram_sub_n_1026 - )); - notech_or4 i_psram_sub_i_10(.A(s00_axi_arburst[0]), .B(i_psram_sub_n_4319 - ), .C(s00_axi_arburst[1]), .D(i_psram_sub_n_3990), .Z(i_psram_sub_n_1025 - )); - notech_nand3 i_psram_sub_i_15(.A(i_psram_sub_n_1006), .B(s00_axi_aresetn - ), .C(i_psram_sub_n_371), .Z(i_psram_sub_n_1023)); - notech_and4 i_psram_sub_i_49(.A(i_psram_sub_n_1020), .B(i_psram_sub_n_1019 - ), .C(i_psram_sub_n_1017), .D(i_psram_sub_n_1016), .Z(i_psram_sub_n_1022 - )); - notech_ao4 i_psram_sub_i_888(.A(i_psram_sub_axi_araddr[2]), .B(i_psram_sub_n_4329 - ), .C(i_psram_sub_axi_araddr[3]), .D(i_psram_sub_n_4328), .Z(i_psram_sub_n_1020 - )); - notech_ao4 i_psram_sub_i_889(.A(i_psram_sub_axi_araddr[4]), .B(i_psram_sub_n_4327 - ), .C(i_psram_sub_axi_araddr[5]), .D(i_psram_sub_n_4326), .Z(i_psram_sub_n_1019 - )); - notech_ao4 i_psram_sub_i_891(.A(i_psram_sub_axi_araddr[6]), .B(i_psram_sub_n_4325 - ), .C(i_psram_sub_axi_araddr[7]), .D(i_psram_sub_n_4324), .Z(i_psram_sub_n_1017 - )); - notech_ao4 i_psram_sub_i_892(.A(i_psram_sub_axi_araddr[8]), .B(i_psram_sub_n_4323 - ), .C(i_psram_sub_axi_araddr[9]), .D(i_psram_sub_n_4322), .Z(i_psram_sub_n_1016 - )); - notech_ao4 i_psram_sub_i_21(.A(i_psram_sub_axi_arlen[3]), .B(i_psram_sub_n_4007 - ), .C(i_psram_sub_n_525), .D(i_psram_sub_n_584), .Z(i_psram_sub_n_1015 - )); - notech_nand2 i_psram_sub_i_909(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_n_4004 - ), .Z(i_psram_sub_n_1013)); - notech_and3 i_psram_sub_i_69(.A(i_psram_sub_axi_arlen_cntr[5]), .B(i_psram_sub_n_1010 - ), .C(i_psram_sub_axi_arlen_cntr[6]), .Z(i_psram_sub_n_1012)); - notech_and3 i_psram_sub_i_52(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_n_1009 - ), .C(i_psram_sub_axi_arlen_cntr[5]), .Z(i_psram_sub_n_1011)); - notech_ao3 i_psram_sub_i_45(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_axi_arlen_cntr - [3]), .C(i_psram_sub_n_1008), .Z(i_psram_sub_n_1010)); - notech_and4 i_psram_sub_i_36(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_axi_arlen_cntr - [1]), .C(i_psram_sub_axi_arlen_cntr[2]), .D(i_psram_sub_axi_arlen_cntr - [3]), .Z(i_psram_sub_n_1009)); - notech_nand3 i_psram_sub_i_101456(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_axi_arlen_cntr - [1]), .C(i_psram_sub_axi_arlen_cntr[2]), .Z(i_psram_sub_n_1008) - ); - notech_nand2 i_psram_sub_i_923(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_axi_arlen_cntr - [1]), .Z(i_psram_sub_n_1007)); - notech_nao3 i_psram_sub_i_490(.A(s00_axi_arvalid), .B(i_psram_sub_n_4024 - ), .C(s00_axi_arready), .Z(i_psram_sub_n_1006)); - notech_ao4 i_psram_sub_i_925(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4064 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4222), .Z(i_psram_sub_n_1004 - )); - notech_ao4 i_psram_sub_i_932(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4065 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4223), .Z(i_psram_sub_n_1001 - )); - notech_ao4 i_psram_sub_i_933(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4066 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4224), .Z(i_psram_sub_n_1000 - )); - notech_ao4 i_psram_sub_i_934(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4067 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4225), .Z(i_psram_sub_n_999 - )); - notech_ao4 i_psram_sub_i_935(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4068 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4226), .Z(i_psram_sub_n_998 - )); - notech_ao4 i_psram_sub_i_936(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4069 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4227), .Z(i_psram_sub_n_997 - )); - notech_ao4 i_psram_sub_i_937(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4070 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4228), .Z(i_psram_sub_n_996 - )); - notech_ao4 i_psram_sub_i_938(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4071 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4229), .Z(i_psram_sub_n_995 - )); - notech_ao4 i_psram_sub_i_939(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4072 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4230), .Z(i_psram_sub_n_994 - )); - notech_ao4 i_psram_sub_i_940(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4073 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4231), .Z(i_psram_sub_n_993 - )); - notech_ao4 i_psram_sub_i_941(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4074 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4232), .Z(i_psram_sub_n_992 - )); - notech_ao4 i_psram_sub_i_942(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4075 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4233), .Z(i_psram_sub_n_991 - )); - notech_ao4 i_psram_sub_i_943(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4076 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4234), .Z(i_psram_sub_n_990 - )); - notech_ao4 i_psram_sub_i_944(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4077 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4235), .Z(i_psram_sub_n_989 - )); - notech_ao4 i_psram_sub_i_945(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4078 - ), .C(i_psram_sub_n_971), .D(i_psram_sub_n_4236), .Z(i_psram_sub_n_988 - )); - notech_ao4 i_psram_sub_i_946(.A(i_psram_sub_n_564), .B(i_psram_sub_n_4079 - ), .C(i_psram_sub_n_4237), .D(i_psram_sub_n_971), .Z(i_psram_sub_n_987 - )); - notech_nao3 i_psram_sub_i_947(.A(i_psram_sub_n_954), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_985), .Z(i_psram_sub_n_986)); - notech_nand2 i_psram_sub_i_61438(.A(i_psram_sub_n_4027), .B(i_psram_sub_n_4025 - ), .Z(i_psram_sub_n_985)); - notech_nand3 i_psram_sub_i_83(.A(i_psram_sub_n_954), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_3994), .Z(i_psram_sub_n_984)); - notech_nand2 i_psram_sub_i_68(.A(s00_axi_wready), .B(s00_axi_wlast), .Z(i_psram_sub_n_982 - )); - notech_nand3 i_psram_sub_i_73(.A(i_psram_sub_n_954), .B(i_psram_sub_n_979 - ), .C(s00_axi_aresetn), .Z(i_psram_sub_n_980)); - notech_and2 i_psram_sub_i_35(.A(i_psram_sub_mem_idle), .B(i_psram_sub_n_4398 - ), .Z(i_psram_sub_n_979)); - notech_nand3 i_psram_sub_i_87(.A(i_psram_sub_n_954), .B(i_psram_sub_n_975 - ), .C(s00_axi_aresetn), .Z(i_psram_sub_n_976)); - notech_and4 i_psram_sub_i_67(.A(i_psram_sub_state[1]), .B(i_psram_sub_n_4027 - ), .C(i_psram_sub_state[0]), .D(i_psram_sub_mem_idle), .Z(i_psram_sub_n_975 - )); - notech_nand3 i_psram_sub_i_61441(.A(i_psram_sub_state[1]), .B(i_psram_sub_n_4027 - ), .C(i_psram_sub_state[0]), .Z(i_psram_sub_n_974)); - notech_and2 i_psram_sub_i_14(.A(i_psram_sub_n_971), .B(i_psram_sub_n_970 - ), .Z(i_psram_sub_n_972)); - notech_or4 i_psram_sub_i_75(.A(i_psram_sub_n_954), .B(i_psram_sub_n_4319 - ), .C(i_psram_sub_n_968), .D(i_psram_sub_n_3996), .Z(i_psram_sub_n_971 - )); - notech_or4 i_psram_sub_i_65(.A(i_psram_sub_n_954), .B(i_psram_sub_n_4319 - ), .C(i_psram_sub_n_968), .D(i_psram_sub_n_965), .Z(i_psram_sub_n_970 - )); - notech_nao3 i_psram_sub_i_51(.A(s00_axi_aresetn), .B(i_psram_sub_n_3995) - , .C(i_psram_sub_n_954), .Z(i_psram_sub_n_969)); - notech_or4 i_psram_sub_i_25(.A(s00_axi_wready), .B(i_psram_sub_n_4029), - .C(i_psram_sub_axi_arv_arr_flag), .D(i_psram_sub_n_4321), .Z(i_psram_sub_n_968 - )); - notech_or2 i_psram_sub_i_71446(.A(s00_axi_wstrb[0]), .B(s00_axi_wstrb[1] - ), .Z(i_psram_sub_n_965)); - notech_nand3 i_psram_sub_i_88(.A(i_psram_sub_n_954), .B(i_psram_sub_n_962 - ), .C(s00_axi_aresetn), .Z(i_psram_sub_n_963)); - notech_ao3 i_psram_sub_i_20(.A(i_psram_sub_n_961), .B(i_psram_sub_state[ - 0]), .C(i_psram_sub_n_959), .Z(i_psram_sub_n_962)); - notech_nand2 i_psram_sub_i_74(.A(i_psram_sub_n_4314), .B(i_psram_sub_n_4315 - ), .Z(i_psram_sub_n_961)); - notech_nao3 i_psram_sub_i_61435(.A(i_psram_sub_n_4027), .B(i_psram_sub_state - [0]), .C(i_psram_sub_state[1]), .Z(i_psram_sub_n_960)); - notech_or2 i_psram_sub_i_965(.A(i_psram_sub_state[1]), .B(i_psram_sub_state - [2]), .Z(i_psram_sub_n_959)); - notech_nand2 i_psram_sub_i_0(.A(i_psram_sub_n_954), .B(s00_axi_aresetn), - .Z(i_psram_sub_n_958)); - notech_or4 i_psram_sub_i_89(.A(i_psram_sub_n_954), .B(s00_axi_rvalid), .C - (i_psram_sub_n_4319), .D(i_psram_sub_n_4024), .Z(i_psram_sub_n_957 - )); - notech_or4 i_psram_sub_i_1(.A(i_psram_sub_state[1]), .B(i_psram_sub_state - [0]), .C(i_psram_sub_state[2]), .D(i_psram_sub_n_4319), .Z(i_psram_sub_n_955 - )); - notech_nao3 i_psram_sub_i_61588(.A(i_psram_sub_n_4025), .B(i_psram_sub_n_4027 - ), .C(i_psram_sub_state[1]), .Z(i_psram_sub_n_954)); - notech_nao3 i_psram_sub_i_649(.A(i_psram_sub_n_962), .B(i_psram_sub_mem_idle - ), .C(i_psram_sub_n_958), .Z(i_psram_sub_n_952)); - notech_or4 i_psram_sub_i_161596(.A(i_psram_sub_state[1]), .B(i_psram_sub_state - [0]), .C(i_psram_sub_n_980), .D(i_psram_sub_n_4027), .Z(i_psram_sub_n_951 - )); - notech_and3 i_psram_sub_i_81056(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_360), .Z(i_psram_sub_n_918)); - notech_and3 i_psram_sub_i_71055(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_361), .Z(i_psram_sub_n_917)); - notech_and3 i_psram_sub_i_61054(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_362), .Z(i_psram_sub_n_916)); - notech_and3 i_psram_sub_i_51053(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_363), .Z(i_psram_sub_n_915)); - notech_and3 i_psram_sub_i_41052(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_n_364), .Z(i_psram_sub_n_914)); - notech_nao3 i_psram_sub_i_11049(.A(s00_axi_aresetn), .B(i_psram_sub_n_1006 - ), .C(i_psram_sub_axi_arlen_cntr[0]), .Z(i_psram_sub_n_913)); - notech_and2 i_psram_sub_i_81032(.A(s00_axi_arlen[7]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_912)); - notech_and2 i_psram_sub_i_71031(.A(s00_axi_arlen[6]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_911)); - notech_and2 i_psram_sub_i_61030(.A(s00_axi_arlen[5]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_910)); - notech_and2 i_psram_sub_i_51029(.A(s00_axi_arlen[4]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_909)); - notech_and2 i_psram_sub_i_41028(.A(s00_axi_arlen[3]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_908)); - notech_and2 i_psram_sub_i_31027(.A(s00_axi_arlen[2]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_907)); - notech_and2 i_psram_sub_i_21026(.A(s00_axi_arlen[1]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_906)); - notech_and2 i_psram_sub_i_11025(.A(s00_axi_arlen[0]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_905)); - notech_xor2 i_psram_sub_i_93(.A(i_psram_sub_axi_arlen_cntr[7]), .B(i_psram_sub_n_1012 - ), .Z(i_psram_sub_n_360)); - notech_xor2 i_psram_sub_i_94(.A(i_psram_sub_axi_arlen_cntr[6]), .B(i_psram_sub_n_1011 - ), .Z(i_psram_sub_n_361)); - notech_xor2 i_psram_sub_i_95(.A(i_psram_sub_axi_arlen_cntr[5]), .B(i_psram_sub_n_1010 - ), .Z(i_psram_sub_n_362)); - notech_xor2 i_psram_sub_i_96(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_n_1009 - ), .Z(i_psram_sub_n_363)); - notech_xor2 i_psram_sub_i_97(.A(i_psram_sub_n_4007), .B(i_psram_sub_n_1008 - ), .Z(i_psram_sub_n_364)); - notech_xor2 i_psram_sub_i_99(.A(i_psram_sub_axi_awlen_cntr[7]), .B(i_psram_sub_n_1083 - ), .Z(i_psram_sub_n_365)); - notech_xor2 i_psram_sub_i_100(.A(i_psram_sub_axi_awlen_cntr[6]), .B(i_psram_sub_n_1082 - ), .Z(i_psram_sub_n_366)); - notech_xor2 i_psram_sub_i_101(.A(i_psram_sub_axi_awlen_cntr[5]), .B(i_psram_sub_n_1081 - ), .Z(i_psram_sub_n_367)); - notech_xor2 i_psram_sub_i_102(.A(i_psram_sub_axi_awlen_cntr[4]), .B(i_psram_sub_n_1080 - ), .Z(i_psram_sub_n_368)); - notech_xor2 i_psram_sub_i_103(.A(i_psram_sub_n_4018), .B(i_psram_sub_n_1079 - ), .Z(i_psram_sub_n_369)); - notech_or2 i_psram_sub_i_106(.A(s00_axi_awburst[0]), .B(i_psram_sub_n_462 - ), .Z(i_psram_sub_n_370)); - notech_or2 i_psram_sub_i_107(.A(s00_axi_arburst[0]), .B(i_psram_sub_n_510 - ), .Z(i_psram_sub_n_371)); - notech_nao3 i_psram_sub_i_112(.A(i_psram_sub_mem_idle), .B(s00_axi_aresetn - ), .C(i_psram_sub_n_974), .Z(i_psram_sub_n_372)); - notech_nao3 i_psram_sub_i_62(.A(i_psram_sub_n_974), .B(i_psram_sub_n_985 - ), .C(i_psram_sub_n_3994), .Z(i_psram_sub_n_374)); - notech_or2 i_psram_sub_i_118(.A(i_psram_sub_state[0]), .B(i_psram_sub_n_4398 - ), .Z(i_psram_sub_n_375)); - notech_ao4 i_psram_sub_i_91(.A(i_psram_sub_n_969), .B(i_psram_sub_n_3996 - ), .C(i_psram_sub_n_4319), .D(i_psram_sub_n_1149), .Z(i_psram_sub_n_377 - )); - notech_mux2 i_psram_sub_i_124(.S(i_psram_sub_state[0]), .A(i_psram_sub_state - [2]), .B(i_psram_sub_n_959), .Z(i_psram_sub_n_382)); - notech_and3 i_psram_sub_i_3(.A(i_psram_sub_n_1227), .B(i_psram_sub_n_955 - ), .C(i_psram_sub_n_576), .Z(i_psram_sub_n_413)); - notech_nao3 i_psram_sub_i_159(.A(i_psram_sub_n_985), .B(i_psram_sub_n_417 - ), .C(i_psram_sub_n_3994), .Z(i_psram_sub_n_416)); - notech_nand2 i_psram_sub_i_76(.A(i_psram_sub_mem_idle), .B(i_psram_sub_n_4027 - ), .Z(i_psram_sub_n_417)); - notech_and2 i_psram_sub_i_4(.A(i_psram_sub_n_1228), .B(i_psram_sub_n_955 - ), .Z(i_psram_sub_n_448)); - notech_nand2 i_psram_sub_i_192(.A(s00_axi_bvalid), .B(s00_axi_bready), .Z - (i_psram_sub_n_449)); - notech_and2 i_psram_sub_i_92(.A(i_psram_sub_n_980), .B(i_psram_sub_n_452 - ), .Z(i_psram_sub_n_451)); - notech_nand3 i_psram_sub_i_194(.A(i_psram_sub_n_954), .B(s00_axi_wready) - , .C(s00_axi_aresetn), .Z(i_psram_sub_n_452)); - notech_and2 i_psram_sub_i_12(.A(i_psram_sub_n_976), .B(i_psram_sub_n_963 - ), .Z(i_psram_sub_n_455)); - notech_ao4 i_psram_sub_i_11(.A(i_psram_sub_n_958), .B(i_psram_sub_n_3993 - ), .C(i_psram_sub_n_961), .D(i_psram_sub_n_984), .Z(i_psram_sub_n_456 - )); - notech_ao4 i_psram_sub_i_105(.A(i_psram_sub_n_959), .B(i_psram_sub_n_4025 - ), .C(i_psram_sub_n_974), .D(i_psram_sub_n_4320), .Z(i_psram_sub_n_458 - )); - notech_nao3 i_psram_sub_i_310(.A(s00_axi_aresetn), .B(s00_axi_awaddr[0]) - , .C(i_psram_sub_n_1077), .Z(i_psram_sub_n_460)); - notech_nao3 i_psram_sub_i_313(.A(s00_axi_aresetn), .B(s00_axi_awaddr[1]) - , .C(i_psram_sub_n_1077), .Z(i_psram_sub_n_461)); - notech_and2 i_psram_sub_i_402(.A(s00_axi_awburst[1]), .B(i_psram_sub_n_3998 - ), .Z(i_psram_sub_n_462)); - notech_nao3 i_psram_sub_i_416(.A(s00_axi_wvalid), .B(s00_axi_wready), .C - (i_psram_sub_n_464), .Z(i_psram_sub_n_463)); - notech_ao4 i_psram_sub_i_82(.A(i_psram_sub_axi_awlen_cntr[7]), .B(i_psram_sub_n_4023 - ), .C(i_psram_sub_n_467), .D(i_psram_sub_n_466), .Z(i_psram_sub_n_464 - )); - notech_and2 i_psram_sub_i_27(.A(i_psram_sub_axi_awlen_cntr[7]), .B(i_psram_sub_n_4023 - ), .Z(i_psram_sub_n_466)); - notech_ao4 i_psram_sub_i_72(.A(i_psram_sub_axi_awlen_cntr[6]), .B(i_psram_sub_n_4022 - ), .C(i_psram_sub_n_471), .D(i_psram_sub_n_470), .Z(i_psram_sub_n_467 - )); - notech_and2 i_psram_sub_i_29(.A(i_psram_sub_axi_awlen_cntr[6]), .B(i_psram_sub_n_4022 - ), .Z(i_psram_sub_n_470)); - notech_ao4 i_psram_sub_i_64(.A(i_psram_sub_axi_awlen_cntr[5]), .B(i_psram_sub_n_4021 - ), .C(i_psram_sub_n_475), .D(i_psram_sub_n_474), .Z(i_psram_sub_n_471 - )); - notech_and2 i_psram_sub_i_33(.A(i_psram_sub_axi_awlen_cntr[5]), .B(i_psram_sub_n_4021 - ), .Z(i_psram_sub_n_474)); - notech_ao4 i_psram_sub_i_59(.A(i_psram_sub_axi_awlen_cntr[4]), .B(i_psram_sub_n_4000 - ), .C(i_psram_sub_n_478), .D(i_psram_sub_n_4020), .Z(i_psram_sub_n_475 - )); - notech_and2 i_psram_sub_i_55(.A(i_psram_sub_axi_awlen_cntr[4]), .B(i_psram_sub_n_4000 - ), .Z(i_psram_sub_n_478)); - notech_and2 i_psram_sub_i_31(.A(i_psram_sub_axi_awlen[3]), .B(i_psram_sub_n_4018 - ), .Z(i_psram_sub_n_481)); - notech_ao4 i_psram_sub_i_109(.A(i_psram_sub_axi_awlen[2]), .B(i_psram_sub_n_4017 - ), .C(i_psram_sub_n_486), .D(i_psram_sub_n_485), .Z(i_psram_sub_n_482 - )); - notech_and2 i_psram_sub_i_42(.A(i_psram_sub_axi_awlen[2]), .B(i_psram_sub_n_4017 - ), .Z(i_psram_sub_n_485)); - notech_ao4 i_psram_sub_i_79(.A(i_psram_sub_axi_awlen[1]), .B(i_psram_sub_n_4015 - ), .C(i_psram_sub_n_489), .D(i_psram_sub_n_1085), .Z(i_psram_sub_n_486 - )); - notech_and2 i_psram_sub_i_61(.A(i_psram_sub_axi_awlen[1]), .B(i_psram_sub_n_4015 - ), .Z(i_psram_sub_n_489)); - notech_mux2 i_psram_sub_i_104(.S(i_psram_sub_axi_awlen_cntr[2]), .A(i_psram_sub_n_1078 - ), .B(i_psram_sub_axi_awlen_cntr[1]), .Z(i_psram_sub_n_494)); - notech_nao3 i_psram_sub_i_457(.A(s00_axi_araddr[0]), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_1006), .Z(i_psram_sub_n_508)); - notech_nao3 i_psram_sub_i_460(.A(s00_axi_araddr[1]), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_1006), .Z(i_psram_sub_n_509)); - notech_and2 i_psram_sub_i_558(.A(s00_axi_arburst[1]), .B(i_psram_sub_n_3999 - ), .Z(i_psram_sub_n_510)); - notech_nao3 i_psram_sub_i_567(.A(s00_axi_rvalid), .B(s00_axi_rready), .C - (i_psram_sub_n_512), .Z(i_psram_sub_n_511)); - notech_ao4 i_psram_sub_i_90(.A(i_psram_sub_axi_arlen_cntr[7]), .B(i_psram_sub_n_4013 - ), .C(i_psram_sub_n_514), .D(i_psram_sub_n_582), .Z(i_psram_sub_n_512 - )); - notech_ao4 i_psram_sub_i_81(.A(i_psram_sub_axi_arlen_cntr[6]), .B(i_psram_sub_n_4011 - ), .C(i_psram_sub_n_517), .D(i_psram_sub_n_583), .Z(i_psram_sub_n_514 - )); - notech_ao4 i_psram_sub_i_71(.A(i_psram_sub_axi_arlen_cntr[5]), .B(i_psram_sub_n_4010 - ), .C(i_psram_sub_n_520), .D(i_psram_sub_n_585), .Z(i_psram_sub_n_517 - )); - notech_ao4 i_psram_sub_i_63(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_n_4009 - ), .C(i_psram_sub_n_587), .D(i_psram_sub_n_4001), .Z(i_psram_sub_n_520 - )); - notech_ao4 i_psram_sub_i_108(.A(i_psram_sub_axi_arlen[2]), .B(i_psram_sub_n_4006 - ), .C(i_psram_sub_n_528), .D(i_psram_sub_n_586), .Z(i_psram_sub_n_525 - )); - notech_ao4 i_psram_sub_i_78(.A(i_psram_sub_axi_arlen[1]), .B(i_psram_sub_n_4004 - ), .C(i_psram_sub_n_3997), .D(i_psram_sub_n_589), .Z(i_psram_sub_n_528 - )); - notech_mux2 i_psram_sub_i_98(.S(i_psram_sub_axi_arlen_cntr[2]), .A(i_psram_sub_n_1007 - ), .B(i_psram_sub_axi_arlen_cntr[1]), .Z(i_psram_sub_n_535)); - notech_nand2 i_psram_sub_i_600(.A(s00_axi_wdata[16]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_549)); - notech_nand2 i_psram_sub_i_603(.A(s00_axi_wdata[17]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_550)); - notech_nand2 i_psram_sub_i_606(.A(s00_axi_wdata[18]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_551)); - notech_nand2 i_psram_sub_i_609(.A(s00_axi_wdata[19]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_552)); - notech_nand2 i_psram_sub_i_612(.A(s00_axi_wdata[20]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_553)); - notech_nand2 i_psram_sub_i_615(.A(s00_axi_wdata[21]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_554)); - notech_nand2 i_psram_sub_i_618(.A(s00_axi_wdata[22]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_555)); - notech_nand2 i_psram_sub_i_621(.A(s00_axi_wdata[23]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_556)); - notech_nand2 i_psram_sub_i_624(.A(s00_axi_wdata[24]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_557)); - notech_nand2 i_psram_sub_i_627(.A(s00_axi_wdata[25]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_558)); - notech_nand2 i_psram_sub_i_630(.A(s00_axi_wdata[26]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_559)); - notech_nand2 i_psram_sub_i_633(.A(s00_axi_wdata[27]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_560)); - notech_nand2 i_psram_sub_i_636(.A(s00_axi_wdata[28]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_561)); - notech_nand2 i_psram_sub_i_639(.A(s00_axi_wdata[29]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_562)); - notech_nand2 i_psram_sub_i_642(.A(s00_axi_wdata[30]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_563)); - notech_ao4 i_psram_sub_i_18(.A(i_psram_sub_n_979), .B(i_psram_sub_n_986) - , .C(i_psram_sub_n_961), .D(i_psram_sub_n_984), .Z(i_psram_sub_n_564 - )); - notech_nand2 i_psram_sub_i_645(.A(s00_axi_wdata[31]), .B(i_psram_sub_n_566 - ), .Z(i_psram_sub_n_565)); - notech_nand2 i_psram_sub_i_2(.A(i_psram_sub_n_970), .B(i_psram_sub_n_963 - ), .Z(i_psram_sub_n_566)); - notech_or2 i_psram_sub_i_647(.A(s00_axi_rvalid), .B(i_psram_sub_n_4024), - .Z(i_psram_sub_n_568)); - notech_or4 i_psram_sub_i_648(.A(s00_axi_bvalid), .B(i_psram_sub_n_982), - .C(i_psram_sub_n_4029), .D(i_psram_sub_n_4321), .Z(i_psram_sub_n_569 - )); - notech_or4 i_psram_sub_i_110(.A(i_psram_sub_n_955), .B(i_psram_sub_mem_idle - ), .C(i_psram_sub_n_4024), .D(i_psram_sub_n_4105), .Z(i_psram_sub_n_570 - )); - notech_nor2 i_psram_sub_i_111(.A(i_psram_sub_n_979), .B(i_psram_sub_n_1227 - ), .Z(i_psram_sub_n_571)); - notech_and4 i_psram_sub_i_113(.A(i_psram_sub_state[1]), .B(s00_axi_aresetn - ), .C(i_psram_sub_n_575), .D(i_psram_sub_n_374), .Z(i_psram_sub_n_573 - )); - notech_nand3 i_psram_sub_i_114(.A(i_psram_sub_n_962), .B(i_psram_sub_mem_idle - ), .C(s00_axi_aresetn), .Z(i_psram_sub_n_574)); - notech_nand2 i_psram_sub_i_34(.A(i_psram_sub_mem_idle), .B(i_psram_sub_n_375 - ), .Z(i_psram_sub_n_575)); - notech_nao3 i_psram_sub_i_155(.A(s00_axi_aresetn), .B(i_psram_sub_n_4320 - ), .C(i_psram_sub_n_974), .Z(i_psram_sub_n_576)); - notech_ao3 i_psram_sub_i_748(.A(i_psram_sub_n_1213), .B(i_psram_sub_n_4061 - ), .C(i_psram_sub_n_1220), .Z(i_psram_sub_n_579)); - notech_ao3 i_psram_sub_i_813(.A(s00_axi_aresetn), .B(i_psram_sub_n_4024) - , .C(i_psram_sub_n_1077), .Z(i_psram_sub_n_580)); - notech_ao3 i_psram_sub_i_802(.A(i_psram_sub_n_4029), .B(s00_axi_aresetn) - , .C(i_psram_sub_n_1006), .Z(i_psram_sub_n_581)); - notech_and2 i_psram_sub_i_26(.A(i_psram_sub_axi_arlen_cntr[7]), .B(i_psram_sub_n_4013 - ), .Z(i_psram_sub_n_582)); - notech_and2 i_psram_sub_i_28(.A(i_psram_sub_axi_arlen_cntr[6]), .B(i_psram_sub_n_4011 - ), .Z(i_psram_sub_n_583)); - notech_and2 i_psram_sub_i_30(.A(i_psram_sub_axi_arlen[3]), .B(i_psram_sub_n_4007 - ), .Z(i_psram_sub_n_584)); - notech_and2 i_psram_sub_i_32(.A(i_psram_sub_axi_arlen_cntr[5]), .B(i_psram_sub_n_4010 - ), .Z(i_psram_sub_n_585)); - notech_and2 i_psram_sub_i_41(.A(i_psram_sub_axi_arlen[2]), .B(i_psram_sub_n_4006 - ), .Z(i_psram_sub_n_586)); - notech_and2 i_psram_sub_i_54(.A(i_psram_sub_axi_arlen_cntr[4]), .B(i_psram_sub_n_4009 - ), .Z(i_psram_sub_n_587)); - notech_nand2 i_psram_sub_i_58(.A(i_psram_sub_axi_arlen[1]), .B(i_psram_sub_n_4004 - ), .Z(i_psram_sub_n_588)); - notech_nand2 i_psram_sub_i_203(.A(i_psram_sub_axi_arlen_cntr[0]), .B(i_psram_sub_n_4008 - ), .Z(i_psram_sub_n_589)); - notech_nand2 i_psram_sub_i_208(.A(i_psram_sub_n_566), .B(i_psram_sub_n_4314 - ), .Z(i_psram_sub_n_593)); - notech_or4 i_psram_sub_i_209(.A(i_psram_sub_state[1]), .B(i_psram_sub_state - [2]), .C(i_psram_sub_n_4025), .D(i_psram_sub_n_4320), .Z(i_psram_sub_n_596 - )); - notech_nand2 i_psram_sub_i_212(.A(i_psram_sub_n_566), .B(i_psram_sub_n_4315 - ), .Z(i_psram_sub_n_597)); - notech_and2 i_psram_sub_i_11033(.A(s00_axi_awlen[0]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_791767)); - notech_and2 i_psram_sub_i_21034(.A(s00_axi_awlen[1]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_792768)); - notech_and2 i_psram_sub_i_31035(.A(s00_axi_awlen[2]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_793769)); - notech_and2 i_psram_sub_i_41036(.A(s00_axi_awlen[3]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_794770)); - notech_and2 i_psram_sub_i_51037(.A(s00_axi_awlen[4]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_795771)); - notech_and2 i_psram_sub_i_61038(.A(s00_axi_awlen[5]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_796772)); - notech_and2 i_psram_sub_i_71039(.A(s00_axi_awlen[6]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_797773)); - notech_and2 i_psram_sub_i_81040(.A(s00_axi_awlen[7]), .B(s00_axi_aresetn - ), .Z(i_psram_sub_n_798774)); - notech_nao3 i_psram_sub_i_11065(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_axi_awlen_cntr[0]), .Z(i_psram_sub_n_799775) - ); - notech_and3 i_psram_sub_i_41068(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_369), .Z(i_psram_sub_n_800776)); - notech_and3 i_psram_sub_i_51069(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_368), .Z(i_psram_sub_n_801777)); - notech_and3 i_psram_sub_i_61070(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_367), .Z(i_psram_sub_n_802778)); - notech_and3 i_psram_sub_i_71071(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_366), .Z(i_psram_sub_n_803779)); - notech_and3 i_psram_sub_i_81072(.A(s00_axi_aresetn), .B(i_psram_sub_n_1077 - ), .C(i_psram_sub_n_365), .Z(i_psram_sub_n_804780)); -endmodule Index: rtl/shiftbox.v =================================================================== --- rtl/shiftbox.v (revision 117) +++ rtl/shiftbox.v (nonexistent) @@ -1,93 +0,0 @@ -/* verilator lint_off COMBDLY */ - -module shiftbox (shiftop,calc_sz,ci,co,opa,opb,resa,resb,resa4,resb4,co4); - -input [3:0] shiftop; -input [3:0] calc_sz; -input [31:0] opa,opb; -output reg [31:0] resa,resb; -output reg [31:0] resa4,resb4; -input ci; -output reg co,co4; - -always @(*) - case (shiftop) - 4'b0000 : if (calc_sz==4) begin resa <= {opa[30:0],opa[31]}; co<=ci; resb<=opb; end else // rol without ci - if (calc_sz==2) begin resa[15:0] <= {opa[14:0],opa[15]}; co<=ci; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin resa[ 7:0] <= {opa[ 6:0],opa[ 7]}; co<=ci; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0001 : if (calc_sz==4) begin resa <= {opa[0],opa[31:1]}; co<=ci; resb<=opb; end else // ror without ci - if (calc_sz==2) begin resa[15:0] <= {opa[0],opa[15:1]}; co<=ci; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin resa[ 7:0] <= {opa[0],opa[ 7:1]}; co<=ci; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0010 : if (calc_sz==4) begin {co,resa[31:0]} <= {opa[31:0],ci}; resb<=opb; end else // rol with ci = rcl - if (calc_sz==2) begin {co,resa[15:0]} <= {opa[15:0],ci}; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin {co,resa[ 7:0]} <= {opa[ 7:0],ci}; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0011 : if (calc_sz==4) begin {co,resa[31:0]} <= {opa[0],ci,opa[31:1]}; resb<=opb; end else // ror with ci = rcr - if (calc_sz==2) begin {co,resa[15:0]} <= {opa[0],ci,opa[15:1]}; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin {co,resa[ 7:0]} <= {opa[0],ci,opa[ 7:1]}; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0100, - 4'b0110 : if (calc_sz==4) begin {co,resa[31:0]} <= {opa[31:0],1'b0}; resb<=opb; end else // shl,sal with ci - if (calc_sz==2) begin {co,resa[15:0]} <= {opa[15:0],1'b0}; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin {co,resa[ 7:0]} <= {opa[ 7:0],1'b0}; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0101 : if (calc_sz==4) begin resa[31:0] <= {1'b0,opa[31:1]}; co<=ci; resb<=opb; end else // shr - if (calc_sz==2) begin resa[15:0] <= {1'b0,opa[15:1]}; co<=ci; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin resa[ 7:0] <= {1'b0,opa[ 7:1]}; co<=ci; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b0111 : if (calc_sz==4) begin resa[31:0] <= {opa[31],opa[31:1]}; co<=ci; resb<=opb; end else // sar - if (calc_sz==2) begin resa[15:0] <= {opa[15],opa[15:1]}; co<=ci; resb<=opb; resa[31:16]<=opa[31:16]; end else - begin resa[ 7:0] <= {opa[ 7],opa[ 7:1]}; co<=ci; resb<=opb; resa[31: 8]<=opa[31: 8]; end - - 4'b1000 : if (calc_sz==4) begin {resb[31:0],co} <= {opa[0],opb[31:0]}; resa[31:0] <= {opa[31],opa[31:1]}; end else // shrd - begin {resb[15:0],co} <= {opa[0],opb[15:0]}; resa[15:0] <= {opa[15],opa[15:1]}; resa[31:16]<=opa[31:16]; resb[31:16]<=opb[31:16]; end - - 4'b1001 : if (calc_sz==4) begin {co,resb[31:0]} <= {opb[31:0],opa[31]}; resa[31:0] <= {opa[30:0],opa[0]}; end else // shld - begin {co,resb[15:0]} <= {opb[15:0],opa[15]}; resa[15:0] <= {opa[14:0],opa[0]}; resa[31:16]<=opa[31:16]; resb[31:16]<=opb[31:16];end - - default : begin co<=ci; resb<=opb; resa <= opa; end - endcase - -always @(*) - case (shiftop) - 4'b0000 : if (calc_sz==4) begin resa4 <= {opa[27:0],opa[31:28]}; co4<=ci; resb4<=opb; end else // rol without ci - if (calc_sz==2) begin resa4[15:0] <= {opa[11:0],opa[15:12]}; co4<=ci; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin resa4[ 7:0] <= {opa[ 3:0],opa[ 7:4]}; co4<=ci; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0001 : if (calc_sz==4) begin resa4 <= {opa[3:0],opa[31:4]}; co4<=ci; resb4<=opb; end else // ror without ci - if (calc_sz==2) begin resa4[15:0] <= {opa[3:0],opa[15:4]}; co4<=ci; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin resa4[ 7:0] <= {opa[3:0],opa[ 7:4]}; co4<=ci; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0010 : if (calc_sz==4) begin {co4,resa4[31:0]} <= {opa[28:0],ci,opa[31:29]}; resb4<=opb; end else // rol with ci = rcl - if (calc_sz==2) begin {co4,resa4[15:0]} <= {opa[12:0],ci,opa[15:13]}; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin {co4,resa4[ 7:0]} <= {opa[ 4:0],ci,opa[ 7: 5]}; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0011 : if (calc_sz==4) begin {co4,resa4[31:0]} <= {opa[3:0],ci,opa[31:4]}; resb4<=opb; end else // ror with ci = rcr - if (calc_sz==2) begin {co4,resa4[15:0]} <= {opa[3:0],ci,opa[15:4]}; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin {co4,resa4[ 7:0]} <= {opa[3:0],ci,opa[ 7:4]}; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0100, - 4'b0110 : if (calc_sz==4) begin {co4,resa4[31:0]} <= {opa[28:0],4'b0000}; resb4<=opb; end else // shl,sal with ci - if (calc_sz==2) begin {co4,resa4[15:0]} <= {opa[12:0],4'b0000}; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin {co4,resa4[ 7:0]} <= {opa[ 4:0],4'b0000}; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0101 : if (calc_sz==4) begin resa4[31:0] <= {4'b0000,opa[31:4]}; co4<=ci; resb4<=opb; end else // shr - if (calc_sz==2) begin resa4[15:0] <= {4'b0000,opa[15:4]}; co4<=ci; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin resa4[ 7:0] <= {4'b0000,opa[ 7:4]}; co4<=ci; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b0111 : if (calc_sz==4) begin resa4[31:0] <= {opa[31],opa[31],opa[31],opa[31],opa[31:4]}; co4<=ci; resb4<=opb; end else // sar - if (calc_sz==2) begin resa4[15:0] <= {opa[15],opa[15],opa[15],opa[15],opa[15:4]}; co4<=ci; resb4<=opb; resa4[31:16]<=opa[31:16]; end else - begin resa4[ 7:0] <= {opa[ 7],opa[ 7],opa[ 7],opa[ 7],opa[ 7:4]}; co4<=ci; resb4<=opb; resa4[31: 8]<=opa[31: 8]; end - - 4'b1000 : if (calc_sz==4) begin resa4[31:0] <= {opa[31],opa[31],opa[31],opa[31],opa[31:4]}; {resb4[31:0],co4} <= {opa[3:0],opb[31:3]}; end else // shrd - begin resa4[15:0] <= {opa[15],opa[15],opa[15],opa[15],opa[15:4]}; {resb4[15:0],co4} <= {opa[3:0],opb[15:3]}; resa4[31:16]<=opa[31:16]; resb4[31:16]<=opb[31:16]; end - - 4'b1001 : if (calc_sz==4) begin resa4[31:0] <= {opa[27:0],opa[0],opa[0],opa[0],opa[0]}; {co4,resb4[31:0]} <= {opb[28:0],opa[31:28]}; end else // shld - begin resa4[15:0] <= {opa[11:0],opa[0],opa[0],opa[0],opa[0]}; {co4,resb4[15:0]} <= {opb[12:0],opa[15:12]}; resa4[31:16]<=opa[31:16]; resb4[31:16]<=opb[31:16]; end - - default : begin co4<=ci; resb4<=opb; resa4 <= opa; end - endcase - -endmodule Index: rtl/periph.v =================================================================== --- rtl/periph.v (revision 117) +++ rtl/periph.v (nonexistent) @@ -1,6050 +0,0 @@ - -module AWDP_DEC_023900(O0, bit_bang); - - output [8:0] O0; - input [8:0] bit_bang; - - - - - notech_ha2 i_9(.A(n_54), .B(n_70), .Z(O0[8])); - notech_inv i_1(.A(bit_bang[0]), .Z(O0[0])); - notech_inv i_0(.A(bit_bang[8]), .Z(n_54)); - notech_xor2 i_8092(.A(bit_bang[7]), .B(n_68), .Z(n_5436)); - notech_inv i_8093(.A(n_5436), .Z(O0[7])); - notech_or2 i_8091(.A(bit_bang[7]), .B(n_68), .Z(n_70)); - notech_xor2 i_27(.A(bit_bang[6]), .B(n_66), .Z(n_5463)); - notech_inv i_28(.A(n_5463), .Z(O0[6])); - notech_or2 i_26(.A(bit_bang[6]), .B(n_66), .Z(n_68)); - notech_xor2 i_273572(.A(bit_bang[5]), .B(n_64), .Z(n_5490)); - notech_inv i_283573(.A(n_5490), .Z(O0[5])); - notech_or2 i_263574(.A(bit_bang[5]), .B(n_64), .Z(n_66)); - notech_xor2 i_273575(.A(bit_bang[4]), .B(n_62), .Z(n_5517)); - notech_inv i_283576(.A(n_5517), .Z(O0[4])); - notech_or2 i_263577(.A(bit_bang[4]), .B(n_62), .Z(n_64)); - notech_xor2 i_273578(.A(bit_bang[3]), .B(n_60), .Z(n_5544)); - notech_inv i_283579(.A(n_5544), .Z(O0[3])); - notech_or2 i_263580(.A(bit_bang[3]), .B(n_60), .Z(n_62)); - notech_xor2 i_273581(.A(bit_bang[2]), .B(n_58), .Z(n_5571)); - notech_inv i_283582(.A(n_5571), .Z(O0[2])); - notech_or2 i_263583(.A(bit_bang[2]), .B(n_58), .Z(n_60)); - notech_xor2 i_273584(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_5599)); - notech_inv i_283585(.A(n_5599), .Z(O0[1])); - notech_or2 i_263586(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_58)); -endmodule -module AWDP_DEC_26_0(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - - - - notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15])); - notech_inv i_1(.A(counter[0]), .Z(O0[0])); - notech_inv i_0(.A(counter[15]), .Z(n_96)); - notech_xor2 i_33(.A(counter[14]), .B(n_124), .Z(n_5626)); - notech_inv i_34(.A(n_5626), .Z(O0[14])); - notech_or2 i_32(.A(counter[14]), .B(n_124), .Z(n_126)); - notech_xor2 i_323587(.A(counter[13]), .B(n_122), .Z(n_5653)); - notech_inv i_333588(.A(n_5653), .Z(O0[13])); - notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124)); - notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_5680)); - notech_inv i_313589(.A(n_5680), .Z(O0[12])); - notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122)); - notech_xor2 i_293590(.A(counter[11]), .B(n_118), .Z(n_5707)); - notech_inv i_303591(.A(n_5707), .Z(O0[11])); - notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120)); - notech_xor2 i_283592(.A(counter[10]), .B(n_116), .Z(n_5734)); - notech_inv i_293593(.A(n_5734), .Z(O0[10])); - notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118)); - notech_xor2 i_273594(.A(counter[9]), .B(n_114), .Z(n_5761)); - notech_inv i_283595(.A(n_5761), .Z(O0[9])); - notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116)); - notech_xor2 i_273596(.A(counter[8]), .B(n_112), .Z(n_5788)); - notech_inv i_283597(.A(n_5788), .Z(O0[8])); - notech_or2 i_263598(.A(counter[8]), .B(n_112), .Z(n_114)); - notech_xor2 i_273599(.A(counter[7]), .B(n_110), .Z(n_5815)); - notech_inv i_283600(.A(n_5815), .Z(O0[7])); - notech_or2 i_263601(.A(counter[7]), .B(n_110), .Z(n_112)); - notech_xor2 i_273602(.A(counter[6]), .B(n_108), .Z(n_5842)); - notech_inv i_283603(.A(n_5842), .Z(O0[6])); - notech_or2 i_263604(.A(counter[6]), .B(n_108), .Z(n_110)); - notech_xor2 i_273605(.A(counter[5]), .B(n_106), .Z(n_5869)); - notech_inv i_283606(.A(n_5869), .Z(O0[5])); - notech_or2 i_263607(.A(counter[5]), .B(n_106), .Z(n_108)); - notech_xor2 i_273608(.A(counter[4]), .B(n_104), .Z(n_5896)); - notech_inv i_283609(.A(n_5896), .Z(O0[4])); - notech_or2 i_263610(.A(counter[4]), .B(n_104), .Z(n_106)); - notech_xor2 i_273611(.A(counter[3]), .B(n_102), .Z(n_5923)); - notech_inv i_283612(.A(n_5923), .Z(O0[3])); - notech_or2 i_263613(.A(counter[3]), .B(n_102), .Z(n_104)); - notech_xor2 i_273614(.A(counter[2]), .B(n_100), .Z(n_5950)); - notech_inv i_283615(.A(n_5950), .Z(O0[2])); - notech_or2 i_263616(.A(counter[2]), .B(n_100), .Z(n_102)); - notech_xor2 i_273617(.A(counter[1]), .B(counter[0]), .Z(n_5978)); - notech_inv i_283618(.A(n_5978), .Z(O0[1])); - notech_or2 i_263619(.A(counter[1]), .B(counter[0]), .Z(n_100)); -endmodule -module AWDP_SUB_39_0(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - wire \counter[1] ; - wire \counter[2] ; - wire \counter[3] ; - wire \counter[4] ; - wire \counter[5] ; - wire \counter[6] ; - wire \counter[7] ; - wire \counter[8] ; - wire \counter[9] ; - wire \counter[10] ; - wire \counter[11] ; - wire \counter[12] ; - wire \counter[13] ; - wire \counter[14] ; - wire \counter[15] ; - - - assign \counter[1] = counter[1]; - assign \counter[2] = counter[2]; - assign \counter[3] = counter[3]; - assign \counter[4] = counter[4]; - assign \counter[5] = counter[5]; - assign \counter[6] = counter[6]; - assign \counter[7] = counter[7]; - assign \counter[8] = counter[8]; - assign \counter[9] = counter[9]; - assign \counter[10] = counter[10]; - assign \counter[11] = counter[11]; - assign \counter[12] = counter[12]; - assign \counter[13] = counter[13]; - assign \counter[14] = counter[14]; - assign \counter[15] = counter[15]; - assign O0[0] = counter[0]; - - notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15])); - notech_inv i_1(.A(\counter[1] ), .Z(O0[1])); - notech_inv i_0(.A(\counter[15] ), .Z(n_96)); - notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6005)); - notech_inv i_38(.A(n_6005), .Z(O0[14])); - notech_or2 i_36(.A(\counter[14] ), .B(n_122), .Z(n_124)); - notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6032)); - notech_inv i_32(.A(n_6032), .Z(O0[13])); - notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122)); - notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6059)); - notech_inv i_303620(.A(n_6059), .Z(O0[12])); - notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120)); - notech_xor2 i_283621(.A(\counter[11] ), .B(n_116), .Z(n_6086)); - notech_inv i_293622(.A(n_6086), .Z(O0[11])); - notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118)); - notech_xor2 i_273623(.A(\counter[10] ), .B(n_114), .Z(n_6113)); - notech_inv i_283624(.A(n_6113), .Z(O0[10])); - notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116)); - notech_xor2 i_273625(.A(\counter[9] ), .B(n_112), .Z(n_6140)); - notech_inv i_283626(.A(n_6140), .Z(O0[9])); - notech_or2 i_263627(.A(\counter[9] ), .B(n_112), .Z(n_114)); - notech_xor2 i_273628(.A(\counter[8] ), .B(n_110), .Z(n_6167)); - notech_inv i_283629(.A(n_6167), .Z(O0[8])); - notech_or2 i_263630(.A(\counter[8] ), .B(n_110), .Z(n_112)); - notech_xor2 i_273631(.A(\counter[7] ), .B(n_108), .Z(n_6194)); - notech_inv i_283632(.A(n_6194), .Z(O0[7])); - notech_or2 i_263633(.A(\counter[7] ), .B(n_108), .Z(n_110)); - notech_xor2 i_273634(.A(\counter[6] ), .B(n_106), .Z(n_6221)); - notech_inv i_283635(.A(n_6221), .Z(O0[6])); - notech_or2 i_263636(.A(\counter[6] ), .B(n_106), .Z(n_108)); - notech_xor2 i_273637(.A(\counter[5] ), .B(n_104), .Z(n_6248)); - notech_inv i_283638(.A(n_6248), .Z(O0[5])); - notech_or2 i_263639(.A(\counter[5] ), .B(n_104), .Z(n_106)); - notech_xor2 i_273640(.A(\counter[4] ), .B(n_102), .Z(n_6275)); - notech_inv i_283641(.A(n_6275), .Z(O0[4])); - notech_or2 i_263642(.A(\counter[4] ), .B(n_102), .Z(n_104)); - notech_xor2 i_273643(.A(\counter[3] ), .B(n_100), .Z(n_6302)); - notech_inv i_283644(.A(n_6302), .Z(O0[3])); - notech_or2 i_263645(.A(\counter[3] ), .B(n_100), .Z(n_102)); - notech_xor2 i_273646(.A(\counter[2] ), .B(\counter[1] ), .Z(n_6330)); - notech_inv i_283647(.A(n_6330), .Z(O0[2])); - notech_or2 i_263648(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100)); -endmodule -module v8253_counter_0(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count - , latch_status, write, read, data_out); - - input clk; - input rst_n; - input clock; - input gate; - output out; - input [7:0] data_in; - input set_control_mode; - input latch_count; - input latch_status; - input write; - input read; - output [7:0] data_out; - - wire [1:0] rw_mode; - wire [7:0] counter_l; - wire [2:0] mode; - wire [7:0] output_m; - wire [7:0] output_l; - wire [7:0] counter_m; - wire [7:0] status; - wire [15:0] counter; - - - - notech_inv i_434(.A(n_8143), .Z(n_8150)); - notech_inv i_433(.A(n_8143), .Z(n_8149)); - notech_inv i_432(.A(n_8143), .Z(n_8148)); - notech_inv i_430(.A(n_8143), .Z(n_8146)); - notech_inv i_429(.A(n_8143), .Z(n_8145)); - notech_inv i_428(.A(n_8143), .Z(n_8144)); - notech_inv i_427(.A(clk), .Z(n_8143)); - notech_inv i_347(.A(n_8067), .Z(n_8074)); - notech_inv i_346(.A(n_8067), .Z(n_8073)); - notech_inv i_345(.A(n_8067), .Z(n_8072)); - notech_inv i_343(.A(n_8067), .Z(n_8070)); - notech_inv i_341(.A(n_8067), .Z(n_8069)); - notech_inv i_340(.A(n_8067), .Z(n_8068)); - notech_inv i_339(.A(rst_n), .Z(n_8067)); - notech_inv i_107(.A(n_7833), .Z(n_7834)); - notech_inv i_106(.A(n_3250), .Z(n_7833)); - notech_inv i_75(.A(n_7815), .Z(n_7816)); - notech_inv i_53(.A(n_3200), .Z(n_7815)); - notech_nao3 i_99(.A(n_441), .B(n_90), .C(n_444), .Z(n_305)); - notech_nao3 i_93(.A(n_441), .B(n_91), .C(n_444), .Z(n_299)); - notech_nao3 i_87(.A(n_441), .B(n_92), .C(n_444), .Z(n_294)); - notech_nao3 i_81(.A(n_441), .B(n_93), .C(n_444), .Z(n_289)); - notech_nand2 i_83(.A(counter_m[7]), .B(n_435), .Z(n_286)); - notech_and2 i_11588(.A(data_in[0]), .B(n_3250), .Z(n_284)); - notech_and2 i_21589(.A(data_in[1]), .B(n_3250), .Z(n_283)); - notech_and2 i_31590(.A(data_in[2]), .B(n_3250), .Z(n_282)); - notech_and2 i_41591(.A(data_in[3]), .B(n_3250), .Z(n_281)); - notech_and2 i_51592(.A(data_in[4]), .B(n_3250), .Z(n_280)); - notech_and2 i_61593(.A(data_in[5]), .B(n_3250), .Z(n_279)); - notech_and2 i_71594(.A(data_in[6]), .B(n_3250), .Z(n_278)); - notech_and2 i_81595(.A(data_in[7]), .B(n_3250), .Z(n_277)); - notech_nand2 i_2109(.A(clock), .B(n_3241), .Z(n_276)); - notech_and2 i_214(.A(n_3250), .B(n_499), .Z(n_275)); - notech_nao3 i_73(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_270)); - notech_and4 i_77(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .D(write - ), .Z(n_269)); - notech_nao3 i_72(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_268)); - notech_nand2 i_71(.A(read), .B(n_189), .Z(n_267)); - notech_nand2 i_215(.A(rw_mode[0]), .B(n_378), .Z(n_266)); - notech_nand2 i_213(.A(status[7]), .B(status_latched), .Z(n_265)); - notech_nand2 i_210(.A(status[6]), .B(status_latched), .Z(n_264)); - notech_nand2 i_207(.A(status[5]), .B(status_latched), .Z(n_263)); - notech_nand2 i_204(.A(status[4]), .B(status_latched), .Z(n_262)); - notech_nand2 i_201(.A(status[3]), .B(status_latched), .Z(n_261)); - notech_nand2 i_198(.A(status[2]), .B(status_latched), .Z(n_260)); - notech_nand2 i_194(.A(status[1]), .B(status_latched), .Z(n_259)); - notech_nand2 i_191(.A(status_latched), .B(status[0]), .Z(n_258)); - notech_and2 i_13(.A(n_403), .B(n_401), .Z(n_257)); - notech_and4 i_66(.A(n_405), .B(n_393), .C(n_3236), .D(n_399), .Z(n_254) - ); - notech_nao3 i_183(.A(written), .B(clock_pulse), .C(n_254), .Z(n_253)); - notech_and3 i_65(.A(n_357), .B(n_237), .C(n_356), .Z(n_252)); - notech_ao4 i_64(.A(n_408), .B(n_403), .C(n_407), .D(n_3240), .Z(n_251) - ); - notech_or4 i_180(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(msb_write), .Z - (n_250)); - notech_and2 i_47(.A(n_399), .B(n_250), .Z(n_248)); - notech_nand2 i_176(.A(data_in[2]), .B(set_control_mode), .Z(n_246)); - notech_or2 i_70(.A(data_in[1]), .B(data_in[3]), .Z(n_245)); - notech_nand2 i_175(.A(set_control_mode), .B(n_245), .Z(n_244)); - notech_nor2 i_174(.A(written), .B(n_353), .Z(n_243)); - notech_ao4 i_173(.A(n_425), .B(n_424), .C(counter_l[0]), .D(n_3252), .Z(n_241 - )); - notech_ao4 i_172(.A(mode[1]), .B(n_400), .C(n_241), .D(n_405), .Z(n_239) - ); - notech_or4 i_36(.A(n_423), .B(n_412), .C(n_405), .D(n_425), .Z(n_237)); - notech_ao4 i_162(.A(n_239), .B(n_3200), .C(n_194), .D(n_436), .Z(n_234) - ); - notech_or2 i_67(.A(n_234), .B(n_352), .Z(n_233)); - notech_and3 i_156(.A(n_441), .B(n_191), .C(n_3201), .Z(n_232)); - notech_or2 i_63(.A(n_71), .B(n_3202), .Z(n_231)); - notech_nand2 i_153(.A(counter_l[1]), .B(n_435), .Z(n_230)); - notech_nand2 i_150(.A(counter_l[2]), .B(n_435), .Z(n_229)); - notech_nor2 i_62(.A(n_77), .B(n_3202), .Z(n_228)); - notech_nor2 i_61(.A(n_197), .B(n_3202), .Z(n_227)); - notech_xor2 i_60(.A(counter[4]), .B(counter[5]), .Z(n_225)); - notech_xor2 i_59(.A(counter[6]), .B(n_419), .Z(n_223)); - notech_xor2 i_58(.A(counter[8]), .B(counter[9]), .Z(n_221)); - notech_xor2 i_57(.A(counter[10]), .B(n_417), .Z(n_219)); - notech_xor2 i_56(.A(counter[11]), .B(n_3199), .Z(n_216)); - notech_and2 i_40(.A(n_473), .B(n_460), .Z(n_214)); - notech_xor2 i_55(.A(counter[12]), .B(counter[13]), .Z(n_213)); - notech_xor2 i_54(.A(counter[14]), .B(n_413), .Z(n_211)); - notech_nand2 i_84(.A(counter[15]), .B(n_414), .Z(n_210)); - notech_and2 i_78(.A(n_378), .B(write), .Z(n_196)); - notech_and3 i_45(.A(n_398), .B(n_397), .C(n_403), .Z(n_194)); - notech_and4 i_52(.A(n_405), .B(n_397), .C(n_401), .D(n_398), .Z(n_192) - ); - notech_nand3 i_74(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_190)); - notech_nao3 i_46(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_189) - ); - notech_ao3 i_69(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .Z(n_188) - ); - notech_ao4 i_68(.A(n_408), .B(n_257), .C(n_409), .D(n_248), .Z(n_187)); - notech_or4 i_17(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(n_243), .Z(n_186 - )); - notech_or2 i_2102(.A(n_188), .B(n_3251), .Z(n_185)); - notech_nao3 i_103(.A(counter[11]), .B(n_456), .C(n_452), .Z(n_308)); - notech_nand3 i_104(.A(n_3200), .B(n_3203), .C(n_216), .Z(n_309)); - notech_nao3 i_105(.A(n_441), .B(n_89), .C(n_444), .Z(n_310)); - notech_nao3 i_112(.A(n_441), .B(n_88), .C(n_444), .Z(n_315)); - notech_nao3 i_118(.A(n_441), .B(n_87), .C(n_444), .Z(n_320)); - notech_nao3 i_122(.A(counter[8]), .B(n_456), .C(n_452), .Z(n_323)); - notech_nao3 i_123(.A(n_3200), .B(n_3203), .C(counter[8]), .Z(n_324)); - notech_nao3 i_124(.A(n_441), .B(n_86), .C(n_444), .Z(n_325)); - notech_ao3 i_127(.A(counter[7]), .B(n_420), .C(n_452), .Z(n_327)); - notech_ao3 i_128(.A(n_441), .B(n_85), .C(n_444), .Z(n_328)); - notech_and3 i_129(.A(n_441), .B(n_201), .C(n_3201), .Z(n_329)); - notech_nand2 i_144(.A(counter_l[4]), .B(n_435), .Z(n_338)); - notech_and3 i_143(.A(n_441), .B(n_198), .C(n_3201), .Z(n_341)); - notech_nand2 i_147(.A(counter_l[3]), .B(n_435), .Z(n_342)); - notech_nand3 i_154(.A(counter_l[0]), .B(n_435), .C(n_405), .Z(n_349)); - notech_nand3 i_155(.A(n_440), .B(n_3200), .C(n_231), .Z(n_350)); - notech_nand3 i_158(.A(n_186), .B(n_3250), .C(n_233), .Z(n_351)); - notech_and3 i_161(.A(n_237), .B(n_401), .C(n_429), .Z(n_352)); - notech_nor2 i_16(.A(msb_write), .B(n_394), .Z(n_353)); - notech_nao3 i_186(.A(n_425), .B(n_3197), .C(n_405), .Z(n_356)); - notech_or4 i_187(.A(n_428), .B(n_3242), .C(counter[1]), .D(n_397), .Z(n_357 - )); - notech_and2 i_342(.A(latch_count), .B(n_3250), .Z(n_360)); - notech_nand2 i_2211(.A(latch_status), .B(n_3220), .Z(n_361)); - notech_nand2 i_42372(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_378)); - notech_nand2 i_03556(.A(n_266), .B(n_189), .Z(n_380)); - notech_nand2 i_2(.A(n_380), .B(n_3220), .Z(n_381)); - notech_nand3 i_1(.A(n_266), .B(n_189), .C(n_3220), .Z(n_382)); - notech_ao4 i_321(.A(n_382), .B(n_3204), .C(n_381), .D(n_3212), .Z(n_383) - ); - notech_ao4 i_320(.A(n_382), .B(n_3205), .C(n_381), .D(n_3213), .Z(n_384) - ); - notech_ao4 i_319(.A(n_382), .B(n_3206), .C(n_381), .D(n_3214), .Z(n_385) - ); - notech_ao4 i_317(.A(n_382), .B(n_3207), .C(n_381), .D(n_3215), .Z(n_386) - ); - notech_ao4 i_316(.A(n_382), .B(n_3208), .C(n_381), .D(n_3216), .Z(n_387) - ); - notech_ao4 i_315(.A(n_382), .B(n_3209), .C(n_381), .D(n_3217), .Z(n_388) - ); - notech_ao4 i_314(.A(n_382), .B(n_3210), .C(n_381), .D(n_3218), .Z(n_389) - ); - notech_ao4 i_313(.A(n_382), .B(n_3211), .C(n_381), .D(n_3219), .Z(n_390) - ); - notech_nao3 i_62375(.A(n_3238), .B(n_3239), .C(mode[1]), .Z(n_393)); - notech_nand3 i_11(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_394) - ); - notech_nand2 i_32380(.A(mode[1]), .B(n_3239), .Z(n_397)); - notech_nand2 i_298(.A(mode[2]), .B(n_3239), .Z(n_398)); - notech_and2 i_14(.A(n_398), .B(n_397), .Z(n_399)); - notech_nand2 i_299(.A(mode[0]), .B(n_3238), .Z(n_400)); - notech_nao3 i_62378(.A(mode[0]), .B(n_3238), .C(mode[1]), .Z(n_401)); - notech_nao3 i_82387(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_403)); - notech_nand2 i_42381(.A(mode[1]), .B(mode[0]), .Z(n_405)); - notech_and2 i_35(.A(n_405), .B(n_397), .Z(n_407)); - notech_nand2 i_31(.A(loaded), .B(clock_pulse), .Z(n_408)); - notech_nand3 i_34(.A(loaded), .B(clock_pulse), .C(gate_sampled), .Z(n_409 - )); - notech_or4 i_82413(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter - [0]), .Z(n_412)); - notech_or2 i_4(.A(counter[12]), .B(counter[13]), .Z(n_413)); - notech_nao3 i_25(.A(n_3247), .B(n_3248), .C(counter[12]), .Z(n_414)); - notech_or2 i_5(.A(counter[8]), .B(counter[9]), .Z(n_417)); - notech_nao3 i_252409(.A(n_3245), .B(n_3246), .C(counter[8]), .Z(n_418) - ); - notech_or2 i_6(.A(counter[4]), .B(counter[5]), .Z(n_419)); - notech_or2 i_252420(.A(counter[6]), .B(n_419), .Z(n_420)); - notech_or4 i_15(.A(n_420), .B(counter[7]), .C(counter[11]), .D(n_418), .Z - (n_422)); - notech_or4 i_48(.A(n_422), .B(counter[14]), .C(n_413), .D(counter[15]), - .Z(n_423)); - notech_or2 i_342478(.A(n_412), .B(n_423), .Z(n_424)); - notech_nand2 i_3(.A(counter_l[0]), .B(out), .Z(n_425)); - notech_nao3 i_304(.A(n_3198), .B(n_3244), .C(counter[2]), .Z(n_428)); - notech_nao3 i_342450(.A(counter[1]), .B(n_3242), .C(n_428), .Z(n_429)); - notech_ao4 i_294(.A(n_252), .B(n_409), .C(n_251), .D(n_3236), .Z(n_434) - ); - notech_nand2 i_2206(.A(n_434), .B(n_253), .Z(n_435)); - notech_or2 i_2138(.A(n_187), .B(n_435), .Z(n_436)); - notech_or4 i_289(.A(n_428), .B(n_436), .C(counter[1]), .D(n_3242), .Z(n_437 - )); - notech_or4 i_32(.A(counter[0]), .B(n_428), .C(n_436), .D(n_3243), .Z(n_438 - )); - notech_or4 i_2127(.A(n_405), .B(n_408), .C(n_435), .D(n_3234), .Z(n_440) - ); - notech_nand2 i_2142(.A(bcd), .B(n_3196), .Z(n_441)); - notech_nand2 i_24(.A(n_441), .B(n_3201), .Z(n_442)); - notech_nand2 i_12(.A(n_440), .B(n_3200), .Z(n_444)); - notech_nand3 i_26(.A(n_441), .B(n_440), .C(n_3200), .Z(n_446)); - notech_ao4 i_281(.A(n_442), .B(n_3253), .C(n_446), .D(n_3254), .Z(n_447) - ); - notech_ao4 i_280(.A(n_442), .B(n_3255), .C(n_446), .D(n_3256), .Z(n_448) - ); - notech_ao4 i_279(.A(n_228), .B(n_444), .C(n_227), .D(n_440), .Z(n_449) - ); - notech_or2 i_2140(.A(n_422), .B(n_441), .Z(n_450)); - notech_nao3 i_30(.A(n_3202), .B(n_3200), .C(n_422), .Z(n_451)); - notech_nand2 i_43(.A(n_3200), .B(n_3202), .Z(n_452)); - notech_ao4 i_275(.A(n_446), .B(n_3257), .C(counter[4]), .D(n_452), .Z(n_453 - )); - notech_or4 i_2141(.A(counter[6]), .B(counter[7]), .C(n_419), .D(n_441), - .Z(n_456)); - notech_nao3 i_28(.A(n_422), .B(n_3200), .C(n_441), .Z(n_459)); - notech_or2 i_29(.A(n_459), .B(n_3203), .Z(n_460)); - notech_ao4 i_273(.A(n_446), .B(n_3258), .C(n_225), .D(n_460), .Z(n_461) - ); - notech_ao4 i_272(.A(n_3233), .B(n_3200), .C(n_442), .D(n_3259), .Z(n_462 - )); - notech_ao4 i_271(.A(n_446), .B(n_3260), .C(n_460), .D(n_223), .Z(n_463) - ); - notech_ao4 i_270(.A(n_3200), .B(n_3232), .C(n_442), .D(n_3261), .Z(n_464 - )); - notech_mux2 i_266(.S(n_435), .A(n_3203), .B(counter_l[7]), .Z(n_468)); - notech_ao4 i_262(.A(n_3200), .B(n_3231), .C(n_442), .D(n_3262), .Z(n_472 - )); - notech_nand3 i_33(.A(n_450), .B(n_7816), .C(n_3203), .Z(n_473)); - notech_ao4 i_260(.A(n_460), .B(n_3245), .C(n_221), .D(n_473), .Z(n_474) - ); - notech_reg output_m_reg_7(.CP(n_8149), .D(n_2752), .CD(n_8073), .Q(output_m - [7])); - notech_mux2 i_2581(.S(output_latched), .A(counter[15]), .B(output_m[7]), - .Z(n_2752)); - notech_ao4 i_259(.A(n_7816), .B(n_3230), .C(n_442), .D(n_3263), .Z(n_476 - )); - notech_reg output_m_reg_6(.CP(n_8149), .D(n_2758), .CD(n_8073), .Q(output_m - [6])); - notech_mux2 i_2589(.S(output_latched), .A(counter[14]), .B(output_m[6]), - .Z(n_2758)); - notech_ao4 i_257(.A(n_460), .B(n_3246), .C(n_219), .D(n_473), .Z(n_477) - ); - notech_reg output_m_reg_5(.CP(n_8148), .D(n_2764), .CD(n_8072), .Q(output_m - [5])); - notech_mux2 i_2597(.S(output_latched), .A(counter[13]), .B(output_m[5]), - .Z(n_2764)); - notech_reg output_m_reg_4(.CP(n_8148), .D(n_2770), .CD(n_8072), .Q(output_m - [4])); - notech_mux2 i_2605(.S(output_latched), .A(counter[12]), .B(output_m[4]), - .Z(n_2770)); - notech_ao4 i_256(.A(n_7816), .B(n_3229), .C(n_442), .D(n_3264), .Z(n_479 - )); - notech_reg output_m_reg_3(.CP(n_8149), .D(n_2776), .CD(n_8073), .Q(output_m - [3])); - notech_mux2 i_2613(.S(output_latched), .A(counter[11]), .B(output_m[3]), - .Z(n_2776)); - notech_reg output_m_reg_2(.CP(n_8149), .D(n_2782), .CD(n_8073), .Q(output_m - [2])); - notech_mux2 i_2621(.S(output_latched), .A(counter[10]), .B(output_m[2]), - .Z(n_2782)); - notech_reg output_m_reg_1(.CP(n_8149), .D(n_2788), .CD(n_8073), .Q(output_m - [1])); - notech_mux2 i_2629(.S(output_latched), .A(counter[9]), .B(output_m[1]), - .Z(n_2788)); - notech_reg output_m_reg_0(.CP(n_8149), .D(n_2794), .CD(n_8073), .Q(output_m - [0])); - notech_mux2 i_2637(.S(output_latched), .A(counter[8]), .B(output_m[0]), - .Z(n_2794)); - notech_ao4 i_252(.A(n_7816), .B(n_3228), .C(n_442), .D(n_3265), .Z(n_483 - )); - notech_reg status_reg_7(.CP(n_8149), .D(n_2800), .CD(n_8073), .Q(status[ - 7])); - notech_mux2 i_2645(.S(n_361), .A(out), .B(status[7]), .Z(n_2800)); - notech_mux2 i_250(.S(counter[12]), .A(n_451), .B(n_459), .Z(n_484)); - notech_reg status_reg_6(.CP(n_8148), .D(n_2806), .CD(n_8072), .Q(status[ - 6])); - notech_mux2 i_2653(.S(n_361), .A(null_counter), .B(status[6]), .Z(n_2806 - )); - notech_reg status_reg_5(.CP(n_8148), .D(n_2812), .CD(n_8072), .Q(status[ - 5])); - notech_mux2 i_2661(.S(n_361), .A(rw_mode[1]), .B(status[5]), .Z(n_2812) - ); - notech_nao3 i_21(.A(bcd), .B(n_3198), .C(n_412), .Z(n_486)); - notech_reg status_reg_4(.CP(n_8148), .D(n_2818), .CD(n_8072), .Q(status[ - 4])); - notech_mux2 i_2669(.S(n_361), .A(rw_mode[0]), .B(status[4]), .Z(n_2818) - ); - notech_ao4 i_249(.A(n_7816), .B(n_3227), .C(n_442), .D(n_3266), .Z(n_487 - )); - notech_reg status_reg_3(.CP(n_8148), .D(n_2824), .CD(n_8072), .Q(status[ - 3])); - notech_mux2 i_2677(.S(n_361), .A(mode[2]), .B(status[3]), .Z(n_2824)); - notech_nao3 i_42(.A(n_486), .B(n_7816), .C(n_450), .Z(n_488)); - notech_reg status_reg_2(.CP(n_8148), .D(n_2830), .CD(n_8072), .Q(status[ - 2])); - notech_mux2 i_2685(.S(n_361), .A(mode[1]), .B(status[2]), .Z(n_2830)); - notech_ao4 i_246(.A(n_214), .B(n_3247), .C(n_213), .D(n_488), .Z(n_489) - ); - notech_reg status_reg_1(.CP(n_8148), .D(n_2836), .CD(n_8072), .Q(status[ - 1])); - notech_mux2 i_2693(.S(n_361), .A(mode[0]), .B(status[1]), .Z(n_2836)); - notech_reg status_reg_0(.CP(n_8148), .D(n_2842), .CD(n_8072), .Q(status[ - 0])); - notech_mux2 i_2701(.S(n_361), .A(bcd), .B(status[0]), .Z(n_2842)); - notech_ao4 i_245(.A(n_7816), .B(n_3226), .C(n_442), .D(n_3267), .Z(n_491 - )); - notech_reg output_l_reg_7(.CP(n_8148), .D(n_2848), .CD(n_8072), .Q(output_l - [7])); - notech_mux2 i_2709(.S(output_latched), .A(counter[7]), .B(output_l[7]), - .Z(n_2848)); - notech_ao4 i_243(.A(n_214), .B(n_3248), .C(n_488), .D(n_211), .Z(n_492) - ); - notech_reg output_l_reg_6(.CP(n_8148), .D(n_2854), .CD(n_8072), .Q(output_l - [6])); - notech_mux2 i_2717(.S(output_latched), .A(counter[6]), .B(output_l[6]), - .Z(n_2854)); - notech_reg output_l_reg_5(.CP(n_8148), .D(n_2860), .CD(n_8072), .Q(output_l - [5])); - notech_mux2 i_2725(.S(output_latched), .A(counter[5]), .B(output_l[5]), - .Z(n_2860)); - notech_ao4 i_242(.A(n_7816), .B(n_3225), .C(n_442), .D(n_3268), .Z(n_494 - )); - notech_reg output_l_reg_4(.CP(n_8150), .D(n_2866), .CD(n_8074), .Q(output_l - [4])); - notech_mux2 i_2733(.S(output_latched), .A(counter[4]), .B(output_l[4]), - .Z(n_2866)); - notech_ao4 i_240(.A(n_459), .B(n_3249), .C(n_451), .D(n_210), .Z(n_495) - ); - notech_reg output_l_reg_3(.CP(n_8150), .D(n_2872), .CD(n_8074), .Q(output_l - [3])); - notech_mux2 i_2741(.S(output_latched), .A(counter[3]), .B(output_l[3]), - .Z(n_2872)); - notech_reg output_l_reg_2(.CP(n_8150), .D(n_2878), .CD(n_8074), .Q(output_l - [2])); - notech_mux2 i_2749(.S(output_latched), .A(counter[2]), .B(output_l[2]), - .Z(n_2878)); - notech_ao4 i_238(.A(n_486), .B(n_435), .C(n_442), .D(n_3269), .Z(n_497) - ); - notech_reg output_l_reg_1(.CP(n_8150), .D(n_2884), .CD(n_8074), .Q(output_l - [1])); - notech_mux2 i_2757(.S(output_latched), .A(counter[1]), .B(output_l[1]), - .Z(n_2884)); - notech_reg output_l_reg_0(.CP(n_8150), .D(n_2890), .CD(n_8074), .Q(output_l - [0])); - notech_mux2 i_2765(.S(output_latched), .A(counter[0]), .B(output_l[0]), - .Z(n_2890)); - notech_or2 i_8(.A(n_269), .B(n_196), .Z(n_499)); - notech_reg output_latched_reg(.CP(n_8150), .D(n_2896), .CD(n_8074), .Q(output_latched - )); - notech_mux2 i_2773(.S(n_714), .A(output_latched), .B(n_360), .Z(n_2896) - ); - notech_reg status_latched_reg(.CP(n_8150), .D(n_2902), .CD(n_8074), .Q(status_latched - )); - notech_nand2 i_2781(.A(n_2905), .B(n_2904), .Z(n_2902)); - notech_nand3 i_2782(.A(latch_status), .B(n_7834), .C(n_505), .Z(n_2904) - ); - notech_or4 i_2783(.A(latch_status), .B(read), .C(set_control_mode), .D(n_3220 - ), .Z(n_2905)); - notech_ao4 i_223(.A(n_438), .B(n_194), .C(n_7816), .D(n_192), .Z(n_501) - ); - notech_reg msb_read_reg(.CP(n_8150), .D(n_2908), .CD(n_8074), .Q(msb_read - )); - notech_nand2 i_2789(.A(n_2910), .B(n_2911), .Z(n_2908)); - notech_or4 i_2790(.A(msb_read), .B(n_378), .C(set_control_mode), .D(n_3270 - ), .Z(n_2910)); - notech_nand3 i_2791(.A(msb_read), .B(n_7834), .C(n_190), .Z(n_2911)); - notech_reg null_counter_reg(.CP(n_8150), .D(n_2914), .CD(n_8074), .Q(null_counter - )); - notech_nand2 i_2797(.A(n_2916), .B(n_2917), .Z(n_2914)); - notech_ao4 i_2798(.A(n_188), .B(n_3251), .C(n_7834), .D(n_3235), .Z(n_2916 - )); - notech_nand3 i_2799(.A(null_counter), .B(n_185), .C(n_3235), .Z(n_2917) - ); - notech_reg_set out_reg(.CP(n_8150), .D(n_2920), .SD(n_8074), .Q(out)); - notech_mux2 i_2805(.S(n_3221), .A(out), .B(n_1093), .Z(n_2920)); - notech_reg counter_reg_15(.CP(n_8149), .D(n_2926), .CD(n_8073), .Q(counter - [15])); - notech_mux2 i_2813(.S(\nbus_11[0] ), .A(counter[15]), .B(n_3222), .Z(n_2926 - )); - notech_or2 i_219(.A(latch_status), .B(read), .Z(n_505)); - notech_reg counter_reg_14(.CP(n_8149), .D(n_2932), .CD(n_8073), .Q(counter - [14])); - notech_mux2 i_2821(.S(\nbus_11[0] ), .A(counter[14]), .B(n_647), .Z(n_2932 - )); - notech_reg counter_reg_13(.CP(n_8149), .D(n_2938), .CD(n_8073), .Q(counter - [13])); - notech_mux2 i_2829(.S(\nbus_11[0] ), .A(counter[13]), .B(n_641), .Z(n_2938 - )); - notech_reg counter_reg_12(.CP(n_8149), .D(n_2944), .CD(n_8073), .Q(counter - [12])); - notech_mux2 i_2837(.S(\nbus_11[0] ), .A(counter[12]), .B(n_635), .Z(n_2944 - )); - notech_reg counter_reg_11(.CP(n_8149), .D(n_2950), .CD(n_8073), .Q(counter - [11])); - notech_mux2 i_2845(.S(\nbus_11[0] ), .A(counter[11]), .B(n_3223), .Z(n_2950 - )); - notech_nand2 i_81635(.A(n_383), .B(n_265), .Z(data_out[7])); - notech_reg counter_reg_10(.CP(n_8150), .D(n_2956), .CD(n_8074), .Q(counter - [10])); - notech_mux2 i_2853(.S(\nbus_11[0] ), .A(counter[10]), .B(n_623), .Z(n_2956 - )); - notech_nand2 i_71634(.A(n_384), .B(n_264), .Z(data_out[6])); - notech_reg counter_reg_9(.CP(n_8150), .D(n_2962), .CD(n_8074), .Q(counter - [9])); - notech_mux2 i_2861(.S(\nbus_11[0] ), .A(counter[9]), .B(n_617), .Z(n_2962 - )); - notech_nand2 i_61633(.A(n_385), .B(n_263), .Z(data_out[5])); - notech_reg counter_reg_8(.CP(n_8149), .D(n_2968), .CD(n_8073), .Q(counter - [8])); - notech_mux2 i_2869(.S(\nbus_11[0] ), .A(counter[8]), .B(n_3224), .Z(n_2968 - )); - notech_nand2 i_51632(.A(n_386), .B(n_262), .Z(data_out[4])); - notech_reg counter_reg_7(.CP(n_8150), .D(n_2974), .CD(n_8074), .Q(counter - [7])); - notech_mux2 i_2877(.S(\nbus_11[0] ), .A(counter[7]), .B(n_605), .Z(n_2974 - )); - notech_nand2 i_41631(.A(n_387), .B(n_261), .Z(data_out[3])); - notech_reg counter_reg_6(.CP(n_8145), .D(n_2980), .CD(n_8069), .Q(counter - [6])); - notech_mux2 i_2885(.S(\nbus_11[0] ), .A(counter[6]), .B(n_599), .Z(n_2980 - )); - notech_nand2 i_31630(.A(n_388), .B(n_260), .Z(data_out[2])); - notech_reg counter_reg_5(.CP(n_8145), .D(n_2986), .CD(n_8069), .Q(counter - [5])); - notech_mux2 i_2893(.S(\nbus_11[0] ), .A(counter[5]), .B(n_593), .Z(n_2986 - )); - notech_nand2 i_21629(.A(n_389), .B(n_259), .Z(data_out[1])); - notech_reg counter_reg_4(.CP(n_8144), .D(n_2992), .CD(n_8068), .Q(counter - [4])); - notech_mux2 i_2901(.S(\nbus_11[0] ), .A(counter[4]), .B(n_587), .Z(n_2992 - )); - notech_nand2 i_11628(.A(n_390), .B(n_258), .Z(data_out[0])); - notech_reg counter_reg_3(.CP(n_8144), .D(n_2998), .CD(n_8068), .Q(counter - [3])); - notech_mux2 i_2909(.S(\nbus_11[0] ), .A(counter[3]), .B(n_581), .Z(n_2998 - )); - notech_reg counter_reg_2(.CP(n_8145), .D(n_3004), .CD(n_8069), .Q(counter - [2])); - notech_mux2 i_2917(.S(\nbus_11[0] ), .A(counter[2]), .B(n_575), .Z(n_3004 - )); - notech_and4 i_667(.A(n_186), .B(n_437), .C(n_501), .D(n_7834), .Z(n_1090 - )); - notech_reg counter_reg_1(.CP(n_8145), .D(n_3010), .CD(n_8069), .Q(counter - [1])); - notech_mux2 i_2925(.S(\nbus_11[0] ), .A(counter[1]), .B(n_569), .Z(n_3010 - )); - notech_nand2 i_620(.A(n_7834), .B(n_7816), .Z(n_1017)); - notech_reg counter_reg_0(.CP(n_8145), .D(n_3016), .CD(n_8069), .Q(counter - [0])); - notech_mux2 i_2933(.S(\nbus_11[0] ), .A(counter[0]), .B(n_563), .Z(n_3016 - )); - notech_reg bcd_reg(.CP(n_8145), .D(n_3022), .CD(n_8069), .Q(bcd)); - notech_mux2 i_2941(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_3022 - )); - notech_reg counter_m_reg_7(.CP(n_8145), .D(n_3028), .CD(n_8069), .Q(counter_m - [7])); - notech_mux2 i_2949(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_277), .Z(n_3028 - )); - notech_nao3 i_575(.A(n_270), .B(n_7834), .C(n_353), .Z(\nbus_14[0] )); - notech_reg counter_m_reg_6(.CP(n_8144), .D(n_3034), .CD(n_8068), .Q(counter_m - [6])); - notech_mux2 i_2958(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_278), .Z(n_3034 - )); - notech_or4 i_568(.A(n_269), .B(n_196), .C(set_control_mode), .D(n_435), - .Z(n_915)); - notech_reg counter_m_reg_5(.CP(n_8144), .D(n_3040), .CD(n_8068), .Q(counter_m - [5])); - notech_mux2 i_2966(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_279), .Z(n_3040 - )); - notech_reg counter_m_reg_4(.CP(n_8144), .D(n_3046), .CD(n_8068), .Q(counter_m - [4])); - notech_mux2 i_2974(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_280), .Z(n_3046 - )); - notech_nand2 i_552(.A(n_276), .B(gate_last), .Z(n_888)); - notech_reg counter_m_reg_3(.CP(n_8144), .D(n_3052), .CD(n_8068), .Q(counter_m - [3])); - notech_mux2 i_2982(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_281), .Z(n_3052 - )); - notech_nao3 i_494(.A(n_268), .B(n_3250), .C(n_269), .Z(\nbus_12[0] )); - notech_reg counter_m_reg_2(.CP(n_8144), .D(n_3058), .CD(n_8068), .Q(counter_m - [2])); - notech_mux2 i_2990(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_282), .Z(n_3058 - )); - notech_nao3 i_486(.A(n_267), .B(n_7834), .C(latch_count), .Z(n_714)); - notech_reg counter_m_reg_1(.CP(n_8144), .D(n_3064), .CD(n_8068), .Q(counter_m - [1])); - notech_mux2 i_2998(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_283), .Z(n_3064 - )); - notech_nand3 i_410(.A(n_187), .B(n_7816), .C(n_440), .Z(\nbus_11[0] )); - notech_reg counter_m_reg_0(.CP(n_8144), .D(n_3070), .CD(n_8068), .Q(counter_m - [0])); - notech_mux2 i_3006(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_284), .Z(n_3070 - )); - notech_and4 i_16968(.A(n_497), .B(n_495), .C(n_286), .D(n_289), .Z(n_653 - )); - notech_reg counter_l_reg_7(.CP(n_8144), .D(n_3076), .CD(n_8068), .Q(counter_l - [7])); - notech_mux2 i_3014(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_277), .Z(n_3076 - )); - notech_nand3 i_15967(.A(n_492), .B(n_494), .C(n_294), .Z(n_647)); - notech_reg counter_l_reg_6(.CP(n_8144), .D(n_3082), .CD(n_8068), .Q(counter_l - [6])); - notech_mux2 i_3022(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_278), .Z(n_3082 - )); - notech_nand3 i_14966(.A(n_489), .B(n_491), .C(n_299), .Z(n_641)); - notech_reg counter_l_reg_5(.CP(n_8144), .D(n_3088), .CD(n_8068), .Q(counter_l - [5])); - notech_mux2 i_3030(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_279), .Z(n_3088 - )); - notech_nand3 i_13965(.A(n_484), .B(n_487), .C(n_305), .Z(n_635)); - notech_reg counter_l_reg_4(.CP(n_8146), .D(n_3094), .CD(n_8070), .Q(counter_l - [4])); - notech_mux2 i_3038(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_280), .Z(n_3094 - )); - notech_and4 i_12964(.A(n_308), .B(n_483), .C(n_309), .D(n_310), .Z(n_629 - )); - notech_reg counter_l_reg_3(.CP(n_8146), .D(n_3100), .CD(n_8070), .Q(counter_l - [3])); - notech_mux2 i_3046(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_281), .Z(n_3100 - )); - notech_nand3 i_11963(.A(n_477), .B(n_479), .C(n_315), .Z(n_623)); - notech_reg counter_l_reg_2(.CP(n_8146), .D(n_3106), .CD(n_8070), .Q(counter_l - [2])); - notech_mux2 i_3054(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_282), .Z(n_3106 - )); - notech_nand3 i_10962(.A(n_474), .B(n_476), .C(n_320), .Z(n_617)); - notech_reg counter_l_reg_1(.CP(n_8146), .D(n_3112), .CD(n_8070), .Q(counter_l - [1])); - notech_mux2 i_3062(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_283), .Z(n_3112 - )); - notech_and4 i_9961(.A(n_324), .B(n_323), .C(n_472), .D(n_325), .Z(n_611) - ); - notech_reg counter_l_reg_0(.CP(n_8146), .D(n_3118), .CD(n_8070), .Q(counter_l - [0])); - notech_mux2 i_3070(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_284), .Z(n_3118 - )); - notech_or4 i_8960(.A(n_328), .B(n_327), .C(n_329), .D(n_468), .Z(n_605) - ); - notech_reg gate_sampled_reg(.CP(n_8146), .D(n_3124), .CD(n_8070), .Q(gate_sampled - )); - notech_nand2 i_3078(.A(n_276), .B(n_3234), .Z(n_3124)); - notech_nand2 i_7959(.A(n_464), .B(n_463), .Z(n_599)); - notech_reg loaded_reg(.CP(n_8148), .D(n_3130), .CD(n_8072), .Q(loaded) - ); - notech_mux2 i_3086(.S(n_1017), .A(loaded), .B(n_7834), .Z(n_3130)); - notech_nand2 i_6958(.A(n_462), .B(n_461), .Z(n_593)); - notech_reg trigger_sampled_reg(.CP(n_8146), .D(n_3136), .CD(n_8070), .Q(trigger_sampled - )); - notech_mux2 i_3094(.S(n_276), .A(trigger), .B(trigger_sampled), .Z(n_3136 - )); - notech_nao3 i_5957(.A(n_453), .B(n_338), .C(n_341), .Z(n_587)); - notech_reg trigger_reg(.CP(n_8146), .D(n_3142), .CD(n_8070), .Q(trigger) - ); - notech_mux2 i_3102(.S(n_888), .A(trigger), .B(n_3237), .Z(n_3142)); - notech_nand2 i_4956(.A(n_449), .B(n_342), .Z(n_581)); - notech_reg_set gate_last_reg(.CP(n_8146), .D(1'b1), .SD(n_8070), .Q(gate_last - )); - notech_reg written_reg(.CP(n_8145), .D(n_3150), .CD(n_8069), .Q(written) - ); - notech_mux2 i_3114(.S(n_915), .A(written), .B(n_275), .Z(n_3150)); - notech_nand2 i_3955(.A(n_448), .B(n_229), .Z(n_575)); - notech_reg mode_reg_2(.CP(n_8145), .D(n_3156), .CD(n_8069), .Q(mode[2]) - ); - notech_mux2 i_3122(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z - (n_3156)); - notech_nand2 i_2954(.A(n_447), .B(n_230), .Z(n_569)); - notech_reg_set mode_reg_1(.CP(n_8145), .D(n_3162), .SD(n_8069), .Q(mode[ - 1])); - notech_mux2 i_3130(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z - (n_3162)); - notech_nao3 i_1953(.A(n_350), .B(n_349), .C(n_232), .Z(n_563)); - notech_reg mode_reg_0(.CP(n_8145), .D(n_3168), .CD(n_8069), .Q(mode[0]) - ); - notech_mux2 i_3138(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z - (n_3168)); - notech_reg clock_pulse_reg(.CP(n_8145), .D(n_3174), .CD(n_8069), .Q(clock_pulse - )); - notech_ao3 i_3146(.A(clock_last), .B(1'b1), .C(clock), .Z(n_3174)); - notech_reg clock_last_reg(.CP(n_8146), .D(clock), .CD(n_8070), .Q(clock_last - )); - notech_reg msb_write_reg(.CP(n_8146), .D(n_3178), .CD(n_8070), .Q(msb_write - )); - notech_nand2 i_3154(.A(n_3180), .B(n_3181), .Z(n_3178)); - notech_or4 i_3155(.A(n_378), .B(msb_write), .C(n_3251), .D(set_control_mode - ), .Z(n_3180)); - notech_nand3 i_3156(.A(msb_write), .B(n_7834), .C(n_394), .Z(n_3181)); - notech_nand3 i_318(.A(n_246), .B(n_244), .C(n_351), .Z(n_1093)); - notech_reg rw_mode_reg_1(.CP(n_8146), .D(n_3184), .CD(n_8070), .Q(rw_mode - [1])); - notech_mux2 i_3162(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]), - .Z(n_3184)); - notech_reg_set rw_mode_reg_0(.CP(n_8146), .D(n_3190), .SD(n_8070), .Q(rw_mode - [0])); - notech_mux2 i_3170(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]), - .Z(n_3190)); - notech_inv i_3543(.A(n_412), .Z(n_3196)); - notech_inv i_3544(.A(n_429), .Z(n_3197)); - notech_inv i_3545(.A(n_423), .Z(n_3198)); - notech_inv i_3546(.A(n_418), .Z(n_3199)); - notech_inv i_3547(.A(n_435), .Z(n_3200)); - notech_inv i_3548(.A(n_440), .Z(n_3201)); - notech_inv i_3549(.A(n_441), .Z(n_3202)); - notech_inv i_3550(.A(n_456), .Z(n_3203)); - notech_inv i_3551(.A(output_m[7]), .Z(n_3204)); - notech_inv i_3552(.A(output_m[6]), .Z(n_3205)); - notech_inv i_3553(.A(output_m[5]), .Z(n_3206)); - notech_inv i_3554(.A(output_m[4]), .Z(n_3207)); - notech_inv i_3555(.A(output_m[3]), .Z(n_3208)); - notech_inv i_3556(.A(output_m[2]), .Z(n_3209)); - notech_inv i_3557(.A(output_m[1]), .Z(n_3210)); - notech_inv i_3558(.A(output_m[0]), .Z(n_3211)); - notech_inv i_3559(.A(output_l[7]), .Z(n_3212)); - notech_inv i_3560(.A(output_l[6]), .Z(n_3213)); - notech_inv i_3561(.A(output_l[5]), .Z(n_3214)); - notech_inv i_3562(.A(output_l[4]), .Z(n_3215)); - notech_inv i_3563(.A(output_l[3]), .Z(n_3216)); - notech_inv i_3564(.A(output_l[2]), .Z(n_3217)); - notech_inv i_3565(.A(output_l[1]), .Z(n_3218)); - notech_inv i_3566(.A(output_l[0]), .Z(n_3219)); - notech_inv i_3567(.A(status_latched), .Z(n_3220)); - notech_inv i_3568(.A(n_1090), .Z(n_3221)); - notech_inv i_3569(.A(n_653), .Z(n_3222)); - notech_inv i_3570(.A(n_629), .Z(n_3223)); - notech_inv i_3571(.A(n_611), .Z(n_3224)); - notech_inv i_3572(.A(counter_m[6]), .Z(n_3225)); - notech_inv i_3573(.A(counter_m[5]), .Z(n_3226)); - notech_inv i_3574(.A(counter_m[4]), .Z(n_3227)); - notech_inv i_3575(.A(counter_m[3]), .Z(n_3228)); - notech_inv i_3576(.A(counter_m[2]), .Z(n_3229)); - notech_inv i_3577(.A(counter_m[1]), .Z(n_3230)); - notech_inv i_3578(.A(counter_m[0]), .Z(n_3231)); - notech_inv i_3579(.A(counter_l[6]), .Z(n_3232)); - notech_inv i_3580(.A(counter_l[5]), .Z(n_3233)); - notech_inv i_3581(.A(gate_sampled), .Z(n_3234)); - notech_inv i_3582(.A(n_1017), .Z(n_3235)); - notech_inv i_3583(.A(trigger_sampled), .Z(n_3236)); - notech_inv i_3584(.A(gate_last), .Z(n_3237)); - notech_inv i_3585(.A(mode[2]), .Z(n_3238)); - notech_inv i_3586(.A(mode[0]), .Z(n_3239)); - notech_inv i_3587(.A(clock_pulse), .Z(n_3240)); - notech_inv i_3588(.A(clock_last), .Z(n_3241)); - notech_inv i_3589(.A(counter[0]), .Z(n_3242)); - notech_inv i_3590(.A(counter[1]), .Z(n_3243)); - notech_inv i_3591(.A(counter[3]), .Z(n_3244)); - notech_inv i_3592(.A(counter[9]), .Z(n_3245)); - notech_inv i_3593(.A(counter[10]), .Z(n_3246)); - notech_inv i_3594(.A(counter[13]), .Z(n_3247)); - notech_inv i_3595(.A(counter[14]), .Z(n_3248)); - notech_inv i_3596(.A(counter[15]), .Z(n_3249)); - notech_inv i_3597(.A(set_control_mode), .Z(n_3250)); - notech_inv i_3598(.A(write), .Z(n_3251)); - notech_inv i_3599(.A(out), .Z(n_3252)); - notech_inv i_3600(.A(n_193), .Z(n_3253)); - notech_inv i_3601(.A(n_73), .Z(n_3254)); - notech_inv i_3602(.A(n_195), .Z(n_3255)); - notech_inv i_3603(.A(n_75), .Z(n_3256)); - notech_inv i_3604(.A(n_79), .Z(n_3257)); - notech_inv i_3605(.A(n_81), .Z(n_3258)); - notech_inv i_3606(.A(n_199), .Z(n_3259)); - notech_inv i_3607(.A(n_83), .Z(n_3260)); - notech_inv i_3608(.A(n_200), .Z(n_3261)); - notech_inv i_3609(.A(n_202), .Z(n_3262)); - notech_inv i_3610(.A(n_203), .Z(n_3263)); - notech_inv i_3611(.A(n_204), .Z(n_3264)); - notech_inv i_3612(.A(n_205), .Z(n_3265)); - notech_inv i_3613(.A(n_206), .Z(n_3266)); - notech_inv i_3614(.A(n_207), .Z(n_3267)); - notech_inv i_3615(.A(n_208), .Z(n_3268)); - notech_inv i_3616(.A(n_209), .Z(n_3269)); - notech_inv i_3617(.A(read), .Z(n_3270)); - AWDP_DEC_26_0 i_102(.O0({n_93, n_92, n_91, n_90, n_89, n_88, n_87, n_86, - n_85, n_83, n_81, n_79, n_77, n_75, n_73, n_71}), .counter(counter - )); - AWDP_SUB_39_0 i_96(.O0({n_209, n_208, n_207, n_206, n_205, n_204, n_203, - n_202, n_201, n_200, n_199, n_198, n_197, n_195, n_193, n_191}) - , .counter(counter)); -endmodule -module AWDP_DEC_26_1(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - - - - notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15])); - notech_inv i_1(.A(counter[0]), .Z(O0[0])); - notech_inv i_0(.A(counter[15]), .Z(n_96)); - notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_6357)); - notech_inv i_38(.A(n_6357), .Z(O0[14])); - notech_or2 i_36(.A(counter[14]), .B(n_124), .Z(n_126)); - notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_6384)); - notech_inv i_33(.A(n_6384), .Z(O0[13])); - notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124)); - notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_6411)); - notech_inv i_313649(.A(n_6411), .Z(O0[12])); - notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122)); - notech_xor2 i_293650(.A(counter[11]), .B(n_118), .Z(n_6438)); - notech_inv i_303651(.A(n_6438), .Z(O0[11])); - notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120)); - notech_xor2 i_283652(.A(counter[10]), .B(n_116), .Z(n_6465)); - notech_inv i_293653(.A(n_6465), .Z(O0[10])); - notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118)); - notech_xor2 i_273654(.A(counter[9]), .B(n_114), .Z(n_6492)); - notech_inv i_283655(.A(n_6492), .Z(O0[9])); - notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116)); - notech_xor2 i_273656(.A(counter[8]), .B(n_112), .Z(n_6519)); - notech_inv i_283657(.A(n_6519), .Z(O0[8])); - notech_or2 i_263658(.A(counter[8]), .B(n_112), .Z(n_114)); - notech_xor2 i_273659(.A(counter[7]), .B(n_110), .Z(n_6546)); - notech_inv i_283660(.A(n_6546), .Z(O0[7])); - notech_or2 i_263661(.A(counter[7]), .B(n_110), .Z(n_112)); - notech_xor2 i_273662(.A(counter[6]), .B(n_108), .Z(n_6573)); - notech_inv i_283663(.A(n_6573), .Z(O0[6])); - notech_or2 i_263664(.A(counter[6]), .B(n_108), .Z(n_110)); - notech_xor2 i_273665(.A(counter[5]), .B(n_106), .Z(n_6600)); - notech_inv i_283666(.A(n_6600), .Z(O0[5])); - notech_or2 i_263667(.A(counter[5]), .B(n_106), .Z(n_108)); - notech_xor2 i_273668(.A(counter[4]), .B(n_104), .Z(n_6627)); - notech_inv i_283669(.A(n_6627), .Z(O0[4])); - notech_or2 i_263670(.A(counter[4]), .B(n_104), .Z(n_106)); - notech_xor2 i_273671(.A(counter[3]), .B(n_102), .Z(n_6654)); - notech_inv i_283672(.A(n_6654), .Z(O0[3])); - notech_or2 i_263673(.A(counter[3]), .B(n_102), .Z(n_104)); - notech_xor2 i_273674(.A(counter[2]), .B(n_100), .Z(n_6681)); - notech_inv i_283675(.A(n_6681), .Z(O0[2])); - notech_or2 i_263676(.A(counter[2]), .B(n_100), .Z(n_102)); - notech_xor2 i_273677(.A(counter[1]), .B(counter[0]), .Z(n_6709)); - notech_inv i_283678(.A(n_6709), .Z(O0[1])); - notech_or2 i_263679(.A(counter[1]), .B(counter[0]), .Z(n_100)); -endmodule -module AWDP_SUB_39_1(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - wire \counter[1] ; - wire \counter[2] ; - wire \counter[3] ; - wire \counter[4] ; - wire \counter[5] ; - wire \counter[6] ; - wire \counter[7] ; - wire \counter[8] ; - wire \counter[9] ; - wire \counter[10] ; - wire \counter[11] ; - wire \counter[12] ; - wire \counter[13] ; - wire \counter[14] ; - wire \counter[15] ; - - - assign \counter[1] = counter[1]; - assign \counter[2] = counter[2]; - assign \counter[3] = counter[3]; - assign \counter[4] = counter[4]; - assign \counter[5] = counter[5]; - assign \counter[6] = counter[6]; - assign \counter[7] = counter[7]; - assign \counter[8] = counter[8]; - assign \counter[9] = counter[9]; - assign \counter[10] = counter[10]; - assign \counter[11] = counter[11]; - assign \counter[12] = counter[12]; - assign \counter[13] = counter[13]; - assign \counter[14] = counter[14]; - assign \counter[15] = counter[15]; - assign O0[0] = counter[0]; - - notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15])); - notech_inv i_1(.A(\counter[1] ), .Z(O0[1])); - notech_inv i_0(.A(\counter[15] ), .Z(n_96)); - notech_xor2 i_37(.A(\counter[14] ), .B(n_122), .Z(n_6736)); - notech_inv i_38(.A(n_6736), .Z(O0[14])); - notech_or2 i_36(.A(\counter[14] ), .B(n_122), .Z(n_124)); - notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_6763)); - notech_inv i_32(.A(n_6763), .Z(O0[13])); - notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122)); - notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_6790)); - notech_inv i_303680(.A(n_6790), .Z(O0[12])); - notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120)); - notech_xor2 i_283681(.A(\counter[11] ), .B(n_116), .Z(n_6817)); - notech_inv i_293682(.A(n_6817), .Z(O0[11])); - notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118)); - notech_xor2 i_273683(.A(\counter[10] ), .B(n_114), .Z(n_6844)); - notech_inv i_283684(.A(n_6844), .Z(O0[10])); - notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116)); - notech_xor2 i_273685(.A(\counter[9] ), .B(n_112), .Z(n_6871)); - notech_inv i_283686(.A(n_6871), .Z(O0[9])); - notech_or2 i_263687(.A(\counter[9] ), .B(n_112), .Z(n_114)); - notech_xor2 i_273688(.A(\counter[8] ), .B(n_110), .Z(n_6898)); - notech_inv i_283689(.A(n_6898), .Z(O0[8])); - notech_or2 i_263690(.A(\counter[8] ), .B(n_110), .Z(n_112)); - notech_xor2 i_273691(.A(\counter[7] ), .B(n_108), .Z(n_6925)); - notech_inv i_283692(.A(n_6925), .Z(O0[7])); - notech_or2 i_263693(.A(\counter[7] ), .B(n_108), .Z(n_110)); - notech_xor2 i_273694(.A(\counter[6] ), .B(n_106), .Z(n_6952)); - notech_inv i_283695(.A(n_6952), .Z(O0[6])); - notech_or2 i_263696(.A(\counter[6] ), .B(n_106), .Z(n_108)); - notech_xor2 i_273697(.A(\counter[5] ), .B(n_104), .Z(n_6979)); - notech_inv i_283698(.A(n_6979), .Z(O0[5])); - notech_or2 i_263699(.A(\counter[5] ), .B(n_104), .Z(n_106)); - notech_xor2 i_273700(.A(\counter[4] ), .B(n_102), .Z(n_7006)); - notech_inv i_283701(.A(n_7006), .Z(O0[4])); - notech_or2 i_263702(.A(\counter[4] ), .B(n_102), .Z(n_104)); - notech_xor2 i_273703(.A(\counter[3] ), .B(n_100), .Z(n_7033)); - notech_inv i_283704(.A(n_7033), .Z(O0[3])); - notech_or2 i_263705(.A(\counter[3] ), .B(n_100), .Z(n_102)); - notech_xor2 i_273706(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7061)); - notech_inv i_283707(.A(n_7061), .Z(O0[2])); - notech_or2 i_263708(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100)); -endmodule -module v8253_counter_1(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count - , latch_status, write, read, data_out); - - input clk; - input rst_n; - input clock; - input gate; - output out; - input [7:0] data_in; - input set_control_mode; - input latch_count; - input latch_status; - input write; - input read; - output [7:0] data_out; - - wire [1:0] rw_mode; - wire [7:0] counter_l; - wire [2:0] mode; - wire [7:0] output_m; - wire [7:0] output_l; - wire [7:0] counter_m; - wire [7:0] status; - wire [15:0] counter; - - - - notech_inv i_426(.A(n_8134), .Z(n_8141)); - notech_inv i_425(.A(n_8134), .Z(n_8140)); - notech_inv i_424(.A(n_8134), .Z(n_8139)); - notech_inv i_422(.A(n_8134), .Z(n_8137)); - notech_inv i_421(.A(n_8134), .Z(n_8136)); - notech_inv i_420(.A(n_8134), .Z(n_8135)); - notech_inv i_419(.A(clk), .Z(n_8134)); - notech_inv i_338(.A(n_8058), .Z(n_8065)); - notech_inv i_337(.A(n_8058), .Z(n_8064)); - notech_inv i_336(.A(n_8058), .Z(n_8063)); - notech_inv i_334(.A(n_8058), .Z(n_8061)); - notech_inv i_333(.A(n_8058), .Z(n_8060)); - notech_inv i_332(.A(n_8058), .Z(n_8059)); - notech_inv i_331(.A(rst_n), .Z(n_8058)); - notech_inv i_116(.A(n_7842), .Z(n_7843)); - notech_inv i_115(.A(n_2732), .Z(n_7842)); - notech_inv i_38(.A(n_7806), .Z(n_7807)); - notech_inv i_37(.A(n_2681), .Z(n_7806)); - notech_nao3 i_99(.A(n_441), .B(n_90), .C(n_444), .Z(n_305)); - notech_nao3 i_93(.A(n_441), .B(n_91), .C(n_444), .Z(n_299)); - notech_nao3 i_87(.A(n_441), .B(n_92), .C(n_444), .Z(n_294)); - notech_nao3 i_81(.A(n_441), .B(n_93), .C(n_444), .Z(n_289)); - notech_nand2 i_83(.A(counter_m[7]), .B(n_435), .Z(n_286)); - notech_and2 i_11588(.A(data_in[0]), .B(n_2732), .Z(n_284)); - notech_and2 i_21589(.A(data_in[1]), .B(n_2732), .Z(n_283)); - notech_and2 i_31590(.A(data_in[2]), .B(n_2732), .Z(n_282)); - notech_and2 i_41591(.A(data_in[3]), .B(n_2732), .Z(n_281)); - notech_and2 i_51592(.A(data_in[4]), .B(n_2732), .Z(n_280)); - notech_and2 i_61593(.A(data_in[5]), .B(n_2732), .Z(n_279)); - notech_and2 i_71594(.A(data_in[6]), .B(n_2732), .Z(n_278)); - notech_and2 i_81595(.A(data_in[7]), .B(n_2732), .Z(n_277)); - notech_nand2 i_2109(.A(clock), .B(n_2723), .Z(n_276)); - notech_and2 i_214(.A(n_2732), .B(n_499), .Z(n_275)); - notech_nao3 i_73(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .Z(n_270)); - notech_and4 i_77(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .D(write - ), .Z(n_269)); - notech_nao3 i_72(.A(rw_mode[1]), .B(write), .C(rw_mode[0]), .Z(n_268)); - notech_nand2 i_71(.A(read), .B(n_189), .Z(n_267)); - notech_nand2 i_215(.A(rw_mode[0]), .B(n_378), .Z(n_266)); - notech_nand2 i_213(.A(status[7]), .B(status_latched), .Z(n_265)); - notech_nand2 i_210(.A(status[6]), .B(status_latched), .Z(n_264)); - notech_nand2 i_207(.A(status[5]), .B(status_latched), .Z(n_263)); - notech_nand2 i_204(.A(status[4]), .B(status_latched), .Z(n_262)); - notech_nand2 i_201(.A(status[3]), .B(status_latched), .Z(n_261)); - notech_nand2 i_198(.A(status[2]), .B(status_latched), .Z(n_260)); - notech_nand2 i_194(.A(status[1]), .B(status_latched), .Z(n_259)); - notech_nand2 i_191(.A(status_latched), .B(status[0]), .Z(n_258)); - notech_and2 i_13(.A(n_403), .B(n_401), .Z(n_257)); - notech_and4 i_66(.A(n_405), .B(n_393), .C(n_2718), .D(n_399), .Z(n_254) - ); - notech_nao3 i_183(.A(written), .B(clock_pulse), .C(n_254), .Z(n_253)); - notech_and3 i_65(.A(n_357), .B(n_237), .C(n_356), .Z(n_252)); - notech_ao4 i_64(.A(n_408), .B(n_403), .C(n_407), .D(n_2722), .Z(n_251) - ); - notech_or4 i_180(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(msb_write), .Z - (n_250)); - notech_and2 i_47(.A(n_399), .B(n_250), .Z(n_248)); - notech_nand2 i_176(.A(data_in[2]), .B(set_control_mode), .Z(n_246)); - notech_or2 i_70(.A(data_in[1]), .B(data_in[3]), .Z(n_245)); - notech_nand2 i_175(.A(set_control_mode), .B(n_245), .Z(n_244)); - notech_nor2 i_174(.A(written), .B(n_353), .Z(n_243)); - notech_ao4 i_173(.A(n_425), .B(n_424), .C(counter_l[0]), .D(n_2702), .Z(n_241 - )); - notech_ao4 i_172(.A(mode[1]), .B(n_400), .C(n_241), .D(n_405), .Z(n_239) - ); - notech_or4 i_36(.A(n_423), .B(n_412), .C(n_405), .D(n_425), .Z(n_237)); - notech_ao4 i_162(.A(n_239), .B(n_2681), .C(n_194), .D(n_436), .Z(n_234) - ); - notech_or2 i_67(.A(n_234), .B(n_352), .Z(n_233)); - notech_and3 i_156(.A(n_441), .B(n_191), .C(n_2682), .Z(n_232)); - notech_or2 i_63(.A(n_71), .B(n_2683), .Z(n_231)); - notech_nand2 i_153(.A(counter_l[1]), .B(n_435), .Z(n_230)); - notech_nand2 i_150(.A(counter_l[2]), .B(n_435), .Z(n_229)); - notech_nor2 i_62(.A(n_77), .B(n_2683), .Z(n_228)); - notech_nor2 i_61(.A(n_197), .B(n_2683), .Z(n_227)); - notech_xor2 i_60(.A(counter[4]), .B(counter[5]), .Z(n_225)); - notech_xor2 i_59(.A(counter[6]), .B(n_419), .Z(n_223)); - notech_xor2 i_58(.A(counter[8]), .B(counter[9]), .Z(n_221)); - notech_xor2 i_57(.A(counter[10]), .B(n_417), .Z(n_219)); - notech_xor2 i_56(.A(counter[11]), .B(n_2680), .Z(n_216)); - notech_and2 i_40(.A(n_473), .B(n_460), .Z(n_214)); - notech_xor2 i_55(.A(counter[12]), .B(counter[13]), .Z(n_213)); - notech_xor2 i_54(.A(counter[14]), .B(n_413), .Z(n_211)); - notech_nand2 i_84(.A(counter[15]), .B(n_414), .Z(n_210)); - notech_and2 i_78(.A(n_378), .B(write), .Z(n_196)); - notech_and3 i_45(.A(n_398), .B(n_397), .C(n_403), .Z(n_194)); - notech_and4 i_52(.A(n_405), .B(n_397), .C(n_401), .D(n_398), .Z(n_192) - ); - notech_nand3 i_74(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_190)); - notech_nao3 i_46(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_189) - ); - notech_ao3 i_69(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_write), .Z(n_188) - ); - notech_ao4 i_68(.A(n_408), .B(n_257), .C(n_409), .D(n_248), .Z(n_187)); - notech_or4 i_17(.A(mode[2]), .B(mode[0]), .C(mode[1]), .D(n_243), .Z(n_186 - )); - notech_or2 i_2102(.A(n_188), .B(n_2733), .Z(n_185)); - notech_nao3 i_103(.A(counter[11]), .B(n_456), .C(n_452), .Z(n_308)); - notech_nand3 i_104(.A(n_2681), .B(n_2684), .C(n_216), .Z(n_309)); - notech_nao3 i_105(.A(n_441), .B(n_89), .C(n_444), .Z(n_310)); - notech_nao3 i_112(.A(n_441), .B(n_88), .C(n_444), .Z(n_315)); - notech_nao3 i_118(.A(n_441), .B(n_87), .C(n_444), .Z(n_320)); - notech_nao3 i_122(.A(counter[8]), .B(n_456), .C(n_452), .Z(n_323)); - notech_nao3 i_123(.A(n_2681), .B(n_2684), .C(counter[8]), .Z(n_324)); - notech_nao3 i_124(.A(n_441), .B(n_86), .C(n_444), .Z(n_325)); - notech_ao3 i_127(.A(counter[7]), .B(n_420), .C(n_452), .Z(n_327)); - notech_ao3 i_128(.A(n_441), .B(n_85), .C(n_444), .Z(n_328)); - notech_and3 i_129(.A(n_441), .B(n_201), .C(n_2682), .Z(n_329)); - notech_nand2 i_144(.A(counter_l[4]), .B(n_435), .Z(n_338)); - notech_and3 i_143(.A(n_441), .B(n_198), .C(n_2682), .Z(n_341)); - notech_nand2 i_147(.A(counter_l[3]), .B(n_435), .Z(n_342)); - notech_nand3 i_154(.A(counter_l[0]), .B(n_435), .C(n_405), .Z(n_349)); - notech_nand3 i_155(.A(n_440), .B(n_2681), .C(n_231), .Z(n_350)); - notech_nand3 i_158(.A(n_186), .B(n_2732), .C(n_233), .Z(n_351)); - notech_and3 i_161(.A(n_237), .B(n_401), .C(n_429), .Z(n_352)); - notech_nor2 i_16(.A(msb_write), .B(n_394), .Z(n_353)); - notech_nao3 i_186(.A(n_425), .B(n_2678), .C(n_405), .Z(n_356)); - notech_or4 i_187(.A(n_428), .B(n_2724), .C(counter[1]), .D(n_397), .Z(n_357 - )); - notech_and2 i_342(.A(latch_count), .B(n_2732), .Z(n_360)); - notech_nand2 i_2211(.A(latch_status), .B(n_2701), .Z(n_361)); - notech_nand2 i_42494(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_378)); - notech_nand2 i_03553(.A(n_266), .B(n_189), .Z(n_380)); - notech_nand2 i_2(.A(n_380), .B(n_2701), .Z(n_381)); - notech_nand3 i_1(.A(n_266), .B(n_189), .C(n_2701), .Z(n_382)); - notech_ao4 i_321(.A(n_382), .B(n_2685), .C(n_381), .D(n_2693), .Z(n_383) - ); - notech_ao4 i_320(.A(n_382), .B(n_2686), .C(n_381), .D(n_2694), .Z(n_384) - ); - notech_ao4 i_319(.A(n_382), .B(n_2687), .C(n_381), .D(n_2695), .Z(n_385) - ); - notech_ao4 i_317(.A(n_382), .B(n_2688), .C(n_381), .D(n_2696), .Z(n_386) - ); - notech_ao4 i_316(.A(n_382), .B(n_2689), .C(n_381), .D(n_2697), .Z(n_387) - ); - notech_ao4 i_315(.A(n_382), .B(n_2690), .C(n_381), .D(n_2698), .Z(n_388) - ); - notech_ao4 i_314(.A(n_382), .B(n_2691), .C(n_381), .D(n_2699), .Z(n_389) - ); - notech_ao4 i_313(.A(n_382), .B(n_2692), .C(n_381), .D(n_2700), .Z(n_390) - ); - notech_nao3 i_62497(.A(n_2720), .B(n_2721), .C(mode[1]), .Z(n_393)); - notech_nand3 i_11(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_394) - ); - notech_nand2 i_32503(.A(mode[1]), .B(n_2721), .Z(n_397)); - notech_nand2 i_298(.A(mode[2]), .B(n_2721), .Z(n_398)); - notech_and2 i_14(.A(n_398), .B(n_397), .Z(n_399)); - notech_nand2 i_299(.A(mode[0]), .B(n_2720), .Z(n_400)); - notech_nao3 i_62501(.A(mode[0]), .B(n_2720), .C(mode[1]), .Z(n_401)); - notech_nao3 i_82511(.A(mode[2]), .B(mode[0]), .C(mode[1]), .Z(n_403)); - notech_nand2 i_42504(.A(mode[1]), .B(mode[0]), .Z(n_405)); - notech_and2 i_35(.A(n_405), .B(n_397), .Z(n_407)); - notech_nand2 i_31(.A(loaded), .B(clock_pulse), .Z(n_408)); - notech_nand3 i_34(.A(loaded), .B(clock_pulse), .C(gate_sampled), .Z(n_409 - )); - notech_or4 i_82537(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(counter - [0]), .Z(n_412)); - notech_or2 i_4(.A(counter[12]), .B(counter[13]), .Z(n_413)); - notech_nao3 i_25(.A(n_2729), .B(n_2730), .C(counter[12]), .Z(n_414)); - notech_or2 i_5(.A(counter[8]), .B(counter[9]), .Z(n_417)); - notech_nao3 i_252533(.A(n_2727), .B(n_2728), .C(counter[8]), .Z(n_418) - ); - notech_or2 i_6(.A(counter[4]), .B(counter[5]), .Z(n_419)); - notech_or2 i_252544(.A(counter[6]), .B(n_419), .Z(n_420)); - notech_or4 i_15(.A(n_420), .B(counter[7]), .C(counter[11]), .D(n_418), .Z - (n_422)); - notech_or4 i_48(.A(n_422), .B(counter[14]), .C(n_413), .D(counter[15]), - .Z(n_423)); - notech_or2 i_342602(.A(n_412), .B(n_423), .Z(n_424)); - notech_nand2 i_3(.A(counter_l[0]), .B(n_863), .Z(n_425)); - notech_nao3 i_304(.A(n_2679), .B(n_2726), .C(counter[2]), .Z(n_428)); - notech_nao3 i_342574(.A(counter[1]), .B(n_2724), .C(n_428), .Z(n_429)); - notech_ao4 i_294(.A(n_252), .B(n_409), .C(n_251), .D(n_2718), .Z(n_434) - ); - notech_nand2 i_2206(.A(n_434), .B(n_253), .Z(n_435)); - notech_or2 i_2138(.A(n_187), .B(n_435), .Z(n_436)); - notech_or4 i_289(.A(n_428), .B(n_436), .C(counter[1]), .D(n_2724), .Z(n_437 - )); - notech_or4 i_32(.A(counter[0]), .B(n_428), .C(n_436), .D(n_2725), .Z(n_438 - )); - notech_or4 i_2127(.A(n_405), .B(n_408), .C(n_435), .D(n_2716), .Z(n_440) - ); - notech_nand2 i_2142(.A(bcd), .B(n_2677), .Z(n_441)); - notech_nand2 i_24(.A(n_441), .B(n_2682), .Z(n_442)); - notech_nand2 i_12(.A(n_440), .B(n_2681), .Z(n_444)); - notech_nand3 i_26(.A(n_441), .B(n_440), .C(n_2681), .Z(n_446)); - notech_ao4 i_281(.A(n_442), .B(n_2734), .C(n_446), .D(n_2735), .Z(n_447) - ); - notech_ao4 i_280(.A(n_442), .B(n_2736), .C(n_446), .D(n_2737), .Z(n_448) - ); - notech_ao4 i_279(.A(n_228), .B(n_444), .C(n_227), .D(n_440), .Z(n_449) - ); - notech_or2 i_2140(.A(n_422), .B(n_441), .Z(n_450)); - notech_nao3 i_30(.A(n_2683), .B(n_2681), .C(n_422), .Z(n_451)); - notech_nand2 i_43(.A(n_2681), .B(n_2683), .Z(n_452)); - notech_ao4 i_275(.A(n_446), .B(n_2738), .C(counter[4]), .D(n_452), .Z(n_453 - )); - notech_or4 i_2141(.A(counter[6]), .B(counter[7]), .C(n_419), .D(n_441), - .Z(n_456)); - notech_nao3 i_28(.A(n_422), .B(n_2681), .C(n_441), .Z(n_459)); - notech_or2 i_29(.A(n_459), .B(n_2684), .Z(n_460)); - notech_ao4 i_273(.A(n_446), .B(n_2739), .C(n_225), .D(n_460), .Z(n_461) - ); - notech_ao4 i_272(.A(n_2715), .B(n_2681), .C(n_442), .D(n_2740), .Z(n_462 - )); - notech_ao4 i_271(.A(n_446), .B(n_2741), .C(n_460), .D(n_223), .Z(n_463) - ); - notech_ao4 i_270(.A(n_2681), .B(n_2714), .C(n_442), .D(n_2742), .Z(n_464 - )); - notech_mux2 i_266(.S(n_435), .A(n_2684), .B(counter_l[7]), .Z(n_468)); - notech_ao4 i_262(.A(n_2681), .B(n_2713), .C(n_442), .D(n_2743), .Z(n_472 - )); - notech_nand3 i_33(.A(n_450), .B(n_7807), .C(n_2684), .Z(n_473)); - notech_ao4 i_260(.A(n_460), .B(n_2727), .C(n_221), .D(n_473), .Z(n_474) - ); - notech_reg output_m_reg_7(.CP(n_8140), .D(n_2233), .CD(n_8064), .Q(output_m - [7])); - notech_mux2 i_1530(.S(output_latched), .A(counter[15]), .B(output_m[7]), - .Z(n_2233)); - notech_ao4 i_259(.A(n_7807), .B(n_2712), .C(n_442), .D(n_2744), .Z(n_476 - )); - notech_reg output_m_reg_6(.CP(n_8140), .D(n_2239), .CD(n_8064), .Q(output_m - [6])); - notech_mux2 i_1538(.S(output_latched), .A(counter[14]), .B(output_m[6]), - .Z(n_2239)); - notech_ao4 i_257(.A(n_460), .B(n_2728), .C(n_219), .D(n_473), .Z(n_477) - ); - notech_reg output_m_reg_5(.CP(n_8139), .D(n_2245), .CD(n_8063), .Q(output_m - [5])); - notech_mux2 i_1546(.S(output_latched), .A(counter[13]), .B(output_m[5]), - .Z(n_2245)); - notech_reg output_m_reg_4(.CP(n_8139), .D(n_2251), .CD(n_8063), .Q(output_m - [4])); - notech_mux2 i_1554(.S(output_latched), .A(counter[12]), .B(output_m[4]), - .Z(n_2251)); - notech_ao4 i_256(.A(n_7807), .B(n_2711), .C(n_442), .D(n_2745), .Z(n_479 - )); - notech_reg output_m_reg_3(.CP(n_8140), .D(n_2257), .CD(n_8064), .Q(output_m - [3])); - notech_mux2 i_1562(.S(output_latched), .A(counter[11]), .B(output_m[3]), - .Z(n_2257)); - notech_reg output_m_reg_2(.CP(n_8140), .D(n_2263), .CD(n_8064), .Q(output_m - [2])); - notech_mux2 i_1570(.S(output_latched), .A(counter[10]), .B(output_m[2]), - .Z(n_2263)); - notech_reg output_m_reg_1(.CP(n_8140), .D(n_2269), .CD(n_8064), .Q(output_m - [1])); - notech_mux2 i_1578(.S(output_latched), .A(counter[9]), .B(output_m[1]), - .Z(n_2269)); - notech_reg output_m_reg_0(.CP(n_8140), .D(n_2275), .CD(n_8064), .Q(output_m - [0])); - notech_mux2 i_1586(.S(output_latched), .A(counter[8]), .B(output_m[0]), - .Z(n_2275)); - notech_ao4 i_252(.A(n_7807), .B(n_2710), .C(n_442), .D(n_2746), .Z(n_483 - )); - notech_reg status_reg_7(.CP(n_8140), .D(n_2281), .CD(n_8064), .Q(status[ - 7])); - notech_mux2 i_1594(.S(n_361), .A(n_863), .B(status[7]), .Z(n_2281)); - notech_mux2 i_250(.S(counter[12]), .A(n_451), .B(n_459), .Z(n_484)); - notech_reg status_reg_6(.CP(n_8139), .D(n_2287), .CD(n_8063), .Q(status[ - 6])); - notech_mux2 i_1602(.S(n_361), .A(null_counter), .B(status[6]), .Z(n_2287 - )); - notech_reg status_reg_5(.CP(n_8139), .D(n_2293), .CD(n_8063), .Q(status[ - 5])); - notech_mux2 i_1610(.S(n_361), .A(rw_mode[1]), .B(status[5]), .Z(n_2293) - ); - notech_nao3 i_21(.A(bcd), .B(n_2679), .C(n_412), .Z(n_486)); - notech_reg status_reg_4(.CP(n_8139), .D(n_2299), .CD(n_8063), .Q(status[ - 4])); - notech_mux2 i_1618(.S(n_361), .A(rw_mode[0]), .B(status[4]), .Z(n_2299) - ); - notech_ao4 i_249(.A(n_7807), .B(n_2709), .C(n_442), .D(n_2747), .Z(n_487 - )); - notech_reg status_reg_3(.CP(n_8139), .D(n_2305), .CD(n_8063), .Q(status[ - 3])); - notech_mux2 i_1626(.S(n_361), .A(mode[2]), .B(status[3]), .Z(n_2305)); - notech_nao3 i_42(.A(n_486), .B(n_7807), .C(n_450), .Z(n_488)); - notech_reg status_reg_2(.CP(n_8139), .D(n_2311), .CD(n_8063), .Q(status[ - 2])); - notech_mux2 i_1634(.S(n_361), .A(mode[1]), .B(status[2]), .Z(n_2311)); - notech_ao4 i_246(.A(n_214), .B(n_2729), .C(n_213), .D(n_488), .Z(n_489) - ); - notech_reg status_reg_1(.CP(n_8139), .D(n_2317), .CD(n_8063), .Q(status[ - 1])); - notech_mux2 i_1642(.S(n_361), .A(mode[0]), .B(status[1]), .Z(n_2317)); - notech_reg status_reg_0(.CP(n_8139), .D(n_2323), .CD(n_8063), .Q(status[ - 0])); - notech_mux2 i_1650(.S(n_361), .A(bcd), .B(status[0]), .Z(n_2323)); - notech_ao4 i_245(.A(n_7807), .B(n_2708), .C(n_442), .D(n_2748), .Z(n_491 - )); - notech_reg output_l_reg_7(.CP(n_8139), .D(n_2329), .CD(n_8063), .Q(output_l - [7])); - notech_mux2 i_1658(.S(output_latched), .A(counter[7]), .B(output_l[7]), - .Z(n_2329)); - notech_ao4 i_243(.A(n_214), .B(n_2730), .C(n_488), .D(n_211), .Z(n_492) - ); - notech_reg output_l_reg_6(.CP(n_8139), .D(n_2335), .CD(n_8063), .Q(output_l - [6])); - notech_mux2 i_1666(.S(output_latched), .A(counter[6]), .B(output_l[6]), - .Z(n_2335)); - notech_reg output_l_reg_5(.CP(n_8139), .D(n_2341), .CD(n_8063), .Q(output_l - [5])); - notech_mux2 i_1674(.S(output_latched), .A(counter[5]), .B(output_l[5]), - .Z(n_2341)); - notech_ao4 i_242(.A(n_7807), .B(n_2707), .C(n_442), .D(n_2749), .Z(n_494 - )); - notech_reg output_l_reg_4(.CP(n_8141), .D(n_2347), .CD(n_8065), .Q(output_l - [4])); - notech_mux2 i_1682(.S(output_latched), .A(counter[4]), .B(output_l[4]), - .Z(n_2347)); - notech_ao4 i_240(.A(n_459), .B(n_2731), .C(n_451), .D(n_210), .Z(n_495) - ); - notech_reg output_l_reg_3(.CP(n_8141), .D(n_2353), .CD(n_8065), .Q(output_l - [3])); - notech_mux2 i_1690(.S(output_latched), .A(counter[3]), .B(output_l[3]), - .Z(n_2353)); - notech_reg output_l_reg_2(.CP(n_8141), .D(n_2359), .CD(n_8065), .Q(output_l - [2])); - notech_mux2 i_1698(.S(output_latched), .A(counter[2]), .B(output_l[2]), - .Z(n_2359)); - notech_ao4 i_238(.A(n_486), .B(n_435), .C(n_442), .D(n_2750), .Z(n_497) - ); - notech_reg output_l_reg_1(.CP(n_8141), .D(n_2365), .CD(n_8065), .Q(output_l - [1])); - notech_mux2 i_1706(.S(output_latched), .A(counter[1]), .B(output_l[1]), - .Z(n_2365)); - notech_reg output_l_reg_0(.CP(n_8141), .D(n_2371), .CD(n_8065), .Q(output_l - [0])); - notech_mux2 i_1714(.S(output_latched), .A(counter[0]), .B(output_l[0]), - .Z(n_2371)); - notech_or2 i_8(.A(n_269), .B(n_196), .Z(n_499)); - notech_reg output_latched_reg(.CP(n_8141), .D(n_2377), .CD(n_8065), .Q(output_latched - )); - notech_mux2 i_1722(.S(n_714), .A(output_latched), .B(n_360), .Z(n_2377) - ); - notech_reg status_latched_reg(.CP(n_8141), .D(n_2383), .CD(n_8065), .Q(status_latched - )); - notech_nand2 i_1730(.A(n_2386), .B(n_2385), .Z(n_2383)); - notech_nand3 i_1731(.A(latch_status), .B(n_7843), .C(n_505), .Z(n_2385) - ); - notech_or4 i_1732(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2701 - ), .Z(n_2386)); - notech_ao4 i_223(.A(n_438), .B(n_194), .C(n_7807), .D(n_192), .Z(n_501) - ); - notech_reg msb_read_reg(.CP(n_8141), .D(n_2389), .CD(n_8065), .Q(msb_read - )); - notech_nand2 i_1738(.A(n_2391), .B(n_2392), .Z(n_2389)); - notech_or4 i_1739(.A(msb_read), .B(n_378), .C(set_control_mode), .D(n_2751 - ), .Z(n_2391)); - notech_nand3 i_1740(.A(msb_read), .B(n_7843), .C(n_190), .Z(n_2392)); - notech_reg null_counter_reg(.CP(n_8141), .D(n_2395), .CD(n_8065), .Q(null_counter - )); - notech_nand2 i_1746(.A(n_2397), .B(n_2398), .Z(n_2395)); - notech_ao4 i_1747(.A(n_188), .B(n_2733), .C(n_7843), .D(n_2717), .Z(n_2397 - )); - notech_nand3 i_1748(.A(null_counter), .B(n_185), .C(n_2717), .Z(n_2398) - ); - notech_reg_set out_reg(.CP(n_8141), .D(n_2401), .SD(n_8065), .Q(n_863) - ); - notech_mux2 i_1754(.S(n_2703), .A(n_863), .B(n_1093), .Z(n_2401)); - notech_reg counter_reg_15(.CP(n_8140), .D(n_2407), .CD(n_8064), .Q(counter - [15])); - notech_mux2 i_1762(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2704), .Z(n_2407 - )); - notech_or2 i_219(.A(latch_status), .B(read), .Z(n_505)); - notech_reg counter_reg_14(.CP(n_8140), .D(n_2413), .CD(n_8064), .Q(counter - [14])); - notech_mux2 i_1770(.S(\nbus_11[0] ), .A(counter[14]), .B(n_647), .Z(n_2413 - )); - notech_reg counter_reg_13(.CP(n_8140), .D(n_2419), .CD(n_8064), .Q(counter - [13])); - notech_mux2 i_1778(.S(\nbus_11[0] ), .A(counter[13]), .B(n_641), .Z(n_2419 - )); - notech_reg counter_reg_12(.CP(n_8140), .D(n_2425), .CD(n_8064), .Q(counter - [12])); - notech_mux2 i_1786(.S(\nbus_11[0] ), .A(counter[12]), .B(n_635), .Z(n_2425 - )); - notech_reg counter_reg_11(.CP(n_8140), .D(n_2431), .CD(n_8064), .Q(counter - [11])); - notech_mux2 i_1794(.S(\nbus_11[0] ), .A(counter[11]), .B(n_2705), .Z(n_2431 - )); - notech_nand2 i_81635(.A(n_383), .B(n_265), .Z(data_out[7])); - notech_reg counter_reg_10(.CP(n_8141), .D(n_2437), .CD(n_8065), .Q(counter - [10])); - notech_mux2 i_1802(.S(\nbus_11[0] ), .A(counter[10]), .B(n_623), .Z(n_2437 - )); - notech_nand2 i_71634(.A(n_384), .B(n_264), .Z(data_out[6])); - notech_reg counter_reg_9(.CP(n_8141), .D(n_2443), .CD(n_8065), .Q(counter - [9])); - notech_mux2 i_1810(.S(\nbus_11[0] ), .A(counter[9]), .B(n_617), .Z(n_2443 - )); - notech_nand2 i_61633(.A(n_385), .B(n_263), .Z(data_out[5])); - notech_reg counter_reg_8(.CP(n_8140), .D(n_2449), .CD(n_8064), .Q(counter - [8])); - notech_mux2 i_1818(.S(\nbus_11[0] ), .A(counter[8]), .B(n_2706), .Z(n_2449 - )); - notech_nand2 i_51632(.A(n_386), .B(n_262), .Z(data_out[4])); - notech_reg counter_reg_7(.CP(n_8141), .D(n_2455), .CD(n_8065), .Q(counter - [7])); - notech_mux2 i_1826(.S(\nbus_11[0] ), .A(counter[7]), .B(n_605), .Z(n_2455 - )); - notech_nand2 i_41631(.A(n_387), .B(n_261), .Z(data_out[3])); - notech_reg counter_reg_6(.CP(n_8136), .D(n_2461), .CD(n_8060), .Q(counter - [6])); - notech_mux2 i_1834(.S(\nbus_11[0] ), .A(counter[6]), .B(n_599), .Z(n_2461 - )); - notech_nand2 i_31630(.A(n_388), .B(n_260), .Z(data_out[2])); - notech_reg counter_reg_5(.CP(n_8136), .D(n_2467), .CD(n_8060), .Q(counter - [5])); - notech_mux2 i_1842(.S(\nbus_11[0] ), .A(counter[5]), .B(n_593), .Z(n_2467 - )); - notech_nand2 i_21629(.A(n_389), .B(n_259), .Z(data_out[1])); - notech_reg counter_reg_4(.CP(n_8135), .D(n_2473), .CD(n_8059), .Q(counter - [4])); - notech_mux2 i_1850(.S(\nbus_11[0] ), .A(counter[4]), .B(n_587), .Z(n_2473 - )); - notech_nand2 i_11628(.A(n_390), .B(n_258), .Z(data_out[0])); - notech_reg counter_reg_3(.CP(n_8135), .D(n_2479), .CD(n_8059), .Q(counter - [3])); - notech_mux2 i_1858(.S(\nbus_11[0] ), .A(counter[3]), .B(n_581), .Z(n_2479 - )); - notech_reg counter_reg_2(.CP(n_8136), .D(n_2485), .CD(n_8060), .Q(counter - [2])); - notech_mux2 i_1866(.S(\nbus_11[0] ), .A(counter[2]), .B(n_575), .Z(n_2485 - )); - notech_and4 i_667(.A(n_186), .B(n_437), .C(n_501), .D(n_7843), .Z(n_1090 - )); - notech_reg counter_reg_1(.CP(n_8136), .D(n_2491), .CD(n_8060), .Q(counter - [1])); - notech_mux2 i_1874(.S(\nbus_11[0] ), .A(counter[1]), .B(n_569), .Z(n_2491 - )); - notech_nand2 i_620(.A(n_7843), .B(n_7807), .Z(n_1017)); - notech_reg counter_reg_0(.CP(n_8136), .D(n_2497), .CD(n_8060), .Q(counter - [0])); - notech_mux2 i_1882(.S(\nbus_11[0] ), .A(counter[0]), .B(n_563), .Z(n_2497 - )); - notech_reg bcd_reg(.CP(n_8136), .D(n_2503), .CD(n_8060), .Q(bcd)); - notech_mux2 i_1890(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_2503 - )); - notech_reg counter_m_reg_7(.CP(n_8136), .D(n_2509), .CD(n_8060), .Q(counter_m - [7])); - notech_mux2 i_1898(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_277), .Z(n_2509 - )); - notech_nao3 i_575(.A(n_270), .B(n_7843), .C(n_353), .Z(\nbus_14[0] )); - notech_reg counter_m_reg_6(.CP(n_8135), .D(n_2515), .CD(n_8059), .Q(counter_m - [6])); - notech_mux2 i_1906(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_278), .Z(n_2515 - )); - notech_or4 i_568(.A(n_269), .B(n_196), .C(set_control_mode), .D(n_435), - .Z(n_915)); - notech_reg counter_m_reg_5(.CP(n_8135), .D(n_2521), .CD(n_8059), .Q(counter_m - [5])); - notech_mux2 i_1914(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_279), .Z(n_2521 - )); - notech_reg counter_m_reg_4(.CP(n_8135), .D(n_2527), .CD(n_8059), .Q(counter_m - [4])); - notech_mux2 i_1922(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_280), .Z(n_2527 - )); - notech_nand2 i_552(.A(n_276), .B(gate_last), .Z(n_888)); - notech_reg counter_m_reg_3(.CP(n_8135), .D(n_2533), .CD(n_8059), .Q(counter_m - [3])); - notech_mux2 i_1930(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_281), .Z(n_2533 - )); - notech_nao3 i_494(.A(n_268), .B(n_2732), .C(n_269), .Z(\nbus_12[0] )); - notech_reg counter_m_reg_2(.CP(n_8135), .D(n_2539), .CD(n_8059), .Q(counter_m - [2])); - notech_mux2 i_1938(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_282), .Z(n_2539 - )); - notech_nao3 i_486(.A(n_267), .B(n_7843), .C(latch_count), .Z(n_714)); - notech_reg counter_m_reg_1(.CP(n_8135), .D(n_2545), .CD(n_8059), .Q(counter_m - [1])); - notech_mux2 i_1946(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_283), .Z(n_2545 - )); - notech_nand3 i_410(.A(n_187), .B(n_7807), .C(n_440), .Z(\nbus_11[0] )); - notech_reg counter_m_reg_0(.CP(n_8135), .D(n_2551), .CD(n_8059), .Q(counter_m - [0])); - notech_mux2 i_1955(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_284), .Z(n_2551 - )); - notech_and4 i_16968(.A(n_497), .B(n_495), .C(n_286), .D(n_289), .Z(n_653 - )); - notech_reg counter_l_reg_7(.CP(n_8135), .D(n_2557), .CD(n_8059), .Q(counter_l - [7])); - notech_mux2 i_1963(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_277), .Z(n_2557 - )); - notech_nand3 i_15967(.A(n_492), .B(n_494), .C(n_294), .Z(n_647)); - notech_reg counter_l_reg_6(.CP(n_8135), .D(n_2563), .CD(n_8059), .Q(counter_l - [6])); - notech_mux2 i_1971(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_278), .Z(n_2563 - )); - notech_nand3 i_14966(.A(n_489), .B(n_491), .C(n_299), .Z(n_641)); - notech_reg counter_l_reg_5(.CP(n_8135), .D(n_2569), .CD(n_8059), .Q(counter_l - [5])); - notech_mux2 i_1979(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_279), .Z(n_2569 - )); - notech_nand3 i_13965(.A(n_484), .B(n_487), .C(n_305), .Z(n_635)); - notech_reg counter_l_reg_4(.CP(n_8137), .D(n_2575), .CD(n_8061), .Q(counter_l - [4])); - notech_mux2 i_1987(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_280), .Z(n_2575 - )); - notech_and4 i_12964(.A(n_308), .B(n_483), .C(n_309), .D(n_310), .Z(n_629 - )); - notech_reg counter_l_reg_3(.CP(n_8137), .D(n_2581), .CD(n_8061), .Q(counter_l - [3])); - notech_mux2 i_1995(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_281), .Z(n_2581 - )); - notech_nand3 i_11963(.A(n_477), .B(n_479), .C(n_315), .Z(n_623)); - notech_reg counter_l_reg_2(.CP(n_8137), .D(n_2587), .CD(n_8061), .Q(counter_l - [2])); - notech_mux2 i_2003(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_282), .Z(n_2587 - )); - notech_nand3 i_10962(.A(n_474), .B(n_476), .C(n_320), .Z(n_617)); - notech_reg counter_l_reg_1(.CP(n_8137), .D(n_2593), .CD(n_8061), .Q(counter_l - [1])); - notech_mux2 i_2011(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_283), .Z(n_2593 - )); - notech_and4 i_9961(.A(n_324), .B(n_323), .C(n_472), .D(n_325), .Z(n_611) - ); - notech_reg counter_l_reg_0(.CP(n_8137), .D(n_2599), .CD(n_8061), .Q(counter_l - [0])); - notech_mux2 i_2019(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_284), .Z(n_2599 - )); - notech_or4 i_8960(.A(n_328), .B(n_327), .C(n_329), .D(n_468), .Z(n_605) - ); - notech_reg gate_sampled_reg(.CP(n_8137), .D(n_2605), .CD(n_8061), .Q(gate_sampled - )); - notech_nand2 i_2027(.A(n_276), .B(n_2716), .Z(n_2605)); - notech_nand2 i_7959(.A(n_464), .B(n_463), .Z(n_599)); - notech_reg loaded_reg(.CP(n_8139), .D(n_2611), .CD(n_8063), .Q(loaded) - ); - notech_mux2 i_2035(.S(n_1017), .A(loaded), .B(n_7843), .Z(n_2611)); - notech_nand2 i_6958(.A(n_462), .B(n_461), .Z(n_593)); - notech_reg trigger_sampled_reg(.CP(n_8137), .D(n_2617), .CD(n_8061), .Q(trigger_sampled - )); - notech_mux2 i_2043(.S(n_276), .A(trigger), .B(trigger_sampled), .Z(n_2617 - )); - notech_nao3 i_5957(.A(n_453), .B(n_338), .C(n_341), .Z(n_587)); - notech_reg trigger_reg(.CP(n_8137), .D(n_2623), .CD(n_8061), .Q(trigger) - ); - notech_mux2 i_2051(.S(n_888), .A(trigger), .B(n_2719), .Z(n_2623)); - notech_nand2 i_4956(.A(n_449), .B(n_342), .Z(n_581)); - notech_reg_set gate_last_reg(.CP(n_8137), .D(1'b1), .SD(n_8061), .Q(gate_last - )); - notech_reg written_reg(.CP(n_8136), .D(n_2631), .CD(n_8060), .Q(written) - ); - notech_mux2 i_2063(.S(n_915), .A(written), .B(n_275), .Z(n_2631)); - notech_nand2 i_3955(.A(n_448), .B(n_229), .Z(n_575)); - notech_reg mode_reg_2(.CP(n_8136), .D(n_2637), .CD(n_8060), .Q(mode[2]) - ); - notech_mux2 i_2071(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z - (n_2637)); - notech_nand2 i_2954(.A(n_447), .B(n_230), .Z(n_569)); - notech_reg_set mode_reg_1(.CP(n_8136), .D(n_2643), .SD(n_8060), .Q(mode[ - 1])); - notech_mux2 i_2079(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z - (n_2643)); - notech_nao3 i_1953(.A(n_350), .B(n_349), .C(n_232), .Z(n_563)); - notech_reg mode_reg_0(.CP(n_8136), .D(n_2649), .CD(n_8060), .Q(mode[0]) - ); - notech_mux2 i_2087(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z - (n_2649)); - notech_reg clock_pulse_reg(.CP(n_8136), .D(n_2655), .CD(n_8060), .Q(clock_pulse - )); - notech_ao3 i_2095(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2655)); - notech_reg clock_last_reg(.CP(n_8137), .D(clock), .CD(n_8061), .Q(clock_last - )); - notech_reg msb_write_reg(.CP(n_8137), .D(n_2659), .CD(n_8061), .Q(msb_write - )); - notech_nand2 i_2105(.A(n_2661), .B(n_2662), .Z(n_2659)); - notech_or4 i_2106(.A(n_378), .B(msb_write), .C(n_2733), .D(set_control_mode - ), .Z(n_2661)); - notech_nand3 i_2107(.A(msb_write), .B(n_7843), .C(n_394), .Z(n_2662)); - notech_nand3 i_318(.A(n_246), .B(n_244), .C(n_351), .Z(n_1093)); - notech_reg rw_mode_reg_1(.CP(n_8137), .D(n_2665), .CD(n_8061), .Q(rw_mode - [1])); - notech_mux2 i_2114(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]), - .Z(n_2665)); - notech_reg_set rw_mode_reg_0(.CP(n_8137), .D(n_2671), .SD(n_8061), .Q(rw_mode - [0])); - notech_mux2 i_2122(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]), - .Z(n_2671)); - notech_inv i_2502(.A(n_412), .Z(n_2677)); - notech_inv i_2503(.A(n_429), .Z(n_2678)); - notech_inv i_2504(.A(n_423), .Z(n_2679)); - notech_inv i_2505(.A(n_418), .Z(n_2680)); - notech_inv i_2506(.A(n_435), .Z(n_2681)); - notech_inv i_2507(.A(n_440), .Z(n_2682)); - notech_inv i_2508(.A(n_441), .Z(n_2683)); - notech_inv i_2509(.A(n_456), .Z(n_2684)); - notech_inv i_2510(.A(output_m[7]), .Z(n_2685)); - notech_inv i_2511(.A(output_m[6]), .Z(n_2686)); - notech_inv i_2512(.A(output_m[5]), .Z(n_2687)); - notech_inv i_2513(.A(output_m[4]), .Z(n_2688)); - notech_inv i_2514(.A(output_m[3]), .Z(n_2689)); - notech_inv i_2515(.A(output_m[2]), .Z(n_2690)); - notech_inv i_2516(.A(output_m[1]), .Z(n_2691)); - notech_inv i_2517(.A(output_m[0]), .Z(n_2692)); - notech_inv i_2518(.A(output_l[7]), .Z(n_2693)); - notech_inv i_2519(.A(output_l[6]), .Z(n_2694)); - notech_inv i_2520(.A(output_l[5]), .Z(n_2695)); - notech_inv i_2521(.A(output_l[4]), .Z(n_2696)); - notech_inv i_2522(.A(output_l[3]), .Z(n_2697)); - notech_inv i_2523(.A(output_l[2]), .Z(n_2698)); - notech_inv i_2524(.A(output_l[1]), .Z(n_2699)); - notech_inv i_2525(.A(output_l[0]), .Z(n_2700)); - notech_inv i_2526(.A(status_latched), .Z(n_2701)); - notech_inv i_2527(.A(n_863), .Z(n_2702)); - notech_inv i_2528(.A(n_1090), .Z(n_2703)); - notech_inv i_2529(.A(n_653), .Z(n_2704)); - notech_inv i_2530(.A(n_629), .Z(n_2705)); - notech_inv i_2531(.A(n_611), .Z(n_2706)); - notech_inv i_2532(.A(counter_m[6]), .Z(n_2707)); - notech_inv i_2533(.A(counter_m[5]), .Z(n_2708)); - notech_inv i_2534(.A(counter_m[4]), .Z(n_2709)); - notech_inv i_2535(.A(counter_m[3]), .Z(n_2710)); - notech_inv i_2536(.A(counter_m[2]), .Z(n_2711)); - notech_inv i_2537(.A(counter_m[1]), .Z(n_2712)); - notech_inv i_2538(.A(counter_m[0]), .Z(n_2713)); - notech_inv i_2539(.A(counter_l[6]), .Z(n_2714)); - notech_inv i_2540(.A(counter_l[5]), .Z(n_2715)); - notech_inv i_2541(.A(gate_sampled), .Z(n_2716)); - notech_inv i_2542(.A(n_1017), .Z(n_2717)); - notech_inv i_2543(.A(trigger_sampled), .Z(n_2718)); - notech_inv i_2544(.A(gate_last), .Z(n_2719)); - notech_inv i_2545(.A(mode[2]), .Z(n_2720)); - notech_inv i_2546(.A(mode[0]), .Z(n_2721)); - notech_inv i_2547(.A(clock_pulse), .Z(n_2722)); - notech_inv i_2548(.A(clock_last), .Z(n_2723)); - notech_inv i_2549(.A(counter[0]), .Z(n_2724)); - notech_inv i_2550(.A(counter[1]), .Z(n_2725)); - notech_inv i_2551(.A(counter[3]), .Z(n_2726)); - notech_inv i_2552(.A(counter[9]), .Z(n_2727)); - notech_inv i_2553(.A(counter[10]), .Z(n_2728)); - notech_inv i_2554(.A(counter[13]), .Z(n_2729)); - notech_inv i_2555(.A(counter[14]), .Z(n_2730)); - notech_inv i_2556(.A(counter[15]), .Z(n_2731)); - notech_inv i_2557(.A(set_control_mode), .Z(n_2732)); - notech_inv i_2558(.A(write), .Z(n_2733)); - notech_inv i_2559(.A(n_193), .Z(n_2734)); - notech_inv i_2560(.A(n_73), .Z(n_2735)); - notech_inv i_2561(.A(n_195), .Z(n_2736)); - notech_inv i_2562(.A(n_75), .Z(n_2737)); - notech_inv i_2563(.A(n_79), .Z(n_2738)); - notech_inv i_2564(.A(n_81), .Z(n_2739)); - notech_inv i_2565(.A(n_199), .Z(n_2740)); - notech_inv i_2566(.A(n_83), .Z(n_2741)); - notech_inv i_2567(.A(n_200), .Z(n_2742)); - notech_inv i_2568(.A(n_202), .Z(n_2743)); - notech_inv i_2569(.A(n_203), .Z(n_2744)); - notech_inv i_2570(.A(n_204), .Z(n_2745)); - notech_inv i_2571(.A(n_205), .Z(n_2746)); - notech_inv i_2572(.A(n_206), .Z(n_2747)); - notech_inv i_2573(.A(n_207), .Z(n_2748)); - notech_inv i_2574(.A(n_208), .Z(n_2749)); - notech_inv i_2575(.A(n_209), .Z(n_2750)); - notech_inv i_2576(.A(read), .Z(n_2751)); - AWDP_DEC_26_1 i_102(.O0({n_93, n_92, n_91, n_90, n_89, n_88, n_87, n_86, - n_85, n_83, n_81, n_79, n_77, n_75, n_73, n_71}), .counter(counter - )); - AWDP_SUB_39_1 i_96(.O0({n_209, n_208, n_207, n_206, n_205, n_204, n_203, - n_202, n_201, n_200, n_199, n_198, n_197, n_195, n_193, n_191}) - , .counter(counter)); -endmodule -module AWDP_DEC_26_2(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - - - - notech_ha2 i_16(.A(n_96), .B(n_126), .Z(O0[15])); - notech_inv i_1(.A(counter[0]), .Z(O0[0])); - notech_inv i_0(.A(counter[15]), .Z(n_96)); - notech_xor2 i_37(.A(counter[14]), .B(n_124), .Z(n_7088)); - notech_inv i_38(.A(n_7088), .Z(O0[14])); - notech_or2 i_36(.A(counter[14]), .B(n_124), .Z(n_126)); - notech_xor2 i_32(.A(counter[13]), .B(n_122), .Z(n_7115)); - notech_inv i_33(.A(n_7115), .Z(O0[13])); - notech_or2 i_31(.A(counter[13]), .B(n_122), .Z(n_124)); - notech_xor2 i_30(.A(counter[12]), .B(n_120), .Z(n_7142)); - notech_inv i_313709(.A(n_7142), .Z(O0[12])); - notech_or2 i_29(.A(counter[12]), .B(n_120), .Z(n_122)); - notech_xor2 i_293710(.A(counter[11]), .B(n_118), .Z(n_7169)); - notech_inv i_303711(.A(n_7169), .Z(O0[11])); - notech_or2 i_28(.A(counter[11]), .B(n_118), .Z(n_120)); - notech_xor2 i_283712(.A(counter[10]), .B(n_116), .Z(n_7196)); - notech_inv i_293713(.A(n_7196), .Z(O0[10])); - notech_or2 i_27(.A(counter[10]), .B(n_116), .Z(n_118)); - notech_xor2 i_273714(.A(counter[9]), .B(n_114), .Z(n_7223)); - notech_inv i_283715(.A(n_7223), .Z(O0[9])); - notech_or2 i_26(.A(counter[9]), .B(n_114), .Z(n_116)); - notech_xor2 i_273716(.A(counter[8]), .B(n_112), .Z(n_7250)); - notech_inv i_283717(.A(n_7250), .Z(O0[8])); - notech_or2 i_263718(.A(counter[8]), .B(n_112), .Z(n_114)); - notech_xor2 i_273719(.A(counter[7]), .B(n_110), .Z(n_7277)); - notech_inv i_283720(.A(n_7277), .Z(O0[7])); - notech_or2 i_263721(.A(counter[7]), .B(n_110), .Z(n_112)); - notech_xor2 i_273722(.A(counter[6]), .B(n_108), .Z(n_7304)); - notech_inv i_283723(.A(n_7304), .Z(O0[6])); - notech_or2 i_263724(.A(counter[6]), .B(n_108), .Z(n_110)); - notech_xor2 i_273725(.A(counter[5]), .B(n_106), .Z(n_7331)); - notech_inv i_283726(.A(n_7331), .Z(O0[5])); - notech_or2 i_263727(.A(counter[5]), .B(n_106), .Z(n_108)); - notech_xor2 i_273728(.A(counter[4]), .B(n_104), .Z(n_7358)); - notech_inv i_283729(.A(n_7358), .Z(O0[4])); - notech_or2 i_263730(.A(counter[4]), .B(n_104), .Z(n_106)); - notech_xor2 i_273731(.A(counter[3]), .B(n_102), .Z(n_7385)); - notech_inv i_283732(.A(n_7385), .Z(O0[3])); - notech_or2 i_263733(.A(counter[3]), .B(n_102), .Z(n_104)); - notech_xor2 i_273734(.A(counter[2]), .B(n_100), .Z(n_7412)); - notech_inv i_283735(.A(n_7412), .Z(O0[2])); - notech_or2 i_263736(.A(counter[2]), .B(n_100), .Z(n_102)); - notech_xor2 i_273737(.A(counter[1]), .B(counter[0]), .Z(n_7440)); - notech_inv i_283738(.A(n_7440), .Z(O0[1])); - notech_or2 i_263739(.A(counter[1]), .B(counter[0]), .Z(n_100)); -endmodule -module AWDP_SUB_39_2(O0, counter); - - output [15:0] O0; - input [15:0] counter; - - wire \counter[1] ; - wire \counter[2] ; - wire \counter[3] ; - wire \counter[4] ; - wire \counter[5] ; - wire \counter[6] ; - wire \counter[7] ; - wire \counter[8] ; - wire \counter[9] ; - wire \counter[10] ; - wire \counter[11] ; - wire \counter[12] ; - wire \counter[13] ; - wire \counter[14] ; - wire \counter[15] ; - - - assign \counter[1] = counter[1]; - assign \counter[2] = counter[2]; - assign \counter[3] = counter[3]; - assign \counter[4] = counter[4]; - assign \counter[5] = counter[5]; - assign \counter[6] = counter[6]; - assign \counter[7] = counter[7]; - assign \counter[8] = counter[8]; - assign \counter[9] = counter[9]; - assign \counter[10] = counter[10]; - assign \counter[11] = counter[11]; - assign \counter[12] = counter[12]; - assign \counter[13] = counter[13]; - assign \counter[14] = counter[14]; - assign \counter[15] = counter[15]; - assign O0[0] = counter[0]; - - notech_ha2 i_15(.A(n_96), .B(n_124), .Z(O0[15])); - notech_inv i_1(.A(\counter[1] ), .Z(O0[1])); - notech_inv i_0(.A(\counter[15] ), .Z(n_96)); - notech_xor2 i_44(.A(\counter[14] ), .B(n_122), .Z(n_7467)); - notech_inv i_45(.A(n_7467), .Z(O0[14])); - notech_or2 i_43(.A(\counter[14] ), .B(n_122), .Z(n_124)); - notech_xor2 i_31(.A(\counter[13] ), .B(n_120), .Z(n_7494)); - notech_inv i_32(.A(n_7494), .Z(O0[13])); - notech_or2 i_30(.A(\counter[13] ), .B(n_120), .Z(n_122)); - notech_xor2 i_29(.A(\counter[12] ), .B(n_118), .Z(n_7521)); - notech_inv i_303740(.A(n_7521), .Z(O0[12])); - notech_or2 i_28(.A(\counter[12] ), .B(n_118), .Z(n_120)); - notech_xor2 i_283741(.A(\counter[11] ), .B(n_116), .Z(n_7548)); - notech_inv i_293742(.A(n_7548), .Z(O0[11])); - notech_or2 i_27(.A(\counter[11] ), .B(n_116), .Z(n_118)); - notech_xor2 i_273743(.A(\counter[10] ), .B(n_114), .Z(n_7575)); - notech_inv i_283744(.A(n_7575), .Z(O0[10])); - notech_or2 i_26(.A(\counter[10] ), .B(n_114), .Z(n_116)); - notech_xor2 i_273745(.A(\counter[9] ), .B(n_112), .Z(n_7602)); - notech_inv i_283746(.A(n_7602), .Z(O0[9])); - notech_or2 i_263747(.A(\counter[9] ), .B(n_112), .Z(n_114)); - notech_xor2 i_273748(.A(\counter[8] ), .B(n_110), .Z(n_7629)); - notech_inv i_283749(.A(n_7629), .Z(O0[8])); - notech_or2 i_263750(.A(\counter[8] ), .B(n_110), .Z(n_112)); - notech_xor2 i_273751(.A(\counter[7] ), .B(n_108), .Z(n_7656)); - notech_inv i_283752(.A(n_7656), .Z(O0[7])); - notech_or2 i_263753(.A(\counter[7] ), .B(n_108), .Z(n_110)); - notech_xor2 i_273754(.A(\counter[6] ), .B(n_106), .Z(n_7683)); - notech_inv i_283755(.A(n_7683), .Z(O0[6])); - notech_or2 i_263756(.A(\counter[6] ), .B(n_106), .Z(n_108)); - notech_xor2 i_273757(.A(\counter[5] ), .B(n_104), .Z(n_7710)); - notech_inv i_283758(.A(n_7710), .Z(O0[5])); - notech_or2 i_263759(.A(\counter[5] ), .B(n_104), .Z(n_106)); - notech_xor2 i_273760(.A(\counter[4] ), .B(n_102), .Z(n_7737)); - notech_inv i_283761(.A(n_7737), .Z(O0[4])); - notech_or2 i_263762(.A(\counter[4] ), .B(n_102), .Z(n_104)); - notech_xor2 i_273763(.A(\counter[3] ), .B(n_100), .Z(n_7764)); - notech_inv i_283764(.A(n_7764), .Z(O0[3])); - notech_or2 i_263765(.A(\counter[3] ), .B(n_100), .Z(n_102)); - notech_xor2 i_273766(.A(\counter[2] ), .B(\counter[1] ), .Z(n_7792)); - notech_inv i_283767(.A(n_7792), .Z(O0[2])); - notech_or2 i_263768(.A(\counter[2] ), .B(\counter[1] ), .Z(n_100)); -endmodule -module v8253_counter_2(clk, rst_n, clock, gate, out, data_in, set_control_mode, latch_count - , latch_status, write, read, data_out); - - input clk; - input rst_n; - input clock; - input gate; - output out; - input [7:0] data_in; - input set_control_mode; - input latch_count; - input latch_status; - input write; - input read; - output [7:0] data_out; - - wire [7:0] counter_l; - wire [2:0] mode; - wire [1:0] rw_mode; - wire [7:0] output_m; - wire [7:0] output_l; - wire [7:0] counter_m; - wire [7:0] status; - wire [15:0] counter; - - - - notech_inv i_418(.A(n_8125), .Z(n_8132)); - notech_inv i_417(.A(n_8125), .Z(n_8131)); - notech_inv i_416(.A(n_8125), .Z(n_8130)); - notech_inv i_414(.A(n_8125), .Z(n_8128)); - notech_inv i_413(.A(n_8125), .Z(n_8127)); - notech_inv i_412(.A(n_8125), .Z(n_8126)); - notech_inv i_411(.A(clk), .Z(n_8125)); - notech_inv i_330(.A(n_8049), .Z(n_8056)); - notech_inv i_329(.A(n_8049), .Z(n_8055)); - notech_inv i_328(.A(n_8049), .Z(n_8054)); - notech_inv i_326(.A(n_8049), .Z(n_8052)); - notech_inv i_325(.A(n_8049), .Z(n_8051)); - notech_inv i_324(.A(n_8049), .Z(n_8050)); - notech_inv i_323(.A(rst_n), .Z(n_8049)); - notech_inv i_177(.A(n_7892), .Z(n_7893)); - notech_inv i_176(.A(n_2150), .Z(n_7892)); - notech_inv i_163(.A(n_7883), .Z(n_7884)); - notech_inv i_162(.A(n_2209), .Z(n_7883)); - notech_inv i_91(.A(n_7824), .Z(n_7825)); - notech_inv i_89(.A(n_442), .Z(n_7824)); - notech_nao3 i_115(.A(counter[11]), .B(n_456), .C(n_453), .Z(n_305)); - notech_nao3 i_111(.A(n_442), .B(n_90), .C(n_445), .Z(n_302)); - notech_nao3 i_105(.A(n_442), .B(n_91), .C(n_445), .Z(n_296)); - notech_nao3 i_99(.A(n_442), .B(n_92), .C(n_445), .Z(n_291)); - notech_nao3 i_93(.A(n_442), .B(n_93), .C(n_445), .Z(n_286)); - notech_nand2 i_95(.A(counter_m[7]), .B(n_430), .Z(n_283)); - notech_and2 i_11588(.A(data_in[0]), .B(n_2209), .Z(n_281)); - notech_and2 i_21589(.A(data_in[1]), .B(n_2209), .Z(n_280)); - notech_and2 i_31590(.A(data_in[2]), .B(n_2209), .Z(n_279)); - notech_and2 i_41591(.A(data_in[3]), .B(n_2209), .Z(n_278)); - notech_and2 i_51592(.A(data_in[4]), .B(n_2209), .Z(n_277)); - notech_and2 i_61593(.A(data_in[5]), .B(n_2209), .Z(n_276)); - notech_and2 i_71594(.A(data_in[6]), .B(n_2209), .Z(n_275)); - notech_and2 i_81595(.A(data_in[7]), .B(n_2209), .Z(n_274)); - notech_nand2 i_2109(.A(clock), .B(n_2195), .Z(n_273)); - notech_nand2 i_2110(.A(gate), .B(n_2191), .Z(n_272)); - notech_and3 i_214(.A(write), .B(n_391), .C(n_2209), .Z(n_271)); - notech_or2 i_90(.A(n_355), .B(gate), .Z(n_268)); - notech_or4 i_39(.A(n_182), .B(n_430), .C(n_418), .D(n_436), .Z(n_266)); - notech_nand2 i_80(.A(read), .B(n_183), .Z(n_265)); - notech_nand2 i_228(.A(rw_mode[0]), .B(n_2197), .Z(n_264)); - notech_nand2 i_227(.A(status[7]), .B(status_latched), .Z(n_263)); - notech_nand2 i_224(.A(status[6]), .B(status_latched), .Z(n_262)); - notech_nand2 i_221(.A(status[5]), .B(status_latched), .Z(n_261)); - notech_nand2 i_218(.A(status[4]), .B(status_latched), .Z(n_260)); - notech_nand2 i_215(.A(status[3]), .B(status_latched), .Z(n_259)); - notech_nand2 i_211(.A(status[2]), .B(status_latched), .Z(n_258)); - notech_nand2 i_208(.A(status[1]), .B(status_latched), .Z(n_257)); - notech_nand2 i_205(.A(status_latched), .B(status[0]), .Z(n_256)); - notech_and4 i_201(.A(rw_mode[0]), .B(write), .C(rw_mode[1]), .D(n_2196), - .Z(n_255)); - notech_nor2 i_79(.A(written), .B(n_255), .Z(n_254)); - notech_or4 i_200(.A(mode[2]), .B(mode[1]), .C(mode[0]), .D(n_254), .Z(n_253 - )); - notech_and2 i_25(.A(n_426), .B(n_393), .Z(n_252)); - notech_mux2 i_51(.S(n_415), .A(n_414), .B(n_418), .Z(n_249)); - notech_ao4 i_74(.A(n_419), .B(n_421), .C(n_249), .D(n_399), .Z(n_245)); - notech_nao3 i_192(.A(gate_sampled), .B(n_2146), .C(n_245), .Z(n_244)); - notech_ao4 i_73(.A(n_426), .B(n_397), .C(n_355), .D(n_2194), .Z(n_243) - ); - notech_or4 i_58(.A(trigger_sampled), .B(n_2147), .C(n_394), .D(n_423), .Z - (n_242)); - notech_or4 i_188(.A(mode[2]), .B(mode[1]), .C(mode[0]), .D(msb_write), .Z - (n_241)); - notech_and2 i_50(.A(n_241), .B(n_2148), .Z(n_239)); - notech_and2 i_185(.A(counter_l[0]), .B(n_414), .Z(n_237)); - notech_ao3 i_40(.A(counter_l[0]), .B(out), .C(n_414), .Z(n_236)); - notech_and2 i_77(.A(n_438), .B(n_2156), .Z(n_234)); - notech_ao3 i_75(.A(n_2199), .B(n_2200), .C(data_in[1]), .Z(n_233)); - notech_and3 i_167(.A(n_442), .B(n_191), .C(n_441), .Z(n_232)); - notech_nand2 i_72(.A(n_442), .B(n_2230), .Z(n_231)); - notech_nand2 i_164(.A(counter_l[1]), .B(n_430), .Z(n_230)); - notech_nand2 i_161(.A(counter_l[2]), .B(n_430), .Z(n_229)); - notech_and2 i_71(.A(n_442), .B(n_2231), .Z(n_228)); - notech_and2 i_70(.A(n_442), .B(n_2232), .Z(n_227)); - notech_xor2 i_69(.A(counter[4]), .B(counter[5]), .Z(n_225)); - notech_xor2 i_68(.A(counter[6]), .B(n_409), .Z(n_223)); - notech_xor2 i_67(.A(counter[8]), .B(counter[9]), .Z(n_221)); - notech_xor2 i_66(.A(counter[10]), .B(n_406), .Z(n_219)); - notech_xor2 i_65(.A(n_2205), .B(n_407), .Z(n_217)); - notech_and2 i_41(.A(n_473), .B(n_460), .Z(n_215)); - notech_xor2 i_64(.A(counter[12]), .B(counter[13]), .Z(n_214)); - notech_xor2 i_63(.A(counter[14]), .B(n_403), .Z(n_212)); - notech_nand2 i_963550(.A(counter[15]), .B(n_404), .Z(n_211)); - notech_ao3 i_59(.A(n_2148), .B(n_399), .C(n_2154), .Z(n_210)); - notech_nand3 i_88(.A(rw_mode[0]), .B(rw_mode[1]), .C(read), .Z(n_196)); - notech_nand3 i_87(.A(rw_mode[0]), .B(rw_mode[1]), .C(write), .Z(n_194) - ); - notech_ao4 i_60(.A(n_378), .B(msb_write), .C(rw_mode[1]), .D(n_2198), .Z - (n_190)); - notech_nand2 i_85(.A(write), .B(n_2153), .Z(n_189)); - notech_nand2 i_84(.A(write), .B(n_391), .Z(n_188)); - notech_ao4 i_61(.A(rw_mode[0]), .B(n_2197), .C(n_378), .D(n_2196), .Z(n_185 - )); - notech_nand2 i_81(.A(write), .B(n_2151), .Z(n_184)); - notech_nao3 i_49(.A(rw_mode[0]), .B(rw_mode[1]), .C(msb_read), .Z(n_183) - ); - notech_ao4 i_78(.A(n_252), .B(n_397), .C(n_239), .D(n_398), .Z(n_182)); - notech_nand3 i_116(.A(n_2150), .B(n_2155), .C(n_217), .Z(n_306)); - notech_nao3 i_117(.A(n_442), .B(n_89), .C(n_445), .Z(n_307)); - notech_nao3 i_123(.A(n_442), .B(n_88), .C(n_445), .Z(n_312)); - notech_nao3 i_129(.A(n_442), .B(n_87), .C(n_445), .Z(n_317)); - notech_nao3 i_133(.A(counter[8]), .B(n_456), .C(n_453), .Z(n_320)); - notech_nao3 i_134(.A(n_2150), .B(n_2155), .C(counter[8]), .Z(n_321)); - notech_nao3 i_135(.A(n_7825), .B(n_86), .C(n_445), .Z(n_322)); - notech_ao3 i_138(.A(counter[7]), .B(n_410), .C(n_453), .Z(n_324)); - notech_ao3 i_139(.A(n_7825), .B(n_85), .C(n_445), .Z(n_325)); - notech_and3 i_140(.A(n_7825), .B(n_201), .C(n_441), .Z(n_326)); - notech_nand2 i_155(.A(counter_l[4]), .B(n_430), .Z(n_335)); - notech_and3 i_154(.A(n_7825), .B(n_198), .C(n_441), .Z(n_338)); - notech_nand2 i_158(.A(counter_l[3]), .B(n_430), .Z(n_339)); - notech_nao3 i_165(.A(counter_l[0]), .B(n_430), .C(n_2147), .Z(n_346)); - notech_nand3 i_166(.A(n_2152), .B(n_2150), .C(n_231), .Z(n_347)); - notech_and4 i_170(.A(n_266), .B(n_2209), .C(n_253), .D(n_2150), .Z(n_348 - )); - notech_or4 i_171(.A(set_control_mode), .B(n_2154), .C(n_234), .D(n_2158) - , .Z(n_349)); - notech_ao4 i_180(.A(n_237), .B(n_2211), .C(n_182), .D(n_430), .Z(n_352) - ); - notech_and2 i_30(.A(n_419), .B(n_399), .Z(n_355)); - notech_nand3 i_190(.A(written), .B(clock_pulse), .C(n_242), .Z(n_356)); - notech_nand2 i_191(.A(trigger_sampled), .B(n_2157), .Z(n_357)); - notech_and2 i_342(.A(latch_count), .B(n_2209), .Z(n_360)); - notech_nand2 i_2211(.A(latch_status), .B(n_2176), .Z(n_361)); - notech_nand2 i_42617(.A(rw_mode[0]), .B(rw_mode[1]), .Z(n_378)); - notech_nand2 i_0(.A(n_264), .B(n_183), .Z(n_380)); - notech_nand2 i_24(.A(n_380), .B(n_2176), .Z(n_381)); - notech_nand3 i_23(.A(n_264), .B(n_183), .C(n_2176), .Z(n_382)); - notech_ao4 i_321(.A(n_382), .B(n_2160), .C(n_381), .D(n_2168), .Z(n_383) - ); - notech_ao4 i_320(.A(n_382), .B(n_2161), .C(n_381), .D(n_2169), .Z(n_384) - ); - notech_ao4 i_319(.A(n_382), .B(n_2162), .C(n_381), .D(n_2170), .Z(n_385) - ); - notech_ao4 i_317(.A(n_382), .B(n_2163), .C(n_381), .D(n_2171), .Z(n_386) - ); - notech_ao4 i_316(.A(n_382), .B(n_2164), .C(n_381), .D(n_2172), .Z(n_387) - ); - notech_ao4 i_315(.A(n_382), .B(n_2165), .C(n_381), .D(n_2173), .Z(n_388) - ); - notech_ao4 i_314(.A(n_382), .B(n_2166), .C(n_381), .D(n_2174), .Z(n_389) - ); - notech_ao4 i_313(.A(n_382), .B(n_2167), .C(n_381), .D(n_2175), .Z(n_390) - ); - notech_nand3 i_26(.A(rw_mode[0]), .B(rw_mode[1]), .C(n_2196), .Z(n_391) - ); - notech_nao3 i_62623(.A(mode[0]), .B(n_2192), .C(mode[1]), .Z(n_393)); - notech_ao3 i_36(.A(n_2192), .B(n_2193), .C(mode[0]), .Z(n_394)); - notech_nand2 i_4(.A(n_2209), .B(n_253), .Z(n_395)); - notech_nand2 i_20(.A(loaded), .B(clock_pulse), .Z(n_397)); - notech_nand3 i_28(.A(loaded), .B(gate_sampled), .C(clock_pulse), .Z(n_398 - )); - notech_nand2 i_42627(.A(mode[0]), .B(mode[1]), .Z(n_399)); - notech_or2 i_31(.A(counter[3]), .B(counter[2]), .Z(n_400)); - notech_or2 i_10(.A(counter[12]), .B(counter[13]), .Z(n_403)); - notech_nao3 i_19(.A(n_2206), .B(n_2207), .C(counter[12]), .Z(n_404)); - notech_or2 i_1(.A(counter[8]), .B(counter[9]), .Z(n_406)); - notech_nao3 i_14(.A(n_2203), .B(n_2204), .C(counter[8]), .Z(n_407)); - notech_or2 i_2(.A(counter[4]), .B(counter[5]), .Z(n_409)); - notech_or2 i_15(.A(counter[6]), .B(n_409), .Z(n_410)); - notech_or4 i_45(.A(counter[7]), .B(n_410), .C(counter[11]), .D(n_407), .Z - (n_412)); - notech_or4 i_56(.A(n_412), .B(counter[14]), .C(n_403), .D(counter[15]), - .Z(n_413)); - notech_or4 i_342724(.A(counter[1]), .B(counter[0]), .C(n_413), .D(n_400) - , .Z(n_414)); - notech_nand2 i_16(.A(counter_l[0]), .B(out), .Z(n_415)); - notech_or4 i_342696(.A(n_413), .B(n_400), .C(counter[0]), .D(n_2202), .Z - (n_418)); - notech_or2 i_32625(.A(mode[0]), .B(n_2193), .Z(n_419)); - notech_or4 i_303(.A(counter[3]), .B(counter[2]), .C(counter[1]), .D(n_2201 - ), .Z(n_420)); - notech_or2 i_342681(.A(n_413), .B(n_420), .Z(n_421)); - notech_or2 i_308(.A(mode[0]), .B(n_2192), .Z(n_422)); - notech_nand2 i_9(.A(n_422), .B(n_419), .Z(n_423)); - notech_nand3 i_82633(.A(mode[0]), .B(mode[2]), .C(n_2193), .Z(n_426)); - notech_nand3 i_2206(.A(n_357), .B(n_356), .C(n_244), .Z(n_430)); - notech_ao4 i_295(.A(n_7884), .B(n_233), .C(n_268), .D(n_395), .Z(n_432) - ); - notech_or4 i_300(.A(n_413), .B(n_420), .C(n_182), .D(n_430), .Z(n_434) - ); - notech_ao3 i_7(.A(n_2150), .B(n_2144), .C(n_182), .Z(n_435)); - notech_and2 i_38(.A(n_426), .B(n_2148), .Z(n_436)); - notech_ao4 i_298(.A(n_236), .B(n_2144), .C(n_2147), .D(n_435), .Z(n_438) - ); - notech_and4 i_2127(.A(gate_sampled), .B(n_2147), .C(n_2146), .D(n_2150), - .Z(n_441)); - notech_or4 i_2142(.A(counter[1]), .B(n_400), .C(counter[0]), .D(n_2181), - .Z(n_442)); - notech_nand2 i_11(.A(n_7825), .B(n_441), .Z(n_443)); - notech_nand2 i_3(.A(n_2152), .B(n_2150), .Z(n_445)); - notech_nand3 i_12(.A(n_7825), .B(n_2152), .C(n_2150), .Z(n_447)); - notech_ao4 i_290(.A(n_443), .B(n_2212), .C(n_447), .D(n_2213), .Z(n_448) - ); - notech_ao4 i_289(.A(n_443), .B(n_2214), .C(n_447), .D(n_2215), .Z(n_449) - ); - notech_ao4 i_288(.A(n_228), .B(n_445), .C(n_227), .D(n_2152), .Z(n_450) - ); - notech_or2 i_2140(.A(n_412), .B(n_442), .Z(n_451)); - notech_or2 i_21(.A(n_451), .B(n_430), .Z(n_452)); - notech_or2 i_47(.A(n_7825), .B(n_430), .Z(n_453)); - notech_ao4 i_285(.A(n_447), .B(n_2216), .C(counter[4]), .D(n_453), .Z(n_454 - )); - notech_or4 i_2141(.A(counter[6]), .B(counter[7]), .C(n_7825), .D(n_409), - .Z(n_456)); - notech_nao3 i_17(.A(n_412), .B(n_2150), .C(n_7825), .Z(n_459)); - notech_or2 i_22(.A(n_459), .B(n_2155), .Z(n_460)); - notech_ao4 i_283(.A(n_447), .B(n_2217), .C(n_225), .D(n_460), .Z(n_461) - ); - notech_ao4 i_282(.A(n_2190), .B(n_2150), .C(n_443), .D(n_2218), .Z(n_462 - )); - notech_ao4 i_281(.A(n_447), .B(n_2219), .C(n_460), .D(n_223), .Z(n_463) - ); - notech_ao4 i_280(.A(n_2150), .B(n_2189), .C(n_443), .D(n_2220), .Z(n_464 - )); - notech_mux2 i_276(.S(n_430), .A(n_2155), .B(counter_l[7]), .Z(n_468)); - notech_reg output_m_reg_7(.CP(n_8131), .D(n_1700), .CD(n_8055), .Q(output_m - [7])); - notech_mux2 i_467(.S(output_latched), .A(counter[15]), .B(output_m[7]), - .Z(n_1700)); - notech_reg output_m_reg_6(.CP(n_8131), .D(n_1706), .CD(n_8055), .Q(output_m - [6])); - notech_mux2 i_475(.S(output_latched), .A(counter[14]), .B(output_m[6]), - .Z(n_1706)); - notech_ao4 i_272(.A(n_2150), .B(n_2188), .C(n_443), .D(n_2221), .Z(n_472 - )); - notech_reg output_m_reg_5(.CP(n_8130), .D(n_1712), .CD(n_8054), .Q(output_m - [5])); - notech_mux2 i_483(.S(output_latched), .A(counter[13]), .B(output_m[5]), - .Z(n_1712)); - notech_nand3 i_29(.A(n_451), .B(n_7893), .C(n_2155), .Z(n_473)); - notech_reg output_m_reg_4(.CP(n_8130), .D(n_1718), .CD(n_8054), .Q(output_m - [4])); - notech_mux2 i_492(.S(output_latched), .A(counter[12]), .B(output_m[4]), - .Z(n_1718)); - notech_ao4 i_270(.A(n_460), .B(n_2203), .C(n_221), .D(n_473), .Z(n_474) - ); - notech_reg output_m_reg_3(.CP(n_8131), .D(n_1724), .CD(n_8055), .Q(output_m - [3])); - notech_mux2 i_501(.S(output_latched), .A(counter[11]), .B(output_m[3]), - .Z(n_1724)); - notech_reg output_m_reg_2(.CP(n_8131), .D(n_1730), .CD(n_8055), .Q(output_m - [2])); - notech_mux2 i_509(.S(output_latched), .A(counter[10]), .B(output_m[2]), - .Z(n_1730)); - notech_ao4 i_269(.A(n_7893), .B(n_2187), .C(n_443), .D(n_2222), .Z(n_476 - )); - notech_reg output_m_reg_1(.CP(n_8131), .D(n_1736), .CD(n_8055), .Q(output_m - [1])); - notech_mux2 i_517(.S(output_latched), .A(counter[9]), .B(output_m[1]), .Z - (n_1736)); - notech_ao4 i_267(.A(n_460), .B(n_2204), .C(n_219), .D(n_473), .Z(n_477) - ); - notech_reg output_m_reg_0(.CP(n_8131), .D(n_1742), .CD(n_8055), .Q(output_m - [0])); - notech_mux2 i_525(.S(output_latched), .A(counter[8]), .B(output_m[0]), .Z - (n_1742)); - notech_reg status_reg_7(.CP(n_8131), .D(n_1748), .CD(n_8055), .Q(status[ - 7])); - notech_mux2 i_533(.S(n_361), .A(out), .B(status[7]), .Z(n_1748)); - notech_ao4 i_266(.A(n_7893), .B(n_2186), .C(n_443), .D(n_2223), .Z(n_479 - )); - notech_reg status_reg_6(.CP(n_8130), .D(n_1754), .CD(n_8054), .Q(status[ - 6])); - notech_mux2 i_541(.S(n_361), .A(null_counter), .B(status[6]), .Z(n_1754) - ); - notech_reg status_reg_5(.CP(n_8130), .D(n_1760), .CD(n_8054), .Q(status[ - 5])); - notech_mux2 i_549(.S(n_361), .A(rw_mode[1]), .B(status[5]), .Z(n_1760) - ); - notech_reg status_reg_4(.CP(n_8130), .D(n_1766), .CD(n_8054), .Q(status[ - 4])); - notech_mux2 i_558(.S(n_361), .A(rw_mode[0]), .B(status[4]), .Z(n_1766) - ); - notech_reg status_reg_3(.CP(n_8130), .D(n_1772), .CD(n_8054), .Q(status[ - 3])); - notech_mux2 i_567(.S(n_361), .A(mode[2]), .B(status[3]), .Z(n_1772)); - notech_ao4 i_262(.A(n_7893), .B(n_2185), .C(n_443), .D(n_2224), .Z(n_483 - )); - notech_reg status_reg_2(.CP(n_8130), .D(n_1778), .CD(n_8054), .Q(status[ - 2])); - notech_mux2 i_577(.S(n_361), .A(mode[1]), .B(status[2]), .Z(n_1778)); - notech_mux2 i_260(.S(counter[12]), .A(n_452), .B(n_459), .Z(n_484)); - notech_reg status_reg_1(.CP(n_8130), .D(n_1784), .CD(n_8054), .Q(status[ - 1])); - notech_mux2 i_585(.S(n_361), .A(mode[0]), .B(status[1]), .Z(n_1784)); - notech_reg status_reg_0(.CP(n_8130), .D(n_1790), .CD(n_8054), .Q(status[ - 0])); - notech_mux2 i_593(.S(n_361), .A(bcd), .B(status[0]), .Z(n_1790)); - notech_nand2 i_5(.A(bcd), .B(n_2145), .Z(n_486)); - notech_reg output_l_reg_7(.CP(n_8130), .D(n_1796), .CD(n_8054), .Q(output_l - [7])); - notech_mux2 i_601(.S(output_latched), .A(counter[7]), .B(output_l[7]), .Z - (n_1796)); - notech_ao4 i_259(.A(n_7893), .B(n_2184), .C(n_443), .D(n_2225), .Z(n_487 - )); - notech_reg output_l_reg_6(.CP(n_8130), .D(n_1802), .CD(n_8054), .Q(output_l - [6])); - notech_mux2 i_609(.S(output_latched), .A(counter[6]), .B(output_l[6]), .Z - (n_1802)); - notech_nao3 i_46(.A(n_486), .B(n_7893), .C(n_451), .Z(n_488)); - notech_reg output_l_reg_5(.CP(n_8130), .D(n_1808), .CD(n_8054), .Q(output_l - [5])); - notech_mux2 i_619(.S(output_latched), .A(counter[5]), .B(output_l[5]), .Z - (n_1808)); - notech_ao4 i_256(.A(n_215), .B(n_2206), .C(n_214), .D(n_488), .Z(n_489) - ); - notech_reg output_l_reg_4(.CP(n_8132), .D(n_1814), .CD(n_8056), .Q(output_l - [4])); - notech_mux2 i_628(.S(output_latched), .A(counter[4]), .B(output_l[4]), .Z - (n_1814)); - notech_reg output_l_reg_3(.CP(n_8132), .D(n_1820), .CD(n_8056), .Q(output_l - [3])); - notech_mux2 i_636(.S(output_latched), .A(counter[3]), .B(output_l[3]), .Z - (n_1820)); - notech_ao4 i_255(.A(n_7893), .B(n_2183), .C(n_443), .D(n_2226), .Z(n_491 - )); - notech_reg output_l_reg_2(.CP(n_8132), .D(n_1826), .CD(n_8056), .Q(output_l - [2])); - notech_mux2 i_644(.S(output_latched), .A(counter[2]), .B(output_l[2]), .Z - (n_1826)); - notech_ao4 i_253(.A(n_215), .B(n_2207), .C(n_488), .D(n_212), .Z(n_492) - ); - notech_reg output_l_reg_1(.CP(n_8132), .D(n_1832), .CD(n_8056), .Q(output_l - [1])); - notech_mux2 i_652(.S(output_latched), .A(counter[1]), .B(output_l[1]), .Z - (n_1832)); - notech_reg output_l_reg_0(.CP(n_8132), .D(n_1838), .CD(n_8056), .Q(output_l - [0])); - notech_mux2 i_660(.S(output_latched), .A(counter[0]), .B(output_l[0]), .Z - (n_1838)); - notech_ao4 i_252(.A(n_7893), .B(n_2182), .C(n_443), .D(n_2227), .Z(n_494 - )); - notech_reg output_latched_reg(.CP(n_8132), .D(n_1844), .CD(n_8056), .Q(output_latched - )); - notech_mux2 i_669(.S(n_714), .A(output_latched), .B(n_360), .Z(n_1844) - ); - notech_ao4 i_250(.A(n_459), .B(n_2208), .C(n_452), .D(n_211), .Z(n_495) - ); - notech_reg status_latched_reg(.CP(n_8132), .D(n_1850), .CD(n_8056), .Q(status_latched - )); - notech_nand2 i_677(.A(n_1853), .B(n_1852), .Z(n_1850)); - notech_nand3 i_678(.A(latch_status), .B(n_7884), .C(n_503), .Z(n_1852) - ); - notech_or4 i_679(.A(latch_status), .B(read), .C(set_control_mode), .D(n_2176 - ), .Z(n_1853)); - notech_reg msb_read_reg(.CP(n_8132), .D(n_1856), .CD(n_8056), .Q(msb_read - )); - notech_nand2 i_685(.A(n_1858), .B(n_1859), .Z(n_1856)); - notech_or4 i_686(.A(msb_read), .B(n_378), .C(set_control_mode), .D(n_2229 - ), .Z(n_1858)); - notech_nand3 i_687(.A(msb_read), .B(n_7884), .C(n_196), .Z(n_1859)); - notech_ao4 i_248(.A(n_486), .B(n_430), .C(n_443), .D(n_2228), .Z(n_497) - ); - notech_reg null_counter_reg(.CP(n_8132), .D(n_1862), .CD(n_8056), .Q(null_counter - )); - notech_mux2 i_693(.S(n_1102), .A(null_counter), .B(n_1105), .Z(n_1862) - ); - notech_reg_set out_reg(.CP(n_8132), .D(n_1868), .SD(n_8056), .Q(out)); - notech_mux2 i_701(.S(n_2177), .A(out), .B(n_1093), .Z(n_1868)); - notech_reg counter_reg_15(.CP(n_8131), .D(n_1874), .CD(n_8055), .Q(counter - [15])); - notech_mux2 i_709(.S(\nbus_11[0] ), .A(counter[15]), .B(n_2178), .Z(n_1874 - )); - notech_ao4 i_232(.A(gate), .B(n_355), .C(n_7893), .D(n_210), .Z(n_500) - ); - notech_reg counter_reg_14(.CP(n_8131), .D(n_1880), .CD(n_8055), .Q(counter - [14])); - notech_mux2 i_717(.S(\nbus_11[0] ), .A(counter[14]), .B(n_647), .Z(n_1880 - )); - notech_reg counter_reg_13(.CP(n_8131), .D(n_1886), .CD(n_8055), .Q(counter - [13])); - notech_mux2 i_725(.S(\nbus_11[0] ), .A(counter[13]), .B(n_641), .Z(n_1886 - )); - notech_reg counter_reg_12(.CP(n_8131), .D(n_1892), .CD(n_8055), .Q(counter - [12])); - notech_mux2 i_733(.S(\nbus_11[0] ), .A(counter[12]), .B(n_635), .Z(n_1892 - )); - notech_or2 i_230(.A(latch_status), .B(read), .Z(n_503)); - notech_reg counter_reg_11(.CP(n_8131), .D(n_1898), .CD(n_8055), .Q(counter - [11])); - notech_mux2 i_741(.S(\nbus_11[0] ), .A(counter[11]), .B(n_2179), .Z(n_1898 - )); - notech_reg counter_reg_10(.CP(n_8132), .D(n_1904), .CD(n_8056), .Q(counter - [10])); - notech_mux2 i_749(.S(\nbus_11[0] ), .A(counter[10]), .B(n_623), .Z(n_1904 - )); - notech_nand2 i_81635(.A(n_383), .B(n_263), .Z(data_out[7])); - notech_reg counter_reg_9(.CP(n_8132), .D(n_1910), .CD(n_8056), .Q(counter - [9])); - notech_mux2 i_757(.S(\nbus_11[0] ), .A(counter[9]), .B(n_617), .Z(n_1910 - )); - notech_nand2 i_71634(.A(n_384), .B(n_262), .Z(data_out[6])); - notech_reg counter_reg_8(.CP(n_8131), .D(n_1916), .CD(n_8055), .Q(counter - [8])); - notech_mux2 i_765(.S(\nbus_11[0] ), .A(counter[8]), .B(n_2180), .Z(n_1916 - )); - notech_nand2 i_61633(.A(n_385), .B(n_261), .Z(data_out[5])); - notech_reg counter_reg_7(.CP(n_8132), .D(n_1922), .CD(n_8056), .Q(counter - [7])); - notech_mux2 i_773(.S(\nbus_11[0] ), .A(counter[7]), .B(n_605), .Z(n_1922 - )); - notech_nand2 i_51632(.A(n_386), .B(n_260), .Z(data_out[4])); - notech_reg counter_reg_6(.CP(n_8127), .D(n_1928), .CD(n_8051), .Q(counter - [6])); - notech_mux2 i_781(.S(\nbus_11[0] ), .A(counter[6]), .B(n_599), .Z(n_1928 - )); - notech_nand2 i_41631(.A(n_387), .B(n_259), .Z(data_out[3])); - notech_reg counter_reg_5(.CP(n_8127), .D(n_1934), .CD(n_8051), .Q(counter - [5])); - notech_mux2 i_789(.S(\nbus_11[0] ), .A(counter[5]), .B(n_593), .Z(n_1934 - )); - notech_nand2 i_31630(.A(n_388), .B(n_258), .Z(data_out[2])); - notech_reg counter_reg_4(.CP(n_8126), .D(n_1940), .CD(n_8050), .Q(counter - [4])); - notech_mux2 i_797(.S(\nbus_11[0] ), .A(counter[4]), .B(n_587), .Z(n_1940 - )); - notech_nand2 i_21629(.A(n_389), .B(n_257), .Z(data_out[1])); - notech_reg counter_reg_3(.CP(n_8126), .D(n_1946), .CD(n_8050), .Q(counter - [3])); - notech_mux2 i_805(.S(\nbus_11[0] ), .A(counter[3]), .B(n_581), .Z(n_1946 - )); - notech_nand2 i_11628(.A(n_390), .B(n_256), .Z(data_out[0])); - notech_reg counter_reg_2(.CP(n_8127), .D(n_1952), .CD(n_8051), .Q(counter - [2])); - notech_mux2 i_813(.S(\nbus_11[0] ), .A(counter[2]), .B(n_575), .Z(n_1952 - )); - notech_and4 i_667(.A(n_266), .B(n_434), .C(n_500), .D(n_2149), .Z(n_1090 - )); - notech_reg counter_reg_1(.CP(n_8127), .D(n_1958), .CD(n_8051), .Q(counter - [1])); - notech_mux2 i_821(.S(\nbus_11[0] ), .A(counter[1]), .B(n_569), .Z(n_1958 - )); - notech_nand2 i_620(.A(n_7884), .B(n_7893), .Z(n_1017)); - notech_reg counter_reg_0(.CP(n_8127), .D(n_1964), .CD(n_8051), .Q(counter - [0])); - notech_mux2 i_829(.S(\nbus_11[0] ), .A(counter[0]), .B(n_563), .Z(n_1964 - )); - notech_reg bcd_reg(.CP(n_8127), .D(n_1970), .CD(n_8051), .Q(bcd)); - notech_mux2 i_837(.S(set_control_mode), .A(bcd), .B(data_in[0]), .Z(n_1970 - )); - notech_reg counter_m_reg_7(.CP(n_8127), .D(n_1976), .CD(n_8051), .Q(counter_m - [7])); - notech_mux2 i_845(.S(\nbus_12[0] ), .A(counter_m[7]), .B(n_274), .Z(n_1976 - )); - notech_nand2 i_575(.A(n_7884), .B(n_189), .Z(\nbus_14[0] )); - notech_reg counter_m_reg_6(.CP(n_8126), .D(n_1982), .CD(n_8050), .Q(counter_m - [6])); - notech_mux2 i_853(.S(\nbus_12[0] ), .A(counter_m[6]), .B(n_275), .Z(n_1982 - )); - notech_nand3 i_568(.A(n_7884), .B(n_7893), .C(n_188), .Z(n_1102)); - notech_reg counter_m_reg_5(.CP(n_8126), .D(n_1988), .CD(n_8050), .Q(counter_m - [5])); - notech_mux2 i_861(.S(\nbus_12[0] ), .A(counter_m[5]), .B(n_276), .Z(n_1988 - )); - notech_reg counter_m_reg_4(.CP(n_8126), .D(n_1994), .CD(n_8050), .Q(counter_m - [4])); - notech_mux2 i_869(.S(\nbus_12[0] ), .A(counter_m[4]), .B(n_277), .Z(n_1994 - )); - notech_nand2 i_552(.A(n_273), .B(n_272), .Z(n_888)); - notech_reg counter_m_reg_3(.CP(n_8126), .D(n_2000), .CD(n_8050), .Q(counter_m - [3])); - notech_mux2 i_877(.S(\nbus_12[0] ), .A(counter_m[3]), .B(n_278), .Z(n_2000 - )); - notech_nand2 i_494(.A(n_7884), .B(n_184), .Z(\nbus_12[0] )); - notech_reg counter_m_reg_2(.CP(n_8126), .D(n_2006), .CD(n_8050), .Q(counter_m - [2])); - notech_mux2 i_885(.S(\nbus_12[0] ), .A(counter_m[2]), .B(n_279), .Z(n_2006 - )); - notech_nao3 i_486(.A(n_265), .B(n_7884), .C(latch_count), .Z(n_714)); - notech_reg counter_m_reg_1(.CP(n_8126), .D(n_2012), .CD(n_8050), .Q(counter_m - [1])); - notech_mux2 i_893(.S(\nbus_12[0] ), .A(counter_m[1]), .B(n_280), .Z(n_2012 - )); - notech_nand3 i_410(.A(n_182), .B(n_7893), .C(n_2152), .Z(\nbus_11[0] ) - ); - notech_reg counter_m_reg_0(.CP(n_8126), .D(n_2018), .CD(n_8050), .Q(counter_m - [0])); - notech_mux2 i_901(.S(\nbus_12[0] ), .A(counter_m[0]), .B(n_281), .Z(n_2018 - )); - notech_and4 i_16968(.A(n_497), .B(n_495), .C(n_283), .D(n_286), .Z(n_653 - )); - notech_reg counter_l_reg_7(.CP(n_8126), .D(n_2024), .CD(n_8050), .Q(counter_l - [7])); - notech_mux2 i_909(.S(\nbus_14[0] ), .A(counter_l[7]), .B(n_274), .Z(n_2024 - )); - notech_nand3 i_15967(.A(n_492), .B(n_494), .C(n_291), .Z(n_647)); - notech_reg counter_l_reg_6(.CP(n_8126), .D(n_2030), .CD(n_8050), .Q(counter_l - [6])); - notech_mux2 i_917(.S(\nbus_14[0] ), .A(counter_l[6]), .B(n_275), .Z(n_2030 - )); - notech_nand3 i_14966(.A(n_489), .B(n_491), .C(n_296), .Z(n_641)); - notech_reg counter_l_reg_5(.CP(n_8126), .D(n_2036), .CD(n_8050), .Q(counter_l - [5])); - notech_mux2 i_925(.S(\nbus_14[0] ), .A(counter_l[5]), .B(n_276), .Z(n_2036 - )); - notech_nand3 i_13965(.A(n_484), .B(n_487), .C(n_302), .Z(n_635)); - notech_reg counter_l_reg_4(.CP(n_8128), .D(n_2042), .CD(n_8052), .Q(counter_l - [4])); - notech_mux2 i_933(.S(\nbus_14[0] ), .A(counter_l[4]), .B(n_277), .Z(n_2042 - )); - notech_and4 i_12964(.A(n_305), .B(n_483), .C(n_306), .D(n_307), .Z(n_629 - )); - notech_reg counter_l_reg_3(.CP(n_8128), .D(n_2048), .CD(n_8052), .Q(counter_l - [3])); - notech_mux2 i_941(.S(\nbus_14[0] ), .A(counter_l[3]), .B(n_278), .Z(n_2048 - )); - notech_nand3 i_11963(.A(n_477), .B(n_479), .C(n_312), .Z(n_623)); - notech_reg counter_l_reg_2(.CP(n_8128), .D(n_2054), .CD(n_8052), .Q(counter_l - [2])); - notech_mux2 i_949(.S(\nbus_14[0] ), .A(counter_l[2]), .B(n_279), .Z(n_2054 - )); - notech_nand3 i_10962(.A(n_474), .B(n_476), .C(n_317), .Z(n_617)); - notech_reg counter_l_reg_1(.CP(n_8128), .D(n_2060), .CD(n_8052), .Q(counter_l - [1])); - notech_mux2 i_957(.S(\nbus_14[0] ), .A(counter_l[1]), .B(n_280), .Z(n_2060 - )); - notech_and4 i_9961(.A(n_321), .B(n_320), .C(n_472), .D(n_322), .Z(n_611) - ); - notech_reg counter_l_reg_0(.CP(n_8128), .D(n_2066), .CD(n_8052), .Q(counter_l - [0])); - notech_mux2 i_965(.S(\nbus_14[0] ), .A(counter_l[0]), .B(n_281), .Z(n_2066 - )); - notech_or4 i_8960(.A(n_325), .B(n_324), .C(n_326), .D(n_468), .Z(n_605) - ); - notech_reg gate_sampled_reg(.CP(n_8128), .D(n_2072), .CD(n_8052), .Q(gate_sampled - )); - notech_mux2 i_973(.S(n_273), .A(gate), .B(gate_sampled), .Z(n_2072)); - notech_nand2 i_7959(.A(n_464), .B(n_463), .Z(n_599)); - notech_reg loaded_reg(.CP(n_8130), .D(n_2078), .CD(n_8054), .Q(loaded) - ); - notech_mux2 i_981(.S(n_1017), .A(loaded), .B(n_7884), .Z(n_2078)); - notech_nand2 i_6958(.A(n_462), .B(n_461), .Z(n_593)); - notech_reg trigger_sampled_reg(.CP(n_8128), .D(n_2084), .CD(n_8052), .Q(trigger_sampled - )); - notech_mux2 i_989(.S(n_273), .A(trigger), .B(trigger_sampled), .Z(n_2084 - )); - notech_nao3 i_5957(.A(n_454), .B(n_335), .C(n_338), .Z(n_587)); - notech_reg trigger_reg(.CP(n_8128), .D(n_2090), .CD(n_8052), .Q(trigger) - ); - notech_mux2 i_997(.S(n_888), .A(trigger), .B(n_2159), .Z(n_2090)); - notech_nand2 i_4956(.A(n_450), .B(n_339), .Z(n_581)); - notech_reg_set gate_last_reg(.CP(n_8128), .D(gate), .SD(n_8052), .Q(gate_last - )); - notech_reg written_reg(.CP(n_8127), .D(n_2098), .CD(n_8051), .Q(written) - ); - notech_mux2 i_1009(.S(n_1102), .A(written), .B(n_271), .Z(n_2098)); - notech_nand2 i_3955(.A(n_449), .B(n_229), .Z(n_575)); - notech_reg mode_reg_2(.CP(n_8127), .D(n_2104), .CD(n_8051), .Q(mode[2]) - ); - notech_mux2 i_1017(.S(set_control_mode), .A(mode[2]), .B(data_in[3]), .Z - (n_2104)); - notech_nand2 i_2954(.A(n_448), .B(n_230), .Z(n_569)); - notech_reg_set mode_reg_1(.CP(n_8127), .D(n_2110), .SD(n_8051), .Q(mode[ - 1])); - notech_mux2 i_1025(.S(set_control_mode), .A(mode[1]), .B(data_in[2]), .Z - (n_2110)); - notech_nao3 i_1953(.A(n_347), .B(n_346), .C(n_232), .Z(n_563)); - notech_reg mode_reg_0(.CP(n_8127), .D(n_2116), .CD(n_8051), .Q(mode[0]) - ); - notech_mux2 i_1033(.S(set_control_mode), .A(mode[0]), .B(data_in[1]), .Z - (n_2116)); - notech_nand2 i_322(.A(n_188), .B(n_7884), .Z(n_1105)); - notech_reg clock_pulse_reg(.CP(n_8127), .D(n_2122), .CD(n_8051), .Q(clock_pulse - )); - notech_ao3 i_1041(.A(clock_last), .B(1'b1), .C(clock), .Z(n_2122)); - notech_reg clock_last_reg(.CP(n_8128), .D(clock), .CD(n_8052), .Q(clock_last - )); - notech_reg msb_write_reg(.CP(n_8128), .D(n_2126), .CD(n_8052), .Q(msb_write - )); - notech_nand2 i_1049(.A(n_2128), .B(n_2129), .Z(n_2126)); - notech_or4 i_1050(.A(n_378), .B(set_control_mode), .C(msb_write), .D(n_2210 - ), .Z(n_2128)); - notech_nand3 i_1051(.A(n_7884), .B(n_194), .C(msb_write), .Z(n_2129)); - notech_nao3 i_318(.A(n_432), .B(n_349), .C(n_348), .Z(n_1093)); - notech_reg rw_mode_reg_1(.CP(n_8128), .D(n_2132), .CD(n_8052), .Q(rw_mode - [1])); - notech_mux2 i_1057(.S(set_control_mode), .A(rw_mode[1]), .B(data_in[5]), - .Z(n_2132)); - notech_reg_set rw_mode_reg_0(.CP(n_8128), .D(n_2138), .SD(n_8052), .Q(rw_mode - [0])); - notech_mux2 i_1065(.S(set_control_mode), .A(rw_mode[0]), .B(data_in[4]), - .Z(n_2138)); - notech_inv i_1437(.A(n_418), .Z(n_2144)); - notech_inv i_1438(.A(n_414), .Z(n_2145)); - notech_inv i_1439(.A(n_397), .Z(n_2146)); - notech_inv i_1440(.A(n_399), .Z(n_2147)); - notech_inv i_1441(.A(n_423), .Z(n_2148)); - notech_inv i_1442(.A(n_395), .Z(n_2149)); - notech_inv i_1443(.A(n_430), .Z(n_2150)); - notech_inv i_1444(.A(n_185), .Z(n_2151)); - notech_inv i_1445(.A(n_441), .Z(n_2152)); - notech_inv i_1446(.A(n_190), .Z(n_2153)); - notech_inv i_1447(.A(n_393), .Z(n_2154)); - notech_inv i_1448(.A(n_456), .Z(n_2155)); - notech_inv i_1449(.A(n_352), .Z(n_2156)); - notech_inv i_1450(.A(n_243), .Z(n_2157)); - notech_inv i_1451(.A(n_253), .Z(n_2158)); - notech_inv i_1452(.A(n_272), .Z(n_2159)); - notech_inv i_1453(.A(output_m[7]), .Z(n_2160)); - notech_inv i_1454(.A(output_m[6]), .Z(n_2161)); - notech_inv i_1455(.A(output_m[5]), .Z(n_2162)); - notech_inv i_1456(.A(output_m[4]), .Z(n_2163)); - notech_inv i_1457(.A(output_m[3]), .Z(n_2164)); - notech_inv i_1458(.A(output_m[2]), .Z(n_2165)); - notech_inv i_1459(.A(output_m[1]), .Z(n_2166)); - notech_inv i_1460(.A(output_m[0]), .Z(n_2167)); - notech_inv i_1461(.A(output_l[7]), .Z(n_2168)); - notech_inv i_1462(.A(output_l[6]), .Z(n_2169)); - notech_inv i_1463(.A(output_l[5]), .Z(n_2170)); - notech_inv i_1464(.A(output_l[4]), .Z(n_2171)); - notech_inv i_1465(.A(output_l[3]), .Z(n_2172)); - notech_inv i_1466(.A(output_l[2]), .Z(n_2173)); - notech_inv i_1467(.A(output_l[1]), .Z(n_2174)); - notech_inv i_1468(.A(output_l[0]), .Z(n_2175)); - notech_inv i_1469(.A(status_latched), .Z(n_2176)); - notech_inv i_1470(.A(n_1090), .Z(n_2177)); - notech_inv i_1471(.A(n_653), .Z(n_2178)); - notech_inv i_1472(.A(n_629), .Z(n_2179)); - notech_inv i_1473(.A(n_611), .Z(n_2180)); - notech_inv i_1474(.A(bcd), .Z(n_2181)); - notech_inv i_1475(.A(counter_m[6]), .Z(n_2182)); - notech_inv i_1476(.A(counter_m[5]), .Z(n_2183)); - notech_inv i_1477(.A(counter_m[4]), .Z(n_2184)); - notech_inv i_1478(.A(counter_m[3]), .Z(n_2185)); - notech_inv i_1479(.A(counter_m[2]), .Z(n_2186)); - notech_inv i_1480(.A(counter_m[1]), .Z(n_2187)); - notech_inv i_1481(.A(counter_m[0]), .Z(n_2188)); - notech_inv i_1482(.A(counter_l[6]), .Z(n_2189)); - notech_inv i_1483(.A(counter_l[5]), .Z(n_2190)); - notech_inv i_1484(.A(gate_last), .Z(n_2191)); - notech_inv i_1485(.A(mode[2]), .Z(n_2192)); - notech_inv i_1486(.A(mode[1]), .Z(n_2193)); - notech_inv i_1487(.A(clock_pulse), .Z(n_2194)); - notech_inv i_1488(.A(clock_last), .Z(n_2195)); - notech_inv i_1489(.A(msb_write), .Z(n_2196)); - notech_inv i_1490(.A(rw_mode[1]), .Z(n_2197)); - notech_inv i_1491(.A(rw_mode[0]), .Z(n_2198)); - notech_inv i_1492(.A(data_in[2]), .Z(n_2199)); - notech_inv i_1493(.A(data_in[3]), .Z(n_2200)); - notech_inv i_1494(.A(counter[0]), .Z(n_2201)); - notech_inv i_1495(.A(counter[1]), .Z(n_2202)); - notech_inv i_1496(.A(counter[9]), .Z(n_2203)); - notech_inv i_1497(.A(counter[10]), .Z(n_2204)); - notech_inv i_1498(.A(counter[11]), .Z(n_2205)); - notech_inv i_1499(.A(counter[13]), .Z(n_2206)); - notech_inv i_1500(.A(counter[14]), .Z(n_2207)); - notech_inv i_1501(.A(counter[15]), .Z(n_2208)); - notech_inv i_1502(.A(set_control_mode), .Z(n_2209)); - notech_inv i_1503(.A(write), .Z(n_2210)); - notech_inv i_1504(.A(out), .Z(n_2211)); - notech_inv i_1505(.A(n_193), .Z(n_2212)); - notech_inv i_1506(.A(n_73), .Z(n_2213)); - notech_inv i_1507(.A(n_195), .Z(n_2214)); - notech_inv i_1508(.A(n_75), .Z(n_2215)); - notech_inv i_1509(.A(n_79), .Z(n_2216)); - notech_inv i_1510(.A(n_81), .Z(n_2217)); - notech_inv i_1511(.A(n_199), .Z(n_2218)); - notech_inv i_1512(.A(n_83), .Z(n_2219)); - notech_inv i_1513(.A(n_200), .Z(n_2220)); - notech_inv i_1514(.A(n_202), .Z(n_2221)); - notech_inv i_1515(.A(n_203), .Z(n_2222)); - notech_inv i_1516(.A(n_204), .Z(n_2223)); - notech_inv i_1517(.A(n_205), .Z(n_2224)); - notech_inv i_1518(.A(n_206), .Z(n_2225)); - notech_inv i_1519(.A(n_207), .Z(n_2226)); - notech_inv i_1520(.A(n_208), .Z(n_2227)); - notech_inv i_1521(.A(n_209), .Z(n_2228)); - notech_inv i_1522(.A(read), .Z(n_2229)); - notech_inv i_1523(.A(n_71), .Z(n_2230)); - notech_inv i_1524(.A(n_77), .Z(n_2231)); - notech_inv i_1525(.A(n_197), .Z(n_2232)); - AWDP_DEC_26_2 i_102(.O0({n_93, n_92, n_91, n_90, n_89, n_88, n_87, n_86, - n_85, n_83, n_81, n_79, n_77, n_75, n_73, n_71}), .counter(counter - )); - AWDP_SUB_39_2 i_96(.O0({n_209, n_208, n_207, n_206, n_205, n_204, n_203, - n_202, n_201, n_200, n_199, n_198, n_197, n_195, n_193, n_191}) - , .counter(counter)); -endmodule -module v8253(clk, rst_n, irq, io_address, io_read, io_readdata, io_write, io_writedata - , port_61h_read, port_61h_readdata, port_61h_write, port_61h_writedata - , port_enable, port_out, cyc_ratio, cyc_ratio2); - - input clk; - input rst_n; - output irq; - input [1:0] io_address; - input io_read; - output [7:0] io_readdata; - input io_write; - input [7:0] io_writedata; - input port_61h_read; - output [7:0] port_61h_readdata; - input port_61h_write; - input [7:0] port_61h_writedata; - output port_enable; - output port_out; - input [7:0] cyc_ratio; - input [7:0] cyc_ratio2; - - wire [5:0] counter_1_cnt; - wire [7:0] system_counter; - wire [7:0] hopping; - wire [7:0] cycles_in_1193181hz; - wire [7:0] counter_0_readdata; - wire [7:0] counter_1_readdata; - wire [7:0] counter_2_readdata; - - - - notech_inv i_537(.A(n_8239), .Z(n_8240)); - notech_inv i_536(.A(rst_n), .Z(n_8239)); - notech_inv i_441(.A(n_8152), .Z(n_8158)); - notech_inv i_440(.A(n_8152), .Z(n_8157)); - notech_inv i_436(.A(n_8152), .Z(n_8153)); - notech_inv i_435(.A(clk), .Z(n_8152)); - notech_inv i_354(.A(n_8080), .Z(n_8082)); - notech_inv i_353(.A(n_8080), .Z(n_8081)); - notech_inv i_352(.A(n_8240), .Z(n_8080)); - notech_inv i_155(.A(n_7870), .Z(n_7871)); - notech_inv i_153(.A(\nbus_81[0] ), .Z(n_7870)); - notech_nand2 i_66(.A(counter_0_readdata[7]), .B(n_3511), .Z(n_126)); - notech_nand2 i_63(.A(n_3511), .B(counter_0_readdata[6]), .Z(n_125)); - notech_nand2 i_60(.A(n_3511), .B(counter_0_readdata[5]), .Z(n_124)); - notech_nand2 i_57(.A(n_3511), .B(counter_0_readdata[4]), .Z(n_123)); - notech_nand2 i_54(.A(n_3511), .B(counter_0_readdata[3]), .Z(n_122)); - notech_nand2 i_51(.A(n_3511), .B(counter_0_readdata[2]), .Z(n_121)); - notech_nand2 i_48(.A(n_3511), .B(counter_0_readdata[1]), .Z(n_120)); - notech_nand2 i_45(.A(n_3511), .B(counter_0_readdata[0]), .Z(n_119)); - notech_xor2 i_40(.A(n_232), .B(counter_1_cnt[2]), .Z(n_118)); - notech_xor2 i_38(.A(n_237), .B(counter_1_cnt[5]), .Z(n_117)); - notech_xor2 i_37(.A(n_224), .B(system_counter[3]), .Z(n_116)); - notech_xor2 i_36(.A(system_counter[4]), .B(n_225), .Z(n_115)); - notech_xor2 i_35(.A(system_counter[5]), .B(n_226), .Z(n_114)); - notech_xor2 i_343557(.A(n_227), .B(system_counter[6]), .Z(n_113)); - notech_xor2 i_32(.A(n_228), .B(system_counter[7]), .Z(n_112)); - notech_or2 i_31(.A(hopping[2]), .B(n_218), .Z(n_111)); - notech_and2 i_7(.A(system_counter[7]), .B(n_3499), .Z(n_156)); - notech_ao4 i_41(.A(system_counter[6]), .B(n_3498), .C(n_161), .D(n_160), - .Z(n_157)); - notech_and2 i_10(.A(system_counter[6]), .B(n_3498), .Z(n_160)); - notech_ao4 i_28(.A(system_counter[5]), .B(n_3497), .C(n_165), .D(n_164), - .Z(n_161)); - notech_and2 i_11(.A(system_counter[5]), .B(n_3497), .Z(n_164)); - notech_ao4 i_25(.A(system_counter[4]), .B(n_3496), .C(n_169), .D(n_168), - .Z(n_165)); - notech_and2 i_12(.A(system_counter[4]), .B(n_3496), .Z(n_168)); - notech_ao4 i_22(.A(system_counter[3]), .B(n_3495), .C(n_173), .D(n_172), - .Z(n_169)); - notech_and2 i_13(.A(system_counter[3]), .B(n_3495), .Z(n_172)); - notech_ao4 i_20(.A(n_223), .B(n_3494), .C(system_counter[2]), .D(n_176), - .Z(n_173)); - notech_and2 i_18(.A(n_223), .B(n_3494), .Z(n_176)); - notech_and2 i_27(.A(system_counter[1]), .B(n_3493), .Z(n_179)); - notech_nand2 i_12106(.A(n_261), .B(n_119), .Z(n_183)); - notech_nand2 i_22107(.A(n_260), .B(n_120), .Z(n_186)); - notech_nand2 i_32108(.A(n_259), .B(n_121), .Z(n_189)); - notech_nand2 i_42109(.A(n_258), .B(n_122), .Z(n_192)); - notech_nand2 i_52110(.A(n_257), .B(n_123), .Z(n_195)); - notech_nand2 i_62111(.A(n_256), .B(n_124), .Z(n_198)); - notech_nand2 i_72112(.A(n_255), .B(n_125), .Z(n_201)); - notech_nand2 i_82113(.A(n_254), .B(n_126), .Z(n_204)); - notech_ao4 i_2269(.A(n_246), .B(n_3537), .C(n_243), .D(n_3488), .Z(n_207 - )); - notech_ao4 i_2254(.A(n_246), .B(n_3538), .C(n_240), .D(n_251), .Z(n_208) - ); - notech_ao4 i_222(.A(n_246), .B(n_3539), .C(n_243), .D(n_240), .Z(n_209) - ); - notech_xor2 i_21580(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_210 - )); - notech_xor2 i_4(.A(counter_1_cnt[3]), .B(n_235), .Z(n_211)); - notech_xor2 i_51581(.A(counter_1_cnt[4]), .B(n_236), .Z(n_212)); - notech_ao4 i_32084(.A(n_3502), .B(n_3501), .C(\nbus_81[0] ), .D(n_229), - .Z(n_213)); - notech_ao4 i_22115(.A(n_3490), .B(n_3489), .C(n_3613), .D(n_221), .Z(n_214 - )); - notech_nand3 i_19(.A(hopping[0]), .B(hopping[2]), .C(hopping[1]), .Z(n_215 - )); - notech_and2 i_14(.A(hopping[0]), .B(hopping[1]), .Z(n_218)); - notech_nao3 i_154(.A(n_215), .B(n_3491), .C(hopping[7]), .Z(n_220)); - notech_nand2 i_152(.A(hopping[0]), .B(n_3490), .Z(n_221)); - notech_nand2 i_150(.A(cycles_in_1193181hz[0]), .B(n_3500), .Z(n_222)); - notech_ao4 i_5(.A(system_counter[1]), .B(n_3493), .C(n_179), .D(n_222), - .Z(n_223)); - notech_nand2 i_10002(.A(system_counter[1]), .B(system_counter[2]), .Z(n_224 - )); - notech_nand3 i_9(.A(system_counter[1]), .B(system_counter[3]), .C(system_counter - [2]), .Z(n_225)); - notech_and4 i_102752(.A(system_counter[1]), .B(system_counter[3]), .C(system_counter - [4]), .D(system_counter[2]), .Z(n_226)); - notech_ao3 i_182755(.A(system_counter[4]), .B(system_counter[5]), .C(n_225 - ), .Z(n_227)); - notech_and3 i_23(.A(system_counter[5]), .B(n_226), .C(system_counter[6]) - , .Z(n_228)); - notech_nand2 i_149(.A(system_counter[1]), .B(n_3502), .Z(n_229)); - notech_and2 i_12792(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .Z(n_232 - )); - notech_nand3 i_145(.A(\nbus_81[0] ), .B(counter_1_cnt[5]), .C(n_232), .Z - (n_234)); - notech_and3 i_82796(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt - [2]), .Z(n_235)); - notech_and4 i_92797(.A(counter_1_cnt[0]), .B(counter_1_cnt[1]), .C(counter_1_cnt - [2]), .D(counter_1_cnt[3]), .Z(n_236)); - notech_and3 i_24(.A(counter_1_cnt[3]), .B(n_235), .C(counter_1_cnt[4]), - .Z(n_237)); - notech_and2 i_140(.A(io_write), .B(io_address[1]), .Z(n_238)); - notech_nao3 i_26(.A(io_address[0]), .B(n_238), .C(io_writedata[7]), .Z(n_240 - )); - notech_or2 i_32809(.A(io_writedata[5]), .B(io_writedata[4]), .Z(n_241) - ); - notech_nao3 i_138(.A(n_3535), .B(n_3536), .C(io_writedata[5]), .Z(n_243) - ); - notech_and4 i_16(.A(io_write), .B(io_address[0]), .C(io_writedata[7]), .D - (io_address[1]), .Z(n_244)); - notech_nao3 i_30(.A(io_writedata[6]), .B(n_244), .C(io_writedata[5]), .Z - (n_246)); - notech_nao3 i_133(.A(n_3535), .B(io_writedata[6]), .C(io_writedata[5]), - .Z(n_251)); - notech_ao4 i_128(.A(n_3534), .B(n_3521), .C(n_3533), .D(n_3529), .Z(n_254 - )); - notech_ao4 i_126(.A(n_3534), .B(n_3520), .C(n_3533), .D(n_3528), .Z(n_255 - )); - notech_ao4 i_124(.A(n_3534), .B(n_3519), .C(n_3533), .D(n_3527), .Z(n_256 - )); - notech_ao4 i_122(.A(n_3534), .B(n_3517), .C(n_3533), .D(n_3526), .Z(n_257 - )); - notech_ao4 i_120(.A(n_3534), .B(n_3516), .C(n_3533), .D(n_3525), .Z(n_258 - )); - notech_ao4 i_118(.A(n_3534), .B(n_3515), .C(n_3533), .D(n_3524), .Z(n_259 - )); - notech_ao4 i_116(.A(n_3534), .B(n_3514), .C(n_3533), .D(n_3523), .Z(n_260 - )); - notech_ao4 i_114(.A(n_3534), .B(n_3513), .C(n_3533), .D(n_3522), .Z(n_261 - )); - notech_ao3 i_218(.A(n_241), .B(n_3536), .C(n_240), .Z(n_3507)); - notech_and4 i_226(.A(io_writedata[6]), .B(n_244), .C(io_writedata[1]), .D - (n_3535), .Z(n_3509)); - notech_ao3 i_227(.A(io_write), .B(n_3512), .C(io_address[0]), .Z(n_3510) - ); - notech_reg hopping_reg_0(.CP(n_8158), .D(n_3281), .CD(n_8082), .Q(hopping - [0])); - notech_mux2 i_3620(.S(\nbus_81[0] ), .A(hopping[0]), .B(n_3458), .Z(n_3281 - )); - notech_ao3 i_2249(.A(io_writedata[6]), .B(n_241), .C(n_240), .Z(n_3672) - ); - notech_reg hopping_reg_1(.CP(n_8158), .D(n_3287), .CD(n_8082), .Q(hopping - [1])); - notech_mux2 i_3628(.S(\nbus_81[0] ), .A(hopping[1]), .B(n_3532), .Z(n_3287 - )); - notech_and4 i_2258(.A(io_writedata[6]), .B(n_244), .C(n_3535), .D(io_writedata - [2]), .Z(n_3674)); - notech_reg hopping_reg_2(.CP(n_8158), .D(n_3293), .CD(n_8082), .Q(hopping - [2])); - notech_mux2 i_3636(.S(\nbus_81[0] ), .A(hopping[2]), .B(n_3470), .Z(n_3293 - )); - notech_and3 i_2259(.A(io_write), .B(io_address[0]), .C(n_3512), .Z(n_3675 - )); - notech_reg hopping_reg_3(.CP(n_8158), .D(n_3303), .CD(n_8082), .Q(hopping - [3])); - notech_and3 i_2264(.A(n_241), .B(n_3536), .C(n_244), .Z(n_3446)); - notech_ao3 i_3648(.A(hopping[3]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3303) - ); - notech_reg hopping_reg_4(.CP(n_8158), .D(n_3309), .CD(n_8082), .Q(hopping - [4])); - notech_and4 i_2273(.A(io_writedata[6]), .B(n_244), .C(n_3535), .D(io_writedata - [3]), .Z(n_3448)); - notech_ao3 i_3656(.A(hopping[4]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3309) - ); - notech_reg hopping_reg_5(.CP(n_8158), .D(n_3315), .CD(n_8082), .Q(hopping - [5])); - notech_ao3 i_2274(.A(io_write), .B(io_address[1]), .C(io_address[0]), .Z - (n_3449)); - notech_ao3 i_3664(.A(hopping[5]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3315) - ); - notech_reg hopping_reg_6(.CP(n_8157), .D(n_3322), .CD(n_8081), .Q(hopping - [6])); - notech_or4 i_2(.A(counter_1_cnt[3]), .B(counter_1_cnt[2]), .C(counter_1_cnt - [4]), .D(n_234), .Z(n_3319)); - notech_ao3 i_3672(.A(hopping[6]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3322) - ); - notech_reg hopping_reg_7(.CP(n_8157), .D(n_3328), .CD(n_8081), .Q(hopping - [7])); - notech_and2 i_32116(.A(n_111), .B(n_3492), .Z(n_3470)); - notech_ao3 i_3680(.A(hopping[7]), .B(1'b1), .C(\nbus_81[0] ), .Z(n_3328) - ); - notech_reg cycles_in_1193181hz_reg_0(.CP(n_8157), .D(n_3330), .CD(n_8081 - ), .Q(cycles_in_1193181hz[0])); - notech_or2 i_3684(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[0]), .Z(n_3330 - )); - notech_nor2 i_12114(.A(hopping[0]), .B(n_3613), .Z(n_3458)); - notech_reg_set cycles_in_1193181hz_reg_1(.CP(n_8158), .D(n_3336), .SD(n_8082 - ), .Q(cycles_in_1193181hz[1])); - notech_mux2 i_3692(.S(\nbus_81[0] ), .A(cycles_in_1193181hz[1]), .B(n_3492 - ), .Z(n_3336)); - notech_or4 i_43(.A(hopping[5]), .B(hopping[3]), .C(hopping[4]), .D(n_220 - ), .Z(n_3613)); - notech_reg cycles_in_1193181hz_reg_2(.CP(n_8158), .D(n_3346), .CD(n_8082 - ), .Q(cycles_in_1193181hz[2])); - notech_ao3 i_3704(.A(cycles_in_1193181hz[2]), .B(1'b1), .C(\nbus_81[0] ) - , .Z(n_3346)); - notech_reg_set cycles_in_1193181hz_reg_3(.CP(n_8158), .D(n_3352), .SD(n_8082 - ), .Q(cycles_in_1193181hz[3])); - notech_ao4 i_432787(.A(system_counter[7]), .B(n_3499), .C(n_157), .D(n_156 - ), .Z(\nbus_81[0] )); - notech_ao3 i_3712(.A(cycles_in_1193181hz[3]), .B(1'b1), .C(\nbus_81[0] ) - , .Z(n_3352)); - notech_reg cycles_in_1193181hz_reg_4(.CP(n_8158), .D(n_3354), .CD(n_8082 - ), .Q(cycles_in_1193181hz[4])); - notech_or2 i_3716(.A(\nbus_81[0] ), .B(cycles_in_1193181hz[4]), .Z(n_3354 - )); - notech_reg_set cycles_in_1193181hz_reg_5(.CP(n_8158), .D(n_3364), .SD(n_8082 - ), .Q(cycles_in_1193181hz[5])); - notech_ao3 i_3728(.A(cycles_in_1193181hz[5]), .B(1'b1), .C(\nbus_81[0] ) - , .Z(n_3364)); - notech_reg cycles_in_1193181hz_reg_6(.CP(n_8158), .D(n_3366), .CD(n_8082 - ), .Q(cycles_in_1193181hz[6])); - notech_or2 i_3732(.A(n_7871), .B(cycles_in_1193181hz[6]), .Z(n_3366)); - notech_nor2 i_52086(.A(n_7871), .B(n_115), .Z(n_3423)); - notech_reg cycles_in_1193181hz_reg_7(.CP(n_8158), .D(n_3376), .CD(n_8082 - ), .Q(cycles_in_1193181hz[7])); - notech_nor2 i_42085(.A(n_7871), .B(n_116), .Z(n_3416)); - notech_ao3 i_3744(.A(cycles_in_1193181hz[7]), .B(1'b1), .C(n_7871), .Z(n_3376 - )); - notech_reg system_counter_reg_0(.CP(n_8158), .D(n_3378), .CD(n_8082), .Q - (system_counter[0])); - notech_ao3 i_3748(.A(system_counter[0]), .B(1'b1), .C(n_7871), .Z(n_3378 - )); - notech_reg system_counter_reg_1(.CP(n_8158), .D(n_3402), .CD(n_8082), .Q - (system_counter[1])); - notech_reg system_counter_reg_2(.CP(n_8158), .D(n_3531), .CD(n_8082), .Q - (system_counter[2])); - notech_reg system_counter_reg_3(.CP(n_8158), .D(n_3416), .CD(n_8082), .Q - (system_counter[3])); - notech_reg system_counter_reg_4(.CP(n_8158), .D(n_3423), .CD(n_8082), .Q - (system_counter[4])); - notech_reg system_counter_reg_5(.CP(n_8158), .D(n_3388), .CD(n_8082), .Q - (system_counter[5])); - notech_ao3 i_3768(.A(n_114), .B(1'b1), .C(n_7871), .Z(n_3388)); - notech_reg system_counter_reg_6(.CP(n_8158), .D(n_3390), .CD(n_8082), .Q - (system_counter[6])); - notech_ao3 i_3772(.A(n_113), .B(1'b1), .C(n_7871), .Z(n_3390)); - notech_reg system_counter_reg_7(.CP(n_8157), .D(n_3392), .CD(n_8240), .Q - (system_counter[7])); - notech_ao3 i_3776(.A(n_112), .B(1'b1), .C(n_7871), .Z(n_3392)); - notech_reg counter_1_cnt_reg_0(.CP(n_8157), .D(n_3394), .CD(n_8240), .Q(counter_1_cnt - [0])); - notech_xor2 i_3780(.A(counter_1_cnt[0]), .B(n_7871), .Z(n_3394)); - notech_nor2 i_22083(.A(system_counter[1]), .B(n_7871), .Z(n_3402)); - notech_reg counter_1_cnt_reg_1(.CP(n_8157), .D(n_3401), .CD(n_8240), .Q(counter_1_cnt - [1])); - notech_mux2 i_3788(.S(\nbus_81[0] ), .A(counter_1_cnt[1]), .B(n_210), .Z - (n_3401)); - notech_reg counter_1_cnt_reg_2(.CP(n_8157), .D(n_3408), .CD(n_8240), .Q(counter_1_cnt - [2])); - notech_mux2 i_3796(.S(n_7871), .A(counter_1_cnt[2]), .B(n_3696), .Z(n_3408 - )); - notech_and2 i_6(.A(n_3319), .B(n_117), .Z(n_3714)); - notech_reg counter_1_cnt_reg_3(.CP(n_8157), .D(n_3415), .CD(n_8240), .Q(counter_1_cnt - [3])); - notech_mux2 i_3804(.S(n_7871), .A(counter_1_cnt[3]), .B(n_211), .Z(n_3415 - )); - notech_and2 i_3(.A(n_3319), .B(n_118), .Z(n_3696)); - notech_reg counter_1_cnt_reg_4(.CP(n_8153), .D(n_3422), .CD(n_8240), .Q(counter_1_cnt - [4])); - notech_mux2 i_3812(.S(n_7871), .A(counter_1_cnt[4]), .B(n_212), .Z(n_3422 - )); - notech_and2 i_214(.A(io_read), .B(n_3503), .Z(n_3659)); - notech_reg counter_1_cnt_reg_5(.CP(n_8153), .D(n_3429), .CD(n_8240), .Q(counter_1_cnt - [5])); - notech_mux2 i_3820(.S(n_7871), .A(counter_1_cnt[5]), .B(n_3714), .Z(n_3429 - )); - notech_ao3 i_215(.A(n_3659), .B(n_3512), .C(io_address[0]), .Z(n_3511) - ); - notech_reg counter_1_toggle_reg(.CP(n_8153), .D(n_3436), .CD(n_8240), .Q - (port_61h_readdata[4])); - notech_xor2 i_3828(.A(n_3530), .B(n_3319), .Z(n_3436)); - notech_and3 i_2246(.A(io_address[0]), .B(n_3659), .C(n_3512), .Z(n_3676) - ); - notech_reg io_read_last_reg(.CP(n_8153), .D(n_3659), .CD(n_8240), .Q(io_read_last - )); - notech_reg port_enable_reg(.CP(n_8153), .D(n_3451), .CD(n_8240), .Q(port_61h_readdata - [1])); - notech_mux2 i_3840(.S(port_61h_write), .A(port_61h_readdata[1]), .B(io_writedata - [1]), .Z(n_3451)); - notech_ao3 i_2261(.A(n_3659), .B(io_address[1]), .C(io_address[0]), .Z(n_3450 - )); - notech_reg system_clock_reg(.CP(n_8157), .D(n_3457), .CD(n_8081), .Q(system_clock - )); - notech_xor2 i_3848(.A(system_clock), .B(n_7871), .Z(n_3457)); - notech_reg port_gate_reg(.CP(n_8157), .D(n_3465), .CD(n_8081), .Q(port_61h_readdata - [0])); - notech_mux2 i_3856(.S(port_61h_write), .A(port_61h_readdata[0]), .B(io_writedata - [0]), .Z(n_3465)); - notech_reg io_readdata_reg_0(.CP(n_8157), .D(n_183), .CD(n_8081), .Q(io_readdata - [0])); - notech_reg io_readdata_reg_1(.CP(n_8157), .D(n_186), .CD(n_8081), .Q(io_readdata - [1])); - notech_reg io_readdata_reg_2(.CP(n_8157), .D(n_189), .CD(n_8081), .Q(io_readdata - [2])); - notech_reg io_readdata_reg_3(.CP(n_8157), .D(n_192), .CD(n_8240), .Q(io_readdata - [3])); - notech_reg io_readdata_reg_4(.CP(n_8157), .D(n_195), .CD(n_8240), .Q(io_readdata - [4])); - notech_reg io_readdata_reg_5(.CP(n_8157), .D(n_198), .CD(n_8240), .Q(io_readdata - [5])); - notech_reg io_readdata_reg_6(.CP(n_8157), .D(n_201), .CD(n_8081), .Q(io_readdata - [6])); - notech_reg io_readdata_reg_7(.CP(n_8157), .D(n_204), .CD(n_8240), .Q(io_readdata - [7])); - notech_inv i_4068(.A(n_244), .Z(n_3488)); - notech_inv i_4069(.A(n_3458), .Z(n_3489)); - notech_inv i_4070(.A(hopping[1]), .Z(n_3490)); - notech_inv i_4071(.A(hopping[6]), .Z(n_3491)); - notech_inv i_4072(.A(n_3613), .Z(n_3492)); - notech_inv i_4073(.A(cycles_in_1193181hz[1]), .Z(n_3493)); - notech_inv i_4074(.A(cycles_in_1193181hz[2]), .Z(n_3494)); - notech_inv i_4075(.A(cycles_in_1193181hz[3]), .Z(n_3495)); - notech_inv i_4076(.A(cycles_in_1193181hz[4]), .Z(n_3496)); - notech_inv i_4077(.A(cycles_in_1193181hz[5]), .Z(n_3497)); - notech_inv i_4078(.A(cycles_in_1193181hz[6]), .Z(n_3498)); - notech_inv i_4079(.A(cycles_in_1193181hz[7]), .Z(n_3499)); - notech_inv i_4080(.A(system_counter[0]), .Z(n_3500)); - notech_inv i_4081(.A(n_3402), .Z(n_3501)); - notech_inv i_4082(.A(system_counter[2]), .Z(n_3502)); - notech_inv i_4083(.A(io_read_last), .Z(n_3503)); - notech_inv i_4084(.A(n_207), .Z(n_3447)); - notech_inv i_4085(.A(n_208), .Z(n_3673)); - notech_inv i_4086(.A(n_209), .Z(n_3508)); - notech_inv i_4087(.A(io_address[1]), .Z(n_3512)); - notech_inv i_4088(.A(counter_1_readdata[0]), .Z(n_3513)); - notech_inv i_4089(.A(counter_1_readdata[1]), .Z(n_3514)); - notech_inv i_4090(.A(counter_1_readdata[2]), .Z(n_3515)); - notech_inv i_4091(.A(counter_1_readdata[3]), .Z(n_3516)); - notech_inv i_4092(.A(counter_1_readdata[4]), .Z(n_3517)); - notech_inv i_4093(.A(counter_1_readdata[5]), .Z(n_3519)); - notech_inv i_4094(.A(counter_1_readdata[6]), .Z(n_3520)); - notech_inv i_4095(.A(counter_1_readdata[7]), .Z(n_3521)); - notech_inv i_4096(.A(counter_2_readdata[0]), .Z(n_3522)); - notech_inv i_4097(.A(counter_2_readdata[1]), .Z(n_3523)); - notech_inv i_4098(.A(counter_2_readdata[2]), .Z(n_3524)); - notech_inv i_4099(.A(counter_2_readdata[3]), .Z(n_3525)); - notech_inv i_4100(.A(counter_2_readdata[4]), .Z(n_3526)); - notech_inv i_4101(.A(counter_2_readdata[5]), .Z(n_3527)); - notech_inv i_4102(.A(counter_2_readdata[6]), .Z(n_3528)); - notech_inv i_4103(.A(counter_2_readdata[7]), .Z(n_3529)); - notech_inv i_4104(.A(port_61h_readdata[4]), .Z(n_3530)); - notech_inv i_4105(.A(n_213), .Z(n_3531)); - notech_inv i_4106(.A(n_214), .Z(n_3532)); - notech_inv i_4107(.A(n_3450), .Z(n_3533)); - notech_inv i_4108(.A(n_3676), .Z(n_3534)); - notech_inv i_4109(.A(io_writedata[4]), .Z(n_3535)); - notech_inv i_4110(.A(io_writedata[6]), .Z(n_3536)); - notech_inv i_4111(.A(io_writedata[3]), .Z(n_3537)); - notech_inv i_4112(.A(io_writedata[2]), .Z(n_3538)); - notech_inv i_4113(.A(io_writedata[1]), .Z(n_3539)); - v8253_counter_2 count3(.clk(n_8153), .rst_n(n_8240), .clock(system_clock - ), .gate(port_61h_readdata[0]), .out(port_61h_readdata[5]), .data_in - (io_writedata), .set_control_mode(n_3446), .latch_count(n_3447), - .latch_status(n_3448), .write(n_3449), .read(n_3450), .data_out - (counter_2_readdata)); - v8253_counter_1 count2(.clk(n_8153), .rst_n(n_8240), .clock(system_clock - ), .data_in(io_writedata), .set_control_mode(n_3672), .latch_count - (n_3673), .latch_status(n_3674), .write(n_3675), .read(n_3676), - .data_out(counter_1_readdata)); - v8253_counter_0 ucount1(.clk(n_8153), .rst_n(n_8240), .clock(system_clock - ), .out(irq), .data_in(io_writedata), .set_control_mode(n_3507), - .latch_count(n_3508), .latch_status(n_3509), .write(n_3510), .read - (n_3511), .data_out(counter_0_readdata)); -endmodule -module v8259(clk, rst_n, ms_address, ms_read, ms_readdata, ms_write, ms_writedata - , sl_address, sl_read, sl_readdata, sl_write, sl_writedata, inter_input - , inter_do, inter_vector, inter_done); - - input clk; - input rst_n; - input ms_address; - input ms_read; - output [7:0] ms_readdata; - input ms_write; - input [7:0] ms_writedata; - input sl_address; - input sl_read; - output [7:0] sl_readdata; - input sl_write; - input [7:0] sl_writedata; - input [15:0] inter_input; - output inter_do; - output [7:0] inter_vector; - input inter_done; - - wire [7:0] mas_irr; - wire [2:0] sla_init_byte_expected; - wire [7:0] sla_irr; - wire [2:0] sla_lowest_priority; - wire [2:0] mas_lowest_priority; - wire [2:0] mas_init_byte_expected; - wire [7:0] mas_isr; - wire [7:0] sla_isr; - wire [7:0] mas_imr; - wire [7:0] sla_imr; - wire [4:0] sla_inter_offset; - wire [4:0] mas_inter_offset; - - - - notech_inv i_454(.A(n_8161), .Z(n_8172)); - notech_inv i_453(.A(n_8161), .Z(n_8171)); - notech_inv i_452(.A(n_8161), .Z(n_8170)); - notech_inv i_450(.A(n_8161), .Z(n_8168)); - notech_inv i_449(.A(n_8161), .Z(n_8167)); - notech_inv i_448(.A(n_8161), .Z(n_8166)); - notech_inv i_446(.A(n_8161), .Z(n_8164)); - notech_inv i_445(.A(n_8161), .Z(n_8163)); - notech_inv i_444(.A(n_8161), .Z(n_8162)); - notech_inv i_443(.A(clk), .Z(n_8161)); - notech_inv i_406(.A(n_8116), .Z(n_8121)); - notech_inv i_401(.A(sl_address), .Z(n_8116)); - notech_inv i_367(.A(n_8085), .Z(n_8096)); - notech_inv i_366(.A(n_8085), .Z(n_8095)); - notech_inv i_365(.A(n_8085), .Z(n_8094)); - notech_inv i_363(.A(n_8085), .Z(n_8092)); - notech_inv i_362(.A(n_8085), .Z(n_8091)); - notech_inv i_361(.A(n_8085), .Z(n_8090)); - notech_inv i_359(.A(n_8085), .Z(n_8088)); - notech_inv i_358(.A(n_8085), .Z(n_8087)); - notech_inv i_357(.A(n_8085), .Z(n_8086)); - notech_inv i_356(.A(rst_n), .Z(n_8085)); - notech_inv i_225(.A(n_7944), .Z(n_7945)); - notech_inv i_224(.A(n_1182), .Z(n_7944)); - notech_inv i_130(.A(n_7851), .Z(n_7852)); - notech_inv i_129(.A(n_932), .Z(n_7851)); - notech_nand2 i_23(.A(n_1346), .B(n_4150), .Z(n_1054)); - notech_ao3 i_1446(.A(n_1182), .B(n_4282), .C(n_895), .Z(n_1047)); - notech_and3 i_1125(.A(n_1371), .B(n_1047), .C(n_810), .Z(n_1046)); - notech_nand2 i_24(.A(n_1511), .B(n_4136), .Z(n_933)); - notech_nao3 i_2330(.A(sl_write), .B(sl_writedata[4]), .C(n_8121), .Z(n_932 - )); - notech_nao3 i_37(.A(sl_read), .B(sla_polled), .C(sl_read_last), .Z(n_931 - )); - notech_and3 i_1318(.A(n_931), .B(n_1524), .C(n_932), .Z(n_930)); - notech_and4 i_1135(.A(n_932), .B(sla_current_irq), .C(n_4282), .D(n_4139 - ), .Z(n_929)); - notech_nand2 i_2371(.A(n_1532), .B(n_4188), .Z(n_928)); - notech_and2 i_21885(.A(sl_writedata[1]), .B(n_932), .Z(n_927)); - notech_and2 i_81891(.A(sl_writedata[7]), .B(n_932), .Z(n_926)); - notech_and4 i_422(.A(sl_writedata[5]), .B(sl_writedata[7]), .C(n_1198), - .D(n_4164), .Z(n_921)); - notech_ao3 i_421(.A(sla_rotate_on_aeoi), .B(sla_auto_eoi), .C(n_785), .Z - (n_920)); - notech_and3 i_11876(.A(inter_input[8]), .B(n_932), .C(n_572), .Z(n_913) - ); - notech_and2 i_71890(.A(sl_writedata[6]), .B(n_932), .Z(n_912)); - notech_and2 i_61889(.A(sl_writedata[5]), .B(n_932), .Z(n_911)); - notech_and2 i_51888(.A(n_1525), .B(sl_writedata[4]), .Z(n_910)); - notech_and2 i_41887(.A(sl_writedata[3]), .B(n_932), .Z(n_909)); - notech_and2 i_31886(.A(sl_writedata[2]), .B(n_932), .Z(n_908)); - notech_and2 i_11884(.A(sl_writedata[0]), .B(n_932), .Z(n_907)); - notech_and2 i_71930(.A(inter_input[6]), .B(n_575), .Z(n_906)); - notech_and2 i_61929(.A(inter_input[5]), .B(n_576), .Z(n_905)); - notech_and2 i_51928(.A(inter_input[4]), .B(n_577), .Z(n_904)); - notech_and2 i_31926(.A(sla_current_irq), .B(n_578), .Z(n_903)); - notech_and2 i_11924(.A(inter_input[0]), .B(n_579), .Z(n_902)); - notech_and2 i_71938(.A(sl_writedata[6]), .B(n_1182), .Z(n_901)); - notech_and2 i_61937(.A(sl_writedata[5]), .B(n_1182), .Z(n_900)); - notech_and2 i_51936(.A(n_1188), .B(sl_writedata[4]), .Z(n_899)); - notech_and2 i_41935(.A(sl_writedata[3]), .B(n_1182), .Z(n_898)); - notech_and2 i_31934(.A(sl_writedata[2]), .B(n_1182), .Z(n_897)); - notech_and2 i_11932(.A(sl_writedata[0]), .B(n_1182), .Z(n_896)); - notech_ao3 i_25(.A(ms_read), .B(mas_polled), .C(ms_read_last), .Z(n_895) - ); - notech_and4 i_1414(.A(mas_current_irq), .B(n_1182), .C(n_4153), .D(n_4282 - ), .Z(n_892)); - notech_nand2 i_704(.A(mas_init_requires_4), .B(n_1187), .Z(n_843)); - notech_or4 i_703(.A(mas_init_byte_expected[1]), .B(n_4175), .C(n_1185), - .D(mas_init_byte_expected[0]), .Z(n_842)); - notech_nao3 i_702(.A(mas_init_byte_expected[0]), .B(n_1187), .C(mas_init_requires_4 - ), .Z(n_841)); - notech_nao3 i_701(.A(n_4157), .B(n_1198), .C(sl_writedata[5]), .Z(n_840) - ); - notech_xor2 i_187(.A(n_4181), .B(n_1204), .Z(n_838)); - notech_xor2 i_188(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[1]) - , .Z(n_836)); - notech_ao4 i_5328(.A(n_4177), .B(n_1180), .C(mas_spurious), .D(n_4282), - .Z(n_834)); - notech_nand2 i_117(.A(n_1286), .B(n_4129), .Z(n_833)); - notech_nand2 i_633(.A(n_1279), .B(n_833), .Z(n_832)); - notech_nand2 i_158(.A(n_1272), .B(n_832), .Z(n_831)); - notech_nand2 i_632(.A(n_1265), .B(n_831), .Z(n_830)); - notech_nand2 i_631(.A(n_1286), .B(n_1279), .Z(n_829)); - notech_nand2 i_123(.A(n_1338), .B(n_4132), .Z(n_828)); - notech_nand2 i_574(.A(n_1331), .B(n_828), .Z(n_827)); - notech_nand2 i_164(.A(n_1324), .B(n_827), .Z(n_826)); - notech_nand2 i_573(.A(n_1317), .B(n_826), .Z(n_825)); - notech_nand2 i_570(.A(n_1338), .B(n_1331), .Z(n_822)); - notech_nand3 i_30(.A(n_581), .B(n_1251), .C(n_4151), .Z(n_821)); - notech_nand3 i_568(.A(n_1054), .B(n_4149), .C(n_821), .Z(n_820)); - notech_nand3 i_567(.A(n_1251), .B(mas_lowest_priority[0]), .C(n_581), .Z - (n_819)); - notech_and2 i_108(.A(mas_lowest_priority[1]), .B(n_4151), .Z(n_816)); - notech_and2 i_107(.A(n_1296), .B(n_4180), .Z(n_814)); - notech_ao4 i_215(.A(n_816), .B(n_1362), .C(mas_lowest_priority[1]), .D(n_4151 - ), .Z(n_812)); - notech_ao4 i_214(.A(n_4180), .B(n_1296), .C(n_814), .D(n_4155), .Z(n_811 - )); - notech_nand2 i_558(.A(n_1363), .B(n_1361), .Z(n_810)); - notech_and3 i_61(.A(n_1365), .B(n_1362), .C(n_819), .Z(n_809)); - notech_and2 i_186(.A(n_1370), .B(n_696), .Z(n_808)); - notech_nand2 i_119(.A(n_1432), .B(n_4130), .Z(n_807)); - notech_nand2 i_499(.A(n_1425), .B(n_807), .Z(n_806)); - notech_nand2 i_160(.A(n_1418), .B(n_806), .Z(n_805)); - notech_nand2 i_498(.A(n_1411), .B(n_805), .Z(n_804)); - notech_nand2 i_497(.A(n_1432), .B(n_1425), .Z(n_803)); - notech_nand2 i_121(.A(n_1500), .B(n_4131), .Z(n_802)); - notech_nand2 i_440(.A(n_1493), .B(n_802), .Z(n_801)); - notech_nand2 i_162(.A(n_1486), .B(n_801), .Z(n_800)); - notech_nand2 i_439(.A(n_1479), .B(n_800), .Z(n_799)); - notech_nand2 i_436(.A(n_1500), .B(n_1493), .Z(n_796)); - notech_nand2 i_31(.A(n_1442), .B(n_1439), .Z(n_795)); - notech_ao3 i_434(.A(n_933), .B(n_795), .C(n_1514), .Z(n_794)); - notech_nand2 i_432(.A(sla_init_requires_4), .B(n_1532), .Z(n_793)); - notech_or4 i_431(.A(sla_init_byte_expected[1]), .B(n_4190), .C(n_1530), - .D(sla_init_byte_expected[0]), .Z(n_792)); - notech_nao3 i_430(.A(sla_init_byte_expected[0]), .B(n_1532), .C(sla_init_requires_4 - ), .Z(n_791)); - notech_nao3 i_429(.A(n_4164), .B(n_1198), .C(sl_writedata[5]), .Z(n_790) - ); - notech_xor2 i_189(.A(sla_lowest_priority[2]), .B(n_1376), .Z(n_788)); - notech_xor2 i_190(.A(sla_lowest_priority[0]), .B(sla_lowest_priority[1]) - , .Z(n_786)); - notech_ao4 i_84(.A(n_1178), .B(n_4179), .C(sla_spurious), .D(n_1524), .Z - (n_785)); - notech_and2 i_105(.A(sla_lowest_priority[1]), .B(n_4137), .Z(n_779)); - notech_and2 i_109(.A(n_1442), .B(n_4192), .Z(n_777)); - notech_ao4 i_221(.A(n_779), .B(n_1549), .C(sla_lowest_priority[1]), .D(n_4137 - ), .Z(n_775)); - notech_ao4 i_220(.A(n_1442), .B(n_4192), .C(n_777), .D(n_4167), .Z(n_773 - )); - notech_nand3 i_407(.A(n_1397), .B(sla_lowest_priority[0]), .C(n_582), .Z - (n_771)); - notech_ao3 i_78(.A(n_1566), .B(n_1561), .C(n_1565), .Z(n_767)); - notech_ao3 i_170(.A(n_1551), .B(n_1558), .C(n_1553), .Z(n_765)); - notech_ao4 i_191(.A(n_767), .B(n_558), .C(n_1547), .D(n_765), .Z(n_762) - ); - notech_and3 i_96(.A(sl_writedata[2]), .B(sl_writedata[1]), .C(n_4276), .Z - (n_760)); - notech_and4 i_154(.A(n_1549), .B(n_771), .C(n_1558), .D(n_1552), .Z(n_758 - )); - notech_ao4 i_192(.A(n_760), .B(n_558), .C(n_1547), .D(n_758), .Z(n_755) - ); - notech_ao3 i_98(.A(sl_writedata[0]), .B(n_4277), .C(n_1565), .Z(n_753) - ); - notech_and3 i_173(.A(n_1551), .B(n_1553), .C(n_1558), .Z(n_751)); - notech_ao4 i_193(.A(n_753), .B(n_558), .C(n_1547), .D(n_751), .Z(n_748) - ); - notech_and4 i_155(.A(n_1549), .B(n_771), .C(n_4169), .D(n_1558), .Z(n_745 - )); - notech_ao4 i_194(.A(n_1559), .B(n_558), .C(n_745), .D(n_1547), .Z(n_742) - ); - notech_and3 i_150(.A(n_1551), .B(n_1550), .C(n_1556), .Z(n_739)); - notech_ao4 i_195(.A(n_1581), .B(n_558), .C(n_739), .D(n_1547), .Z(n_737) - ); - notech_ao3 i_65(.A(sl_writedata[1]), .B(n_4276), .C(sl_writedata[2]), .Z - (n_734)); - notech_and4 i_142(.A(n_1549), .B(n_771), .C(n_1550), .D(n_1556), .Z(n_732 - )); - notech_ao4 i_196(.A(n_734), .B(n_558), .C(n_732), .D(n_1547), .Z(n_729) - ); - notech_nand2 i_76(.A(n_1553), .B(n_1550), .Z(n_727)); - notech_nand3 i_379(.A(n_558), .B(n_932), .C(n_727), .Z(n_726)); - notech_and3 i_197(.A(n_1567), .B(n_726), .C(n_1585), .Z(n_725)); - notech_or2 i_374(.A(n_785), .B(sla_auto_eoi), .Z(n_722)); - notech_and3 i_198(.A(n_1567), .B(n_1586), .C(n_726), .Z(n_720)); - notech_and2 i_146(.A(n_1514), .B(sla_lowest_priority[1]), .Z(n_705)); - notech_nor2 i_133(.A(n_1592), .B(n_4139), .Z(n_700)); - notech_nand2 i_22230(.A(n_1365), .B(n_1367), .Z(n_696)); - notech_and2 i_134(.A(n_1523), .B(n_1594), .Z(n_694)); - notech_nand3 i_347(.A(n_1465), .B(n_583), .C(sla_lowest_priority[0]), .Z - (n_692)); - notech_and3 i_135(.A(n_692), .B(n_1523), .C(n_1590), .Z(n_690)); - notech_or4 i_131(.A(inter_vector[0]), .B(inter_vector[2]), .C(inter_vector - [1]), .D(n_785), .Z(n_688)); - notech_nand2 i_344(.A(sla_irr[0]), .B(n_688), .Z(n_687)); - notech_and4 i_200(.A(inter_vector[2]), .B(inter_vector[1]), .C(inter_vector - [0]), .D(n_1601), .Z(n_684)); - notech_and2 i_199(.A(\inter_last[7] ), .B(n_4236), .Z(n_682)); - notech_nand2 i_125(.A(n_1601), .B(n_4142), .Z(n_680)); - notech_nand2 i_339(.A(mas_irr[6]), .B(n_680), .Z(n_679)); - notech_nand2 i_166(.A(\inter_last[6] ), .B(n_679), .Z(n_678)); - notech_nand2 i_126(.A(n_1601), .B(n_4143), .Z(n_676)); - notech_nand2 i_337(.A(mas_irr[5]), .B(n_676), .Z(n_675)); - notech_nand2 i_167(.A(\inter_last[5] ), .B(n_675), .Z(n_674)); - notech_nand2 i_127(.A(n_1601), .B(n_4144), .Z(n_672)); - notech_nand2 i_335(.A(mas_irr[4]), .B(n_672), .Z(n_671)); - notech_nand2 i_168(.A(\inter_last[4] ), .B(n_671), .Z(n_670)); - notech_and2 i_333(.A(n_1582), .B(n_4182), .Z(n_668)); - notech_or2 i_132(.A(n_834), .B(n_668), .Z(n_667)); - notech_nand2 i_332(.A(mas_irr[2]), .B(n_667), .Z(n_666)); - notech_nand2 i_172(.A(sla_current_irq_last), .B(n_666), .Z(n_665)); - notech_or4 i_128(.A(inter_vector[1]), .B(n_834), .C(mas_sla_active), .D(n_1572 - ), .Z(n_663)); - notech_nand2 i_330(.A(n_663), .B(mas_irr[0]), .Z(n_662)); - notech_nand2 i_169(.A(\inter_last[0] ), .B(n_662), .Z(n_661)); - notech_and2 i_106(.A(mas_lowest_priority[1]), .B(n_4149), .Z(n_656)); - notech_and2 i_110(.A(n_1352), .B(n_4180), .Z(n_654)); - notech_ao4 i_223(.A(n_656), .B(n_1605), .C(mas_lowest_priority[1]), .D(n_4149 - ), .Z(n_652)); - notech_ao4 i_222(.A(n_4180), .B(n_1352), .C(n_654), .D(n_4160), .Z(n_650 - )); - notech_nand3 i_321(.A(n_1303), .B(mas_lowest_priority[0]), .C(n_584), .Z - (n_648)); - notech_nor2 i_80(.A(n_1200), .B(n_563), .Z(n_645)); - notech_or2 i_318(.A(n_895), .B(n_645), .Z(n_644)); - notech_ao3 i_171(.A(n_1607), .B(n_1614), .C(n_4161), .Z(n_641)); - notech_ao4 i_206(.A(n_559), .B(n_767), .C(n_1603), .D(n_641), .Z(n_638) - ); - notech_and4 i_156(.A(n_1605), .B(n_648), .C(n_1614), .D(n_1608), .Z(n_635 - )); - notech_ao4 i_207(.A(n_559), .B(n_760), .C(n_1603), .D(n_635), .Z(n_632) - ); - notech_and3 i_175(.A(n_1614), .B(n_1607), .C(n_4161), .Z(n_629)); - notech_ao4 i_208(.A(n_559), .B(n_753), .C(n_1603), .D(n_629), .Z(n_626) - ); - notech_and4 i_157(.A(n_1605), .B(n_648), .C(n_4159), .D(n_1614), .Z(n_623 - )); - notech_ao4 i_209(.A(n_1559), .B(n_559), .C(n_1603), .D(n_623), .Z(n_620) - ); - notech_and3 i_151(.A(n_1606), .B(n_1607), .C(n_1612), .Z(n_617)); - notech_ao4 i_210(.A(n_559), .B(n_1581), .C(n_1603), .D(n_617), .Z(n_615) - ); - notech_and4 i_145(.A(n_1605), .B(n_648), .C(n_1606), .D(n_1612), .Z(n_611 - )); - notech_ao4 i_211(.A(n_559), .B(n_734), .C(n_611), .D(n_1603), .Z(n_608) - ); - notech_and4 i_176(.A(n_4161), .B(n_1606), .C(n_1607), .D(n_644), .Z(n_605 - )); - notech_ao4 i_212(.A(n_559), .B(n_1562), .C(n_605), .D(n_1603), .Z(n_603) - ); - notech_nor2 i_288(.A(n_834), .B(mas_auto_eoi), .Z(n_600)); - notech_and4 i_153(.A(n_1605), .B(n_1606), .C(n_648), .D(n_4159), .Z(n_599 - )); - notech_and2 i_213(.A(n_1616), .B(n_1622), .Z(n_597)); - notech_nand3 i_276(.A(n_1624), .B(mas_irr[6]), .C(n_4177), .Z(n_592)); - notech_nand3 i_273(.A(n_1624), .B(mas_irr[5]), .C(n_4177), .Z(n_591)); - notech_nand3 i_270(.A(n_1624), .B(mas_irr[4]), .C(n_4177), .Z(n_590)); - notech_nand3 i_267(.A(mas_irr[3]), .B(n_4177), .C(n_1624), .Z(n_589)); - notech_nand3 i_248(.A(n_1641), .B(sla_irr[6]), .C(n_4179), .Z(n_588)); - notech_nand3 i_245(.A(n_1641), .B(sla_irr[5]), .C(n_4179), .Z(n_587)); - notech_nand3 i_242(.A(n_1641), .B(sla_irr[4]), .C(n_4179), .Z(n_586)); - notech_nand3 i_239(.A(sla_irr[3]), .B(n_4179), .C(n_1641), .Z(n_585)); - notech_nand2 i_219(.A(n_1310), .B(n_825), .Z(n_584)); - notech_nand2 i_218(.A(n_1472), .B(n_799), .Z(n_583)); - notech_nand2 i_217(.A(n_1404), .B(n_804), .Z(n_582)); - notech_nand2 i_216(.A(n_1258), .B(n_830), .Z(n_581)); - notech_ao4 i_205(.A(n_1188), .B(n_4278), .C(mas_ltim), .D(n_661), .Z(n_579 - )); - notech_ao4 i_204(.A(n_1188), .B(n_4278), .C(mas_ltim), .D(n_665), .Z(n_578 - )); - notech_ao4 i_203(.A(n_1188), .B(n_4278), .C(mas_ltim), .D(n_670), .Z(n_577 - )); - notech_ao4 i_202(.A(n_1188), .B(n_4278), .C(mas_ltim), .D(n_674), .Z(n_576 - )); - notech_ao4 i_201(.A(n_1188), .B(n_4278), .C(mas_ltim), .D(n_678), .Z(n_575 - )); - notech_nao3 i_174(.A(\inter_last[8] ), .B(n_687), .C(sla_ltim), .Z(n_572 - )); - notech_nand3 i_165(.A(n_1324), .B(n_1317), .C(n_822), .Z(n_571)); - notech_nand3 i_163(.A(n_1486), .B(n_1479), .C(n_796), .Z(n_570)); - notech_nand3 i_161(.A(n_1418), .B(n_1411), .C(n_803), .Z(n_569)); - notech_nand3 i_159(.A(n_1272), .B(n_1265), .C(n_829), .Z(n_568)); - notech_and4 i_71994(.A(n_1343), .B(n_1342), .C(n_1340), .D(n_1339), .Z(n_567 - )); - notech_and4 i_71834(.A(n_1505), .B(n_1504), .C(n_1502), .D(n_1501), .Z(n_566 - )); - notech_and4 i_71746(.A(n_1437), .B(n_1436), .C(n_1434), .D(n_1433), .Z(n_565 - )); - notech_and4 i_71690(.A(n_1291), .B(n_1290), .C(n_1288), .D(n_1287), .Z(n_564 - )); - notech_nao3 i_58(.A(n_1197), .B(sl_writedata[5]), .C(sl_writedata[6]), .Z - (n_563)); - notech_nand3 i_2563(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4157) - , .Z(n_559)); - notech_nand3 i_2380(.A(sl_writedata[6]), .B(sl_writedata[5]), .C(n_4164) - , .Z(n_558)); - notech_ao3 i_692(.A(mas_rotate_on_aeoi), .B(mas_auto_eoi), .C(n_834), .Z - (n_1170)); - notech_and4 i_693(.A(sl_writedata[5]), .B(sl_writedata[7]), .C(n_1198), - .D(n_4157), .Z(n_1171)); - notech_and2 i_81939(.A(sl_writedata[7]), .B(n_1182), .Z(n_1176)); - notech_nand2 i_2331(.A(sl_read), .B(n_4178), .Z(n_1178)); - notech_nand2 i_2321(.A(ms_read), .B(n_4176), .Z(n_1180)); - notech_and2 i_21933(.A(sl_writedata[1]), .B(n_1182), .Z(n_1181)); - notech_nao3 i_2309(.A(ms_write), .B(sl_writedata[4]), .C(n_8121), .Z(n_1182 - )); - notech_nand2 i_2315(.A(n_1187), .B(n_4173), .Z(n_1183)); - notech_nand2 i_112(.A(n_8121), .B(ms_write), .Z(n_1184)); - notech_nand3 i_139(.A(ms_write), .B(n_8121), .C(mas_in_init), .Z(n_1185) - ); - notech_and4 i_180(.A(mas_in_init), .B(mas_init_byte_expected[1]), .C(n_4128 - ), .D(n_4175), .Z(n_1187)); - notech_or2 i_1046(.A(n_8121), .B(n_4283), .Z(n_1188)); - notech_ao3 i_100(.A(sl_writedata[3]), .B(n_4278), .C(n_8121), .Z(n_1193) - ); - notech_nand2 i_182(.A(ms_write), .B(n_1193), .Z(n_1194)); - notech_nand2 i_181(.A(sl_write), .B(n_1193), .Z(n_1195)); - notech_ao3 i_63072(.A(n_4277), .B(n_4276), .C(sl_writedata[2]), .Z(n_1197 - )); - notech_and2 i_48(.A(n_1197), .B(n_4279), .Z(n_1198)); - notech_or4 i_2338(.A(sl_writedata[3]), .B(n_8121), .C(sl_writedata[4]), - .D(n_4283), .Z(n_1200)); - notech_nand3 i_38(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4157), - .Z(n_1203)); - notech_nand2 i_102(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[1] - ), .Z(n_1204)); - notech_nand3 i_62866(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[ - 1]), .C(n_4181), .Z(n_1205)); - notech_mux2 i_1031(.S(n_1203), .A(sl_writedata[2]), .B(n_838), .Z(n_1206 - )); - notech_and2 i_59(.A(mas_lowest_priority[0]), .B(n_4180), .Z(n_1207)); - notech_mux2 i_1030(.S(n_1203), .A(sl_writedata[1]), .B(n_836), .Z(n_1208 - )); - notech_mux2 i_1024(.S(n_1203), .A(n_4276), .B(mas_lowest_priority[0]), .Z - (n_1214)); - notech_nand3 i_13641(.A(n_4267), .B(n_4250), .C(mas_irr[7]), .Z(n_1216) - ); - notech_nao3 i_62863(.A(mas_lowest_priority[1]), .B(n_4181), .C(mas_lowest_priority - [0]), .Z(n_1218)); - notech_nand3 i_82855(.A(mas_lowest_priority[0]), .B(mas_lowest_priority[ - 1]), .C(mas_lowest_priority[2]), .Z(n_1219)); - notech_nao3 i_62857(.A(n_4181), .B(n_4180), .C(mas_lowest_priority[0]), - .Z(n_1221)); - notech_nand3 i_1019(.A(n_1221), .B(n_1219), .C(n_1218), .Z(n_1223)); - notech_nao3 i_62869(.A(mas_lowest_priority[2]), .B(n_4180), .C(mas_lowest_priority - [0]), .Z(n_1225)); - notech_or4 i_9(.A(n_4148), .B(n_4147), .C(n_1207), .D(n_1223), .Z(n_1228 - )); - notech_nand3 i_12640(.A(mas_irr[6]), .B(n_4265), .C(n_4249), .Z(n_1230) - ); - notech_nand3 i_8(.A(mas_lowest_priority[0]), .B(n_4180), .C(mas_lowest_priority - [2]), .Z(n_1231)); - notech_ao4 i_1003(.A(n_1231), .B(n_1230), .C(n_1228), .D(n_1216), .Z(n_1232 - )); - notech_nand3 i_8636(.A(n_4257), .B(n_4245), .C(mas_irr[2]), .Z(n_1234) - ); - notech_nand3 i_6(.A(mas_lowest_priority[0]), .B(n_4180), .C(n_4181), .Z(n_1235 - )); - notech_nand3 i_11639(.A(mas_irr[5]), .B(n_4263), .C(n_4248), .Z(n_1237) - ); - notech_ao4 i_1002(.A(n_1237), .B(n_1225), .C(n_1234), .D(n_1235), .Z(n_1238 - )); - notech_nand3 i_10638(.A(mas_irr[4]), .B(n_4261), .C(n_4247), .Z(n_1241) - ); - notech_nand3 i_9637(.A(mas_irr[3]), .B(n_4259), .C(n_4246), .Z(n_1243) - ); - notech_ao4 i_1000(.A(n_1243), .B(n_1218), .C(n_1241), .D(n_1205), .Z(n_1244 - )); - notech_nand3 i_7635(.A(n_4255), .B(n_4244), .C(mas_irr[1]), .Z(n_1246) - ); - notech_nand3 i_6634(.A(n_4253), .B(n_4243), .C(mas_irr[0]), .Z(n_1248) - ); - notech_ao4 i_999(.A(n_1248), .B(n_1219), .C(n_1246), .D(n_1221), .Z(n_1249 - )); - notech_and4 i_11684(.A(n_1249), .B(n_1244), .C(n_1238), .D(n_1232), .Z(n_1251 - )); - notech_ao4 i_966(.A(n_1216), .B(n_1231), .C(n_1248), .D(n_1228), .Z(n_1252 - )); - notech_ao4 i_965(.A(n_1230), .B(n_1225), .C(n_1243), .D(n_1235), .Z(n_1253 - )); - notech_ao4 i_963(.A(n_1241), .B(n_1218), .C(n_1237), .D(n_1205), .Z(n_1255 - )); - notech_ao4 i_962(.A(n_1246), .B(n_1219), .C(n_1234), .D(n_1221), .Z(n_1256 - )); - notech_and4 i_21685(.A(n_1256), .B(n_1255), .C(n_1253), .D(n_1252), .Z(n_1258 - )); - notech_ao4 i_997(.A(n_1231), .B(n_1248), .C(n_1228), .D(n_1246), .Z(n_1259 - )); - notech_ao4 i_996(.A(n_1216), .B(n_1225), .C(n_1241), .D(n_1235), .Z(n_1260 - )); - notech_ao4 i_994(.A(n_1237), .B(n_1218), .C(n_1230), .D(n_1205), .Z(n_1262 - )); - notech_ao4 i_993(.A(n_1234), .B(n_1219), .C(n_1243), .D(n_1221), .Z(n_1263 - )); - notech_and4 i_31686(.A(n_1263), .B(n_1262), .C(n_1260), .D(n_1259), .Z(n_1265 - )); - notech_ao4 i_973(.A(n_1246), .B(n_1231), .C(n_1234), .D(n_1228), .Z(n_1266 - )); - notech_ao4 i_972(.A(n_1248), .B(n_1225), .C(n_1237), .D(n_1235), .Z(n_1267 - )); - notech_ao4 i_970(.A(n_1230), .B(n_1218), .C(n_1216), .D(n_1205), .Z(n_1269 - )); - notech_ao4 i_968(.A(n_1243), .B(n_1219), .C(n_1241), .D(n_1221), .Z(n_1270 - )); - notech_and4 i_41687(.A(n_1270), .B(n_1269), .C(n_1267), .D(n_1266), .Z(n_1272 - )); - notech_ao4 i_991(.A(n_1231), .B(n_1234), .C(n_1228), .D(n_1243), .Z(n_1273 - )); - notech_ao4 i_990(.A(n_1246), .B(n_1225), .C(n_1230), .D(n_1235), .Z(n_1274 - )); - notech_ao4 i_988(.A(n_1216), .B(n_1218), .C(n_1248), .D(n_1205), .Z(n_1276 - )); - notech_ao4 i_987(.A(n_1241), .B(n_1219), .C(n_1237), .D(n_1221), .Z(n_1277 - )); - notech_and4 i_51688(.A(n_1277), .B(n_1276), .C(n_1274), .D(n_1273), .Z(n_1279 - )); - notech_ao4 i_985(.A(n_1243), .B(n_1231), .C(n_1228), .D(n_1241), .Z(n_1280 - )); - notech_ao4 i_984(.A(n_1234), .B(n_1225), .C(n_1216), .D(n_1235), .Z(n_1281 - )); - notech_ao4 i_982(.A(n_1248), .B(n_1218), .C(n_1246), .D(n_1205), .Z(n_1283 - )); - notech_ao4 i_981(.A(n_1237), .B(n_1219), .C(n_1230), .D(n_1221), .Z(n_1284 - )); - notech_and4 i_61689(.A(n_1284), .B(n_1283), .C(n_1281), .D(n_1280), .Z(n_1286 - )); - notech_ao4 i_979(.A(n_1241), .B(n_1231), .C(n_1228), .D(n_1237), .Z(n_1287 - )); - notech_ao4 i_978(.A(n_1243), .B(n_1225), .C(n_1248), .D(n_1235), .Z(n_1288 - )); - notech_ao4 i_976(.A(n_1246), .B(n_1218), .C(n_1234), .D(n_1205), .Z(n_1290 - )); - notech_ao4 i_975(.A(n_1230), .B(n_1219), .C(n_1216), .D(n_1221), .Z(n_1291 - )); - notech_and2 i_12226(.A(n_581), .B(n_1251), .Z(n_1293)); - notech_nand3 i_22227(.A(n_1258), .B(n_1251), .C(n_568), .Z(n_1296)); - notech_ao4 i_959(.A(n_1231), .B(n_4265), .C(n_1228), .D(n_4267), .Z(n_1297 - )); - notech_ao4 i_958(.A(n_4263), .B(n_1225), .C(n_1235), .D(n_4257), .Z(n_1298 - )); - notech_ao4 i_956(.A(n_1218), .B(n_4259), .C(n_4261), .D(n_1205), .Z(n_1300 - )); - notech_ao4 i_955(.A(n_1219), .B(n_4253), .C(n_1221), .D(n_4255), .Z(n_1301 - )); - notech_and4 i_11988(.A(n_1301), .B(n_1300), .C(n_1298), .D(n_1297), .Z(n_1303 - )); - notech_ao4 i_923(.A(n_4267), .B(n_1231), .C(n_4253), .D(n_1228), .Z(n_1304 - )); - notech_ao4 i_922(.A(n_4265), .B(n_1225), .C(n_4259), .D(n_1235), .Z(n_1305 - )); - notech_ao4 i_920(.A(n_4261), .B(n_1218), .C(n_4263), .D(n_1205), .Z(n_1307 - )); - notech_ao4 i_919(.A(n_4255), .B(n_1219), .C(n_4257), .D(n_1221), .Z(n_1308 - )); - notech_and4 i_21989(.A(n_1308), .B(n_1307), .C(n_1305), .D(n_1304), .Z(n_1310 - )); - notech_ao4 i_953(.A(n_1231), .B(n_4253), .C(n_1228), .D(n_4255), .Z(n_1311 - )); - notech_ao4 i_952(.A(n_4267), .B(n_1225), .C(n_1235), .D(n_4261), .Z(n_1312 - )); - notech_ao4 i_950(.A(n_1218), .B(n_4263), .C(n_4265), .D(n_1205), .Z(n_1314 - )); - notech_ao4 i_949(.A(n_1219), .B(n_4257), .C(n_1221), .D(n_4259), .Z(n_1315 - )); - notech_and4 i_31990(.A(n_1315), .B(n_1314), .C(n_1312), .D(n_1311), .Z(n_1317 - )); - notech_ao4 i_929(.A(n_1231), .B(n_4255), .C(n_1228), .D(n_4257), .Z(n_1318 - )); - notech_ao4 i_928(.A(n_4253), .B(n_1225), .C(n_1235), .D(n_4263), .Z(n_1319 - )); - notech_ao4 i_926(.A(n_1218), .B(n_4265), .C(n_4267), .D(n_1205), .Z(n_1321 - )); - notech_ao4 i_925(.A(n_1219), .B(n_4259), .C(n_1221), .D(n_4261), .Z(n_1322 - )); - notech_and4 i_41991(.A(n_1322), .B(n_1321), .C(n_1319), .D(n_1318), .Z(n_1324 - )); - notech_ao4 i_947(.A(n_1231), .B(n_4257), .C(n_1228), .D(n_4259), .Z(n_1325 - )); - notech_ao4 i_946(.A(n_4255), .B(n_1225), .C(n_1235), .D(n_4265), .Z(n_1326 - )); - notech_ao4 i_944(.A(n_1218), .B(n_4267), .C(n_4253), .D(n_1205), .Z(n_1328 - )); - notech_ao4 i_943(.A(n_1219), .B(n_4261), .C(n_1221), .D(n_4263), .Z(n_1329 - )); - notech_and4 i_51992(.A(n_1329), .B(n_1328), .C(n_1326), .D(n_1325), .Z(n_1331 - )); - notech_ao4 i_941(.A(n_1231), .B(n_4259), .C(n_1228), .D(n_4261), .Z(n_1332 - )); - notech_ao4 i_940(.A(n_4257), .B(n_1225), .C(n_1235), .D(n_4267), .Z(n_1333 - )); - notech_ao4 i_938(.A(n_1218), .B(n_4253), .C(n_4255), .D(n_1205), .Z(n_1335 - )); - notech_ao4 i_937(.A(n_1219), .B(n_4263), .C(n_1221), .D(n_4265), .Z(n_1336 - )); - notech_and4 i_61993(.A(n_1336), .B(n_1335), .C(n_1333), .D(n_1332), .Z(n_1338 - )); - notech_ao4 i_935(.A(n_1231), .B(n_4261), .C(n_1228), .D(n_4263), .Z(n_1339 - )); - notech_ao4 i_934(.A(n_4259), .B(n_1225), .C(n_1235), .D(n_4253), .Z(n_1340 - )); - notech_ao4 i_932(.A(n_1218), .B(n_4255), .C(n_4257), .D(n_1205), .Z(n_1342 - )); - notech_ao4 i_931(.A(n_1219), .B(n_4265), .C(n_1221), .D(n_4267), .Z(n_1343 - )); - notech_and2 i_12286(.A(n_584), .B(n_1303), .Z(n_1345)); - notech_and4 i_32228(.A(n_1258), .B(n_1251), .C(n_1272), .D(n_1265), .Z(n_1346 - )); - notech_and4 i_32288(.A(n_1310), .B(n_1303), .C(n_1324), .D(n_1317), .Z(n_1349 - )); - notech_nand3 i_916(.A(n_584), .B(n_1303), .C(n_1054), .Z(n_1350)); - notech_ao4 i_26(.A(n_1346), .B(n_4150), .C(n_4151), .D(n_1350), .Z(n_1351 - )); - notech_nand3 i_22287(.A(n_1310), .B(n_1303), .C(n_571), .Z(n_1352)); - notech_nand2 i_34(.A(n_820), .B(n_4268), .Z(n_1354)); - notech_and4 i_914(.A(n_1243), .B(n_1234), .C(n_1248), .D(n_1246), .Z(n_1357 - )); - notech_and4 i_911(.A(n_1230), .B(n_1216), .C(n_1241), .D(n_1237), .Z(n_1360 - )); - notech_ao4 i_2645(.A(n_4145), .B(n_4146), .C(n_1354), .D(n_4152), .Z(n_1361 - )); - notech_or2 i_15(.A(mas_lowest_priority[0]), .B(n_1293), .Z(n_1362)); - notech_nand2 i_49(.A(n_819), .B(n_1362), .Z(n_1363)); - notech_and2 i_83(.A(n_4153), .B(n_4270), .Z(n_1364)); - notech_nand2 i_138(.A(n_4153), .B(n_4282), .Z(n_1365)); - notech_xor2 i_89(.A(mas_lowest_priority[1]), .B(n_1296), .Z(n_1366)); - notech_xor2 i_908(.A(n_1366), .B(n_1362), .Z(n_1367)); - notech_xor2 i_36(.A(n_4181), .B(n_1346), .Z(n_1368)); - notech_mux2 i_907(.S(n_1368), .A(n_812), .B(n_811), .Z(n_1369)); - notech_and2 i_32231(.A(n_1365), .B(n_1369), .Z(n_1370)); - notech_ao4 i_906(.A(n_809), .B(n_4270), .C(n_1364), .D(n_808), .Z(n_1371 - )); - notech_nand2 i_2358(.A(n_810), .B(n_1371), .Z(n_1372)); - notech_nao3 i_62968(.A(sla_lowest_priority[1]), .B(n_4191), .C(sla_lowest_priority - [2]), .Z(n_1375)); - notech_and2 i_103(.A(sla_lowest_priority[1]), .B(sla_lowest_priority[0]) - , .Z(n_1376)); - notech_nand3 i_82930(.A(sla_lowest_priority[2]), .B(sla_lowest_priority[ - 1]), .C(sla_lowest_priority[0]), .Z(n_1377)); - notech_nao3 i_62932(.A(n_4192), .B(n_4191), .C(sla_lowest_priority[2]), - .Z(n_1379)); - notech_nand3 i_899(.A(n_1379), .B(n_1377), .C(n_1375), .Z(n_1381)); - notech_and2 i_60(.A(sla_lowest_priority[0]), .B(n_4192), .Z(n_1382)); - notech_nao3 i_62971(.A(sla_lowest_priority[1]), .B(sla_lowest_priority[0 - ]), .C(sla_lowest_priority[2]), .Z(n_1383)); - notech_nand3 i_62974(.A(sla_lowest_priority[2]), .B(n_4192), .C(n_4191), - .Z(n_1385)); - notech_or4 i_11(.A(n_4134), .B(n_4133), .C(n_1382), .D(n_1381), .Z(n_1388 - )); - notech_nand3 i_10(.A(sla_lowest_priority[2]), .B(sla_lowest_priority[0]) - , .C(n_4192), .Z(n_1389)); - notech_ao4 i_890(.A(n_1389), .B(n_4206), .C(n_1388), .D(n_4208), .Z(n_1390 - )); - notech_nao3 i_7(.A(sla_lowest_priority[0]), .B(n_4192), .C(sla_lowest_priority - [2]), .Z(n_1391)); - notech_ao4 i_889(.A(n_4204), .B(n_1385), .C(n_1391), .D(n_4198), .Z(n_1392 - )); - notech_ao4 i_887(.A(n_1375), .B(n_4200), .C(n_4202), .D(n_1383), .Z(n_1394 - )); - notech_ao4 i_886(.A(n_1377), .B(n_4194), .C(n_1379), .D(n_4196), .Z(n_1395 - )); - notech_and4 i_11740(.A(n_1395), .B(n_1394), .C(n_1392), .D(n_1390), .Z(n_1397 - )); - notech_ao4 i_854(.A(n_1389), .B(n_4208), .C(n_1388), .D(n_4194), .Z(n_1398 - )); - notech_ao4 i_853(.A(n_4206), .B(n_1385), .C(n_1391), .D(n_4200), .Z(n_1399 - )); - notech_ao4 i_851(.A(n_1375), .B(n_4202), .C(n_4204), .D(n_1383), .Z(n_1401 - )); - notech_ao4 i_850(.A(n_1377), .B(n_4196), .C(n_1379), .D(n_4198), .Z(n_1402 - )); - notech_and4 i_21741(.A(n_1402), .B(n_1401), .C(n_1399), .D(n_1398), .Z(n_1404 - )); - notech_ao4 i_884(.A(n_1389), .B(n_4194), .C(n_1388), .D(n_4196), .Z(n_1405 - )); - notech_ao4 i_883(.A(n_4208), .B(n_1385), .C(n_1391), .D(n_4202), .Z(n_1406 - )); - notech_ao4 i_881(.A(n_1375), .B(n_4204), .C(n_4206), .D(n_1383), .Z(n_1408 - )); - notech_ao4 i_880(.A(n_1377), .B(n_4198), .C(n_1379), .D(n_4200), .Z(n_1409 - )); - notech_and4 i_31742(.A(n_1409), .B(n_1408), .C(n_1406), .D(n_1405), .Z(n_1411 - )); - notech_ao4 i_860(.A(n_1389), .B(n_4196), .C(n_1388), .D(n_4198), .Z(n_1412 - )); - notech_ao4 i_859(.A(n_4194), .B(n_1385), .C(n_1391), .D(n_4204), .Z(n_1413 - )); - notech_ao4 i_857(.A(n_1375), .B(n_4206), .C(n_4208), .D(n_1383), .Z(n_1415 - )); - notech_ao4 i_856(.A(n_1377), .B(n_4200), .C(n_1379), .D(n_4202), .Z(n_1416 - )); - notech_and4 i_41743(.A(n_1416), .B(n_1415), .C(n_1413), .D(n_1412), .Z(n_1418 - )); - notech_ao4 i_878(.A(n_1389), .B(n_4198), .C(n_1388), .D(n_4200), .Z(n_1419 - )); - notech_ao4 i_877(.A(n_4196), .B(n_1385), .C(n_1391), .D(n_4206), .Z(n_1420 - )); - notech_ao4 i_875(.A(n_1375), .B(n_4208), .C(n_4194), .D(n_1383), .Z(n_1422 - )); - notech_ao4 i_874(.A(n_1377), .B(n_4202), .C(n_1379), .D(n_4204), .Z(n_1423 - )); - notech_and4 i_51744(.A(n_1423), .B(n_1422), .C(n_1420), .D(n_1419), .Z(n_1425 - )); - notech_ao4 i_872(.A(n_1389), .B(n_4200), .C(n_1388), .D(n_4202), .Z(n_1426 - )); - notech_ao4 i_871(.A(n_4198), .B(n_1385), .C(n_1391), .D(n_4208), .Z(n_1427 - )); - notech_ao4 i_869(.A(n_1375), .B(n_4194), .C(n_4196), .D(n_1383), .Z(n_1429 - )); - notech_ao4 i_868(.A(n_1377), .B(n_4204), .C(n_1379), .D(n_4206), .Z(n_1430 - )); - notech_and4 i_61745(.A(n_1430), .B(n_1429), .C(n_1427), .D(n_1426), .Z(n_1432 - )); - notech_ao4 i_866(.A(n_1389), .B(n_4202), .C(n_1388), .D(n_4204), .Z(n_1433 - )); - notech_ao4 i_865(.A(n_4200), .B(n_1385), .C(n_1391), .D(n_4194), .Z(n_1434 - )); - notech_ao4 i_863(.A(n_1375), .B(n_4196), .C(n_4198), .D(n_1383), .Z(n_1436 - )); - notech_ao4 i_862(.A(n_1377), .B(n_4206), .C(n_1379), .D(n_4208), .Z(n_1437 - )); - notech_nand2 i_12256(.A(n_582), .B(n_1397), .Z(n_1439)); - notech_nand3 i_22257(.A(n_1404), .B(n_1397), .C(n_569), .Z(n_1442)); - notech_nand3 i_13492(.A(n_4208), .B(n_4233), .C(sla_irr[7]), .Z(n_1444) - ); - notech_nand3 i_12491(.A(sla_irr[6]), .B(n_4206), .C(n_4232), .Z(n_1446) - ); - notech_ao4 i_839(.A(n_1389), .B(n_1446), .C(n_1444), .D(n_1388), .Z(n_1447 - )); - notech_nand3 i_8487(.A(n_4198), .B(n_4228), .C(sla_irr[2]), .Z(n_1449) - ); - notech_nand3 i_11490(.A(sla_irr[5]), .B(n_4204), .C(n_4231), .Z(n_1451) - ); - notech_ao4 i_838(.A(n_1451), .B(n_1385), .C(n_1449), .D(n_1391), .Z(n_1452 - )); - notech_nand3 i_10489(.A(sla_irr[4]), .B(n_4202), .C(n_4230), .Z(n_1455) - ); - notech_nand3 i_9488(.A(sla_irr[3]), .B(n_4200), .C(n_4229), .Z(n_1457) - ); - notech_ao4 i_836(.A(n_1457), .B(n_1375), .C(n_1455), .D(n_1383), .Z(n_1458 - )); - notech_nand3 i_7486(.A(n_4196), .B(n_4227), .C(sla_irr[1]), .Z(n_1460) - ); - notech_nand3 i_6485(.A(n_4194), .B(n_4226), .C(sla_irr[0]), .Z(n_1462) - ); - notech_ao4 i_835(.A(n_1462), .B(n_1377), .C(n_1460), .D(n_1379), .Z(n_1463 - )); - notech_and4 i_11828(.A(n_1463), .B(n_1458), .C(n_1452), .D(n_1447), .Z(n_1465 - )); - notech_ao4 i_803(.A(n_1444), .B(n_1389), .C(n_1462), .D(n_1388), .Z(n_1466 - )); - notech_ao4 i_802(.A(n_1446), .B(n_1385), .C(n_1457), .D(n_1391), .Z(n_1467 - )); - notech_ao4 i_800(.A(n_1455), .B(n_1375), .C(n_1451), .D(n_1383), .Z(n_1469 - )); - notech_ao4 i_799(.A(n_1460), .B(n_1377), .C(n_1449), .D(n_1379), .Z(n_1470 - )); - notech_and4 i_21829(.A(n_1470), .B(n_1469), .C(n_1467), .D(n_1466), .Z(n_1472 - )); - notech_ao4 i_833(.A(n_1462), .B(n_1389), .C(n_1388), .D(n_1460), .Z(n_1473 - )); - notech_ao4 i_832(.A(n_1444), .B(n_1385), .C(n_1455), .D(n_1391), .Z(n_1474 - )); - notech_ao4 i_830(.A(n_1451), .B(n_1375), .C(n_1446), .D(n_1383), .Z(n_1476 - )); - notech_ao4 i_829(.A(n_1449), .B(n_1377), .C(n_1457), .D(n_1379), .Z(n_1477 - )); - notech_and4 i_31830(.A(n_1477), .B(n_1476), .C(n_1474), .D(n_1473), .Z(n_1479 - )); - notech_ao4 i_809(.A(n_1460), .B(n_1389), .C(n_1449), .D(n_1388), .Z(n_1480 - )); - notech_ao4 i_808(.A(n_1462), .B(n_1385), .C(n_1451), .D(n_1391), .Z(n_1481 - )); - notech_ao4 i_806(.A(n_1446), .B(n_1375), .C(n_1444), .D(n_1383), .Z(n_1483 - )); - notech_ao4 i_805(.A(n_1457), .B(n_1377), .C(n_1455), .D(n_1379), .Z(n_1484 - )); - notech_and4 i_41831(.A(n_1484), .B(n_1483), .C(n_1481), .D(n_1480), .Z(n_1486 - )); - notech_ao4 i_827(.A(n_1389), .B(n_1449), .C(n_1388), .D(n_1457), .Z(n_1487 - )); - notech_ao4 i_826(.A(n_1460), .B(n_1385), .C(n_1446), .D(n_1391), .Z(n_1488 - )); - notech_ao4 i_824(.A(n_1444), .B(n_1375), .C(n_1462), .D(n_1383), .Z(n_1490 - )); - notech_ao4 i_823(.A(n_1455), .B(n_1377), .C(n_1451), .D(n_1379), .Z(n_1491 - )); - notech_and4 i_51832(.A(n_1491), .B(n_1490), .C(n_1488), .D(n_1487), .Z(n_1493 - )); - notech_ao4 i_821(.A(n_1457), .B(n_1389), .C(n_1388), .D(n_1455), .Z(n_1494 - )); - notech_ao4 i_820(.A(n_1449), .B(n_1385), .C(n_1444), .D(n_1391), .Z(n_1495 - )); - notech_ao4 i_818(.A(n_1462), .B(n_1375), .C(n_1460), .D(n_1383), .Z(n_1497 - )); - notech_ao4 i_817(.A(n_1451), .B(n_1377), .C(n_1446), .D(n_1379), .Z(n_1498 - )); - notech_and4 i_61833(.A(n_1498), .B(n_1497), .C(n_1495), .D(n_1494), .Z(n_1500 - )); - notech_ao4 i_815(.A(n_1455), .B(n_1389), .C(n_1388), .D(n_1451), .Z(n_1501 - )); - notech_ao4 i_814(.A(n_1457), .B(n_1385), .C(n_1462), .D(n_1391), .Z(n_1502 - )); - notech_ao4 i_812(.A(n_1460), .B(n_1375), .C(n_1449), .D(n_1383), .Z(n_1504 - )); - notech_ao4 i_811(.A(n_1446), .B(n_1377), .C(n_1444), .D(n_1379), .Z(n_1505 - )); - notech_nand2 i_12268(.A(n_583), .B(n_1465), .Z(n_1507)); - notech_and4 i_32258(.A(n_1404), .B(n_1397), .C(n_1418), .D(n_1411), .Z(n_1508 - )); - notech_and4 i_32270(.A(n_1472), .B(n_1465), .C(n_1486), .D(n_1479), .Z(n_1511 - )); - notech_nand2 i_796(.A(n_933), .B(n_1507), .Z(n_1512)); - notech_ao4 i_27(.A(n_1511), .B(n_4136), .C(n_1442), .D(n_1512), .Z(n_1513 - )); - notech_and3 i_22269(.A(n_1472), .B(n_1465), .C(n_570), .Z(n_1514)); - notech_or2 i_35(.A(sla_special_mask), .B(n_794), .Z(n_1516)); - notech_and4 i_794(.A(n_1457), .B(n_1449), .C(n_1462), .D(n_1460), .Z(n_1519 - )); - notech_and4 i_791(.A(n_1446), .B(n_1444), .C(n_1455), .D(n_1451), .Z(n_1522 - )); - notech_ao4 i_2496(.A(n_4126), .B(n_4127), .C(n_1516), .D(n_4138), .Z(n_1523 - )); - notech_nand2 i_57(.A(mas_sla_active), .B(inter_done), .Z(n_1524)); - notech_or2 i_787(.A(n_8121), .B(n_4281), .Z(n_1525)); - notech_nand2 i_788(.A(sla_current_irq), .B(n_4282), .Z(n_1527)); - notech_nand2 i_114(.A(n_8121), .B(sl_write), .Z(n_1529)); - notech_nand3 i_140(.A(sl_write), .B(n_8121), .C(sla_in_init), .Z(n_1530) - ); - notech_and4 i_178(.A(sla_in_init), .B(sla_init_byte_expected[1]), .C(n_4140 - ), .D(n_4190), .Z(n_1532)); - notech_or4 i_2362(.A(n_8121), .B(sl_writedata[3]), .C(sl_writedata[4]), - .D(n_4281), .Z(n_1537)); - notech_nand3 i_39(.A(sl_writedata[6]), .B(sl_writedata[7]), .C(n_4164), - .Z(n_1539)); - notech_mux2 i_772(.S(n_1539), .A(sl_writedata[2]), .B(n_788), .Z(n_1540) - ); - notech_mux2 i_771(.S(n_1539), .A(sl_writedata[1]), .B(n_786), .Z(n_1541) - ); - notech_mux2 i_767(.S(n_1539), .A(n_4276), .B(sla_lowest_priority[0]), .Z - (n_1545)); - notech_nand2 i_21(.A(n_558), .B(n_7852), .Z(n_1547)); - notech_xor2 i_28(.A(sla_lowest_priority[2]), .B(n_4136), .Z(n_1548)); - notech_nand2 i_41(.A(n_1439), .B(n_4191), .Z(n_1549)); - notech_mux2 i_232994(.S(n_1548), .A(n_775), .B(n_773), .Z(n_1550)); - notech_nand2 i_212992(.A(n_771), .B(n_1549), .Z(n_1551)); - notech_xor2 i_90(.A(sla_lowest_priority[1]), .B(n_1442), .Z(n_1552)); - notech_xor2 i_222993(.A(n_1552), .B(n_1549), .Z(n_1553)); - notech_nand3 i_63002(.A(n_1549), .B(n_771), .C(n_1550), .Z(n_1554)); - notech_ao4 i_5401(.A(n_4179), .B(n_1178), .C(n_1537), .D(n_563), .Z(n_1555 - )); - notech_and2 i_0(.A(n_727), .B(n_4165), .Z(n_1556)); - notech_ao3 i_53(.A(n_1556), .B(n_1554), .C(n_1550), .Z(n_1558)); - notech_and3 i_63084(.A(sl_writedata[2]), .B(n_4277), .C(n_4276), .Z(n_1559 - )); - notech_or2 i_18(.A(sl_writedata[2]), .B(n_4277), .Z(n_1560)); - notech_nand2 i_64(.A(sl_writedata[0]), .B(n_4277), .Z(n_1561)); - notech_ao3 i_63075(.A(sl_writedata[0]), .B(n_4277), .C(sl_writedata[2]), - .Z(n_1562)); - notech_or4 i_50(.A(n_1562), .B(n_1197), .C(n_1559), .D(n_4163), .Z(n_1565 - )); - notech_nand2 i_74(.A(sl_writedata[1]), .B(n_4276), .Z(n_1566)); - notech_nand3 i_55(.A(n_558), .B(n_7852), .C(n_1555), .Z(n_1567)); - notech_nao3 i_63044(.A(inter_vector[2]), .B(n_4280), .C(inter_vector[1]) - , .Z(n_1569)); - notech_nao3 i_83047(.A(inter_vector[2]), .B(inter_vector[0]), .C(inter_vector - [1]), .Z(n_1571)); - notech_or2 i_66(.A(inter_vector[2]), .B(inter_vector[0]), .Z(n_1572)); - notech_or2 i_63032(.A(inter_vector[1]), .B(n_1572), .Z(n_1573)); - notech_nand3 i_83049(.A(inter_vector[1]), .B(inter_vector[2]), .C(n_4280 - ), .Z(n_1575)); - notech_nao3 i_63041(.A(inter_vector[1]), .B(inter_vector[0]), .C(inter_vector - [2]), .Z(n_1577)); - notech_nand3 i_136(.A(inter_vector[2]), .B(inter_vector[1]), .C(inter_vector - [0]), .Z(n_1578)); - notech_ao3 i_86(.A(sl_writedata[1]), .B(sl_writedata[0]), .C(sl_writedata - [2]), .Z(n_1581)); - notech_nao3 i_81(.A(inter_vector[1]), .B(n_4280), .C(inter_vector[2]), .Z - (n_1582)); - notech_or4 i_759(.A(inter_vector[2]), .B(n_4165), .C(n_1547), .D(n_4280) - , .Z(n_1583)); - notech_ao4 i_758(.A(n_1551), .B(n_1547), .C(n_1562), .D(n_558), .Z(n_1585 - )); - notech_ao4 i_757(.A(n_1547), .B(n_4168), .C(n_1197), .D(n_558), .Z(n_1586 - )); - notech_nand2 i_71(.A(n_1372), .B(n_1182), .Z(n_1587)); - notech_nand3 i_43(.A(n_810), .B(n_1371), .C(n_1182), .Z(n_1588)); - notech_xor2 i_123022(.A(sla_lowest_priority[2]), .B(n_1511), .Z(n_1589) - ); - notech_nand2 i_51(.A(n_1507), .B(n_4191), .Z(n_1590)); - notech_ao4 i_193026(.A(n_1514), .B(sla_lowest_priority[1]), .C(n_705), .D - (n_1590), .Z(n_1591)); - notech_xor2 i_88(.A(n_1591), .B(n_1589), .Z(n_1592)); - notech_xor2 i_103020(.A(n_1514), .B(n_4192), .Z(n_1593)); - notech_xor2 i_93(.A(n_1593), .B(n_1590), .Z(n_1594)); - notech_or2 i_748(.A(sl_writedata[2]), .B(n_4279), .Z(n_1598)); - notech_nand2 i_70(.A(inter_input[7]), .B(n_7945), .Z(n_1599)); - notech_nand3 i_99(.A(inter_input[7]), .B(n_7945), .C(mas_irr[7]), .Z(n_1600 - )); - notech_nor2 i_40(.A(n_834), .B(mas_sla_active), .Z(n_1601)); - notech_nand2 i_22(.A(n_7945), .B(n_559), .Z(n_1603)); - notech_xor2 i_29(.A(mas_lowest_priority[2]), .B(n_4150), .Z(n_1604)); - notech_or2 i_42(.A(mas_lowest_priority[0]), .B(n_1345), .Z(n_1605)); - notech_mux2 i_233113(.S(n_1604), .A(n_652), .B(n_650), .Z(n_1606)); - notech_nand2 i_213111(.A(n_648), .B(n_1605), .Z(n_1607)); - notech_xor2 i_91(.A(mas_lowest_priority[1]), .B(n_1352), .Z(n_1608)); - notech_xor2 i_223112(.A(n_4159), .B(n_1605), .Z(n_1609)); - notech_nand3 i_63121(.A(n_1605), .B(n_648), .C(n_1606), .Z(n_1610)); - notech_ao4 i_1(.A(n_1609), .B(n_4162), .C(n_895), .D(n_645), .Z(n_1612) - ); - notech_ao3 i_54(.A(n_1612), .B(n_1610), .C(n_1606), .Z(n_1614)); - notech_or4 i_12(.A(n_895), .B(n_645), .C(n_4135), .D(n_4158), .Z(n_1616) - ); - notech_or4 i_82(.A(n_895), .B(n_1603), .C(n_645), .D(mas_sla_active), .Z - (n_1617)); - notech_or4 i_732(.A(mas_sla_active), .B(n_1616), .C(inter_vector[2]), .D - (n_4280), .Z(n_1620)); - notech_ao4 i_731(.A(n_559), .B(n_1197), .C(n_1603), .D(n_599), .Z(n_1622 - )); - notech_nor2 i_149(.A(n_8121), .B(mas_read_reg_select), .Z(n_1624)); - notech_nao3 i_73(.A(n_8121), .B(n_4177), .C(n_1624), .Z(n_1626)); - notech_nao3 i_67(.A(mas_read_reg_select), .B(n_4177), .C(n_8121), .Z(n_1627 - )); - notech_ao4 i_728(.A(n_1627), .B(n_4267), .C(n_1626), .D(n_4250), .Z(n_1628 - )); - notech_nand2 i_13(.A(n_1624), .B(n_4177), .Z(n_1629)); - notech_ao4 i_727(.A(n_4270), .B(n_4177), .C(n_1629), .D(n_4241), .Z(n_1630 - )); - notech_ao4 i_726(.A(n_1627), .B(n_4265), .C(n_1626), .D(n_4249), .Z(n_1631 - )); - notech_ao4 i_725(.A(n_1627), .B(n_4263), .C(n_1626), .D(n_4248), .Z(n_1632 - )); - notech_ao4 i_724(.A(n_1627), .B(n_4261), .C(n_1626), .D(n_4247), .Z(n_1633 - )); - notech_ao4 i_723(.A(n_1627), .B(n_4259), .C(n_1626), .D(n_4246), .Z(n_1634 - )); - notech_ao4 i_722(.A(n_1627), .B(n_4257), .C(n_1626), .D(n_4245), .Z(n_1635 - )); - notech_ao4 i_721(.A(n_4177), .B(n_1370), .C(n_1629), .D(n_4240), .Z(n_1636 - )); - notech_ao4 i_720(.A(n_1627), .B(n_4255), .C(n_1626), .D(n_4244), .Z(n_1637 - )); - notech_ao4 i_719(.A(n_4177), .B(n_4141), .C(n_1629), .D(n_4239), .Z(n_1638 - )); - notech_ao4 i_718(.A(n_1627), .B(n_4253), .C(n_1626), .D(n_4243), .Z(n_1639 - )); - notech_ao4 i_717(.A(n_1629), .B(n_4238), .C(n_4177), .D(n_809), .Z(n_1640 - )); - notech_nor2 i_148(.A(n_8121), .B(sla_read_reg_select), .Z(n_1641)); - notech_nao3 i_72(.A(n_8121), .B(n_4179), .C(n_1641), .Z(n_1643)); - notech_nao3 i_69(.A(sla_read_reg_select), .B(n_4179), .C(n_8121), .Z(n_1644 - )); - notech_ao4 i_716(.A(n_1644), .B(n_4208), .C(n_1643), .D(n_4233), .Z(n_1645 - )); - notech_nand2 i_143558(.A(n_1641), .B(n_4179), .Z(n_1646)); - notech_ao4 i_715(.A(n_4179), .B(n_4237), .C(n_1646), .D(n_4225), .Z(n_1647 - )); - notech_ao4 i_714(.A(n_1644), .B(n_4206), .C(n_1643), .D(n_4232), .Z(n_1648 - )); - notech_ao4 i_713(.A(n_1644), .B(n_4204), .C(n_1643), .D(n_4231), .Z(n_1649 - )); - notech_ao4 i_712(.A(n_1644), .B(n_4202), .C(n_1643), .D(n_4230), .Z(n_1650 - )); - notech_reg mas_init_requires_4_reg(.CP(n_8170), .D(n_3540), .CD(n_8094), - .Q(mas_init_requires_4)); - notech_mux2 i_4116(.S(n_7945), .A(sl_writedata[0]), .B(mas_init_requires_4 - ), .Z(n_3540)); - notech_ao4 i_711(.A(n_1644), .B(n_4200), .C(n_1643), .D(n_4229), .Z(n_1651 - )); - notech_reg mas_init_byte_expected_reg_0(.CP(n_8170), .D(n_3546), .CD(n_8094 - ), .Q(mas_init_byte_expected[0])); - notech_mux2 i_4124(.S(\nbus_47[0] ), .A(mas_init_byte_expected[0]), .B(n_4275 - ), .Z(n_3546)); - notech_ao4 i_710(.A(n_1643), .B(n_4228), .C(n_4179), .D(n_700), .Z(n_1652 - )); - notech_reg mas_init_byte_expected_reg_1(.CP(n_8170), .D(n_3552), .CD(n_8094 - ), .Q(mas_init_byte_expected[1])); - notech_mux2 i_4132(.S(\nbus_47[0] ), .A(mas_init_byte_expected[1]), .B(n_2646 - ), .Z(n_3552)); - notech_ao4 i_709(.A(n_1646), .B(n_4224), .C(n_1644), .D(n_4198), .Z(n_1653 - )); - notech_reg mas_init_byte_expected_reg_2(.CP(n_8168), .D(n_3558), .CD(n_8092 - ), .Q(mas_init_byte_expected[2])); - notech_mux2 i_4140(.S(\nbus_47[0] ), .A(mas_init_byte_expected[2]), .B(n_4174 - ), .Z(n_3558)); - notech_ao4 i_708(.A(n_1643), .B(n_4227), .C(n_4179), .D(n_694), .Z(n_1654 - )); - notech_reg mas_in_init_reg(.CP(n_8168), .D(n_3564), .CD(n_8092), .Q(mas_in_init - )); - notech_mux2 i_4148(.S(n_2785), .A(mas_in_init), .B(n_4135), .Z(n_3564) - ); - notech_ao4 i_707(.A(n_1646), .B(n_4223), .C(n_1644), .D(n_4196), .Z(n_1655 - )); - notech_reg mas_auto_eoi_reg(.CP(n_8168), .D(n_3570), .CD(n_8092), .Q(mas_auto_eoi - )); - notech_mux2 i_4156(.S(n_3259), .A(mas_auto_eoi), .B(n_1181), .Z(n_3570) - ); - notech_ao4 i_706(.A(n_1643), .B(n_4226), .C(n_4179), .D(n_690), .Z(n_1656 - )); - notech_reg ms_read_last_reg(.CP(n_8168), .D(n_4274), .CD(n_8092), .Q(ms_read_last - )); - notech_reg mas_polled_reg(.CP(n_8170), .D(n_3578), .CD(n_8094), .Q(mas_polled - )); - notech_nand2 i_4168(.A(n_3580), .B(n_3581), .Z(n_3578)); - notech_nao3 i_4169(.A(sl_writedata[2]), .B(n_4172), .C(n_895), .Z(n_3580 - )); - notech_nao3 i_4170(.A(mas_polled), .B(n_1180), .C(n_4172), .Z(n_3581)); - notech_ao4 i_705(.A(n_1646), .B(n_4222), .C(n_1644), .D(n_4194), .Z(n_1657 - )); - notech_reg sl_read_last_reg(.CP(n_8170), .D(n_4272), .CD(n_8094), .Q(sl_read_last - )); - notech_reg sla_polled_reg(.CP(n_8170), .D(n_3586), .CD(n_8094), .Q(sla_polled - )); - notech_or2 i_4180(.A(n_3588), .B(n_3589), .Z(n_3586)); - notech_and4 i_4181(.A(sl_write), .B(sl_writedata[2]), .C(n_1193), .D(n_931 - ), .Z(n_3588)); - notech_and3 i_4182(.A(sla_polled), .B(n_1178), .C(n_1195), .Z(n_3589)); - notech_nao3 i_1685(.A(n_7945), .B(n_843), .C(n_4275), .Z(\nbus_47[0] ) - ); - notech_reg mas_rotate_on_aeoi_reg(.CP(n_8170), .D(n_3592), .CD(n_8094), - .Q(mas_rotate_on_aeoi)); - notech_mux2 i_4188(.S(n_2910), .A(mas_rotate_on_aeoi), .B(n_1176), .Z(n_3592 - )); - notech_nao3 i_1752(.A(n_842), .B(n_841), .C(n_4135), .Z(n_2785)); - notech_reg_set mas_lowest_priority_reg_0(.CP(n_8170), .D(n_3598), .SD(n_8094 - ), .Q(mas_lowest_priority[0])); - notech_mux2 i_4196(.S(\nbus_60[0] ), .A(mas_lowest_priority[0]), .B(n_2876 - ), .Z(n_3598)); - notech_nand2 i_1976(.A(n_842), .B(n_7945), .Z(n_3259)); - notech_reg_set mas_lowest_priority_reg_1(.CP(n_8170), .D(n_3604), .SD(n_8094 - ), .Q(mas_lowest_priority[1])); - notech_mux2 i_4204(.S(\nbus_60[0] ), .A(mas_lowest_priority[1]), .B(n_2882 - ), .Z(n_3604)); - notech_reg_set mas_lowest_priority_reg_2(.CP(n_8170), .D(n_3610), .SD(n_8094 - ), .Q(mas_lowest_priority[2])); - notech_mux2 i_4212(.S(\nbus_60[0] ), .A(mas_lowest_priority[2]), .B(n_2888 - ), .Z(n_3610)); - notech_reg mas_sla_active_reg(.CP(n_8170), .D(n_3616), .CD(n_8094), .Q(mas_sla_active - )); - notech_mux2 i_4220(.S(n_2431), .A(mas_sla_active), .B(n_1046), .Z(n_3616 - )); - notech_nand2 i_1809(.A(n_840), .B(n_7945), .Z(n_2910)); - notech_reg sla_spurious_reg(.CP(n_8168), .D(n_3622), .CD(n_8092), .Q(sla_spurious - )); - notech_mux2 i_4228(.S(n_2148), .A(sla_spurious), .B(n_929), .Z(n_3622) - ); - notech_or4 i_1793(.A(n_4171), .B(n_4135), .C(n_1171), .D(n_1170), .Z(\nbus_60[0] - )); - notech_reg_set mas_inter_offset_reg_0(.CP(n_8167), .D(n_3628), .SD(n_8091 - ), .Q(mas_inter_offset[0])); - notech_mux2 i_4236(.S(n_1183), .A(sl_writedata[3]), .B(mas_inter_offset[ - 0]), .Z(n_3628)); - notech_nao3 i_1603(.A(n_1046), .B(n_4270), .C(n_1361), .Z(n_2431)); - notech_reg mas_inter_offset_reg_1(.CP(n_8167), .D(n_3634), .CD(n_8091), - .Q(mas_inter_offset[1])); - notech_mux2 i_4244(.S(n_1183), .A(sl_writedata[4]), .B(mas_inter_offset[ - 1]), .Z(n_3634)); - notech_nand3 i_1454(.A(n_930), .B(n_4139), .C(n_1527), .Z(n_2148)); - notech_reg mas_inter_offset_reg_2(.CP(n_8168), .D(n_3640), .CD(n_8092), - .Q(mas_inter_offset[2])); - notech_mux2 i_4252(.S(n_1183), .A(sl_writedata[5]), .B(mas_inter_offset[ - 2]), .Z(n_3640)); - notech_nao3 i_1955(.A(n_7852), .B(n_793), .C(n_4156), .Z(\nbus_70[0] ) - ); - notech_reg mas_inter_offset_reg_3(.CP(n_8167), .D(n_3646), .CD(n_8091), - .Q(mas_inter_offset[3])); - notech_mux2 i_4260(.S(n_1183), .A(sl_writedata[6]), .B(mas_inter_offset[ - 3]), .Z(n_3646)); - notech_nao3 i_1484(.A(n_792), .B(n_791), .C(n_4154), .Z(n_2219)); - notech_reg mas_inter_offset_reg_4(.CP(n_8167), .D(n_3652), .CD(n_8091), - .Q(mas_inter_offset[4])); - notech_mux2 i_4268(.S(n_1183), .A(sl_writedata[7]), .B(mas_inter_offset[ - 4]), .Z(n_3652)); - notech_nand2 i_1594(.A(n_792), .B(n_7852), .Z(n_2417)); - notech_reg sla_init_requires_4_reg(.CP(n_8167), .D(n_3658), .CD(n_8091), - .Q(sla_init_requires_4)); - notech_mux2 i_4276(.S(n_7852), .A(sl_writedata[0]), .B(sla_init_requires_4 - ), .Z(n_3658)); - notech_nand2 i_1940(.A(n_790), .B(n_7852), .Z(n_3188)); - notech_reg sla_init_byte_expected_reg_0(.CP(n_8167), .D(n_3664), .CD(n_8091 - ), .Q(sla_init_byte_expected[0])); - notech_mux2 i_4284(.S(\nbus_70[0] ), .A(sla_init_byte_expected[0]), .B(n_4156 - ), .Z(n_3664)); - notech_or4 i_1734(.A(n_4170), .B(n_4154), .C(n_921), .D(n_920), .Z(\nbus_55[0] - )); - notech_reg sla_init_byte_expected_reg_1(.CP(n_8168), .D(n_3670), .CD(n_8092 - ), .Q(sla_init_byte_expected[1])); - notech_mux2 i_4292(.S(\nbus_70[0] ), .A(sla_init_byte_expected[1]), .B(n_3216 - ), .Z(n_3670)); - notech_nand3 i_1825(.A(n_1555), .B(n_4166), .C(n_722), .Z(\nbus_63[0] ) - ); - notech_reg sla_init_byte_expected_reg_2(.CP(n_8168), .D(n_3676), .CD(n_8092 - ), .Q(sla_init_byte_expected[2])); - notech_mux2 i_4300(.S(\nbus_70[0] ), .A(sla_init_byte_expected[2]), .B(n_4189 - ), .Z(n_3676)); - notech_nao3 i_1523(.A(n_4270), .B(n_4153), .C(n_1588), .Z(\nbus_40[0] ) - ); - notech_reg sla_in_init_reg(.CP(n_8168), .D(n_3682), .CD(n_8092), .Q(sla_in_init - )); - notech_mux2 i_4308(.S(n_2219), .A(sla_in_init), .B(n_4154), .Z(n_3682) - ); - notech_ao4 i_1866(.A(n_4278), .B(n_1525), .C(sla_in_init), .D(n_1529), .Z - (\nbus_66[0] )); - notech_reg sla_auto_eoi_reg(.CP(n_8168), .D(n_3688), .CD(n_8092), .Q(sla_auto_eoi - )); - notech_mux2 i_4316(.S(n_2417), .A(sla_auto_eoi), .B(n_927), .Z(n_3688) - ); - notech_ao4 i_1804(.A(n_1525), .B(n_4278), .C(n_1195), .D(n_1598), .Z(n_2900 - )); - notech_reg sla_rotate_on_aeoi_reg(.CP(n_8168), .D(n_3694), .CD(n_8092), - .Q(sla_rotate_on_aeoi)); - notech_mux2 i_4324(.S(n_3188), .A(sla_rotate_on_aeoi), .B(n_926), .Z(n_3694 - )); - notech_nand2 i_1861(.A(n_930), .B(n_4139), .Z(n_3006)); - notech_reg_set sla_lowest_priority_reg_0(.CP(n_8168), .D(n_3700), .SD(n_8092 - ), .Q(sla_lowest_priority[0])); - notech_mux2 i_4332(.S(\nbus_55[0] ), .A(sla_lowest_priority[0]), .B(n_2754 - ), .Z(n_3700)); - notech_ao4 i_1560(.A(n_1188), .B(n_4278), .C(mas_in_init), .D(n_1184), .Z - (\nbus_42[0] )); - notech_reg_set sla_lowest_priority_reg_1(.CP(n_8168), .D(n_3706), .SD(n_8092 - ), .Q(sla_lowest_priority[1])); - notech_mux2 i_4340(.S(\nbus_55[0] ), .A(sla_lowest_priority[1]), .B(n_2760 - ), .Z(n_3706)); - notech_or4 i_1495(.A(n_895), .B(n_1603), .C(n_600), .D(n_645), .Z(\nbus_39[0] - )); - notech_reg_set sla_lowest_priority_reg_2(.CP(n_8168), .D(n_3712), .SD(n_8092 - ), .Q(sla_lowest_priority[2])); - notech_mux2 i_4348(.S(\nbus_55[0] ), .A(sla_lowest_priority[2]), .B(n_2766 - ), .Z(n_3712)); - notech_ao4 i_1757(.A(n_1188), .B(n_4278), .C(n_1194), .D(n_1598), .Z(n_2801 - )); - notech_reg sla_isr_reg_0(.CP(n_8172), .D(n_3718), .CD(n_8096), .Q(sla_isr - [0])); - notech_mux2 i_4356(.S(\nbus_63[0] ), .A(sla_isr[0]), .B(n_4193), .Z(n_3718 - )); - notech_nand3 i_1971(.A(n_1047), .B(n_4153), .C(n_4270), .Z(n_3250)); - notech_reg sla_isr_reg_1(.CP(n_8172), .D(n_3724), .CD(n_8096), .Q(sla_isr - [1])); - notech_mux2 i_4364(.S(\nbus_63[0] ), .A(sla_isr[1]), .B(n_4195), .Z(n_3724 - )); - notech_ao4 i_1814(.A(n_1525), .B(n_4278), .C(n_1560), .D(n_1195), .Z(n_2921 - )); - notech_reg sla_isr_reg_2(.CP(n_8172), .D(n_3730), .CD(n_8096), .Q(sla_isr - [2])); - notech_mux2 i_4372(.S(\nbus_63[0] ), .A(sla_isr[2]), .B(n_4197), .Z(n_3730 - )); - notech_ao4 i_1723(.A(n_1188), .B(n_4278), .C(n_1560), .D(n_1194), .Z(n_2734 - )); - notech_reg sla_isr_reg_3(.CP(n_8172), .D(n_3736), .CD(n_8096), .Q(sla_isr - [3])); - notech_mux2 i_4380(.S(\nbus_63[0] ), .A(sla_isr[3]), .B(n_4199), .Z(n_3736 - )); - notech_or4 i_1551(.A(n_895), .B(n_4135), .C(inter_done), .D(n_1361), .Z(n_2344 - )); - notech_reg sla_isr_reg_4(.CP(n_8171), .D(n_3742), .CD(n_8095), .Q(sla_isr - [4])); - notech_mux2 i_4388(.S(\nbus_63[0] ), .A(sla_isr[4]), .B(n_4201), .Z(n_3742 - )); - notech_nand2 i_22206(.A(n_1183), .B(n_1182), .Z(n_2646)); - notech_reg sla_isr_reg_5(.CP(n_8172), .D(n_3748), .CD(n_8096), .Q(sla_isr - [5])); - notech_mux2 i_4396(.S(\nbus_63[0] ), .A(sla_isr[5]), .B(n_4203), .Z(n_3748 - )); - notech_or2 i_32219(.A(n_1206), .B(n_4135), .Z(n_2888)); - notech_reg sla_isr_reg_6(.CP(n_8172), .D(n_3754), .CD(n_8096), .Q(sla_isr - [6])); - notech_mux2 i_4404(.S(\nbus_63[0] ), .A(sla_isr[6]), .B(n_4205), .Z(n_3754 - )); - notech_or2 i_22218(.A(n_1208), .B(n_4135), .Z(n_2882)); - notech_reg sla_isr_reg_7(.CP(n_8172), .D(n_3760), .CD(n_8096), .Q(sla_isr - [7])); - notech_mux2 i_4412(.S(\nbus_63[0] ), .A(sla_isr[7]), .B(n_4207), .Z(n_3760 - )); - notech_nand2 i_12217(.A(n_7945), .B(n_1214), .Z(n_2876)); - notech_reg sla_inter_offset_reg_0(.CP(n_8172), .D(n_3766), .CD(n_8096), - .Q(sla_inter_offset[0])); - notech_mux2 i_4420(.S(n_928), .A(sl_writedata[3]), .B(sla_inter_offset[0 - ]), .Z(n_3766)); - notech_nand2 i_22233(.A(n_932), .B(n_928), .Z(n_3216)); - notech_reg_set sla_inter_offset_reg_1(.CP(n_8172), .D(n_3772), .SD(n_8096 - ), .Q(sla_inter_offset[1])); - notech_mux2 i_4428(.S(n_928), .A(sl_writedata[4]), .B(sla_inter_offset[1 - ]), .Z(n_3772)); - notech_or2 i_32246(.A(n_1540), .B(n_4154), .Z(n_2766)); - notech_reg_set sla_inter_offset_reg_2(.CP(n_8172), .D(n_3778), .SD(n_8096 - ), .Q(sla_inter_offset[2])); - notech_mux2 i_4436(.S(n_928), .A(sl_writedata[5]), .B(sla_inter_offset[2 - ]), .Z(n_3778)); - notech_or2 i_22245(.A(n_1541), .B(n_4154), .Z(n_2760)); - notech_reg_set sla_inter_offset_reg_3(.CP(n_8172), .D(n_3784), .SD(n_8096 - ), .Q(sla_inter_offset[3])); - notech_mux2 i_4444(.S(n_928), .A(sl_writedata[6]), .B(sla_inter_offset[3 - ]), .Z(n_3784)); - notech_nand2 i_12244(.A(n_7852), .B(n_1545), .Z(n_2754)); - notech_reg sla_inter_offset_reg_4(.CP(n_8172), .D(n_3790), .CD(n_8096), - .Q(sla_inter_offset[4])); - notech_mux2 i_4452(.S(n_928), .A(sl_writedata[7]), .B(sla_inter_offset[4 - ]), .Z(n_3790)); - notech_ao4 i_81779(.A(n_1578), .B(n_1567), .C(n_762), .D(n_4208), .Z(n_2992 - )); - notech_reg inter_vector_reg_0(.CP(n_8172), .D(n_3796), .CD(n_8096), .Q(inter_vector - [0])); - notech_mux2 i_4460(.S(\nbus_40[0] ), .A(inter_vector[0]), .B(n_4214), .Z - (n_3796)); - notech_ao4 i_71778(.A(n_1575), .B(n_1567), .C(n_755), .D(n_4206), .Z(n_2986 - )); - notech_reg inter_vector_reg_1(.CP(n_8172), .D(n_3802), .CD(n_8096), .Q(inter_vector - [1])); - notech_mux2 i_4468(.S(\nbus_40[0] ), .A(inter_vector[1]), .B(n_4215), .Z - (n_3802)); - notech_ao4 i_61777(.A(n_1571), .B(n_1567), .C(n_748), .D(n_4204), .Z(n_2980 - )); - notech_reg inter_vector_reg_2(.CP(n_8171), .D(n_3808), .CD(n_8095), .Q(inter_vector - [2])); - notech_mux2 i_4476(.S(\nbus_40[0] ), .A(inter_vector[2]), .B(n_4216), .Z - (n_3808)); - notech_ao4 i_51776(.A(n_1569), .B(n_1567), .C(n_742), .D(n_4202), .Z(n_2974 - )); - notech_reg inter_vector_reg_3(.CP(n_8171), .D(n_3814), .CD(n_8095), .Q(inter_vector - [3])); - notech_mux2 i_4484(.S(\nbus_40[0] ), .A(inter_vector[3]), .B(n_4217), .Z - (n_3814)); - notech_ao4 i_41775(.A(n_737), .B(n_4200), .C(n_1577), .D(n_1567), .Z(n_2968 - )); - notech_reg inter_vector_reg_4(.CP(n_8171), .D(n_3820), .CD(n_8095), .Q(inter_vector - [4])); - notech_mux2 i_4492(.S(\nbus_40[0] ), .A(inter_vector[4]), .B(n_4218), .Z - (n_3820)); - notech_ao4 i_31774(.A(n_1567), .B(n_1582), .C(n_729), .D(n_4198), .Z(n_2962 - )); - notech_reg inter_vector_reg_5(.CP(n_8171), .D(n_3826), .CD(n_8095), .Q(inter_vector - [5])); - notech_mux2 i_4500(.S(\nbus_40[0] ), .A(inter_vector[5]), .B(n_4219), .Z - (n_3826)); - notech_ao4 i_21773(.A(n_4196), .B(n_725), .C(inter_vector[1]), .D(n_1583 - ), .Z(n_2956)); - notech_reg inter_vector_reg_6(.CP(n_8171), .D(n_3832), .CD(n_8095), .Q(inter_vector - [6])); - notech_mux2 i_4508(.S(\nbus_40[0] ), .A(inter_vector[6]), .B(n_4220), .Z - (n_3832)); - notech_ao4 i_11772(.A(n_1573), .B(n_1567), .C(n_4194), .D(n_720), .Z(n_2950 - )); - notech_reg inter_vector_reg_7(.CP(n_8170), .D(n_3838), .CD(n_8094), .Q(inter_vector - [7])); - notech_mux2 i_4516(.S(\nbus_40[0] ), .A(inter_vector[7]), .B(n_4221), .Z - (n_3838)); - notech_ao4 i_81851(.A(n_1588), .B(n_4213), .C(n_1587), .D(n_4187), .Z(n_2334 - )); - notech_reg sla_ltim_reg(.CP(n_8170), .D(n_3844), .CD(n_8094), .Q(sla_ltim - )); - notech_mux2 i_4524(.S(n_7852), .A(sl_writedata[3]), .B(sla_ltim), .Z(n_3844 - )); - notech_ao4 i_71850(.A(n_1588), .B(n_4212), .C(n_1587), .D(n_4186), .Z(n_2328 - )); - notech_reg inter_last_reg_0(.CP(n_8170), .D(inter_input[0]), .CD(n_8094) - , .Q(\inter_last[0] )); - notech_reg inter_last_reg_4(.CP(n_8171), .D(inter_input[4]), .CD(n_8095) - , .Q(\inter_last[4] )); - notech_reg inter_last_reg_5(.CP(n_8171), .D(inter_input[5]), .CD(n_8095) - , .Q(\inter_last[5] )); - notech_reg inter_last_reg_6(.CP(n_8171), .D(inter_input[6]), .CD(n_8095) - , .Q(\inter_last[6] )); - notech_reg inter_last_reg_7(.CP(n_8171), .D(inter_input[7]), .CD(n_8095) - , .Q(\inter_last[7] )); - notech_reg inter_last_reg_8(.CP(n_8171), .D(inter_input[8]), .CD(n_8095) - , .Q(\inter_last[8] )); - notech_reg sla_irr_reg_0(.CP(n_8171), .D(n_913), .CD(n_8095), .Q(sla_irr - [0])); - notech_reg sla_irr_reg_1(.CP(n_8171), .D(1'b0), .CD(n_8095), .Q(sla_irr[ - 1])); - notech_reg sla_irr_reg_2(.CP(n_8171), .D(1'b0), .CD(n_8095), .Q(sla_irr[ - 2])); - notech_reg sla_irr_reg_3(.CP(n_8167), .D(1'b0), .CD(n_8091), .Q(sla_irr[ - 3])); - notech_reg sla_irr_reg_4(.CP(n_8163), .D(1'b0), .CD(n_8087), .Q(sla_irr[ - 4])); - notech_reg sla_irr_reg_5(.CP(n_8163), .D(1'b0), .CD(n_8087), .Q(sla_irr[ - 5])); - notech_reg sla_irr_reg_6(.CP(n_8163), .D(1'b0), .CD(n_8087), .Q(sla_irr[ - 6])); - notech_reg sla_irr_reg_7(.CP(n_8163), .D(1'b0), .CD(n_8087), .Q(sla_irr[ - 7])); - notech_reg_set sla_imr_reg_0(.CP(n_8163), .D(n_3878), .SD(n_8087), .Q(sla_imr - [0])); - notech_mux2 i_4588(.S(n_4234), .A(sla_imr[0]), .B(n_907), .Z(n_3878)); - notech_ao4 i_61849(.A(n_1588), .B(n_4211), .C(n_1587), .D(n_4185), .Z(n_2322 - )); - notech_reg_set sla_imr_reg_1(.CP(n_8163), .D(n_3884), .SD(n_8087), .Q(sla_imr - [1])); - notech_mux2 i_4596(.S(n_4234), .A(sla_imr[1]), .B(n_927), .Z(n_3884)); - notech_ao4 i_51848(.A(n_1588), .B(n_4210), .C(n_1587), .D(n_4184), .Z(n_2316 - )); - notech_reg_set sla_imr_reg_2(.CP(n_8163), .D(n_3890), .SD(n_8087), .Q(sla_imr - [2])); - notech_mux2 i_4604(.S(n_4234), .A(sla_imr[2]), .B(n_908), .Z(n_3890)); - notech_ao4 i_41847(.A(n_1588), .B(n_4209), .C(n_1587), .D(n_4183), .Z(n_2310 - )); - notech_reg_set sla_imr_reg_3(.CP(n_8163), .D(n_3896), .SD(n_8087), .Q(sla_imr - [3])); - notech_mux2 i_4612(.S(n_4234), .A(sla_imr[3]), .B(n_909), .Z(n_3896)); - notech_ao4 i_31846(.A(n_1370), .B(n_1587), .C(n_700), .D(n_1588), .Z(n_2304 - )); - notech_reg_set sla_imr_reg_4(.CP(n_8164), .D(n_3902), .SD(n_8088), .Q(sla_imr - [4])); - notech_mux2 i_4620(.S(n_4234), .A(sla_imr[4]), .B(n_910), .Z(n_3902)); - notech_ao4 i_21845(.A(n_4141), .B(n_1587), .C(n_694), .D(n_1588), .Z(n_2298 - )); - notech_reg_set sla_imr_reg_5(.CP(n_8164), .D(n_3908), .SD(n_8088), .Q(sla_imr - [5])); - notech_mux2 i_4628(.S(n_4234), .A(sla_imr[5]), .B(n_911), .Z(n_3908)); - notech_ao4 i_11844(.A(n_809), .B(n_1587), .C(n_690), .D(n_1588), .Z(n_2292 - )); - notech_reg_set sla_imr_reg_6(.CP(n_8164), .D(n_3914), .SD(n_8088), .Q(sla_imr - [6])); - notech_mux2 i_4636(.S(n_4234), .A(sla_imr[6]), .B(n_912), .Z(n_3914)); - notech_ao4 i_81931(.A(n_684), .B(n_1600), .C(n_682), .D(n_1599), .Z(n_2562 - )); - notech_reg_set sla_imr_reg_7(.CP(n_8164), .D(n_3920), .SD(n_8088), .Q(sla_imr - [7])); - notech_mux2 i_4644(.S(n_4234), .A(sla_imr[7]), .B(n_926), .Z(n_3920)); - notech_ao4 i_82027(.A(n_1617), .B(n_1578), .C(n_638), .D(n_4267), .Z(n_2281 - )); - notech_reg sla_special_mask_reg(.CP(n_8163), .D(n_3926), .CD(n_8087), .Q - (sla_special_mask)); - notech_mux2 i_4652(.S(n_4235), .A(sla_special_mask), .B(n_911), .Z(n_3926 - )); - notech_ao4 i_72026(.A(n_1617), .B(n_1575), .C(n_632), .D(n_4265), .Z(n_2275 - )); - notech_reg sla_current_irq_reg(.CP(n_8163), .D(n_3932), .CD(n_8087), .Q(sla_current_irq - )); - notech_mux2 i_4660(.S(n_3006), .A(sla_current_irq), .B(n_930), .Z(n_3932 - )); - notech_ao4 i_62025(.A(n_1617), .B(n_1571), .C(n_626), .D(n_4263), .Z(n_2269 - )); - notech_reg mas_ltim_reg(.CP(n_8163), .D(n_3938), .CD(n_8087), .Q(mas_ltim - )); - notech_mux2 i_4668(.S(n_7945), .A(sl_writedata[3]), .B(mas_ltim), .Z(n_3938 - )); - notech_ao4 i_52024(.A(n_1617), .B(n_1569), .C(n_620), .D(n_4261), .Z(n_2263 - )); - notech_reg sla_current_irq_last_reg(.CP(n_8163), .D(sla_current_irq), .CD - (n_8087), .Q(sla_current_irq_last)); - notech_reg mas_irr_reg_0(.CP(n_8162), .D(n_902), .CD(n_8086), .Q(mas_irr - [0])); - notech_reg mas_irr_reg_1(.CP(n_8162), .D(1'b0), .CD(n_8086), .Q(mas_irr[ - 1])); - notech_reg mas_irr_reg_2(.CP(n_8162), .D(n_903), .CD(n_8086), .Q(mas_irr - [2])); - notech_reg mas_irr_reg_3(.CP(n_8162), .D(1'b0), .CD(n_8086), .Q(mas_irr[ - 3])); - notech_reg mas_irr_reg_4(.CP(n_8162), .D(n_904), .CD(n_8086), .Q(mas_irr - [4])); - notech_reg mas_irr_reg_5(.CP(n_8162), .D(n_905), .CD(n_8086), .Q(mas_irr - [5])); - notech_reg mas_irr_reg_6(.CP(n_8162), .D(n_906), .CD(n_8086), .Q(mas_irr - [6])); - notech_reg mas_irr_reg_7(.CP(n_8162), .D(n_4242), .CD(n_8086), .Q(mas_irr - [7])); - notech_reg_set mas_imr_reg_0(.CP(n_8162), .D(n_3962), .SD(n_8086), .Q(mas_imr - [0])); - notech_mux2 i_4712(.S(n_4251), .A(mas_imr[0]), .B(n_896), .Z(n_3962)); - notech_ao4 i_42023(.A(n_615), .B(n_4259), .C(n_1617), .D(n_1577), .Z(n_2257 - )); - notech_reg_set mas_imr_reg_1(.CP(n_8163), .D(n_3968), .SD(n_8087), .Q(mas_imr - [1])); - notech_mux2 i_4720(.S(n_4251), .A(mas_imr[1]), .B(n_1181), .Z(n_3968)); - notech_ao4 i_32022(.A(n_1616), .B(n_668), .C(n_608), .D(n_4257), .Z(n_2251 - )); - notech_reg_set mas_imr_reg_2(.CP(n_8163), .D(n_3974), .SD(n_8087), .Q(mas_imr - [2])); - notech_mux2 i_4728(.S(n_4251), .A(mas_imr[2]), .B(n_897), .Z(n_3974)); - notech_ao4 i_22021(.A(n_603), .B(n_4255), .C(inter_vector[1]), .D(n_1620 - ), .Z(n_2245)); - notech_reg_set mas_imr_reg_3(.CP(n_8162), .D(n_3980), .SD(n_8086), .Q(mas_imr - [3])); - notech_mux2 i_4736(.S(n_4251), .A(mas_imr[3]), .B(n_898), .Z(n_3980)); - notech_ao4 i_12020(.A(n_1617), .B(n_1573), .C(n_4253), .D(n_597), .Z(n_2239 - )); - notech_reg_set mas_imr_reg_4(.CP(n_8162), .D(n_3986), .SD(n_8086), .Q(mas_imr - [4])); - notech_mux2 i_4744(.S(n_4251), .A(mas_imr[4]), .B(n_899), .Z(n_3986)); - notech_nand2 i_82051(.A(n_1630), .B(n_1628), .Z(n_2728)); - notech_reg_set mas_imr_reg_5(.CP(n_8162), .D(n_3992), .SD(n_8086), .Q(mas_imr - [5])); - notech_mux2 i_4752(.S(n_4251), .A(mas_imr[5]), .B(n_900), .Z(n_3992)); - notech_nand2 i_72050(.A(n_1631), .B(n_592), .Z(n_2721)); - notech_reg_set mas_imr_reg_6(.CP(n_8162), .D(n_3998), .SD(n_8086), .Q(mas_imr - [6])); - notech_mux2 i_4760(.S(n_4251), .A(mas_imr[6]), .B(n_901), .Z(n_3998)); - notech_nand2 i_62049(.A(n_1632), .B(n_591), .Z(n_2714)); - notech_reg_set mas_imr_reg_7(.CP(n_8166), .D(n_4004), .SD(n_8090), .Q(mas_imr - [7])); - notech_mux2 i_4768(.S(n_4251), .A(mas_imr[7]), .B(n_1176), .Z(n_4004)); - notech_nand2 i_52048(.A(n_1633), .B(n_590), .Z(n_2707)); - notech_reg mas_isr_reg_0(.CP(n_8166), .D(n_4010), .CD(n_8090), .Q(mas_isr - [0])); - notech_mux2 i_4776(.S(\nbus_39[0] ), .A(mas_isr[0]), .B(n_4252), .Z(n_4010 - )); - notech_nand2 i_42047(.A(n_1634), .B(n_589), .Z(n_2700)); - notech_reg mas_isr_reg_1(.CP(n_8166), .D(n_4016), .CD(n_8090), .Q(mas_isr - [1])); - notech_mux2 i_4784(.S(\nbus_39[0] ), .A(mas_isr[1]), .B(n_4254), .Z(n_4016 - )); - notech_nand2 i_32046(.A(n_1636), .B(n_1635), .Z(n_2693)); - notech_reg mas_isr_reg_2(.CP(n_8166), .D(n_4022), .CD(n_8090), .Q(mas_isr - [2])); - notech_mux2 i_4792(.S(\nbus_39[0] ), .A(mas_isr[2]), .B(n_4256), .Z(n_4022 - )); - notech_nand2 i_22045(.A(n_1638), .B(n_1637), .Z(n_2686)); - notech_reg mas_isr_reg_3(.CP(n_8166), .D(n_4028), .CD(n_8090), .Q(mas_isr - [3])); - notech_mux2 i_4800(.S(\nbus_39[0] ), .A(mas_isr[3]), .B(n_4258), .Z(n_4028 - )); - notech_nand2 i_12044(.A(n_1640), .B(n_1639), .Z(n_2679)); - notech_reg mas_isr_reg_4(.CP(n_8166), .D(n_4034), .CD(n_8090), .Q(mas_isr - [4])); - notech_mux2 i_4808(.S(\nbus_39[0] ), .A(mas_isr[4]), .B(n_4260), .Z(n_4034 - )); - notech_nand2 i_82075(.A(n_1647), .B(n_1645), .Z(n_2505)); - notech_reg mas_isr_reg_5(.CP(n_8166), .D(n_4040), .CD(n_8090), .Q(mas_isr - [5])); - notech_mux2 i_4816(.S(\nbus_39[0] ), .A(mas_isr[5]), .B(n_4262), .Z(n_4040 - )); - notech_nand2 i_72074(.A(n_1648), .B(n_588), .Z(n_2498)); - notech_reg mas_isr_reg_6(.CP(n_8166), .D(n_4046), .CD(n_8090), .Q(mas_isr - [6])); - notech_mux2 i_4824(.S(\nbus_39[0] ), .A(mas_isr[6]), .B(n_4264), .Z(n_4046 - )); - notech_nand2 i_62073(.A(n_1649), .B(n_587), .Z(n_2491)); - notech_reg mas_isr_reg_7(.CP(n_8167), .D(n_4052), .CD(n_8091), .Q(mas_isr - [7])); - notech_mux2 i_4832(.S(\nbus_39[0] ), .A(mas_isr[7]), .B(n_4266), .Z(n_4052 - )); - notech_nand2 i_52072(.A(n_1650), .B(n_586), .Z(n_2484)); - notech_reg mas_special_mask_reg(.CP(n_8167), .D(n_4058), .CD(n_8091), .Q - (mas_special_mask)); - notech_mux2 i_4840(.S(n_4269), .A(mas_special_mask), .B(n_900), .Z(n_4058 - )); - notech_nand2 i_42071(.A(n_1651), .B(n_585), .Z(n_2477)); - notech_reg mas_current_irq_reg(.CP(n_8167), .D(n_4064), .CD(n_8091), .Q(mas_current_irq - )); - notech_mux2 i_4848(.S(n_2344), .A(mas_current_irq), .B(n_1047), .Z(n_4064 - )); - notech_nand2 i_32070(.A(n_1653), .B(n_1652), .Z(n_2470)); - notech_reg mas_spurious_reg(.CP(n_8167), .D(n_4070), .CD(n_8091), .Q(mas_spurious - )); - notech_mux2 i_4856(.S(n_3250), .A(mas_spurious), .B(n_892), .Z(n_4070) - ); - notech_nand2 i_22069(.A(n_1655), .B(n_1654), .Z(n_2463)); - notech_reg sla_read_reg_select_reg(.CP(n_8167), .D(n_4076), .CD(n_8091), - .Q(sla_read_reg_select)); - notech_mux2 i_4864(.S(n_4271), .A(sla_read_reg_select), .B(n_907), .Z(n_4076 - )); - notech_nand2 i_12068(.A(n_1657), .B(n_1656), .Z(n_2456)); - notech_reg mas_read_reg_select_reg(.CP(n_8167), .D(n_4082), .CD(n_8091), - .Q(mas_read_reg_select)); - notech_mux2 i_4872(.S(n_4273), .A(mas_read_reg_select), .B(n_896), .Z(n_4082 - )); - notech_reg ms_readdata_reg_0(.CP(n_8167), .D(n_2679), .CD(n_8091), .Q(ms_readdata - [0])); - notech_reg ms_readdata_reg_1(.CP(n_8166), .D(n_2686), .CD(n_8090), .Q(ms_readdata - [1])); - notech_reg ms_readdata_reg_2(.CP(n_8164), .D(n_2693), .CD(n_8088), .Q(ms_readdata - [2])); - notech_reg ms_readdata_reg_3(.CP(n_8164), .D(n_2700), .CD(n_8088), .Q(ms_readdata - [3])); - notech_reg ms_readdata_reg_4(.CP(n_8164), .D(n_2707), .CD(n_8088), .Q(ms_readdata - [4])); - notech_reg ms_readdata_reg_5(.CP(n_8164), .D(n_2714), .CD(n_8088), .Q(ms_readdata - [5])); - notech_reg ms_readdata_reg_6(.CP(n_8164), .D(n_2721), .CD(n_8088), .Q(ms_readdata - [6])); - notech_reg ms_readdata_reg_7(.CP(n_8164), .D(n_2728), .CD(n_8088), .Q(ms_readdata - [7])); - notech_reg sl_readdata_reg_0(.CP(n_8164), .D(n_2456), .CD(n_8088), .Q(sl_readdata - [0])); - notech_reg sl_readdata_reg_1(.CP(n_8164), .D(n_2463), .CD(n_8088), .Q(sl_readdata - [1])); - notech_reg sl_readdata_reg_2(.CP(n_8166), .D(n_2470), .CD(n_8090), .Q(sl_readdata - [2])); - notech_reg sl_readdata_reg_3(.CP(n_8166), .D(n_2477), .CD(n_8090), .Q(sl_readdata - [3])); - notech_reg sl_readdata_reg_4(.CP(n_8166), .D(n_2484), .CD(n_8090), .Q(sl_readdata - [4])); - notech_reg sl_readdata_reg_5(.CP(n_8166), .D(n_2491), .CD(n_8090), .Q(sl_readdata - [5])); - notech_reg sl_readdata_reg_6(.CP(n_8164), .D(n_2498), .CD(n_8088), .Q(sl_readdata - [6])); - notech_reg sl_readdata_reg_7(.CP(n_8164), .D(n_2505), .CD(n_8088), .Q(sl_readdata - [7])); - notech_reg inter_do_reg(.CP(n_8166), .D(n_4120), .CD(n_8090), .Q(inter_do - )); - notech_mux2 i_4944(.S(n_2344), .A(inter_do), .B(n_1047), .Z(n_4120)); - notech_inv i_5762(.A(n_1522), .Z(n_4126)); - notech_inv i_5763(.A(n_1519), .Z(n_4127)); - notech_inv i_5764(.A(n_1184), .Z(n_4128)); - notech_inv i_5765(.A(n_564), .Z(n_4129)); - notech_inv i_5766(.A(n_565), .Z(n_4130)); - notech_inv i_5767(.A(n_566), .Z(n_4131)); - notech_inv i_5768(.A(n_567), .Z(n_4132)); - notech_inv i_5769(.A(n_1383), .Z(n_4133)); - notech_inv i_5770(.A(n_1385), .Z(n_4134)); - notech_inv i_5771(.A(n_7945), .Z(n_4135)); - notech_inv i_5772(.A(n_1508), .Z(n_4136)); - notech_inv i_5773(.A(n_1442), .Z(n_4137)); - notech_inv i_5774(.A(n_1513), .Z(n_4138)); - notech_inv i_5775(.A(n_1523), .Z(n_4139)); - notech_inv i_5776(.A(n_1529), .Z(n_4140)); - notech_inv i_5777(.A(n_696), .Z(n_4141)); - notech_inv i_5778(.A(n_1575), .Z(n_4142)); - notech_inv i_5779(.A(n_1571), .Z(n_4143)); - notech_inv i_5780(.A(n_1569), .Z(n_4144)); - notech_inv i_5781(.A(n_1360), .Z(n_4145)); - notech_inv i_5782(.A(n_1357), .Z(n_4146)); - notech_inv i_5783(.A(n_1205), .Z(n_4147)); - notech_inv i_5784(.A(n_1225), .Z(n_4148)); - notech_inv i_5785(.A(n_1352), .Z(n_4149)); - notech_inv i_5786(.A(n_1349), .Z(n_4150)); - notech_inv i_5787(.A(n_1296), .Z(n_4151)); - notech_inv i_5788(.A(n_1351), .Z(n_4152)); - notech_inv i_5789(.A(n_1361), .Z(n_4153)); - notech_inv i_5790(.A(n_7852), .Z(n_4154)); - notech_inv i_5791(.A(n_1362), .Z(n_4155)); - notech_inv i_5792(.A(n_928), .Z(n_4156)); - notech_inv i_5793(.A(n_1200), .Z(n_4157)); - notech_inv i_5794(.A(n_559), .Z(n_4158)); - notech_inv i_5795(.A(n_1608), .Z(n_4159)); - notech_inv i_5796(.A(n_1605), .Z(n_4160)); - notech_inv i_5797(.A(n_1609), .Z(n_4161)); - notech_inv i_5798(.A(n_1606), .Z(n_4162)); - notech_inv i_5799(.A(n_1560), .Z(n_4163)); - notech_inv i_5800(.A(n_1537), .Z(n_4164)); - notech_inv i_5801(.A(n_1555), .Z(n_4165)); - notech_inv i_5802(.A(n_1547), .Z(n_4166)); - notech_inv i_5803(.A(n_1549), .Z(n_4167)); - notech_inv i_5804(.A(n_1551), .Z(n_4168)); - notech_inv i_5805(.A(n_1552), .Z(n_4169)); - notech_inv i_5806(.A(n_1539), .Z(n_4170)); - notech_inv i_5807(.A(n_1203), .Z(n_4171)); - notech_inv i_5808(.A(n_1194), .Z(n_4172)); - notech_inv i_5809(.A(mas_init_byte_expected[0]), .Z(n_4173)); - notech_inv i_5810(.A(n_2646), .Z(n_4174)); - notech_inv i_5811(.A(mas_init_byte_expected[2]), .Z(n_4175)); - notech_inv i_5812(.A(ms_read_last), .Z(n_4176)); - notech_inv i_5813(.A(mas_polled), .Z(n_4177)); - notech_inv i_5814(.A(sl_read_last), .Z(n_4178)); - notech_inv i_5815(.A(sla_polled), .Z(n_4179)); - notech_inv i_5816(.A(mas_lowest_priority[1]), .Z(n_4180)); - notech_inv i_5817(.A(mas_lowest_priority[2]), .Z(n_4181)); - notech_inv i_5818(.A(mas_sla_active), .Z(n_4182)); - notech_inv i_5819(.A(mas_inter_offset[0]), .Z(n_4183)); - notech_inv i_5820(.A(mas_inter_offset[1]), .Z(n_4184)); - notech_inv i_5821(.A(mas_inter_offset[2]), .Z(n_4185)); - notech_inv i_5822(.A(mas_inter_offset[3]), .Z(n_4186)); - notech_inv i_5823(.A(mas_inter_offset[4]), .Z(n_4187)); - notech_inv i_5824(.A(sla_init_byte_expected[0]), .Z(n_4188)); - notech_inv i_5825(.A(n_3216), .Z(n_4189)); - notech_inv i_5826(.A(sla_init_byte_expected[2]), .Z(n_4190)); - notech_inv i_5827(.A(sla_lowest_priority[0]), .Z(n_4191)); - notech_inv i_5828(.A(sla_lowest_priority[1]), .Z(n_4192)); - notech_inv i_5829(.A(n_2950), .Z(n_4193)); - notech_inv i_5830(.A(sla_isr[0]), .Z(n_4194)); - notech_inv i_5831(.A(n_2956), .Z(n_4195)); - notech_inv i_5832(.A(sla_isr[1]), .Z(n_4196)); - notech_inv i_5833(.A(n_2962), .Z(n_4197)); - notech_inv i_5834(.A(sla_isr[2]), .Z(n_4198)); - notech_inv i_5835(.A(n_2968), .Z(n_4199)); - notech_inv i_5836(.A(sla_isr[3]), .Z(n_4200)); - notech_inv i_5837(.A(n_2974), .Z(n_4201)); - notech_inv i_5838(.A(sla_isr[4]), .Z(n_4202)); - notech_inv i_5839(.A(n_2980), .Z(n_4203)); - notech_inv i_5840(.A(sla_isr[5]), .Z(n_4204)); - notech_inv i_5841(.A(n_2986), .Z(n_4205)); - notech_inv i_5842(.A(sla_isr[6]), .Z(n_4206)); - notech_inv i_5843(.A(n_2992), .Z(n_4207)); - notech_inv i_5844(.A(sla_isr[7]), .Z(n_4208)); - notech_inv i_5845(.A(sla_inter_offset[0]), .Z(n_4209)); - notech_inv i_5846(.A(sla_inter_offset[1]), .Z(n_4210)); - notech_inv i_5847(.A(sla_inter_offset[2]), .Z(n_4211)); - notech_inv i_5848(.A(sla_inter_offset[3]), .Z(n_4212)); - notech_inv i_5849(.A(sla_inter_offset[4]), .Z(n_4213)); - notech_inv i_5850(.A(n_2292), .Z(n_4214)); - notech_inv i_5851(.A(n_2298), .Z(n_4215)); - notech_inv i_5852(.A(n_2304), .Z(n_4216)); - notech_inv i_5853(.A(n_2310), .Z(n_4217)); - notech_inv i_5854(.A(n_2316), .Z(n_4218)); - notech_inv i_5855(.A(n_2322), .Z(n_4219)); - notech_inv i_5856(.A(n_2328), .Z(n_4220)); - notech_inv i_5857(.A(n_2334), .Z(n_4221)); - notech_inv i_5858(.A(sla_irr[0]), .Z(n_4222)); - notech_inv i_5859(.A(sla_irr[1]), .Z(n_4223)); - notech_inv i_5860(.A(sla_irr[2]), .Z(n_4224)); - notech_inv i_5861(.A(sla_irr[7]), .Z(n_4225)); - notech_inv i_5862(.A(sla_imr[0]), .Z(n_4226)); - notech_inv i_5863(.A(sla_imr[1]), .Z(n_4227)); - notech_inv i_5864(.A(sla_imr[2]), .Z(n_4228)); - notech_inv i_5865(.A(sla_imr[3]), .Z(n_4229)); - notech_inv i_5866(.A(sla_imr[4]), .Z(n_4230)); - notech_inv i_5867(.A(sla_imr[5]), .Z(n_4231)); - notech_inv i_5868(.A(sla_imr[6]), .Z(n_4232)); - notech_inv i_5869(.A(sla_imr[7]), .Z(n_4233)); - notech_inv i_5870(.A(\nbus_66[0] ), .Z(n_4234)); - notech_inv i_5871(.A(n_2900), .Z(n_4235)); - notech_inv i_5872(.A(mas_ltim), .Z(n_4236)); - notech_inv i_5873(.A(sla_current_irq), .Z(n_4237)); - notech_inv i_5874(.A(mas_irr[0]), .Z(n_4238)); - notech_inv i_5875(.A(mas_irr[1]), .Z(n_4239)); - notech_inv i_5876(.A(mas_irr[2]), .Z(n_4240)); - notech_inv i_5877(.A(mas_irr[7]), .Z(n_4241)); - notech_inv i_5878(.A(n_2562), .Z(n_4242)); - notech_inv i_5879(.A(mas_imr[0]), .Z(n_4243)); - notech_inv i_5880(.A(mas_imr[1]), .Z(n_4244)); - notech_inv i_5881(.A(mas_imr[2]), .Z(n_4245)); - notech_inv i_5882(.A(mas_imr[3]), .Z(n_4246)); - notech_inv i_5883(.A(mas_imr[4]), .Z(n_4247)); - notech_inv i_5884(.A(mas_imr[5]), .Z(n_4248)); - notech_inv i_5885(.A(mas_imr[6]), .Z(n_4249)); - notech_inv i_5886(.A(mas_imr[7]), .Z(n_4250)); - notech_inv i_5887(.A(\nbus_42[0] ), .Z(n_4251)); - notech_inv i_5888(.A(n_2239), .Z(n_4252)); - notech_inv i_5889(.A(mas_isr[0]), .Z(n_4253)); - notech_inv i_5890(.A(n_2245), .Z(n_4254)); - notech_inv i_5891(.A(mas_isr[1]), .Z(n_4255)); - notech_inv i_5892(.A(n_2251), .Z(n_4256)); - notech_inv i_5893(.A(mas_isr[2]), .Z(n_4257)); - notech_inv i_5894(.A(n_2257), .Z(n_4258)); - notech_inv i_5895(.A(mas_isr[3]), .Z(n_4259)); - notech_inv i_5896(.A(n_2263), .Z(n_4260)); - notech_inv i_5897(.A(mas_isr[4]), .Z(n_4261)); - notech_inv i_5898(.A(n_2269), .Z(n_4262)); - notech_inv i_5899(.A(mas_isr[5]), .Z(n_4263)); - notech_inv i_5900(.A(n_2275), .Z(n_4264)); - notech_inv i_5901(.A(mas_isr[6]), .Z(n_4265)); - notech_inv i_5902(.A(n_2281), .Z(n_4266)); - notech_inv i_5903(.A(mas_isr[7]), .Z(n_4267)); - notech_inv i_5904(.A(mas_special_mask), .Z(n_4268)); - notech_inv i_5905(.A(n_2801), .Z(n_4269)); - notech_inv i_5906(.A(mas_current_irq), .Z(n_4270)); - notech_inv i_5907(.A(n_2921), .Z(n_4271)); - notech_inv i_5908(.A(n_1178), .Z(n_4272)); - notech_inv i_5909(.A(n_2734), .Z(n_4273)); - notech_inv i_5910(.A(n_1180), .Z(n_4274)); - notech_inv i_5911(.A(n_1183), .Z(n_4275)); - notech_inv i_5912(.A(sl_writedata[0]), .Z(n_4276)); - notech_inv i_5913(.A(sl_writedata[1]), .Z(n_4277)); - notech_inv i_5914(.A(sl_writedata[4]), .Z(n_4278)); - notech_inv i_5915(.A(sl_writedata[6]), .Z(n_4279)); - notech_inv i_5916(.A(inter_vector[0]), .Z(n_4280)); - notech_inv i_5917(.A(sl_write), .Z(n_4281)); - notech_inv i_5918(.A(inter_done), .Z(n_4282)); - notech_inv i_5919(.A(ms_write), .Z(n_4283)); -endmodule -module periph(s00_AXI_RSTN, s00_AXI_CLK, cfg, spi_mosi, spi_miso, spi_clk, spi_cs - , mosi, miso, sclk, s00_AXI_AWADDR, s00_AXI_AWVALID, s00_AXI_AWREADY - , s00_AXI_AWBURST, s00_AXI_AWLEN, s00_AXI_AWSIZE, s00_AXI_ARADDR - , s00_AXI_ARVALID, s00_AXI_ARREADY, s00_AXI_ARBURST, s00_AXI_ARLEN - , s00_AXI_ARSIZE, s00_AXI_WDATA, s00_AXI_WVALID, s00_AXI_WREADY, - s00_AXI_WSTRB, s00_AXI_WLAST, s00_AXI_RDATA, s00_AXI_RVALID, s00_AXI_RREADY - , s00_AXI_RLAST, s00_AXI_BVALID, s00_AXI_BREADY, int_pic, ivect, - iack, int_bus, gpioA_in, gpioB_in, gpioA_dir, gpioB_dir, gpioA_out - , gpioB_out, TXD, RXD, ps2data, ps2clk); - - input s00_AXI_RSTN; - input s00_AXI_CLK; - input [6:0] cfg; - output spi_mosi; - input spi_miso; - output spi_clk; - output spi_cs; - output mosi; - input miso; - output sclk; - input [31:0] s00_AXI_AWADDR; - input s00_AXI_AWVALID; - output s00_AXI_AWREADY; - input [1:0] s00_AXI_AWBURST; - input [3:0] s00_AXI_AWLEN; - input [2:0] s00_AXI_AWSIZE; - input [31:0] s00_AXI_ARADDR; - input s00_AXI_ARVALID; - output s00_AXI_ARREADY; - input [1:0] s00_AXI_ARBURST; - input [3:0] s00_AXI_ARLEN; - input [2:0] s00_AXI_ARSIZE; - input [31:0] s00_AXI_WDATA; - input s00_AXI_WVALID; - output s00_AXI_WREADY; - input [3:0] s00_AXI_WSTRB; - input s00_AXI_WLAST; - output [31:0] s00_AXI_RDATA; - output s00_AXI_RVALID; - input s00_AXI_RREADY; - output s00_AXI_RLAST; - output s00_AXI_BVALID; - input s00_AXI_BREADY; - output int_pic; - output [7:0] ivect; - input iack; - input [3:0] int_bus; - input [7:0] gpioA_in; - input [7:0] gpioB_in; - output [7:0] gpioA_dir; - output [7:0] gpioB_dir; - output [7:0] gpioA_out; - output [7:0] gpioB_out; - output TXD; - input RXD; - input ps2data; - output ps2clk; - - wire [31:0] writeio_data; - wire [5:0] div_clke; - wire [7:0] superIO_idx; - wire [31:0] bit_bang_shift; - wire [7:0] superIOa; - wire [7:0] superIOb; - wire [8:0] bit_bang_0; - wire [7:0] rdio_pit; - wire [7:0] rdio_pic1; - wire [7:0] rdio_pic2; - wire [31:0] dat_o_spi_0; - wire [7:0] rdio_16750; - wire [7:0] rdio_8042; - wire [3:0] int_reg; - wire [8:0] bit_bang; - - supply0 AMBIT_GND; - supply1 AMBIT_VDD; - supply0 s00_AXI_RLAST; - supply1 s00_AXI_BVALID; - - - notech_inv i_545(.A(n_8247), .Z(n_8248)); - notech_inv i_544(.A(n_8234), .Z(n_8247)); - notech_inv i_543(.A(n_8245), .Z(n_8246)); - notech_inv i_542(.A(n_8230), .Z(n_8245)); - notech_inv i_535(.A(n_8237), .Z(n_8238)); - notech_inv i_534(.A(n_8218), .Z(n_8237)); - notech_inv i_533(.A(n_8235), .Z(n_8236)); - notech_inv i_532(.A(n_8216), .Z(n_8235)); - notech_inv i_530(.A(n_8233), .Z(n_8234)); - notech_inv i_529(.A(n_8236), .Z(n_8233)); - notech_inv i_528(.A(n_8231), .Z(n_8232)); - notech_inv i_527(.A(n_8214), .Z(n_8231)); - notech_inv i_526(.A(n_8229), .Z(n_8230)); - notech_inv i_525(.A(n_8232), .Z(n_8229)); - notech_inv i_524(.A(n_8227), .Z(n_8228)); - notech_inv i_522(.A(n_8212), .Z(n_8227)); - notech_inv i_521(.A(n_8225), .Z(n_8226)); - notech_inv i_519(.A(n_8228), .Z(n_8225)); - notech_inv i_514(.A(n_8219), .Z(n_8220)); - notech_inv i_513(.A(s00_AXI_RSTN), .Z(n_8219)); - notech_inv i_512(.A(n_8217), .Z(n_8218)); - notech_inv i_511(.A(n_8220), .Z(n_8217)); - notech_inv i_509(.A(n_8215), .Z(n_8216)); - notech_inv i_508(.A(n_8238), .Z(n_8215)); - notech_inv i_506(.A(n_8213), .Z(n_8214)); - notech_inv i_505(.A(n_8248), .Z(n_8213)); - notech_inv i_504(.A(n_8211), .Z(n_8212)); - notech_inv i_502(.A(n_8246), .Z(n_8211)); - notech_inv i_495(.A(n_8205), .Z(n_8206)); - notech_inv i_493(.A(n_8194), .Z(n_8205)); - notech_inv i_492(.A(n_8203), .Z(n_8204)); - notech_inv i_491(.A(n_8190), .Z(n_8203)); - notech_inv i_486(.A(n_8197), .Z(n_8198)); - notech_inv i_484(.A(n_8182), .Z(n_8197)); - notech_inv i_482(.A(n_8195), .Z(n_8196)); - notech_inv i_481(.A(n_8180), .Z(n_8195)); - notech_inv i_480(.A(n_8193), .Z(n_8194)); - notech_inv i_479(.A(n_8196), .Z(n_8193)); - notech_inv i_478(.A(n_8191), .Z(n_8192)); - notech_inv i_477(.A(n_8178), .Z(n_8191)); - notech_inv i_476(.A(n_8189), .Z(n_8190)); - notech_inv i_475(.A(n_8192), .Z(n_8189)); - notech_inv i_470(.A(n_8183), .Z(n_8184)); - notech_inv i_468(.A(s00_AXI_CLK), .Z(n_8183)); - notech_inv i_467(.A(n_8181), .Z(n_8182)); - notech_inv i_466(.A(n_8184), .Z(n_8181)); - notech_inv i_464(.A(n_8179), .Z(n_8180)); - notech_inv i_463(.A(n_8198), .Z(n_8179)); - notech_inv i_462(.A(n_8177), .Z(n_8178)); - notech_inv i_461(.A(n_8206), .Z(n_8177)); - notech_inv i_398(.A(s00_AXI_WREADY), .Z(n_8113)); - notech_inv i_395(.A(s00_AXI_WREADY), .Z(n_8112)); - notech_inv i_386(.A(s00_AXI_WREADY), .Z(n_8108)); - notech_inv i_370(.A(n_8098), .Z(n_8099)); - notech_inv i_369(.A(writeio_data[0]), .Z(n_8098)); - notech_inv i_310(.A(n_8038), .Z(n_8040)); - notech_inv i_309(.A(n_8038), .Z(n_8039)); - notech_inv i_308(.A(writeio_data[1]), .Z(n_8038)); - notech_inv i_300(.A(n_8027), .Z(n_8029)); - notech_inv i_299(.A(n_8027), .Z(n_8028)); - notech_inv i_298(.A(writeio_data[2]), .Z(n_8027)); - notech_inv i_291(.A(n_8018), .Z(n_8019)); - notech_inv i_290(.A(writeio_data[6]), .Z(n_8018)); - notech_inv i_284(.A(n_8009), .Z(n_8011)); - notech_inv i_283(.A(n_8009), .Z(n_8010)); - notech_inv i_282(.A(writeio_data[5]), .Z(n_8009)); - notech_inv i_275(.A(n_8000), .Z(n_8001)); - notech_inv i_274(.A(writeio_data[4]), .Z(n_8000)); - notech_inv i_268(.A(n_7991), .Z(n_7993)); - notech_inv i_267(.A(n_7991), .Z(n_7992)); - notech_inv i_266(.A(writeio_data[3]), .Z(n_7991)); - notech_inv i_259(.A(n_7982), .Z(n_7983)); - notech_inv i_258(.A(s00_AXI_WVALID), .Z(n_7982)); - notech_inv i_249(.A(n_7971), .Z(n_7972)); - notech_inv i_248(.A(n_675), .Z(n_7971)); - notech_inv i_241(.A(n_7962), .Z(n_7963)); - notech_inv i_240(.A(n_5247), .Z(n_7962)); - notech_inv i_233(.A(n_7953), .Z(n_7954)); - notech_inv i_232(.A(n_474), .Z(n_7953)); - notech_inv i_186(.A(n_7901), .Z(n_7902)); - notech_inv i_185(.A(n_570), .Z(n_7901)); - notech_nand2 i_180(.A(rdio_pic2[6]), .B(n_5240), .Z(n_504)); - notech_nao3 i_183(.A(bit_bang_shift[6]), .B(n_5238), .C(n_670), .Z(n_501 - )); - notech_nand2 i_167(.A(rdio_pic2[5]), .B(n_5240), .Z(n_492)); - notech_nao3 i_170(.A(n_5238), .B(bit_bang_shift[5]), .C(n_670), .Z(n_489 - )); - notech_nand2 i_152(.A(\rdio_spk[4] ), .B(n_5241), .Z(n_481)); - notech_nand2 i_10(.A(n_299), .B(n_736), .Z(n_474)); - notech_ao4 i_37(.A(n_5333), .B(n_5236), .C(n_5341), .D(n_5233), .Z(n_471 - )); - notech_mux2 i_50(.S(n_5234), .A(n_5253), .B(n_315), .Z(n_470)); - notech_nao3 i_132(.A(rdio_pic1[3]), .B(n_662), .C(n_643), .Z(n_469)); - notech_nand2 i_135(.A(cfg[3]), .B(n_5235), .Z(n_466)); - notech_nand2 i_119(.A(dat_o_spi_0[2]), .B(n_736), .Z(n_463)); - notech_nao3 i_118(.A(n_734), .B(rdio_8042[2]), .C(n_725), .Z(n_462)); - notech_nand2 i_122(.A(rdio_pic2[2]), .B(n_5240), .Z(n_461)); - notech_nao3 i_125(.A(n_5238), .B(bit_bang_shift[2]), .C(n_670), .Z(n_458 - )); - notech_or4 i_101(.A(n_764), .B(n_5234), .C(superIO_idx[0]), .D(n_5267), - .Z(n_453)); - notech_nand2 i_107(.A(\rdio_spk[1] ), .B(n_5241), .Z(n_450)); - notech_and4 i_133172(.A(n_633), .B(n_5248), .C(n_5262), .D(n_5263), .Z(clke - )); - notech_and4 i_143155(.A(div_clke[4]), .B(div_clke[5]), .C(n_633), .D(n_5248 - ), .Z(n_386)); - notech_or4 i_62(.A(bit_bang[3]), .B(bit_bang[8]), .C(n_719), .D(n_714), - .Z(n_372)); - notech_or4 i_202(.A(superIO_idx[6]), .B(n_764), .C(superIO_idx[0]), .D(n_5234 - ), .Z(n_338)); - notech_or2 i_188(.A(n_789), .B(n_5234), .Z(n_337)); - notech_ao4 i_81(.A(n_5236), .B(n_5336), .C(n_5233), .D(n_5344), .Z(n_334 - )); - notech_ao4 i_82(.A(n_5236), .B(n_5335), .C(n_5233), .D(n_5343), .Z(n_331 - )); - notech_ao4 i_64(.A(n_5236), .B(n_5334), .C(n_5233), .D(n_5342), .Z(n_328 - )); - notech_nor2 i_30(.A(dat_o_spi_0[3]), .B(n_299), .Z(n_324)); - notech_ao4 i_39(.A(n_725), .B(n_5348), .C(n_324), .D(n_726), .Z(n_320) - ); - notech_nand2 i_140(.A(n_685), .B(n_5251), .Z(n_319)); - notech_nand2 i_42(.A(n_818), .B(n_319), .Z(n_317)); - notech_mux2 i_46(.S(n_682), .A(gpioA_out[3]), .B(n_317), .Z(n_315)); - notech_ao4 i_83(.A(n_697), .B(n_5340), .C(n_708), .D(n_5332), .Z(n_311) - ); - notech_ao4 i_71(.A(n_697), .B(n_5339), .C(n_708), .D(n_5331), .Z(n_308) - ); - notech_xor2 i_80(.A(div_clke[2]), .B(n_637), .Z(n_304)); - notech_xor2 i_79(.A(div_clke[4]), .B(n_639), .Z(n_303)); - notech_xor2 i_78(.A(div_clke[5]), .B(n_640), .Z(n_302)); - notech_nand3 i_34(.A(\io_add[3] ), .B(n_680), .C(n_722), .Z(n_301)); - notech_nand2 i_12(.A(s00_AXI_WREADY), .B(n_5239), .Z(n_300)); - notech_or4 i_343192(.A(\io_add[9] ), .B(n_625), .C(n_630), .D(\io_add[6] - ), .Z(n_299)); - notech_nand2 i_177(.A(dat_o_spi_0[6]), .B(n_736), .Z(n_507)); - notech_nand2 i_195(.A(gpioA_out[7]), .B(n_5239), .Z(n_516)); - notech_or4 i_59(.A(n_647), .B(n_657), .C(n_5255), .D(n_5412), .Z(n_569) - ); - notech_or4 i_2602(.A(bit_bang[1]), .B(bit_bang[0]), .C(bit_bang[2]), .D(n_571 - ), .Z(n_570)); - notech_nao3 i_2813(.A(n_676), .B(n_372), .C(n_712), .Z(n_571)); - notech_and2 i_12170(.A(bit_bang_0[0]), .B(n_676), .Z(n_572)); - notech_nand3 i_2658(.A(n_696), .B(n_707), .C(s00_AXI_WREADY), .Z(n_573) - ); - notech_or2 i_26(.A(n_704), .B(n_8113), .Z(n_574)); - notech_nand3 i_2660(.A(n_696), .B(n_692), .C(s00_AXI_WREADY), .Z(n_575) - ); - notech_or2 i_2662(.A(n_685), .B(n_8112), .Z(n_576)); - notech_and2 i_22171(.A(bit_bang_0[1]), .B(n_676), .Z(n_577)); - notech_and2 i_32172(.A(bit_bang_0[2]), .B(n_676), .Z(n_578)); - notech_nor2 i_2308(.A(n_667), .B(n_8113), .Z(wr_pic2)); - notech_nor2 i_2307(.A(n_667), .B(s00_AXI_WREADY), .Z(rd_pic2)); - notech_nor2 i_2305(.A(n_663), .B(n_8113), .Z(wr_pic1)); - notech_nor2 i_2304(.A(n_663), .B(s00_AXI_WREADY), .Z(rd_pic1)); - notech_nor2 i_212(.A(n_661), .B(n_8113), .Z(wr_spk)); - notech_nor2 i_210(.A(n_655), .B(n_8112), .Z(wr_pit)); - notech_nor2 i_29(.A(n_655), .B(s00_AXI_WREADY), .Z(rd_pit)); - notech_or4 i_28(.A(n_649), .B(n_8112), .C(\io_add[0] ), .D(n_5410), .Z(n_586 - )); - notech_and2 i_25(.A(s00_AXI_WREADY), .B(n_5617), .Z(we_spi_0)); - notech_nor2 i_31584(.A(n_386), .B(n_304), .Z(n_588)); - notech_and2 i_23(.A(s00_AXI_ARVALID), .B(n_5418), .Z(n_591)); - notech_and3 i_11521(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[0]), .C(n_8112) - , .Z(n_592)); - notech_and3 i_21522(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[1]), .C(n_8112) - , .Z(n_593)); - notech_and3 i_31523(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[2]), .C(n_8112) - , .Z(n_594)); - notech_and3 i_41524(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[3]), .C(n_8113) - , .Z(n_595)); - notech_and3 i_51525(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[4]), .C(n_8113) - , .Z(n_596)); - notech_and3 i_61526(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[5]), .C(n_8113) - , .Z(n_597)); - notech_and3 i_71527(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[6]), .C(n_8113) - , .Z(n_598)); - notech_and3 i_81528(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[7]), .C(n_8113) - , .Z(n_599)); - notech_and3 i_91529(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[8]), .C(n_8113) - , .Z(n_600)); - notech_and3 i_101530(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[9]), .C(n_8113 - ), .Z(n_601)); - notech_and3 i_111531(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[10]), .C(n_8113 - ), .Z(n_602)); - notech_and3 i_121532(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[11]), .C(n_8113 - ), .Z(n_603)); - notech_and3 i_131533(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[12]), .C(n_8113 - ), .Z(n_604)); - notech_and3 i_141534(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[13]), .C(n_8112 - ), .Z(n_605)); - notech_and3 i_151535(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[14]), .C(n_8108 - ), .Z(n_606)); - notech_and3 i_161536(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[15]), .C(n_8108 - ), .Z(n_607)); - notech_and3 i_171537(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[16]), .C(n_8108 - ), .Z(n_608)); - notech_and3 i_181538(.A(n_7983), .B(s00_AXI_WDATA[17]), .C(n_8108), .Z(n_609 - )); - notech_and3 i_191539(.A(n_7983), .B(s00_AXI_WDATA[18]), .C(n_8108), .Z(n_610 - )); - notech_and3 i_201540(.A(n_7983), .B(s00_AXI_WDATA[19]), .C(n_8108), .Z(n_611 - )); - notech_and3 i_211541(.A(n_7983), .B(s00_AXI_WDATA[20]), .C(n_8108), .Z(n_612 - )); - notech_and3 i_221542(.A(n_7983), .B(s00_AXI_WDATA[21]), .C(n_8108), .Z(n_613 - )); - notech_and3 i_231543(.A(n_7983), .B(s00_AXI_WDATA[22]), .C(n_8108), .Z(n_614 - )); - notech_and3 i_241544(.A(n_7983), .B(s00_AXI_WDATA[23]), .C(n_8108), .Z(n_615 - )); - notech_and3 i_251545(.A(n_7983), .B(s00_AXI_WDATA[24]), .C(n_8112), .Z(n_616 - )); - notech_and3 i_261546(.A(n_7983), .B(s00_AXI_WDATA[25]), .C(n_8112), .Z(n_617 - )); - notech_and3 i_271547(.A(n_7983), .B(s00_AXI_WDATA[26]), .C(n_8112), .Z(n_618 - )); - notech_and3 i_281548(.A(s00_AXI_WVALID), .B(s00_AXI_WDATA[27]), .C(n_8112 - ), .Z(n_619)); - notech_and3 i_291549(.A(n_7983), .B(s00_AXI_WDATA[28]), .C(n_8112), .Z(n_620 - )); - notech_and3 i_301550(.A(n_7983), .B(s00_AXI_WDATA[29]), .C(n_8108), .Z(n_621 - )); - notech_and3 i_311551(.A(n_7983), .B(s00_AXI_WDATA[30]), .C(n_8108), .Z(n_622 - )); - notech_and3 i_321552(.A(n_7983), .B(s00_AXI_WDATA[31]), .C(n_8108), .Z(n_623 - )); - notech_and2 i_2(.A(n_7983), .B(n_8112), .Z(n_624)); - notech_nand2 i_66(.A(\io_add[8] ), .B(n_5256), .Z(n_625)); - notech_or2 i_570(.A(\io_add[12] ), .B(\io_add[13] ), .Z(n_626)); - notech_or4 i_33(.A(\io_add[14] ), .B(\io_add[15] ), .C(\io_add[11] ), .D - (n_626), .Z(n_629)); - notech_or2 i_41(.A(n_629), .B(\io_add[10] ), .Z(n_630)); - notech_or2 i_58(.A(\io_add[9] ), .B(n_630), .Z(n_631)); - notech_and2 i_531(.A(div_clke[2]), .B(n_5261), .Z(n_633)); - notech_nand2 i_77(.A(div_clke[0]), .B(n_5259), .Z(n_635)); - notech_nand2 i_19(.A(div_clke[1]), .B(div_clke[0]), .Z(n_637)); - notech_and3 i_24(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[1]), .Z(n_638 - )); - notech_and4 i_38(.A(div_clke[0]), .B(div_clke[2]), .C(div_clke[3]), .D(div_clke - [1]), .Z(n_639)); - notech_and3 i_57(.A(div_clke[3]), .B(n_638), .C(div_clke[4]), .Z(n_640) - ); - notech_nand2 i_44(.A(n_5255), .B(n_5412), .Z(n_643)); - notech_nand3 i_70(.A(n_5255), .B(n_5412), .C(\io_add[2] ), .Z(n_644)); - notech_or2 i_21(.A(\io_add[8] ), .B(\io_add[7] ), .Z(n_645)); - notech_or4 i_35(.A(\io_add[9] ), .B(n_630), .C(n_645), .D(n_5409), .Z(n_647 - )); - notech_or4 i_523(.A(n_647), .B(n_643), .C(n_5414), .D(n_5408), .Z(n_649) - ); - notech_or4 i_520(.A(n_5255), .B(\io_add[4] ), .C(\io_add[5] ), .D(\io_add[2] - ), .Z(n_652)); - notech_or4 i_293264(.A(n_652), .B(\io_add[3] ), .C(n_645), .D(n_631), .Z - (n_655)); - notech_nao3 i_6(.A(n_5414), .B(n_5410), .C(\io_add[3] ), .Z(n_657)); - notech_ao3 i_49(.A(\io_add[6] ), .B(n_5242), .C(n_647), .Z(n_659)); - notech_nand3 i_343433(.A(\io_add[0] ), .B(n_5412), .C(n_659), .Z(n_661) - ); - notech_nor2 i_510(.A(n_647), .B(n_657), .Z(n_662)); - notech_or4 i_303309(.A(n_647), .B(\io_add[6] ), .C(\io_add[4] ), .D(n_657 - ), .Z(n_663)); - notech_nao3 i_507(.A(\io_add[7] ), .B(\io_add[5] ), .C(n_631), .Z(n_664) - ); - notech_or4 i_68(.A(\io_add[2] ), .B(\io_add[1] ), .C(\io_add[3] ), .D(\io_add[8] - ), .Z(n_665)); - notech_or4 i_303339(.A(\io_add[8] ), .B(n_657), .C(n_643), .D(n_664), .Z - (n_667)); - notech_or4 i_503(.A(\io_add[3] ), .B(\io_add[9] ), .C(n_5257), .D(\io_add[1] - ), .Z(n_670)); - notech_nand2 i_67(.A(n_5409), .B(n_5411), .Z(n_672)); - notech_or4 i_500(.A(n_672), .B(n_629), .C(n_625), .D(n_644), .Z(n_674) - ); - notech_or2 i_343222(.A(n_670), .B(n_674), .Z(n_675)); - notech_nao3 i_27(.A(n_5238), .B(s00_AXI_WREADY), .C(n_670), .Z(n_676)); - notech_and4 i_72(.A(\io_add[9] ), .B(\io_add[7] ), .C(\io_add[4] ), .D(n_5244 - ), .Z(n_680)); - notech_nao3 i_494(.A(n_5242), .B(n_680), .C(\io_add[8] ), .Z(n_681)); - notech_or4 i_343477(.A(n_672), .B(n_665), .C(\io_add[6] ), .D(n_5237), .Z - (n_682)); - notech_or4 i_343492(.A(\io_add[5] ), .B(\io_add[6] ), .C(n_681), .D(n_5411 - ), .Z(n_685)); - notech_nao3 i_74(.A(superIO_idx[5]), .B(n_5265), .C(superIO_idx[3]), .Z(n_689 - )); - notech_ao3 i_488(.A(superIO_idx[6]), .B(n_5266), .C(n_689), .Z(n_691)); - notech_and4 i_183462(.A(superIO_idx[4]), .B(superIO_idx[7]), .C(n_691), - .D(superIO_idx[0]), .Z(n_692)); - notech_and4 i_485(.A(n_5255), .B(n_5412), .C(\io_add[2] ), .D(n_5243), .Z - (n_695)); - notech_and4 i_343448(.A(\io_add[1] ), .B(\io_add[3] ), .C(\io_add[0] ), - .D(n_695), .Z(n_696)); - notech_nand2 i_52(.A(n_696), .B(n_692), .Z(n_697)); - notech_or4 i_483(.A(\io_add[9] ), .B(n_629), .C(n_657), .D(n_5257), .Z(n_701 - )); - notech_or4 i_343207(.A(n_701), .B(n_625), .C(n_643), .D(n_672), .Z(n_704 - )); - notech_and4 i_183455(.A(superIO_idx[4]), .B(superIO_idx[7]), .C(n_691), - .D(n_5264), .Z(n_707)); - notech_nand2 i_53(.A(n_696), .B(n_707), .Z(n_708)); - notech_and4 i_16(.A(n_574), .B(n_573), .C(n_575), .D(n_586), .Z(n_710) - ); - notech_nand3 i_18(.A(n_576), .B(n_710), .C(n_300), .Z(n_712)); - notech_nao3 i_51(.A(n_5376), .B(n_5375), .C(bit_bang[2]), .Z(n_714)); - notech_or4 i_61(.A(bit_bang[6]), .B(bit_bang[7]), .C(bit_bang[4]), .D(bit_bang - [5]), .Z(n_719)); - notech_and3 i_465(.A(\io_add[8] ), .B(\io_add[6] ), .C(\io_add[5] ), .Z(n_722 - )); - notech_or4 i_343543(.A(n_647), .B(n_5255), .C(\io_add[4] ), .D(\io_add[3] - ), .Z(n_725)); - notech_nand2 i_76(.A(n_301), .B(n_725), .Z(n_726)); - notech_nand3 i_469(.A(n_704), .B(n_675), .C(n_661), .Z(n_728)); - notech_and4 i_8(.A(n_667), .B(n_663), .C(n_655), .D(n_569), .Z(n_731)); - notech_and4 i_9(.A(n_731), .B(n_5234), .C(n_682), .D(n_5245), .Z(n_734) - ); - notech_and4 i_11(.A(n_685), .B(n_725), .C(n_734), .D(n_301), .Z(n_736) - ); - notech_ao4 i_460(.A(n_675), .B(n_5297), .C(n_5247), .D(n_5405), .Z(n_737 - )); - notech_ao4 i_459(.A(n_675), .B(n_5296), .C(n_5247), .D(n_5404), .Z(n_738 - )); - notech_ao4 i_458(.A(n_675), .B(n_5295), .C(n_5247), .D(n_5403), .Z(n_739 - )); - notech_ao4 i_457(.A(n_675), .B(n_5294), .C(n_5247), .D(n_5402), .Z(n_740 - )); - notech_ao4 i_456(.A(n_675), .B(n_5293), .C(n_5247), .D(n_5401), .Z(n_741 - )); - notech_ao4 i_455(.A(n_675), .B(n_5292), .C(n_5247), .D(n_5400), .Z(n_742 - )); - notech_ao4 i_454(.A(n_675), .B(n_5291), .C(n_5247), .D(n_5399), .Z(n_743 - )); - notech_ao4 i_453(.A(n_675), .B(n_5290), .C(n_5247), .D(n_5398), .Z(n_744 - )); - notech_ao4 i_452(.A(n_675), .B(n_5289), .C(n_5247), .D(n_5397), .Z(n_745 - )); - notech_ao4 i_451(.A(n_675), .B(n_5288), .C(n_5247), .D(n_5396), .Z(n_746 - )); - notech_ao4 i_450(.A(n_675), .B(n_5287), .C(n_5247), .D(n_5395), .Z(n_747 - )); - notech_ao4 i_449(.A(n_675), .B(n_5286), .C(n_5247), .D(n_5394), .Z(n_748 - )); - notech_ao4 i_448(.A(n_675), .B(n_5285), .C(n_5247), .D(n_5393), .Z(n_749 - )); - notech_ao4 i_447(.A(n_675), .B(n_5284), .C(n_5247), .D(n_5392), .Z(n_750 - )); - notech_ao4 i_446(.A(n_675), .B(n_5283), .C(n_5247), .D(n_5391), .Z(n_751 - )); - notech_ao4 i_445(.A(n_7972), .B(n_5282), .C(n_7963), .D(n_5390), .Z(n_752 - )); - notech_ao4 i_444(.A(n_7972), .B(n_5281), .C(n_7963), .D(n_5389), .Z(n_753 - )); - notech_ao4 i_443(.A(n_7972), .B(n_5280), .C(n_7963), .D(n_5388), .Z(n_754 - )); - notech_ao4 i_442(.A(n_7972), .B(n_5279), .C(n_7963), .D(n_5387), .Z(n_755 - )); - notech_ao4 i_441(.A(n_7972), .B(n_5278), .C(n_7963), .D(n_5386), .Z(n_756 - )); - notech_ao4 i_440(.A(n_7972), .B(n_5277), .C(n_7963), .D(n_5385), .Z(n_757 - )); - notech_ao4 i_439(.A(n_7972), .B(n_5276), .C(n_7963), .D(n_5384), .Z(n_758 - )); - notech_ao4 i_438(.A(n_7972), .B(n_5275), .C(n_7963), .D(n_5383), .Z(n_759 - )); - notech_ao4 i_437(.A(n_7972), .B(n_5274), .C(n_7963), .D(n_5382), .Z(n_760 - )); - notech_ao4 i_432(.A(n_697), .B(n_5345), .C(n_708), .D(n_5337), .Z(n_761) - ); - notech_nand2 i_43(.A(n_734), .B(n_5246), .Z(n_762)); - notech_or4 i_7(.A(superIO_idx[2]), .B(superIO_idx[7]), .C(superIO_idx[4] - ), .D(n_689), .Z(n_764)); - notech_nao3 i_20(.A(superIO_idx[6]), .B(superIO_idx[0]), .C(n_764), .Z(n_766 - )); - notech_ao4 i_431(.A(n_5234), .B(n_766), .C(n_762), .D(n_5352), .Z(n_767) - ); - notech_ao4 i_429(.A(n_685), .B(n_5368), .C(n_7963), .D(n_5381), .Z(n_769 - )); - notech_and4 i_434(.A(n_769), .B(n_767), .C(n_761), .D(n_516), .Z(n_771) - ); - notech_ao4 i_426(.A(n_663), .B(n_5310), .C(n_667), .D(n_5315), .Z(n_772) - ); - notech_ao4 i_425(.A(n_7972), .B(n_5273), .C(n_655), .D(n_5323), .Z(n_773 - )); - notech_and2 i_47(.A(n_474), .B(n_338), .Z(n_777)); - notech_ao4 i_423(.A(n_301), .B(n_5360), .C(n_704), .D(n_5415), .Z(n_778) - ); - notech_and3 i_424(.A(n_474), .B(n_338), .C(n_778), .Z(n_779)); - notech_ao4 i_419(.A(n_762), .B(n_5351), .C(n_334), .D(n_5234), .Z(n_781) - ); - notech_ao4 i_417(.A(n_682), .B(n_5374), .C(n_685), .D(n_5367), .Z(n_783) - ); - notech_and4 i_421(.A(n_783), .B(n_781), .C(n_504), .D(n_507), .Z(n_785) - ); - notech_ao4 i_414(.A(n_655), .B(n_5322), .C(n_663), .D(n_5309), .Z(n_786) - ); - notech_nao3 i_173531(.A(superIO_idx[0]), .B(n_5267), .C(n_764), .Z(n_789 - )); - notech_ao4 i_412(.A(n_301), .B(n_5359), .C(n_704), .D(n_5329), .Z(n_791) - ); - notech_and3 i_413(.A(n_474), .B(n_337), .C(n_791), .Z(n_792)); - notech_ao4 i_409(.A(n_762), .B(n_5350), .C(n_331), .D(n_5234), .Z(n_794) - ); - notech_ao4 i_408(.A(n_685), .B(n_5366), .C(n_5380), .D(n_7963), .Z(n_795 - )); - notech_ao4 i_406(.A(n_661), .B(n_5416), .C(n_682), .D(n_5373), .Z(n_797) - ); - notech_and4 i_411(.A(n_797), .B(n_795), .C(n_794), .D(n_492), .Z(n_799) - ); - notech_ao4 i_403(.A(n_655), .B(n_5321), .C(n_663), .D(n_5308), .Z(n_800) - ); - notech_ao4 i_401(.A(n_301), .B(n_5358), .C(n_704), .D(n_5328), .Z(n_802) - ); - notech_and3 i_402(.A(n_474), .B(n_337), .C(n_802), .Z(n_803)); - notech_ao4 i_397(.A(n_762), .B(n_5349), .C(n_328), .D(n_5234), .Z(n_805) - ); - notech_reg s00_AXI_WREADY_reg(.CP(n_8178), .D(n_624), .CD(s00_AXI_RSTN), - .Q(s00_AXI_WREADY)); - notech_reg_set writeio_data_reg_0(.CP(s00_AXI_CLK), .D(n_4288), .SD( - AMBIT_VDD), .Q(writeio_data[0])); - notech_mux2 i_5927(.S(n_8228), .A(writeio_data[0]), .B(n_592), .Z(n_4288 - )); - notech_ao4 i_396(.A(n_766), .B(n_5234), .C(n_7963), .D(n_5379), .Z(n_806 - )); - notech_reg_set writeio_data_reg_1(.CP(s00_AXI_CLK), .D(n_4294), .SD( - AMBIT_VDD), .Q(writeio_data[1])); - notech_mux2 i_5935(.S(n_8226), .A(writeio_data[1]), .B(n_593), .Z(n_4294 - )); - notech_reg_set writeio_data_reg_2(.CP(n_8178), .D(n_4300), .SD(AMBIT_VDD - ), .Q(writeio_data[2])); - notech_mux2 i_5943(.S(n_8226), .A(writeio_data[2]), .B(n_594), .Z(n_4300 - )); - notech_ao4 i_394(.A(n_682), .B(n_5372), .C(n_685), .D(n_5365), .Z(n_808) - ); - notech_reg_set writeio_data_reg_3(.CP(n_8178), .D(n_4306), .SD(AMBIT_VDD - ), .Q(writeio_data[3])); - notech_mux2 i_5951(.S(n_8228), .A(writeio_data[3]), .B(n_595), .Z(n_4306 - )); - notech_reg_set writeio_data_reg_4(.CP(n_8178), .D(n_4312), .SD(AMBIT_VDD - ), .Q(writeio_data[4])); - notech_mux2 i_5959(.S(n_8228), .A(writeio_data[4]), .B(n_596), .Z(n_4312 - )); - notech_and4 i_399(.A(n_808), .B(n_806), .C(n_805), .D(n_481), .Z(n_810) - ); - notech_reg_set writeio_data_reg_5(.CP(n_8178), .D(n_4318), .SD(AMBIT_VDD - ), .Q(writeio_data[5])); - notech_mux2 i_5967(.S(n_8228), .A(writeio_data[5]), .B(n_597), .Z(n_4318 - )); - notech_ao4 i_391(.A(n_663), .B(n_5307), .C(n_667), .D(n_5314), .Z(n_811) - ); - notech_reg_set writeio_data_reg_6(.CP(n_8178), .D(n_4324), .SD(AMBIT_VDD - ), .Q(writeio_data[6])); - notech_mux2 i_5975(.S(n_8228), .A(writeio_data[6]), .B(n_598), .Z(n_4324 - )); - notech_ao4 i_390(.A(n_7972), .B(n_5272), .C(n_655), .D(n_5320), .Z(n_812 - )); - notech_reg_set writeio_data_reg_7(.CP(n_8178), .D(n_4330), .SD(AMBIT_VDD - ), .Q(writeio_data[7])); - notech_mux2 i_5983(.S(n_8228), .A(writeio_data[7]), .B(n_599), .Z(n_4330 - )); - notech_reg_set writeio_data_reg_8(.CP(n_8178), .D(n_4336), .SD(AMBIT_VDD - ), .Q(writeio_data[8])); - notech_mux2 i_5991(.S(n_8228), .A(writeio_data[8]), .B(n_600), .Z(n_4336 - )); - notech_ao4 i_388(.A(n_301), .B(n_5357), .C(n_704), .D(n_5327), .Z(n_814) - ); - notech_reg_set writeio_data_reg_9(.CP(n_8178), .D(n_4342), .SD(AMBIT_VDD - ), .Q(writeio_data[9])); - notech_mux2 i_5999(.S(n_8228), .A(writeio_data[9]), .B(n_601), .Z(n_4342 - )); - notech_reg_set writeio_data_reg_10(.CP(n_8178), .D(n_4348), .SD( - AMBIT_VDD), .Q(writeio_data[10])); - notech_mux2 i_6007(.S(n_8228), .A(writeio_data[10]), .B(n_602), .Z(n_4348 - )); - notech_and4 i_393(.A(n_474), .B(n_814), .C(n_812), .D(n_811), .Z(n_816) - ); - notech_reg_set writeio_data_reg_11(.CP(n_8178), .D(n_4354), .SD( - AMBIT_VDD), .Q(writeio_data[11])); - notech_mux2 i_6015(.S(n_8228), .A(writeio_data[11]), .B(n_603), .Z(n_4354 - )); - notech_reg_set writeio_data_reg_12(.CP(n_8178), .D(n_4360), .SD( - AMBIT_VDD), .Q(writeio_data[12])); - notech_mux2 i_6023(.S(n_8228), .A(writeio_data[12]), .B(n_604), .Z(n_4360 - )); - notech_ao4 i_40(.A(n_5356), .B(n_301), .C(n_685), .D(n_5364), .Z(n_818) - ); - notech_reg_set writeio_data_reg_13(.CP(n_8178), .D(n_4366), .SD( - AMBIT_VDD), .Q(writeio_data[13])); - notech_mux2 i_6031(.S(n_8228), .A(writeio_data[13]), .B(n_605), .Z(n_4366 - )); - notech_nand2 i_385(.A(n_731), .B(n_470), .Z(n_819)); - notech_reg_set writeio_data_reg_14(.CP(n_8192), .D(n_4372), .SD( - AMBIT_VDD), .Q(writeio_data[14])); - notech_mux2 i_6039(.S(n_8228), .A(writeio_data[14]), .B(n_606), .Z(n_4372 - )); - notech_ao4 i_383(.A(n_667), .B(n_5313), .C(n_728), .D(n_819), .Z(n_820) - ); - notech_reg_set writeio_data_reg_15(.CP(n_8192), .D(n_4378), .SD( - AMBIT_VDD), .Q(writeio_data[15])); - notech_mux2 i_6047(.S(n_8228), .A(writeio_data[15]), .B(n_607), .Z(n_4378 - )); - notech_reg_set writeio_data_reg_16(.CP(n_8192), .D(n_4384), .SD( - AMBIT_VDD), .Q(writeio_data[16])); - notech_mux2 i_6055(.S(n_8228), .A(writeio_data[16]), .B(n_608), .Z(n_4384 - )); - notech_ao4 i_381(.A(n_7972), .B(n_5271), .C(n_655), .D(n_5319), .Z(n_822 - )); - notech_reg_set writeio_data_reg_17(.CP(n_8192), .D(n_4390), .SD( - AMBIT_VDD), .Q(writeio_data[17])); - notech_mux2 i_6063(.S(n_8228), .A(writeio_data[17]), .B(n_609), .Z(n_4390 - )); - notech_reg_set writeio_data_reg_18(.CP(n_8192), .D(n_4396), .SD( - AMBIT_VDD), .Q(writeio_data[18])); - notech_mux2 i_6071(.S(n_8228), .A(writeio_data[18]), .B(n_610), .Z(n_4396 - )); - notech_reg_set writeio_data_reg_19(.CP(n_8192), .D(n_4402), .SD( - AMBIT_VDD), .Q(writeio_data[19])); - notech_mux2 i_6079(.S(n_8226), .A(writeio_data[19]), .B(n_611), .Z(n_4402 - )); - notech_and3 i_379(.A(n_311), .B(n_462), .C(n_463), .Z(n_825)); - notech_reg_set writeio_data_reg_20(.CP(n_8192), .D(n_4408), .SD( - AMBIT_VDD), .Q(writeio_data[20])); - notech_mux2 i_6087(.S(n_8226), .A(writeio_data[20]), .B(n_612), .Z(n_4408 - )); - notech_ao4 i_376(.A(n_682), .B(n_5371), .C(n_685), .D(n_5363), .Z(n_826) - ); - notech_reg_set writeio_data_reg_21(.CP(n_8192), .D(n_4414), .SD( - AMBIT_VDD), .Q(writeio_data[21])); - notech_mux2 i_6095(.S(n_8226), .A(writeio_data[21]), .B(n_613), .Z(n_4414 - )); - notech_reg_set writeio_data_reg_22(.CP(n_8192), .D(n_4420), .SD( - AMBIT_VDD), .Q(writeio_data[22])); - notech_mux2 i_6103(.S(n_8226), .A(writeio_data[22]), .B(n_614), .Z(n_4420 - )); - notech_reg_set writeio_data_reg_23(.CP(n_8192), .D(n_4426), .SD( - AMBIT_VDD), .Q(writeio_data[23])); - notech_mux2 i_6111(.S(n_8226), .A(writeio_data[23]), .B(n_615), .Z(n_4426 - )); - notech_ao4 i_373(.A(n_655), .B(n_5318), .C(n_663), .D(n_5306), .Z(n_829) - ); - notech_reg_set writeio_data_reg_24(.CP(n_8192), .D(n_4432), .SD( - AMBIT_VDD), .Q(writeio_data[24])); - notech_mux2 i_6119(.S(n_8226), .A(writeio_data[24]), .B(n_616), .Z(n_4432 - )); - notech_reg_set writeio_data_reg_25(.CP(n_8192), .D(n_4438), .SD( - AMBIT_VDD), .Q(writeio_data[25])); - notech_mux2 i_6127(.S(n_8226), .A(writeio_data[25]), .B(n_617), .Z(n_4438 - )); - notech_ao4 i_371(.A(n_301), .B(n_5355), .C(n_704), .D(n_5326), .Z(n_831) - ); - notech_reg_set writeio_data_reg_26(.CP(n_8192), .D(n_4444), .SD( - AMBIT_VDD), .Q(writeio_data[26])); - notech_mux2 i_6135(.S(n_8226), .A(writeio_data[26]), .B(n_618), .Z(n_4444 - )); - notech_reg_set writeio_data_reg_27(.CP(n_8192), .D(n_4450), .SD( - AMBIT_VDD), .Q(writeio_data[27])); - notech_mux2 i_6143(.S(n_8226), .A(writeio_data[27]), .B(n_619), .Z(n_4450 - )); - notech_and4 i_375(.A(n_831), .B(n_829), .C(n_777), .D(n_458), .Z(n_833) - ); - notech_reg_set writeio_data_reg_28(.CP(n_8192), .D(n_4456), .SD( - AMBIT_VDD), .Q(writeio_data[28])); - notech_mux2 i_6151(.S(n_8226), .A(writeio_data[28]), .B(n_620), .Z(n_4456 - )); - notech_reg_set writeio_data_reg_29(.CP(n_8192), .D(n_4462), .SD( - AMBIT_VDD), .Q(writeio_data[29])); - notech_mux2 i_6159(.S(n_8226), .A(writeio_data[29]), .B(n_621), .Z(n_4462 - )); - notech_reg_set writeio_data_reg_30(.CP(n_8192), .D(n_4468), .SD( - AMBIT_VDD), .Q(writeio_data[30])); - notech_mux2 i_6167(.S(n_8226), .A(writeio_data[30]), .B(n_622), .Z(n_4468 - )); - notech_ao4 i_366(.A(n_7963), .B(n_5378), .C(n_762), .D(n_5347), .Z(n_836 - )); - notech_reg_set writeio_data_reg_31(.CP(n_8192), .D(n_4474), .SD( - AMBIT_VDD), .Q(writeio_data[31])); - notech_mux2 i_6175(.S(n_8226), .A(writeio_data[31]), .B(n_623), .Z(n_4474 - )); - notech_and4 i_368(.A(n_338), .B(n_308), .C(n_453), .D(n_836), .Z(n_837) - ); - notech_reg s00_AXI_ARREADY_reg(.CP(n_8192), .D(n_4480), .CD(s00_AXI_RSTN - ), .Q(s00_AXI_ARREADY)); - notech_mux2 i_6183(.S(n_5036), .A(s00_AXI_ARREADY), .B(n_591), .Z(n_4480 - )); - notech_ao4 i_364(.A(n_682), .B(n_5370), .C(n_685), .D(n_5362), .Z(n_838) - ); - notech_reg io_add_reg_0(.CP(n_8204), .D(n_4486), .CD(n_8220), .Q(\io_add[0] - )); - notech_mux2 i_6191(.S(\nbus_105[0] ), .A(\io_add[0] ), .B(n_5043), .Z(n_4486 - )); - notech_reg io_add_reg_1(.CP(n_8190), .D(n_4492), .CD(n_8228), .Q(\io_add[1] - )); - notech_mux2 i_6199(.S(\nbus_105[0] ), .A(\io_add[1] ), .B(n_5049), .Z(n_4492 - )); - notech_reg io_add_reg_2(.CP(n_8190), .D(n_4498), .CD(n_8228), .Q(\io_add[2] - )); - notech_mux2 i_6207(.S(\nbus_105[0] ), .A(\io_add[2] ), .B(n_5055), .Z(n_4498 - )); - notech_ao4 i_361(.A(n_663), .B(n_5305), .C(n_667), .D(n_5312), .Z(n_841) - ); - notech_reg io_add_reg_3(.CP(n_8204), .D(n_4504), .CD(n_8214), .Q(\io_add[3] - )); - notech_mux2 i_6215(.S(\nbus_105[0] ), .A(\io_add[3] ), .B(n_5061), .Z(n_4504 - )); - notech_ao4 i_360(.A(n_7972), .B(n_5270), .C(n_655), .D(n_5317), .Z(n_842 - )); - notech_reg io_add_reg_4(.CP(n_8204), .D(n_4510), .CD(n_8236), .Q(\io_add[4] - )); - notech_mux2 i_6223(.S(\nbus_105[0] ), .A(\io_add[4] ), .B(n_5067), .Z(n_4510 - )); - notech_reg io_add_reg_5(.CP(n_8204), .D(n_4516), .CD(n_8214), .Q(\io_add[5] - )); - notech_mux2 i_6231(.S(\nbus_105[0] ), .A(\io_add[5] ), .B(n_5073), .Z(n_4516 - )); - notech_ao4 i_358(.A(n_301), .B(n_5354), .C(n_704), .D(n_5325), .Z(n_844) - ); - notech_reg io_add_reg_6(.CP(n_8204), .D(n_4522), .CD(n_8230), .Q(\io_add[6] - )); - notech_mux2 i_6239(.S(\nbus_105[0] ), .A(\io_add[6] ), .B(n_5079), .Z(n_4522 - )); - notech_reg io_add_reg_7(.CP(n_8204), .D(n_4528), .CD(n_8214), .Q(\io_add[7] - )); - notech_mux2 i_6247(.S(\nbus_105[0] ), .A(\io_add[7] ), .B(n_5085), .Z(n_4528 - )); - notech_and4 i_363(.A(n_474), .B(n_844), .C(n_842), .D(n_841), .Z(n_846) - ); - notech_reg io_add_reg_8(.CP(n_8204), .D(n_4534), .CD(n_8214), .Q(\io_add[8] - )); - notech_mux2 i_6255(.S(\nbus_105[0] ), .A(\io_add[8] ), .B(n_5091), .Z(n_4534 - )); - notech_ao4 i_355(.A(n_697), .B(n_5338), .C(n_708), .D(n_5330), .Z(n_847) - ); - notech_reg io_add_reg_9(.CP(n_8204), .D(n_4540), .CD(n_8214), .Q(\io_add[9] - )); - notech_mux2 i_6263(.S(\nbus_105[0] ), .A(\io_add[9] ), .B(n_5097), .Z(n_4540 - )); - notech_ao4 i_354(.A(n_7963), .B(n_5377), .C(n_762), .D(n_5346), .Z(n_848 - )); - notech_reg io_add_reg_10(.CP(n_8204), .D(n_4546), .CD(n_8214), .Q(\io_add[10] - )); - notech_mux2 i_6271(.S(\nbus_105[0] ), .A(\io_add[10] ), .B(n_5103), .Z(n_4546 - )); - notech_reg io_add_reg_11(.CP(n_8204), .D(n_4552), .CD(n_8214), .Q(\io_add[11] - )); - notech_mux2 i_6279(.S(\nbus_105[0] ), .A(\io_add[11] ), .B(n_5109), .Z(n_4552 - )); - notech_ao4 i_352(.A(n_682), .B(n_5369), .C(n_685), .D(n_5361), .Z(n_850) - ); - notech_reg io_add_reg_12(.CP(n_8204), .D(n_4558), .CD(n_8214), .Q(\io_add[12] - )); - notech_mux2 i_6287(.S(\nbus_105[0] ), .A(\io_add[12] ), .B(n_5115), .Z(n_4558 - )); - notech_ao4 i_351(.A(n_661), .B(n_5417), .C(n_5234), .D(n_789), .Z(n_851) - ); - notech_reg io_add_reg_13(.CP(n_8204), .D(n_4564), .CD(n_8214), .Q(\io_add[13] - )); - notech_mux2 i_6295(.S(\nbus_105[0] ), .A(\io_add[13] ), .B(n_5121), .Z(n_4564 - )); - notech_reg io_add_reg_14(.CP(n_8204), .D(n_4570), .CD(n_8214), .Q(\io_add[14] - )); - notech_mux2 i_6303(.S(\nbus_105[0] ), .A(\io_add[14] ), .B(n_5127), .Z(n_4570 - )); - notech_and4 i_357(.A(n_851), .B(n_850), .C(n_848), .D(n_847), .Z(n_853) - ); - notech_reg io_add_reg_15(.CP(n_8204), .D(n_4576), .CD(n_8214), .Q(\io_add[15] - )); - notech_mux2 i_6311(.S(\nbus_105[0] ), .A(\io_add[15] ), .B(n_5133), .Z(n_4576 - )); - notech_ao4 i_348(.A(n_663), .B(n_5304), .C(n_667), .D(n_5311), .Z(n_854) - ); - notech_reg div_clke_reg_0(.CP(n_8204), .D(n_5258), .CD(n_8214), .Q(div_clke - [0])); - notech_reg div_clke_reg_1(.CP(n_8190), .D(n_5260), .CD(n_8214), .Q(div_clke - [1])); - notech_reg div_clke_reg_2(.CP(n_8190), .D(n_588), .CD(n_8214), .Q(div_clke - [2])); - notech_reg div_clke_reg_3(.CP(n_8190), .D(n_5645), .CD(n_8214), .Q(div_clke - [3])); - notech_reg div_clke_reg_4(.CP(n_8190), .D(n_4590), .CD(n_8232), .Q(div_clke - [4])); - notech_ao3 i_6335(.A(n_303), .B(n_5420), .C(n_386), .Z(n_4590)); - notech_reg div_clke_reg_5(.CP(n_8190), .D(n_4592), .CD(n_8232), .Q(div_clke - [5])); - notech_ao3 i_6339(.A(n_302), .B(n_5420), .C(n_386), .Z(n_4592)); - notech_reg s00_AXI_AWREADY_reg(.CP(n_8190), .D(n_4594), .CD(n_8232), .Q(s00_AXI_AWREADY - )); - notech_mux2 i_6343(.S(n_6384), .A(s00_AXI_AWREADY), .B(n_5254), .Z(n_4594 - )); - notech_ao4 i_347(.A(n_7972), .B(n_5269), .C(n_655), .D(n_5316), .Z(n_855 - )); - notech_reg int_reg_reg_0(.CP(n_8190), .D(int_bus[0]), .CD(n_8232), .Q(int_reg - [0])); - notech_reg int_reg_reg_1(.CP(n_8190), .D(int_bus[1]), .CD(n_8232), .Q(int_reg - [1])); - notech_reg int_reg_reg_2(.CP(n_8190), .D(int_bus[2]), .CD(n_8232), .Q(int_reg - [2])); - notech_reg int_reg_reg_3(.CP(n_8190), .D(int_bus[3]), .CD(n_8232), .Q(int_reg - [3])); - notech_reg superIO_idx_reg_0(.CP(n_8190), .D(n_4608), .CD(n_8232), .Q(superIO_idx - [0])); - notech_mux2 i_6367(.S(n_586), .A(writeio_data[0]), .B(superIO_idx[0]), .Z - (n_4608)); - notech_reg superIO_idx_reg_1(.CP(n_8190), .D(n_4614), .CD(n_8232), .Q(superIO_idx - [1])); - notech_mux2 i_6375(.S(n_586), .A(writeio_data[1]), .B(superIO_idx[1]), .Z - (n_4614)); - notech_ao4 i_345(.A(n_301), .B(n_5353), .C(n_704), .D(n_5324), .Z(n_857) - ); - notech_reg superIO_idx_reg_2(.CP(n_8178), .D(n_4620), .CD(n_8232), .Q(superIO_idx - [2])); - notech_mux2 i_6383(.S(n_586), .A(writeio_data[2]), .B(superIO_idx[2]), .Z - (n_4620)); - notech_reg superIO_idx_reg_3(.CP(n_8178), .D(n_4626), .CD(n_8232), .Q(superIO_idx - [3])); - notech_mux2 i_6391(.S(n_586), .A(writeio_data[3]), .B(superIO_idx[3]), .Z - (n_4626)); - notech_and4 i_350(.A(n_857), .B(n_777), .C(n_855), .D(n_854), .Z(n_859) - ); - notech_reg superIO_idx_reg_4(.CP(n_8190), .D(n_4632), .CD(n_8232), .Q(superIO_idx - [4])); - notech_mux2 i_6399(.S(n_586), .A(writeio_data[4]), .B(superIO_idx[4]), .Z - (n_4632)); - notech_and2 i_344(.A(bit_bang[1]), .B(bit_bang[0]), .Z(n_860)); - notech_reg superIO_idx_reg_5(.CP(n_8196), .D(n_4638), .CD(n_8232), .Q(superIO_idx - [5])); - notech_mux2 i_6407(.S(n_586), .A(writeio_data[5]), .B(superIO_idx[5]), .Z - (n_4638)); - notech_reg superIO_idx_reg_6(.CP(n_8180), .D(n_4644), .CD(n_8232), .Q(superIO_idx - [6])); - notech_mux2 i_6415(.S(n_586), .A(writeio_data[6]), .B(superIO_idx[6]), .Z - (n_4644)); - notech_reg superIO_idx_reg_7(.CP(n_8180), .D(n_4650), .CD(n_8232), .Q(superIO_idx - [7])); - notech_mux2 i_6423(.S(n_586), .A(writeio_data[7]), .B(superIO_idx[7]), .Z - (n_4650)); - notech_or2 i_2246(.A(bit_bang_sclk), .B(\gpio_out[1] ), .Z(spi_clk)); - notech_reg bit_bang_reg_0(.CP(n_8180), .D(n_4656), .CD(n_8232), .Q(bit_bang - [0])); - notech_mux2 i_6431(.S(n_5268), .A(bit_bang[0]), .B(n_572), .Z(n_4656)); - notech_or2 i_2497(.A(n_591), .B(n_5254), .Z(\nbus_105[0] )); - notech_reg bit_bang_reg_1(.CP(n_8180), .D(n_4662), .CD(n_8232), .Q(bit_bang - [1])); - notech_mux2 i_6439(.S(n_5268), .A(bit_bang[1]), .B(n_577), .Z(n_4662)); - notech_nand2 i_22(.A(s00_AXI_AWVALID), .B(n_5419), .Z(n_5036)); - notech_reg bit_bang_reg_2(.CP(n_8180), .D(n_4668), .CD(n_8232), .Q(bit_bang - [2])); - notech_mux2 i_6447(.S(n_5268), .A(bit_bang[2]), .B(n_578), .Z(n_4668)); - notech_nao3 i_3167(.A(s00_AXI_ARVALID), .B(n_5036), .C(s00_AXI_ARREADY), - .Z(n_6384)); - notech_reg bit_bang_reg_3(.CP(n_8180), .D(n_4674), .CD(n_8232), .Q(bit_bang - [3])); - notech_mux2 i_6455(.S(n_5268), .A(bit_bang[3]), .B(n_5884), .Z(n_4674) - ); - notech_ao4 i_2925(.A(n_7972), .B(n_8112), .C(n_712), .D(n_5252), .Z(\nbus_117[0] - )); - notech_reg bit_bang_reg_4(.CP(n_8180), .D(n_4680), .CD(n_8246), .Q(bit_bang - [4])); - notech_mux2 i_6463(.S(n_5268), .A(bit_bang[4]), .B(n_5890), .Z(n_4680) - ); - notech_mux2 i_161011(.S(n_5036), .A(s00_AXI_AWADDR[17]), .B(s00_AXI_ARADDR - [17]), .Z(n_5133)); - notech_reg bit_bang_reg_5(.CP(n_8180), .D(n_4686), .CD(n_8230), .Q(bit_bang - [5])); - notech_mux2 i_6471(.S(n_5268), .A(bit_bang[5]), .B(n_5896), .Z(n_4686) - ); - notech_mux2 i_151010(.S(n_5036), .A(s00_AXI_AWADDR[16]), .B(s00_AXI_ARADDR - [16]), .Z(n_5127)); - notech_reg bit_bang_reg_6(.CP(n_8180), .D(n_4692), .CD(n_8246), .Q(bit_bang - [6])); - notech_mux2 i_6479(.S(n_5268), .A(bit_bang[6]), .B(n_5902), .Z(n_4692) - ); - notech_mux2 i_141009(.S(n_5036), .A(s00_AXI_AWADDR[15]), .B(s00_AXI_ARADDR - [15]), .Z(n_5121)); - notech_reg bit_bang_reg_7(.CP(n_8180), .D(n_4698), .CD(n_8246), .Q(bit_bang - [7])); - notech_mux2 i_6487(.S(n_5268), .A(bit_bang[7]), .B(n_5908), .Z(n_4698) - ); - notech_mux2 i_131008(.S(n_5036), .A(s00_AXI_AWADDR[14]), .B(s00_AXI_ARADDR - [14]), .Z(n_5115)); - notech_reg bit_bang_reg_8(.CP(n_8180), .D(n_4704), .CD(n_8246), .Q(bit_bang - [8])); - notech_mux2 i_6495(.S(n_5268), .A(bit_bang[8]), .B(n_5914), .Z(n_4704) - ); - notech_mux2 i_121007(.S(n_5036), .A(s00_AXI_AWADDR[13]), .B(s00_AXI_ARADDR - [13]), .Z(n_5109)); - notech_reg bit_bang_shift_reg_0(.CP(n_8180), .D(n_4710), .CD(n_8246), .Q - (bit_bang_shift[0])); - notech_mux2 i_6503(.S(n_570), .A(spi_miso), .B(bit_bang_shift[0]), .Z(n_4710 - )); - notech_mux2 i_111006(.S(n_5036), .A(s00_AXI_AWADDR[12]), .B(s00_AXI_ARADDR - [12]), .Z(n_5103)); - notech_reg bit_bang_shift_reg_1(.CP(n_8196), .D(n_4716), .CD(n_8246), .Q - (bit_bang_shift[1])); - notech_mux2 i_6511(.S(n_570), .A(bit_bang_shift[0]), .B(bit_bang_shift[1 - ]), .Z(n_4716)); - notech_mux2 i_101005(.S(n_5036), .A(s00_AXI_AWADDR[11]), .B(s00_AXI_ARADDR - [11]), .Z(n_5097)); - notech_reg bit_bang_shift_reg_2(.CP(n_8196), .D(n_4722), .CD(n_8246), .Q - (bit_bang_shift[2])); - notech_mux2 i_6519(.S(n_570), .A(bit_bang_shift[1]), .B(bit_bang_shift[2 - ]), .Z(n_4722)); - notech_mux2 i_91004(.S(n_5036), .A(s00_AXI_AWADDR[10]), .B(s00_AXI_ARADDR - [10]), .Z(n_5091)); - notech_reg bit_bang_shift_reg_3(.CP(n_8180), .D(n_4728), .CD(n_8246), .Q - (bit_bang_shift[3])); - notech_mux2 i_6527(.S(n_570), .A(bit_bang_shift[2]), .B(bit_bang_shift[3 - ]), .Z(n_4728)); - notech_mux2 i_81003(.S(n_5036), .A(s00_AXI_AWADDR[9]), .B(s00_AXI_ARADDR - [9]), .Z(n_5085)); - notech_reg bit_bang_shift_reg_4(.CP(n_8196), .D(n_4734), .CD(n_8246), .Q - (bit_bang_shift[4])); - notech_mux2 i_6535(.S(n_570), .A(bit_bang_shift[3]), .B(bit_bang_shift[4 - ]), .Z(n_4734)); - notech_mux2 i_71002(.S(n_5036), .A(s00_AXI_AWADDR[8]), .B(s00_AXI_ARADDR - [8]), .Z(n_5079)); - notech_reg bit_bang_shift_reg_5(.CP(n_8196), .D(n_4740), .CD(n_8246), .Q - (bit_bang_shift[5])); - notech_mux2 i_6543(.S(n_570), .A(bit_bang_shift[4]), .B(bit_bang_shift[5 - ]), .Z(n_4740)); - notech_mux2 i_61001(.S(n_5036), .A(s00_AXI_AWADDR[7]), .B(s00_AXI_ARADDR - [7]), .Z(n_5073)); - notech_reg bit_bang_shift_reg_6(.CP(n_8196), .D(n_4746), .CD(n_8246), .Q - (bit_bang_shift[6])); - notech_mux2 i_6551(.S(n_570), .A(bit_bang_shift[5]), .B(bit_bang_shift[6 - ]), .Z(n_4746)); - notech_mux2 i_5(.S(n_5036), .A(s00_AXI_AWADDR[6]), .B(s00_AXI_ARADDR[6]) - , .Z(n_5067)); - notech_reg bit_bang_shift_reg_7(.CP(n_8196), .D(n_4752), .CD(n_8246), .Q - (bit_bang_shift[7])); - notech_mux2 i_6559(.S(n_570), .A(bit_bang_shift[6]), .B(bit_bang_shift[7 - ]), .Z(n_4752)); - notech_mux2 i_4(.S(n_5036), .A(s00_AXI_AWADDR[5]), .B(s00_AXI_ARADDR[5]) - , .Z(n_5061)); - notech_reg bit_bang_shift_reg_8(.CP(n_8196), .D(n_4758), .CD(n_8246), .Q - (bit_bang_shift[8])); - notech_mux2 i_6567(.S(n_570), .A(bit_bang_shift[7]), .B(bit_bang_shift[8 - ]), .Z(n_4758)); - notech_mux2 i_3(.S(n_5036), .A(s00_AXI_AWADDR[4]), .B(s00_AXI_ARADDR[4]) - , .Z(n_5055)); - notech_reg bit_bang_shift_reg_9(.CP(n_8196), .D(n_4764), .CD(n_8246), .Q - (bit_bang_shift[9])); - notech_mux2 i_6575(.S(n_570), .A(bit_bang_shift[8]), .B(bit_bang_shift[9 - ]), .Z(n_4764)); - notech_mux2 i_21000(.S(n_5036), .A(s00_AXI_AWADDR[3]), .B(s00_AXI_ARADDR - [3]), .Z(n_5049)); - notech_reg bit_bang_shift_reg_10(.CP(n_8196), .D(n_4770), .CD(n_8246), .Q - (bit_bang_shift[10])); - notech_mux2 i_6583(.S(n_570), .A(bit_bang_shift[9]), .B(bit_bang_shift[ - 10]), .Z(n_4770)); - notech_mux2 i_1(.S(n_5036), .A(s00_AXI_AWADDR[2]), .B(s00_AXI_ARADDR[2]) - , .Z(n_5043)); - notech_reg bit_bang_shift_reg_11(.CP(n_8196), .D(n_4776), .CD(n_8246), .Q - (bit_bang_shift[11])); - notech_mux2 i_6591(.S(n_570), .A(bit_bang_shift[10]), .B(bit_bang_shift[ - 11]), .Z(n_4776)); - notech_xor2 i_41585(.A(div_clke[3]), .B(n_638), .Z(n_5645)); - notech_reg bit_bang_shift_reg_12(.CP(n_8196), .D(n_4782), .CD(n_8246), .Q - (bit_bang_shift[12])); - notech_mux2 i_6599(.S(n_570), .A(bit_bang_shift[11]), .B(bit_bang_shift[ - 12]), .Z(n_4782)); - notech_ao4 i_21583(.A(div_clke[0]), .B(n_5259), .C(n_386), .D(n_635), .Z - (n_5631)); - notech_reg bit_bang_shift_reg_13(.CP(n_8196), .D(n_4788), .CD(n_8246), .Q - (bit_bang_shift[13])); - notech_mux2 i_6607(.S(n_570), .A(bit_bang_shift[12]), .B(bit_bang_shift[ - 13]), .Z(n_4788)); - notech_mux2 i_92178(.S(n_676), .A(writeio_data[5]), .B(bit_bang_0[8]), .Z - (n_5914)); - notech_reg bit_bang_shift_reg_14(.CP(n_8196), .D(n_4794), .CD(n_8246), .Q - (bit_bang_shift[14])); - notech_mux2 i_6615(.S(n_570), .A(bit_bang_shift[13]), .B(bit_bang_shift[ - 14]), .Z(n_4794)); - notech_mux2 i_82177(.S(n_676), .A(writeio_data[4]), .B(bit_bang_0[7]), .Z - (n_5908)); - notech_reg bit_bang_shift_reg_15(.CP(n_8196), .D(n_4800), .CD(n_8230), .Q - (bit_bang_shift[15])); - notech_mux2 i_6623(.S(n_570), .A(bit_bang_shift[14]), .B(bit_bang_shift[ - 15]), .Z(n_4800)); - notech_mux2 i_72176(.S(n_676), .A(writeio_data[3]), .B(bit_bang_0[6]), .Z - (n_5902)); - notech_reg bit_bang_shift_reg_16(.CP(n_8196), .D(n_4806), .CD(n_8230), .Q - (bit_bang_shift[16])); - notech_mux2 i_6631(.S(n_7902), .A(bit_bang_shift[15]), .B(bit_bang_shift - [16]), .Z(n_4806)); - notech_mux2 i_62175(.S(n_676), .A(writeio_data[2]), .B(bit_bang_0[5]), .Z - (n_5896)); - notech_reg bit_bang_shift_reg_17(.CP(n_8196), .D(n_4812), .CD(n_8230), .Q - (bit_bang_shift[17])); - notech_mux2 i_6639(.S(n_7902), .A(bit_bang_shift[16]), .B(bit_bang_shift - [17]), .Z(n_4812)); - notech_mux2 i_52174(.S(n_676), .A(writeio_data[1]), .B(bit_bang_0[4]), .Z - (n_5890)); - notech_reg bit_bang_shift_reg_18(.CP(n_8196), .D(n_4818), .CD(n_8230), .Q - (bit_bang_shift[18])); - notech_mux2 i_6647(.S(n_7902), .A(bit_bang_shift[17]), .B(bit_bang_shift - [18]), .Z(n_4818)); - notech_mux2 i_42173(.S(n_676), .A(writeio_data[0]), .B(bit_bang_0[3]), .Z - (n_5884)); - notech_reg bit_bang_shift_reg_19(.CP(n_8196), .D(n_4824), .CD(n_8230), .Q - (bit_bang_shift[19])); - notech_mux2 i_6655(.S(n_7902), .A(bit_bang_shift[18]), .B(bit_bang_shift - [19]), .Z(n_4824)); - notech_mux2 i_22679(.S(gpioA_dir[0]), .A(gpioA_in[0]), .B(superIOa[0]), - .Z(n_5921)); - notech_reg bit_bang_shift_reg_20(.CP(n_8206), .D(n_4830), .CD(n_8230), .Q - (bit_bang_shift[20])); - notech_mux2 i_6663(.S(n_7902), .A(bit_bang_shift[19]), .B(bit_bang_shift - [20]), .Z(n_4830)); - notech_mux2 i_23680(.S(gpioA_dir[1]), .A(gpioA_in[1]), .B(superIOa[1]), - .Z(n_5928)); - notech_reg bit_bang_shift_reg_21(.CP(n_8194), .D(n_4836), .CD(n_8230), .Q - (bit_bang_shift[21])); - notech_mux2 i_6671(.S(n_7902), .A(bit_bang_shift[20]), .B(bit_bang_shift - [21]), .Z(n_4836)); - notech_mux2 i_24681(.S(gpioA_dir[2]), .A(gpioA_in[2]), .B(superIOa[2]), - .Z(n_5935)); - notech_reg bit_bang_shift_reg_22(.CP(n_8206), .D(n_4842), .CD(n_8230), .Q - (bit_bang_shift[22])); - notech_mux2 i_6679(.S(n_7902), .A(bit_bang_shift[21]), .B(bit_bang_shift - [22]), .Z(n_4842)); - notech_mux2 i_25682(.S(gpioA_dir[3]), .A(gpioA_in[3]), .B(superIOa[3]), - .Z(n_5942)); - notech_reg bit_bang_shift_reg_23(.CP(n_8206), .D(n_4848), .CD(n_8230), .Q - (bit_bang_shift[23])); - notech_mux2 i_6687(.S(n_7902), .A(bit_bang_shift[22]), .B(bit_bang_shift - [23]), .Z(n_4848)); - notech_mux2 i_26683(.S(gpioA_dir[4]), .A(gpioA_in[4]), .B(superIOa[4]), - .Z(n_5949)); - notech_reg bit_bang_shift_reg_24(.CP(n_8206), .D(n_4854), .CD(n_8230), .Q - (bit_bang_shift[24])); - notech_mux2 i_6695(.S(n_7902), .A(bit_bang_shift[23]), .B(bit_bang_shift - [24]), .Z(n_4854)); - notech_mux2 i_27684(.S(gpioA_dir[5]), .A(gpioA_in[5]), .B(superIOa[5]), - .Z(n_5956)); - notech_reg bit_bang_shift_reg_25(.CP(n_8206), .D(n_4860), .CD(n_8230), .Q - (bit_bang_shift[25])); - notech_mux2 i_6703(.S(n_7902), .A(bit_bang_shift[24]), .B(bit_bang_shift - [25]), .Z(n_4860)); - notech_mux2 i_28685(.S(gpioA_dir[6]), .A(gpioA_in[6]), .B(superIOa[6]), - .Z(n_5963)); - notech_reg bit_bang_shift_reg_26(.CP(n_8206), .D(n_4866), .CD(n_8230), .Q - (bit_bang_shift[26])); - notech_mux2 i_6711(.S(n_7902), .A(bit_bang_shift[25]), .B(bit_bang_shift - [26]), .Z(n_4866)); - notech_mux2 i_29686(.S(gpioA_dir[7]), .A(gpioA_in[7]), .B(superIOa[7]), - .Z(n_5970)); - notech_reg bit_bang_shift_reg_27(.CP(n_8206), .D(n_4872), .CD(n_8230), .Q - (bit_bang_shift[27])); - notech_mux2 i_6719(.S(n_7902), .A(bit_bang_shift[26]), .B(bit_bang_shift - [27]), .Z(n_4872)); - notech_mux2 i_22711(.S(gpioB_dir[0]), .A(gpioB_in[0]), .B(superIOb[0]), - .Z(n_5804)); - notech_reg bit_bang_shift_reg_28(.CP(n_8206), .D(n_4878), .CD(n_8230), .Q - (bit_bang_shift[28])); - notech_mux2 i_6727(.S(n_7902), .A(bit_bang_shift[27]), .B(bit_bang_shift - [28]), .Z(n_4878)); - notech_mux2 i_23712(.S(gpioB_dir[1]), .A(gpioB_in[1]), .B(superIOb[1]), - .Z(n_5811)); - notech_reg bit_bang_shift_reg_29(.CP(n_8206), .D(n_4884), .CD(n_8230), .Q - (bit_bang_shift[29])); - notech_mux2 i_6735(.S(n_7902), .A(bit_bang_shift[28]), .B(bit_bang_shift - [29]), .Z(n_4884)); - notech_mux2 i_24713(.S(gpioB_dir[2]), .A(gpioB_in[2]), .B(superIOb[2]), - .Z(n_5818)); - notech_reg bit_bang_shift_reg_30(.CP(n_8206), .D(n_4890), .CD(n_8212), .Q - (bit_bang_shift[30])); - notech_mux2 i_6743(.S(n_7902), .A(bit_bang_shift[29]), .B(bit_bang_shift - [30]), .Z(n_4890)); - notech_mux2 i_25714(.S(gpioB_dir[3]), .A(gpioB_in[3]), .B(superIOb[3]), - .Z(n_5825)); - notech_reg bit_bang_shift_reg_31(.CP(n_8206), .D(n_4896), .CD(n_8214), .Q - (bit_bang_shift[31])); - notech_mux2 i_6751(.S(n_7902), .A(bit_bang_shift[30]), .B(bit_bang_shift - [31]), .Z(n_4896)); - notech_mux2 i_26715(.S(gpioB_dir[4]), .A(gpioB_in[4]), .B(superIOb[4]), - .Z(n_5832)); - notech_reg superIOa_dir_reg_0(.CP(n_8206), .D(n_4902), .CD(n_8230), .Q(gpioA_dir - [0])); - notech_mux2 i_6759(.S(n_573), .A(writeio_data[0]), .B(gpioA_dir[0]), .Z(n_4902 - )); - notech_mux2 i_27716(.S(gpioB_dir[5]), .A(gpioB_in[5]), .B(superIOb[5]), - .Z(n_5839)); - notech_reg superIOa_dir_reg_1(.CP(n_8206), .D(n_4908), .CD(n_8216), .Q(gpioA_dir - [1])); - notech_mux2 i_6767(.S(n_573), .A(writeio_data[1]), .B(gpioA_dir[1]), .Z(n_4908 - )); - notech_mux2 i_28717(.S(gpioB_dir[6]), .A(gpioB_in[6]), .B(superIOb[6]), - .Z(n_5846)); - notech_reg superIOa_dir_reg_2(.CP(n_8206), .D(n_4914), .CD(n_8236), .Q(gpioA_dir - [2])); - notech_mux2 i_6775(.S(n_573), .A(writeio_data[2]), .B(gpioA_dir[2]), .Z(n_4914 - )); - notech_mux2 i_29718(.S(gpioB_dir[7]), .A(gpioB_in[7]), .B(superIOb[7]), - .Z(n_5853)); - notech_reg superIOa_dir_reg_3(.CP(n_8206), .D(n_4920), .CD(n_8236), .Q(gpioA_dir - [3])); - notech_mux2 i_6783(.S(n_573), .A(writeio_data[3]), .B(gpioA_dir[3]), .Z(n_4920 - )); - notech_nand2 i_321520(.A(n_737), .B(n_474), .Z(n_6292)); - notech_reg superIOa_dir_reg_4(.CP(n_8206), .D(n_4926), .CD(n_8236), .Q(gpioA_dir - [4])); - notech_mux2 i_6791(.S(n_573), .A(writeio_data[4]), .B(gpioA_dir[4]), .Z(n_4926 - )); - notech_nand2 i_311519(.A(n_474), .B(n_738), .Z(n_6285)); - notech_reg superIOa_dir_reg_5(.CP(n_8206), .D(n_4932), .CD(n_8216), .Q(gpioA_dir - [5])); - notech_mux2 i_6799(.S(n_573), .A(writeio_data[5]), .B(gpioA_dir[5]), .Z(n_4932 - )); - notech_nand2 i_301518(.A(n_474), .B(n_739), .Z(n_6278)); - notech_reg superIOa_dir_reg_6(.CP(n_8206), .D(n_4938), .CD(n_8236), .Q(gpioA_dir - [6])); - notech_mux2 i_6807(.S(n_573), .A(writeio_data[6]), .B(gpioA_dir[6]), .Z(n_4938 - )); - notech_nand2 i_291517(.A(n_474), .B(n_740), .Z(n_6271)); - notech_reg superIOa_dir_reg_7(.CP(n_8206), .D(n_4944), .CD(n_8214), .Q(gpioA_dir - [7])); - notech_mux2 i_6815(.S(n_573), .A(writeio_data[7]), .B(gpioA_dir[7]), .Z(n_4944 - )); - notech_nand2 i_281516(.A(n_474), .B(n_741), .Z(n_6264)); - notech_reg superIOb_dir_reg_0(.CP(n_8194), .D(n_4950), .CD(n_8236), .Q(gpioB_dir - [0])); - notech_mux2 i_6823(.S(n_575), .A(writeio_data[0]), .B(gpioB_dir[0]), .Z(n_4950 - )); - notech_nand2 i_271515(.A(n_474), .B(n_742), .Z(n_6257)); - notech_reg superIOb_dir_reg_1(.CP(n_8194), .D(n_4956), .CD(n_8236), .Q(gpioB_dir - [1])); - notech_mux2 i_6831(.S(n_575), .A(writeio_data[1]), .B(gpioB_dir[1]), .Z(n_4956 - )); - notech_nand2 i_261514(.A(n_474), .B(n_743), .Z(n_6250)); - notech_reg superIOb_dir_reg_2(.CP(n_8194), .D(n_4962), .CD(n_8236), .Q(gpioB_dir - [2])); - notech_mux2 i_6839(.S(n_575), .A(writeio_data[2]), .B(gpioB_dir[2]), .Z(n_4962 - )); - notech_nand2 i_251513(.A(n_474), .B(n_744), .Z(n_6243)); - notech_reg superIOb_dir_reg_3(.CP(n_8194), .D(n_4968), .CD(n_8236), .Q(gpioB_dir - [3])); - notech_mux2 i_6847(.S(n_575), .A(writeio_data[3]), .B(gpioB_dir[3]), .Z(n_4968 - )); - notech_nand2 i_241512(.A(n_474), .B(n_745), .Z(n_6236)); - notech_reg superIOb_dir_reg_4(.CP(n_8194), .D(n_4974), .CD(n_8236), .Q(gpioB_dir - [4])); - notech_mux2 i_6855(.S(n_575), .A(writeio_data[4]), .B(gpioB_dir[4]), .Z(n_4974 - )); - notech_nand2 i_231511(.A(n_7954), .B(n_746), .Z(n_6229)); - notech_reg superIOb_dir_reg_5(.CP(n_8194), .D(n_4980), .CD(n_8236), .Q(gpioB_dir - [5])); - notech_mux2 i_6863(.S(n_575), .A(writeio_data[5]), .B(gpioB_dir[5]), .Z(n_4980 - )); - notech_nand2 i_221510(.A(n_7954), .B(n_747), .Z(n_6222)); - notech_reg superIOb_dir_reg_6(.CP(n_8194), .D(n_4986), .CD(n_8236), .Q(gpioB_dir - [6])); - notech_mux2 i_6871(.S(n_575), .A(writeio_data[6]), .B(gpioB_dir[6]), .Z(n_4986 - )); - notech_nand2 i_211509(.A(n_7954), .B(n_748), .Z(n_6215)); - notech_reg superIOb_dir_reg_7(.CP(n_8194), .D(n_4992), .CD(n_8236), .Q(gpioB_dir - [7])); - notech_mux2 i_6879(.S(n_575), .A(writeio_data[7]), .B(gpioB_dir[7]), .Z(n_4992 - )); - notech_nand2 i_201508(.A(n_7954), .B(n_749), .Z(n_6208)); - notech_reg superIOa_reg_0(.CP(n_8194), .D(n_4998), .CD(n_8236), .Q(superIOa - [0])); - notech_mux2 i_6887(.S(n_300), .A(writeio_data[0]), .B(superIOa[0]), .Z(n_4998 - )); - notech_nand2 i_191507(.A(n_7954), .B(n_750), .Z(n_6201)); - notech_reg superIOa_reg_1(.CP(n_8194), .D(n_5004), .CD(n_8236), .Q(superIOa - [1])); - notech_mux2 i_6895(.S(n_300), .A(writeio_data[1]), .B(superIOa[1]), .Z(n_5004 - )); - notech_nand2 i_181506(.A(n_7954), .B(n_751), .Z(n_6194)); - notech_reg superIOa_reg_2(.CP(n_8194), .D(n_5010), .CD(n_8236), .Q(superIOa - [2])); - notech_mux2 i_6903(.S(n_300), .A(writeio_data[2]), .B(superIOa[2]), .Z(n_5010 - )); - notech_nand2 i_171505(.A(n_7954), .B(n_752), .Z(n_6187)); - notech_reg superIOa_reg_3(.CP(n_8194), .D(n_5016), .CD(n_8236), .Q(superIOa - [3])); - notech_mux2 i_6911(.S(n_300), .A(writeio_data[3]), .B(superIOa[3]), .Z(n_5016 - )); - notech_nand2 i_161504(.A(n_7954), .B(n_753), .Z(n_6180)); - notech_reg superIOa_reg_4(.CP(n_8180), .D(n_5022), .CD(n_8236), .Q(superIOa - [4])); - notech_mux2 i_6919(.S(n_300), .A(writeio_data[4]), .B(superIOa[4]), .Z(n_5022 - )); - notech_nand2 i_151503(.A(n_7954), .B(n_754), .Z(n_6173)); - notech_reg superIOa_reg_5(.CP(n_8194), .D(n_5028), .CD(n_8236), .Q(superIOa - [5])); - notech_mux2 i_6927(.S(n_300), .A(writeio_data[5]), .B(superIOa[5]), .Z(n_5028 - )); - notech_nand2 i_141502(.A(n_7954), .B(n_755), .Z(n_6166)); - notech_reg superIOa_reg_6(.CP(n_8198), .D(n_5034), .CD(n_8248), .Q(superIOa - [6])); - notech_mux2 i_6935(.S(n_300), .A(writeio_data[6]), .B(superIOa[6]), .Z(n_5034 - )); - notech_nand2 i_131501(.A(n_7954), .B(n_756), .Z(n_6159)); - notech_reg superIOa_reg_7(.CP(n_8182), .D(n_5041), .CD(n_8234), .Q(superIOa - [7])); - notech_mux2 i_6943(.S(n_300), .A(writeio_data[7]), .B(superIOa[7]), .Z(n_5041 - )); - notech_nand2 i_121500(.A(n_7954), .B(n_757), .Z(n_6152)); - notech_reg reg290_reg_0(.CP(n_8182), .D(n_5921), .CD(n_8248), .Q(gpioA_out - [0])); - notech_reg reg290_reg_1(.CP(n_8182), .D(n_5928), .CD(n_8248), .Q(gpioA_out - [1])); - notech_reg reg290_reg_2(.CP(n_8182), .D(n_5935), .CD(n_8248), .Q(gpioA_out - [2])); - notech_reg reg290_reg_3(.CP(n_8182), .D(n_5942), .CD(n_8248), .Q(gpioA_out - [3])); - notech_reg reg290_reg_4(.CP(n_8182), .D(n_5949), .CD(n_8248), .Q(gpioA_out - [4])); - notech_reg reg290_reg_5(.CP(n_8182), .D(n_5956), .CD(n_8248), .Q(gpioA_out - [5])); - notech_reg reg290_reg_6(.CP(n_8182), .D(n_5963), .CD(n_8248), .Q(gpioA_out - [6])); - notech_reg reg290_reg_7(.CP(n_8182), .D(n_5970), .CD(n_8248), .Q(gpioA_out - [7])); - notech_reg superIOb_reg_0(.CP(n_8182), .D(n_5068), .CD(n_8248), .Q(superIOb - [0])); - notech_mux2 i_6983(.S(n_576), .A(writeio_data[0]), .B(superIOb[0]), .Z(n_5068 - )); - notech_nand2 i_111499(.A(n_7954), .B(n_758), .Z(n_6145)); - notech_reg superIOb_reg_1(.CP(n_8182), .D(n_5075), .CD(n_8248), .Q(superIOb - [1])); - notech_mux2 i_6991(.S(n_576), .A(writeio_data[1]), .B(superIOb[1]), .Z(n_5075 - )); - notech_nand2 i_101498(.A(n_7954), .B(n_759), .Z(n_6138)); - notech_reg superIOb_reg_2(.CP(n_8182), .D(n_5082), .CD(n_8248), .Q(superIOb - [2])); - notech_mux2 i_6999(.S(n_576), .A(writeio_data[2]), .B(superIOb[2]), .Z(n_5082 - )); - notech_nand2 i_91497(.A(n_7954), .B(n_760), .Z(n_6131)); - notech_reg superIOb_reg_3(.CP(n_8198), .D(n_5089), .CD(n_8248), .Q(superIOb - [3])); - notech_mux2 i_7007(.S(n_576), .A(n_7993), .B(superIOb[3]), .Z(n_5089)); - notech_and4 i_81496(.A(n_773), .B(n_772), .C(n_771), .D(n_779), .Z(n_6124 - )); - notech_reg superIOb_reg_4(.CP(n_8198), .D(n_5096), .CD(n_8248), .Q(superIOb - [4])); - notech_mux2 i_7015(.S(n_576), .A(n_8001), .B(superIOb[4]), .Z(n_5096)); - notech_and4 i_71495(.A(n_786), .B(n_785), .C(n_501), .D(n_792), .Z(n_6117 - )); - notech_reg superIOb_reg_5(.CP(n_8182), .D(n_5104), .CD(n_8248), .Q(superIOb - [5])); - notech_mux2 i_7023(.S(n_576), .A(n_8011), .B(superIOb[5]), .Z(n_5104)); - notech_and4 i_61494(.A(n_800), .B(n_799), .C(n_489), .D(n_803), .Z(n_6110 - )); - notech_reg superIOb_reg_6(.CP(n_8198), .D(n_5111), .CD(n_8248), .Q(superIOb - [6])); - notech_mux2 i_7031(.S(n_576), .A(writeio_data[6]), .B(superIOb[6]), .Z(n_5111 - )); - notech_nand2 i_51493(.A(n_816), .B(n_810), .Z(n_6103)); - notech_reg superIOb_reg_7(.CP(n_8198), .D(n_5118), .CD(n_8248), .Q(superIOb - [7])); - notech_mux2 i_7039(.S(n_576), .A(writeio_data[7]), .B(superIOb[7]), .Z(n_5118 - )); - notech_and4 i_41492(.A(n_822), .B(n_820), .C(n_466), .D(n_469), .Z(n_6096 - )); - notech_reg reg291_reg_0(.CP(n_8198), .D(n_5804), .CD(n_8248), .Q(gpioB_out - [0])); - notech_reg reg291_reg_1(.CP(n_8198), .D(n_5811), .CD(n_8248), .Q(gpioB_out - [1])); - notech_reg reg291_reg_2(.CP(n_8198), .D(n_5818), .CD(n_8234), .Q(gpioB_out - [2])); - notech_reg reg291_reg_3(.CP(n_8198), .D(n_5825), .CD(n_8216), .Q(gpioB_out - [3])); - notech_reg reg291_reg_4(.CP(n_8198), .D(n_5832), .CD(n_8234), .Q(gpioB_out - [4])); - notech_reg reg291_reg_5(.CP(n_8198), .D(n_5839), .CD(n_8218), .Q(gpioB_out - [5])); - notech_reg reg291_reg_6(.CP(n_8198), .D(n_5846), .CD(n_8238), .Q(gpioB_out - [6])); - notech_reg reg291_reg_7(.CP(n_8198), .D(n_5853), .CD(n_8238), .Q(gpioB_out - [7])); - notech_reg_set s00_AXI_RDATA_reg_0(.CP(n_8198), .D(n_6075), .SD(n_8238), - .Q(s00_AXI_RDATA[0])); - notech_reg_set s00_AXI_RDATA_reg_1(.CP(n_8198), .D(n_5298), .SD(n_8218), - .Q(s00_AXI_RDATA[1])); - notech_reg_set s00_AXI_RDATA_reg_2(.CP(n_8198), .D(n_5299), .SD(n_8238), - .Q(s00_AXI_RDATA[2])); - notech_reg_set s00_AXI_RDATA_reg_3(.CP(n_8198), .D(n_5300), .SD(n_8238), - .Q(s00_AXI_RDATA[3])); - notech_reg_set s00_AXI_RDATA_reg_4(.CP(n_8198), .D(n_6103), .SD(n_8238), - .Q(s00_AXI_RDATA[4])); - notech_reg_set s00_AXI_RDATA_reg_5(.CP(n_8182), .D(n_5301), .SD(n_8238), - .Q(s00_AXI_RDATA[5])); - notech_reg_set s00_AXI_RDATA_reg_6(.CP(n_8198), .D(n_5302), .SD(n_8238), - .Q(s00_AXI_RDATA[6])); - notech_reg_set s00_AXI_RDATA_reg_7(.CP(n_8184), .D(n_5303), .SD(n_8238), - .Q(s00_AXI_RDATA[7])); - notech_reg_set s00_AXI_RDATA_reg_8(.CP(n_8184), .D(n_6131), .SD(n_8238), - .Q(s00_AXI_RDATA[8])); - notech_reg_set s00_AXI_RDATA_reg_9(.CP(n_8184), .D(n_6138), .SD(n_8238), - .Q(s00_AXI_RDATA[9])); - notech_reg_set s00_AXI_RDATA_reg_10(.CP(n_8184), .D(n_6145), .SD(n_8238) - , .Q(s00_AXI_RDATA[10])); - notech_reg_set s00_AXI_RDATA_reg_11(.CP(n_8184), .D(n_6152), .SD(n_8238) - , .Q(s00_AXI_RDATA[11])); - notech_reg_set s00_AXI_RDATA_reg_12(.CP(n_8184), .D(n_6159), .SD(n_8238) - , .Q(s00_AXI_RDATA[12])); - notech_reg_set s00_AXI_RDATA_reg_13(.CP(n_8184), .D(n_6166), .SD(n_8238) - , .Q(s00_AXI_RDATA[13])); - notech_reg_set s00_AXI_RDATA_reg_14(.CP(n_8184), .D(n_6173), .SD(n_8238) - , .Q(s00_AXI_RDATA[14])); - notech_reg_set s00_AXI_RDATA_reg_15(.CP(n_8184), .D(n_6180), .SD(n_8238) - , .Q(s00_AXI_RDATA[15])); - notech_reg_set s00_AXI_RDATA_reg_16(.CP(n_8184), .D(n_6187), .SD(n_8238) - , .Q(s00_AXI_RDATA[16])); - notech_reg_set s00_AXI_RDATA_reg_17(.CP(n_8184), .D(n_6194), .SD(n_8218) - , .Q(s00_AXI_RDATA[17])); - notech_reg_set s00_AXI_RDATA_reg_18(.CP(n_8184), .D(n_6201), .SD(n_8238) - , .Q(s00_AXI_RDATA[18])); - notech_reg_set s00_AXI_RDATA_reg_19(.CP(n_8184), .D(n_6208), .SD(n_8220) - , .Q(s00_AXI_RDATA[19])); - notech_reg_set s00_AXI_RDATA_reg_20(.CP(n_8184), .D(n_6215), .SD(n_8220) - , .Q(s00_AXI_RDATA[20])); - notech_reg_set s00_AXI_RDATA_reg_21(.CP(n_8184), .D(n_6222), .SD(n_8220) - , .Q(s00_AXI_RDATA[21])); - notech_reg_set s00_AXI_RDATA_reg_22(.CP(n_8184), .D(n_6229), .SD(n_8220) - , .Q(s00_AXI_RDATA[22])); - notech_reg_set s00_AXI_RDATA_reg_23(.CP(n_8184), .D(n_6236), .SD(n_8220) - , .Q(s00_AXI_RDATA[23])); - notech_reg_set s00_AXI_RDATA_reg_24(.CP(n_8184), .D(n_6243), .SD(n_8220) - , .Q(s00_AXI_RDATA[24])); - notech_reg_set s00_AXI_RDATA_reg_25(.CP(n_8184), .D(n_6250), .SD(n_8220) - , .Q(s00_AXI_RDATA[25])); - notech_reg_set s00_AXI_RDATA_reg_26(.CP(s00_AXI_CLK), .D(n_6257), .SD(n_8220 - ), .Q(s00_AXI_RDATA[26])); - notech_reg_set s00_AXI_RDATA_reg_27(.CP(s00_AXI_CLK), .D(n_6264), .SD(n_8220 - ), .Q(s00_AXI_RDATA[27])); - notech_reg_set s00_AXI_RDATA_reg_28(.CP(s00_AXI_CLK), .D(n_6271), .SD(n_8220 - ), .Q(s00_AXI_RDATA[28])); - notech_reg_set s00_AXI_RDATA_reg_29(.CP(s00_AXI_CLK), .D(n_6278), .SD(n_8220 - ), .Q(s00_AXI_RDATA[29])); - notech_reg_set s00_AXI_RDATA_reg_30(.CP(s00_AXI_CLK), .D(n_6285), .SD(n_8220 - ), .Q(s00_AXI_RDATA[30])); - notech_reg_set s00_AXI_RDATA_reg_31(.CP(s00_AXI_CLK), .D(n_6292), .SD(n_8220 - ), .Q(s00_AXI_RDATA[31])); - notech_reg gpio_out_reg_0(.CP(s00_AXI_CLK), .D(n_5207), .CD(n_8220), .Q(spi_mosi - )); - notech_mux2 i_7207(.S(n_574), .A(n_8099), .B(spi_mosi), .Z(n_5207)); - notech_and4 i_31491(.A(n_826), .B(n_833), .C(n_461), .D(n_825), .Z(n_6089 - )); - notech_reg gpio_out_reg_1(.CP(s00_AXI_CLK), .D(n_5213), .CD(n_8220), .Q(\gpio_out[1] - )); - notech_mux2 i_7215(.S(n_574), .A(n_8040), .B(\gpio_out[1] ), .Z(n_5213) - ); - notech_and4 i_21490(.A(n_838), .B(n_837), .C(n_846), .D(n_450), .Z(n_6082 - )); - notech_reg gpio_out_reg_2(.CP(s00_AXI_CLK), .D(n_5219), .CD(n_8220), .Q(spi_cs - )); - notech_mux2 i_7223(.S(n_574), .A(n_8029), .B(spi_cs), .Z(n_5219)); - notech_nand2 i_11489(.A(n_859), .B(n_853), .Z(n_6075)); - notech_reg bit_bang_sclk_reg(.CP(s00_AXI_CLK), .D(n_5225), .CD(n_8220), - .Q(bit_bang_sclk)); - notech_mux2 i_7231(.S(n_571), .A(n_5690), .B(bit_bang_sclk), .Z(n_5225) - ); - notech_mux2 i_2801(.S(bit_bang[2]), .A(n_860), .B(n_5376), .Z(n_5690)); - notech_reg s00_AXI_RVALID_reg(.CP(s00_AXI_CLK), .D(s00_AXI_ARREADY), .CD - (n_8220), .Q(s00_AXI_RVALID)); - notech_inv i_7887(.A(n_692), .Z(n_5233)); - notech_inv i_7888(.A(n_696), .Z(n_5234)); - notech_inv i_7889(.A(n_704), .Z(n_5235)); - notech_inv i_7890(.A(n_707), .Z(n_5236)); - notech_inv i_7891(.A(n_680), .Z(n_5237)); - notech_inv i_7892(.A(n_674), .Z(n_5238)); - notech_inv i_7893(.A(n_682), .Z(n_5239)); - notech_inv i_7894(.A(n_667), .Z(n_5240)); - notech_inv i_7895(.A(n_661), .Z(n_5241)); - notech_inv i_7896(.A(n_657), .Z(n_5242)); - notech_inv i_7897(.A(n_647), .Z(n_5243)); - notech_inv i_7898(.A(n_630), .Z(n_5244)); - notech_inv i_7899(.A(n_728), .Z(n_5245)); - notech_inv i_7900(.A(n_725), .Z(n_5246)); - notech_inv i_7901(.A(n_736), .Z(n_5247)); - notech_inv i_7902(.A(n_635), .Z(n_5248)); - notech_inv i_7903(.A(n_299), .Z(n_5617)); - notech_inv i_7904(.A(n_301), .Z(n_3762)); - notech_inv i_7905(.A(n_320), .Z(n_5251)); - notech_inv i_7906(.A(n_372), .Z(n_5252)); - notech_inv i_7907(.A(n_471), .Z(n_5253)); - notech_inv i_7908(.A(n_5036), .Z(n_5254)); - notech_inv i_7909(.A(\io_add[6] ), .Z(n_5255)); - notech_inv i_7910(.A(\io_add[7] ), .Z(n_5256)); - notech_inv i_7911(.A(\io_add[10] ), .Z(n_5257)); - notech_inv i_7912(.A(div_clke[0]), .Z(n_5258)); - notech_inv i_7913(.A(div_clke[1]), .Z(n_5259)); - notech_inv i_7914(.A(n_5631), .Z(n_5260)); - notech_inv i_7915(.A(div_clke[3]), .Z(n_5261)); - notech_inv i_7916(.A(div_clke[4]), .Z(n_5262)); - notech_inv i_7917(.A(div_clke[5]), .Z(n_5263)); - notech_inv i_7918(.A(superIO_idx[0]), .Z(n_5264)); - notech_inv i_7919(.A(superIO_idx[1]), .Z(n_5265)); - notech_inv i_7920(.A(superIO_idx[2]), .Z(n_5266)); - notech_inv i_7921(.A(superIO_idx[6]), .Z(n_5267)); - notech_inv i_7922(.A(\nbus_117[0] ), .Z(n_5268)); - notech_inv i_7923(.A(bit_bang_shift[0]), .Z(n_5269)); - notech_inv i_7924(.A(bit_bang_shift[1]), .Z(n_5270)); - notech_inv i_7925(.A(bit_bang_shift[3]), .Z(n_5271)); - notech_inv i_7926(.A(bit_bang_shift[4]), .Z(n_5272)); - notech_inv i_7927(.A(bit_bang_shift[7]), .Z(n_5273)); - notech_inv i_7928(.A(bit_bang_shift[8]), .Z(n_5274)); - notech_inv i_7929(.A(bit_bang_shift[9]), .Z(n_5275)); - notech_inv i_7930(.A(bit_bang_shift[10]), .Z(n_5276)); - notech_inv i_7931(.A(bit_bang_shift[11]), .Z(n_5277)); - notech_inv i_7932(.A(bit_bang_shift[12]), .Z(n_5278)); - notech_inv i_7933(.A(bit_bang_shift[13]), .Z(n_5279)); - notech_inv i_7934(.A(bit_bang_shift[14]), .Z(n_5280)); - notech_inv i_7935(.A(bit_bang_shift[15]), .Z(n_5281)); - notech_inv i_7936(.A(bit_bang_shift[16]), .Z(n_5282)); - notech_inv i_7937(.A(bit_bang_shift[17]), .Z(n_5283)); - notech_inv i_7938(.A(bit_bang_shift[18]), .Z(n_5284)); - notech_inv i_7939(.A(bit_bang_shift[19]), .Z(n_5285)); - notech_inv i_7940(.A(bit_bang_shift[20]), .Z(n_5286)); - notech_inv i_7941(.A(bit_bang_shift[21]), .Z(n_5287)); - notech_inv i_7942(.A(bit_bang_shift[22]), .Z(n_5288)); - notech_inv i_7943(.A(bit_bang_shift[23]), .Z(n_5289)); - notech_inv i_7944(.A(bit_bang_shift[24]), .Z(n_5290)); - notech_inv i_7945(.A(bit_bang_shift[25]), .Z(n_5291)); - notech_inv i_7946(.A(bit_bang_shift[26]), .Z(n_5292)); - notech_inv i_7947(.A(bit_bang_shift[27]), .Z(n_5293)); - notech_inv i_7948(.A(bit_bang_shift[28]), .Z(n_5294)); - notech_inv i_7949(.A(bit_bang_shift[29]), .Z(n_5295)); - notech_inv i_7950(.A(bit_bang_shift[30]), .Z(n_5296)); - notech_inv i_7951(.A(bit_bang_shift[31]), .Z(n_5297)); - notech_inv i_7952(.A(n_6082), .Z(n_5298)); - notech_inv i_7953(.A(n_6089), .Z(n_5299)); - notech_inv i_7954(.A(n_6096), .Z(n_5300)); - notech_inv i_7955(.A(n_6110), .Z(n_5301)); - notech_inv i_7956(.A(n_6117), .Z(n_5302)); - notech_inv i_7957(.A(n_6124), .Z(n_5303)); - notech_inv i_7958(.A(rdio_pic1[0]), .Z(n_5304)); - notech_inv i_7959(.A(rdio_pic1[1]), .Z(n_5305)); - notech_inv i_7960(.A(rdio_pic1[2]), .Z(n_5306)); - notech_inv i_7961(.A(rdio_pic1[4]), .Z(n_5307)); - notech_inv i_7962(.A(rdio_pic1[5]), .Z(n_5308)); - notech_inv i_7963(.A(rdio_pic1[6]), .Z(n_5309)); - notech_inv i_7964(.A(rdio_pic1[7]), .Z(n_5310)); - notech_inv i_7965(.A(rdio_pic2[0]), .Z(n_5311)); - notech_inv i_7966(.A(rdio_pic2[1]), .Z(n_5312)); - notech_inv i_7967(.A(rdio_pic2[3]), .Z(n_5313)); - notech_inv i_7968(.A(rdio_pic2[4]), .Z(n_5314)); - notech_inv i_7969(.A(rdio_pic2[7]), .Z(n_5315)); - notech_inv i_7970(.A(rdio_pit[0]), .Z(n_5316)); - notech_inv i_7971(.A(rdio_pit[1]), .Z(n_5317)); - notech_inv i_7972(.A(rdio_pit[2]), .Z(n_5318)); - notech_inv i_7973(.A(rdio_pit[3]), .Z(n_5319)); - notech_inv i_7974(.A(rdio_pit[4]), .Z(n_5320)); - notech_inv i_7975(.A(rdio_pit[5]), .Z(n_5321)); - notech_inv i_7976(.A(rdio_pit[6]), .Z(n_5322)); - notech_inv i_7977(.A(rdio_pit[7]), .Z(n_5323)); - notech_inv i_7978(.A(cfg[0]), .Z(n_5324)); - notech_inv i_7979(.A(cfg[1]), .Z(n_5325)); - notech_inv i_7980(.A(cfg[2]), .Z(n_5326)); - notech_inv i_7981(.A(cfg[4]), .Z(n_5327)); - notech_inv i_7982(.A(cfg[5]), .Z(n_5328)); - notech_inv i_7983(.A(cfg[6]), .Z(n_5329)); - notech_inv i_7984(.A(gpioA_dir[0]), .Z(n_5330)); - notech_inv i_7985(.A(gpioA_dir[1]), .Z(n_5331)); - notech_inv i_7986(.A(gpioA_dir[2]), .Z(n_5332)); - notech_inv i_7987(.A(gpioA_dir[3]), .Z(n_5333)); - notech_inv i_7988(.A(gpioA_dir[4]), .Z(n_5334)); - notech_inv i_7989(.A(gpioA_dir[5]), .Z(n_5335)); - notech_inv i_7990(.A(gpioA_dir[6]), .Z(n_5336)); - notech_inv i_7991(.A(gpioA_dir[7]), .Z(n_5337)); - notech_inv i_7992(.A(gpioB_dir[0]), .Z(n_5338)); - notech_inv i_7993(.A(gpioB_dir[1]), .Z(n_5339)); - notech_inv i_7994(.A(gpioB_dir[2]), .Z(n_5340)); - notech_inv i_7995(.A(gpioB_dir[3]), .Z(n_5341)); - notech_inv i_7996(.A(gpioB_dir[4]), .Z(n_5342)); - notech_inv i_7997(.A(gpioB_dir[5]), .Z(n_5343)); - notech_inv i_7998(.A(gpioB_dir[6]), .Z(n_5344)); - notech_inv i_7999(.A(gpioB_dir[7]), .Z(n_5345)); - notech_inv i_8000(.A(rdio_8042[0]), .Z(n_5346)); - notech_inv i_8001(.A(rdio_8042[1]), .Z(n_5347)); - notech_inv i_8002(.A(rdio_8042[3]), .Z(n_5348)); - notech_inv i_8003(.A(rdio_8042[4]), .Z(n_5349)); - notech_inv i_8004(.A(rdio_8042[5]), .Z(n_5350)); - notech_inv i_8005(.A(rdio_8042[6]), .Z(n_5351)); - notech_inv i_8006(.A(rdio_8042[7]), .Z(n_5352)); - notech_inv i_8007(.A(rdio_16750[0]), .Z(n_5353)); - notech_inv i_8008(.A(rdio_16750[1]), .Z(n_5354)); - notech_inv i_8009(.A(rdio_16750[2]), .Z(n_5355)); - notech_inv i_8010(.A(rdio_16750[3]), .Z(n_5356)); - notech_inv i_8011(.A(rdio_16750[4]), .Z(n_5357)); - notech_inv i_8012(.A(rdio_16750[5]), .Z(n_5358)); - notech_inv i_8013(.A(rdio_16750[6]), .Z(n_5359)); - notech_inv i_8014(.A(rdio_16750[7]), .Z(n_5360)); - notech_inv i_8015(.A(gpioB_out[0]), .Z(n_5361)); - notech_inv i_8016(.A(gpioB_out[1]), .Z(n_5362)); - notech_inv i_8017(.A(gpioB_out[2]), .Z(n_5363)); - notech_inv i_8018(.A(gpioB_out[3]), .Z(n_5364)); - notech_inv i_8019(.A(gpioB_out[4]), .Z(n_5365)); - notech_inv i_8020(.A(gpioB_out[5]), .Z(n_5366)); - notech_inv i_8021(.A(gpioB_out[6]), .Z(n_5367)); - notech_inv i_8022(.A(gpioB_out[7]), .Z(n_5368)); - notech_inv i_8023(.A(gpioA_out[0]), .Z(n_5369)); - notech_inv i_8024(.A(gpioA_out[1]), .Z(n_5370)); - notech_inv i_8025(.A(gpioA_out[2]), .Z(n_5371)); - notech_inv i_8026(.A(gpioA_out[4]), .Z(n_5372)); - notech_inv i_8027(.A(gpioA_out[5]), .Z(n_5373)); - notech_inv i_8028(.A(gpioA_out[6]), .Z(n_5374)); - notech_inv i_8029(.A(bit_bang[0]), .Z(n_5375)); - notech_inv i_8030(.A(bit_bang[1]), .Z(n_5376)); - notech_inv i_8031(.A(dat_o_spi_0[0]), .Z(n_5377)); - notech_inv i_8032(.A(dat_o_spi_0[1]), .Z(n_5378)); - notech_inv i_8033(.A(dat_o_spi_0[4]), .Z(n_5379)); - notech_inv i_8034(.A(dat_o_spi_0[5]), .Z(n_5380)); - notech_inv i_8035(.A(dat_o_spi_0[7]), .Z(n_5381)); - notech_inv i_8036(.A(dat_o_spi_0[8]), .Z(n_5382)); - notech_inv i_8037(.A(dat_o_spi_0[9]), .Z(n_5383)); - notech_inv i_8038(.A(dat_o_spi_0[10]), .Z(n_5384)); - notech_inv i_8039(.A(dat_o_spi_0[11]), .Z(n_5385)); - notech_inv i_8040(.A(dat_o_spi_0[12]), .Z(n_5386)); - notech_inv i_8041(.A(dat_o_spi_0[13]), .Z(n_5387)); - notech_inv i_8042(.A(dat_o_spi_0[14]), .Z(n_5388)); - notech_inv i_8043(.A(dat_o_spi_0[15]), .Z(n_5389)); - notech_inv i_8044(.A(dat_o_spi_0[16]), .Z(n_5390)); - notech_inv i_8045(.A(dat_o_spi_0[17]), .Z(n_5391)); - notech_inv i_8046(.A(dat_o_spi_0[18]), .Z(n_5392)); - notech_inv i_8047(.A(dat_o_spi_0[19]), .Z(n_5393)); - notech_inv i_8048(.A(dat_o_spi_0[20]), .Z(n_5394)); - notech_inv i_8049(.A(dat_o_spi_0[21]), .Z(n_5395)); - notech_inv i_8050(.A(dat_o_spi_0[22]), .Z(n_5396)); - notech_inv i_8051(.A(dat_o_spi_0[23]), .Z(n_5397)); - notech_inv i_8052(.A(dat_o_spi_0[24]), .Z(n_5398)); - notech_inv i_8053(.A(dat_o_spi_0[25]), .Z(n_5399)); - notech_inv i_8054(.A(dat_o_spi_0[26]), .Z(n_5400)); - notech_inv i_8055(.A(dat_o_spi_0[27]), .Z(n_5401)); - notech_inv i_8056(.A(dat_o_spi_0[28]), .Z(n_5402)); - notech_inv i_8057(.A(dat_o_spi_0[29]), .Z(n_5403)); - notech_inv i_8058(.A(dat_o_spi_0[30]), .Z(n_5404)); - notech_inv i_8059(.A(dat_o_spi_0[31]), .Z(n_5405)); - notech_inv i_8060(.A(n_8226), .Z(n_3723)); - notech_inv i_8061(.A(pit_irq), .Z(\nbus_110[0] )); - notech_inv i_8062(.A(\io_add[3] ), .Z(n_5408)); - notech_inv i_8063(.A(\io_add[5] ), .Z(n_5409)); - notech_inv i_8064(.A(\io_add[1] ), .Z(n_5410)); - notech_inv i_8065(.A(\io_add[0] ), .Z(n_5411)); - notech_inv i_8066(.A(\io_add[4] ), .Z(n_5412)); - notech_inv i_8068(.A(\io_add[2] ), .Z(n_5414)); - notech_inv i_8069(.A(spi_miso), .Z(n_5415)); - notech_inv i_8070(.A(\rdio_spk[5] ), .Z(n_5416)); - notech_inv i_8071(.A(\rdio_spk[0] ), .Z(n_5417)); - notech_inv i_8072(.A(s00_AXI_ARREADY), .Z(n_5418)); - notech_inv i_8073(.A(s00_AXI_AWREADY), .Z(n_5419)); - notech_inv i_8074(.A(AMBIT_GND), .Z(n_5420)); - v8042 U8042(.rst_n(s00_AXI_RSTN), .clk(s00_AXI_CLK), .io_address({\io_add[2] - , \io_add[1] , \io_add[0] }), .io_read(AMBIT_GND), .io_readdata(rdio_8042 - ), .io_write(AMBIT_GND), .io_writedata({writeio_data[7], n_8019, - n_8011, n_8001, n_7993, n_8029, n_8040, n_8099}), .ps2clk(ps2clk - ), .ps2data(ps2data)); - uart_16750 A16750(.CLK(s00_AXI_CLK), .RST(n_3723), .BAUDCE(clke), .CS(n_3762 - ), .WR(s00_AXI_WREADY), .RD(s00_AXI_ARREADY), .A({\io_add[2] , \io_add[1] - , \io_add[0] }), .DIN({writeio_data[7], n_8019, n_8011, n_8001, n_7993 - , n_8029, n_8040, n_8099}), .DOUT(rdio_16750), .DDIS(), .INT(int_uart - ), .OUT1N(), .OUT2N(), .RCLK(baudout), .BAUDOUTN(baudout), .RTSN - (), .DTRN(), .CTSN(AMBIT_VDD), .DSRN(AMBIT_VDD), .DCDN(AMBIT_VDD - ), .RIN(AMBIT_VDD), .SIN(RXD), .SOUT(TXD)); - tiny_spi uspi_0(.rst_i(n_3723), .clk_i(s00_AXI_CLK), .stb_i(n_5617), .we_i - (we_spi_0), .dat_o(dat_o_spi_0), .dat_i({writeio_data[31], writeio_data - [30], writeio_data[29], writeio_data[28], writeio_data[27], writeio_data - [26], writeio_data[25], writeio_data[24], writeio_data[23], writeio_data - [22], writeio_data[21], writeio_data[20], writeio_data[19], writeio_data - [18], writeio_data[17], writeio_data[16], writeio_data[15], writeio_data - [14], writeio_data[13], writeio_data[12], writeio_data[11], writeio_data - [10], writeio_data[9], writeio_data[8], writeio_data[7], n_8019, - writeio_data[5], writeio_data[4], writeio_data[3], n_8029, n_8040 - , writeio_data[0]}), .adr_i({\io_add[5] , \io_add[4] , \io_add[3] - , \io_add[2] }), .MOSI(mosi), .SCLK(sclk), .MISO(miso), .int_o() - ); - v8253 U8253(.clk(n_8204), .rst_n(n_8226), .irq(pit_irq), .io_address({\io_add[1] - , \io_add[0] }), .io_read(rd_pit), .io_readdata(rdio_pit), .io_write - (wr_pit), .io_writedata({writeio_data[7], n_8019, n_8011, n_8001 - , n_7993, n_8029, n_8040, n_8099}), .port_61h_readdata({ - UNCONNECTED_000, UNCONNECTED_001, \rdio_spk[5] , \rdio_spk[4] , - UNCONNECTED_002, UNCONNECTED_003, \rdio_spk[1] , \rdio_spk[0] }) - , .port_61h_write(wr_spk)); - v8259 U8259(.clk(n_8204), .rst_n(n_8226), .ms_read(rd_pic1), .ms_readdata - (rdio_pic1), .ms_write(wr_pic1), .sl_address(\io_add[0] ), .sl_read - (rd_pic2), .sl_readdata(rdio_pic2), .sl_write(wr_pic2), .sl_writedata - ({writeio_data[7], n_8019, n_8010, n_8001, n_7992, n_8028, n_8039 - , n_8099}), .inter_input({UNCONNECTED_004, UNCONNECTED_005, - UNCONNECTED_006, UNCONNECTED_007, UNCONNECTED_008, - UNCONNECTED_009, UNCONNECTED_010, int_reg[3], int_reg[2], int_reg - [1], int_reg[0], int_uart, UNCONNECTED_011, UNCONNECTED_012, - UNCONNECTED_013, \nbus_110[0] }), .inter_do(int_pic), .inter_vector - (ivect), .inter_done(iack)); - AWDP_DEC_023900 i_2278(.O0(bit_bang_0), .bit_bang(bit_bang)); -endmodule Index: rtl/datacache.v =================================================================== --- rtl/datacache.v (revision 117) +++ rtl/datacache.v (nonexistent) @@ -1,21 +0,0 @@ -/* verilator lint_off UNUSED */ -/* verilator lint_off CASEX */ -/* verilator lint_off PINNOCONNECT */ -/* verilator lint_off PINMISSING */ -/* verilator lint_off IMPLICIT */ -/* verilator lint_off WIDTH */ -/* verilator lint_off CASEINCOMPLETE */ -/* verilator lint_off COMBDLY */ - -module datacache (A,D,Q,WEN,clk); -input [10:0] A; -input [31:0] D; -output reg [31:0] Q; -input clk; -input WEN; -reg [31:0] Mem [2047:0]; - -always @(posedge clk) Q <= Mem[A]; -always @(posedge clk) if (WEN ==0) Mem[A] <= D; - -endmodule Index: rtl/axi_rom.v =================================================================== --- rtl/axi_rom.v (revision 117) +++ rtl/axi_rom.v (nonexistent) @@ -1,101 +0,0 @@ -/* verilator lint_off UNDRIVEN */ -/* verilator lint_off UNUSED */ - -module axi_rom ( -clk,rstn, - -axi_ARVALID, -axi_ARREADY, -axi_AR, -axi_ARBURST, -axi_ARLEN, - -axi_R, -axi_RVALID, -axi_RREADY, -axi_RLAST - -); - -input clk,rstn; - -input axi_ARVALID,axi_RREADY; -output reg axi_ARREADY,axi_RVALID; -output reg axi_RLAST; -input [7:0] axi_ARLEN; -input [1:0] axi_ARBURST; - -output [31:0] axi_R; -input [31:0] axi_AR; - -reg [7:0] Mem [1023:0]; -reg [31:0] Qint; -wire [9:0] A0; -reg [9:0] A1; -reg read_transaction; -reg burst_transaction; -reg [7:0] burstn; -reg [7:0] len; - -assign A0 = {axi_AR[9:2],2'b00}; - -initial -begin -$readmemh("boot.mem" , Mem , 0); -end - -// Read process -always @(posedge clk) Qint[ 7: 0] <= Mem[A1+0]; -always @(posedge clk) Qint[15: 8] <= Mem[A1+1]; -always @(posedge clk) Qint[23:16] <= Mem[A1+2]; -always @(posedge clk) Qint[31:24] <= Mem[A1+3]; -assign axi_R = Qint; - -// control -always @(posedge clk or negedge rstn) -if (~rstn) - begin - axi_ARREADY <=0; - axi_RVALID <=0; - read_transaction <= 0; - burst_transaction <= 0; - burstn <= 0; - axi_RLAST <= 0; - end -else - begin - if (axi_ARVALID & ~read_transaction &~burst_transaction) - begin - axi_ARREADY <=1; - A1 <= A0; - if ((axi_ARLEN != 8'h0) && (axi_ARBURST == 2'b01)) begin len <= axi_ARLEN; burst_transaction <= 1; end else read_transaction <= 1 ; - end - else - begin - axi_ARREADY <=0; - end - - if (axi_RREADY & read_transaction) - begin - axi_RVALID <= 1; - axi_RLAST <= 1; - read_transaction <=0; - end - else - if (axi_RREADY & burst_transaction) - begin - axi_RVALID <=1; - if (burstn == len) begin axi_RLAST <= 1; burst_transaction <=0; end - burstn <= burstn +1; - A1 <= A1 + 4; - end - else - begin - axi_RVALID <=0; axi_RLAST <= 0; burstn <=0; - end - - - end - -endmodule - Index: rtl/tiny_spi.v =================================================================== --- rtl/tiny_spi.v (revision 117) +++ rtl/tiny_spi.v (nonexistent) @@ -1,232 +0,0 @@ -////////////////////////////////////////////////////////////////////// -//// //// -//// tiny_spi.v //// -//// //// -//// This file is part of the TINY SPI IP core project //// -//// http://www.opencores.org/projects/tiny_spi/ //// -//// //// -//// Author(s): //// -//// - Thomas Chou //// -//// //// -//// All additional information is avaliable in the README //// -//// file. //// -//// //// -////////////////////////////////////////////////////////////////////// -//// //// -//// Copyright (C) 2010 Authors //// -//// //// -//// This source file may be used and distributed without //// -//// restriction provided that this copyright statement is not //// -//// removed from the file and that any derivative work contains //// -//// the original copyright notice and the associated disclaimer. //// -//// //// -//// This source file is free software; you can redistribute it //// -//// and/or modify it under the terms of the GNU Lesser General //// -//// Public License as published by the Free Software Foundation; //// -//// either version 2.1 of the License, or (at your option) any //// -//// later version. //// -//// //// -//// This source is distributed in the hope that it will be //// -//// useful, but WITHOUT ANY WARRANTY; without even the implied //// -//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// -//// PURPOSE. See the GNU Lesser General Public License for more //// -//// details. //// -//// //// -//// You should have received a copy of the GNU Lesser General //// -//// Public License along with this source; if not, download it //// -//// from http://www.opencores.org/lgpl.shtml //// -//// //// -////////////////////////////////////////////////////////////////////// - -module tiny_spi( - // system - input rst_i, - input clk_i, - // memory mapped - input stb_i, - input we_i, - output [31:0] dat_o, - input [31:0] dat_i, - output int_o, - input [2:0] adr_i, - //input cyc_i, // comment out for avalon - //output ack_o, // comment out for avalon - - // spi - output MOSI, - output SCLK, - input MISO - ); - - parameter BAUD_WIDTH = 8; - parameter BAUD_DIV = 0; - parameter SPI_MODE = 0; - parameter BC_WIDTH = 3; - parameter DIV_WIDTH = BAUD_DIV ? $clog2(BAUD_DIV / 2 - 1) : BAUD_WIDTH; - - - reg [7:0] sr8, bb8; - wire [7:0] sr8_sf; - reg [BC_WIDTH - 1:0] bc, bc_next; - reg [DIV_WIDTH - 1:0] ccr; - reg [DIV_WIDTH - 1:0] cc, cc_next; - wire misod; - wire cstb, wstb, bstb, istb; - reg sck; - reg sf, ld; - reg bba; // buffer flag - reg txren, txeen; - wire txr, txe; - wire cpol, cpha; - reg cpolr, cphar; - wire wr; - wire cyc_i; // comment out for wishbone - wire ack_o; // comment out for wishbone - assign cyc_i = 1'b1; // comment out for wishbone - assign ack_o = stb_i & cyc_i; // zero wait - assign wr = stb_i & cyc_i & we_i & ack_o; - assign wstb = wr & (adr_i == 1); - assign istb = wr & (adr_i == 2); - assign cstb = wr & (adr_i == 3); - assign bstb = wr & (adr_i == 4); - assign sr8_sf = { sr8[6:0],misod }; - assign dat_o = - (sr8 & {8{(adr_i == 0)}}) - | (bb8 & {8{(adr_i == 1)}}) - | ({ txr, txe } & {8{(adr_i == 2)}}) - ; - - parameter - IDLE = 0, - PHASE1 = 1, - PHASE2 = 2 - ; - - reg [1:0] spi_seq, spi_seq_next; - always @(posedge clk_i or posedge rst_i) - if (rst_i) - spi_seq <= IDLE; - else - spi_seq <= spi_seq_next; - - always @(posedge clk_i) - begin - cc <= cc_next; - bc <= bc_next; - end - - always @(/*AS*/bba or bc or cc or ccr or cpha or cpol or spi_seq) - begin - sck = cpol; - cc_next = BAUD_DIV ? (BAUD_DIV / 2 - 1) : ccr; - bc_next = bc; - ld = 1'b0; - sf = 1'b0; - - case (spi_seq) - IDLE: - begin - if (bba) - begin - bc_next = 7; - ld = 1'b1; - spi_seq_next = PHASE2; - end - else - spi_seq_next = IDLE; - end - PHASE2: - begin - sck = (cpol ^ cpha); - if (cc == 0) - spi_seq_next = PHASE1; - else - begin - cc_next = cc - 1; - spi_seq_next = PHASE2; - end - end - PHASE1: - begin - sck = ~(cpol ^ cpha); - if (cc == 0) - begin - bc_next = bc -1; - sf = 1'b1; - if (bc == 0) - begin - if (bba) - begin - bc_next = 7; - ld = 1'b1; - spi_seq_next = PHASE2; - end - else - spi_seq_next = IDLE; - end - else - spi_seq_next = PHASE2; - end - else - begin - cc_next = cc - 1; - spi_seq_next = PHASE1; - end - end - endcase - end // always @ (... - - always @(posedge clk_i) - begin - if (cstb) // control reg - { cpolr, cphar } <= dat_i; - else - { cpolr, cphar } <= { cpolr, cphar }; - - if (istb) // irq enable reg - { txren, txeen } <= dat_i; - else - { txren, txeen } <= { txren, txeen }; - - if (bstb) // baud reg - ccr <= dat_i; - else - ccr <= ccr; - - if (ld) // shift reg - sr8 <= bb8; - else if (sf) - sr8 <= sr8_sf; - else - sr8 <= sr8; - - if (wstb) // buffer reg - bb8 <= dat_i; - else if (ld) - bb8 <= (spi_seq == IDLE) ? sr8 : sr8_sf; - else - bb8 <= bb8; - end // always @ (posedge clk_i) - - always @(posedge clk_i or posedge rst_i) - begin - if (rst_i) - bba <= 1'b0; - else if (wstb) - bba <= 1'b1; - else if (ld) - bba <= 1'b0; - else - bba <= bba; - end - - assign { cpol, cpha } = ((SPI_MODE >= 0) & (SPI_MODE < 4)) ? - SPI_MODE : { cpolr, cphar }; - assign txe = (spi_seq == IDLE); - assign txr = ~bba; - assign int_o = (txr & txren) | (txe & txeen); - assign SCLK = sck; - assign MOSI = sr8[7]; - assign misod = MISO; - -endmodule Index: rtl/TOP_SYS.v =================================================================== --- rtl/TOP_SYS.v (revision 117) +++ rtl/TOP_SYS.v (nonexistent) @@ -1,567 +0,0 @@ -`define simu -// -module TOP_SYS( -clk100,rstn, -// uart -TXD,RXD, -// DDR2 -DDR2DQ, -DDR2DQS_N, -DDR2DQS_P, -DDR2ADDR, -DDR2BA, -DDR2RAS_N, -DDR2CAS_N, -DDR2WE_N, -DDR2CK_P, -DDR2CK_N, -DDR2CKE, -DDR2CS_N, -DDR2DM, -DDR2ODT, -// spi flash -sdin,sdout,sdwp,sdhld,sdcs,sdreset, -// gpio it87xx -gpioA,gpioB, -// ethernet -PhyMdc, -PhyMdio, -PhyRstn, -PhyCrs, -PhyRxErr, -PhyRxd, -PhyTxEn, -PhyTxd, -PhyClk50Mhz, -// tiny spi -miso, -mosi, -sclk, -aclInt1, -aclInt2, -debug -); - -input clk100; -input rstn; -output TXD; -wire [6:0] gpio_in; - -inout wire [15:0] DDR2DQ; -inout wire [1:0] DDR2DQS_N; -inout wire [1:0] DDR2DQS_P; -output wire [12:0] DDR2ADDR; -output wire [2:0] DDR2BA; -output wire DDR2RAS_N; -output wire DDR2CAS_N; -output wire DDR2WE_N; -output wire DDR2CK_P; -output wire DDR2CK_N; -output wire DDR2CKE; -output wire DDR2CS_N; -output wire [1:0] DDR2DM; -output wire DDR2ODT; - -input RXD; -output sdout,sdwp,sdhld,sdcs; -input sdin; -inout [7:0] gpioA,gpioB; -//input extWAIT; -output reg sdreset; -// tiny spi -output mosi; -input miso; -output sclk; -input aclInt1,aclInt2; - -// ethernet -output PhyMdc; -inout PhyMdio; -wire PhyMdio_t; -wire PhyMdio_o; -wire PhyMdio_i; -wire int_net; - -output PhyRstn; -output PhyCrs; -input PhyRxErr; -input [1:0] PhyRxd; -output PhyTxEn; -output [1:0] PhyTxd; -output reg PhyClk50Mhz; - -output reg [3:0] debug; - -wire [4:0] debug_int; - -wire rmii2mac_tx_clk; -wire rmii2mac_rx_clk; -wire rmii2mac_crs; -wire rmii2mac_rx_dv; -wire [3:0] rmii2mac_rxd; -wire rmii2mac_col; -wire rmii2mac_rx_er; -wire mac2rmii_tx_en; -wire [3:0] mac2rmii_txd; -wire mac2rmii_tx_er; - -// axi cpu bus -wire [31:0] M_AXI_AW, M_AXI_AR; -wire M_AXI_AWVALID,M_AXI_ARVALID,M_AXI_WVALID,M_AXI_RREADY; -wire M_AXI_AWREADY,M_AXI_ARREADY,M_AXI_WREADY,M_AXI_RVALID,M_AXI_RLAST,M_AXI_WLAST; -wire [31:0] M_AXI_R; -wire [31:0] M_AXI_W; -wire [3:0] M_AXI_WSTRB; -wire [1:0] M_AXI_ARBURST; -wire [7:0] M_AXI_ARLEN; -wire [2:0] M_AXI_ARSIZE; -wire [1:0] M_AXI_AWBURST; -wire [7:0] M_AXI_AWLEN; -wire [2:0] M_AXI_AWSIZE; - -// axi ram bus -wire [31:0] S_AXI_AW_ram, S_AXI_AR_ram; -wire S_AXI_AWVALID_ram,S_AXI_ARVALID_ram,S_AXI_WVALID_ram,S_AXI_RREADY_ram; -wire S_AXI_AWREADY_ram,S_AXI_ARREADY_ram,S_AXI_WREADY_ram,S_AXI_RVALID_ram,S_AXI_RLAST_ram,S_AXI_WLAST_ram; -wire [31:0] S_AXI_R_ram; -wire [31:0] S_AXI_W_ram; -wire [3:0] S_AXI_WSTRB_ram; -wire [1:0] S_AXI_ARBURST_ram; -wire [7:0] S_AXI_ARLEN_ram; -wire [2:0] S_AXI_ARSIZE_ram; -wire [1:0] S_AXI_AWBURST_ram; -wire [7:0] S_AXI_AWLEN_ram; -wire [2:0] S_AXI_AWSIZE_ram; - -// axi rom bus -wire [31:0] S_AXI_AW_rom, S_AXI_AR_rom; -wire S_AXI_AWVALID_rom,S_AXI_ARVALID_rom,S_AXI_WVALID_rom,S_AXI_RREADY_rom; -wire S_AXI_AWREADY_rom,S_AXI_ARREADY_rom,S_AXI_WREADY_rom,S_AXI_RVALID_rom,S_AXI_RLAST_rom,S_AXI_WLAST_rom; -wire [31:0] S_AXI_R_rom; -wire [31:0] S_AXI_W_rom; -wire [3:0] S_AXI_WSTRB_rom; -wire [1:0] S_AXI_ARBURST_rom; -wire [7:0] S_AXI_ARLEN_rom; -wire [2:0] S_AXI_ARSIZE_rom; -wire [1:0] S_AXI_AWBURST_rom; -wire [7:0] S_AXI_AWLEN_rom; -wire [2:0] S_AXI_AWSIZE_rom; - -// axi net bus -wire [31:0] S_AXI_AW_net, S_AXI_AR_net; -wire S_AXI_AWVALID_net,S_AXI_ARVALID_net,S_AXI_WVALID_net,S_AXI_RREADY_net; -wire S_AXI_AWREADY_net,S_AXI_ARREADY_net,S_AXI_WREADY_net,S_AXI_RVALID_net,S_AXI_RLAST_net,S_AXI_WLAST_net; -wire [31:0] S_AXI_R_net; -wire [31:0] S_AXI_W_net; -wire [3:0] S_AXI_WSTRB_net; -wire [1:0] S_AXI_ARBURST_net; -wire [7:0] S_AXI_ARLEN_net; -wire [2:0] S_AXI_ARSIZE_net; -wire [1:0] S_AXI_AWBURST_net; -wire [7:0] S_AXI_AWLEN_net; -wire [2:0] S_AXI_AWSIZE_net; - -// axi io bus -wire [31:0] M_IO_AXI_AW, M_IO_AXI_AR; -wire M_IO_AXI_AWVALID,M_IO_AXI_ARVALID,M_IO_AXI_WVALID,M_IO_AXI_RREADY; -wire M_IO_AXI_AWREADY,M_IO_AXI_ARREADY,M_IO_AXI_WREADY,M_IO_AXI_RVALID,M_IO_AXI_RLAST,M_IO_AXI_WLAST; -wire [31:0] M_IO_AXI_R; -wire [31:0] M_IO_AXI_W; -wire [3:0] M_IO_AXI_WSTRB; -wire [1:0] M_IO_AXI_ARBURST; -wire [3:0] M_IO_AXI_ARLEN; -wire [2:0] M_IO_AXI_ARSIZE; -wire [1:0] M_IO_AXI_AWBURST; -wire [7:0] M_IO_AXI_AWLEN; -wire [2:0] M_IO_AXI_AWSIZE; - -wire [15:0] extDBo,extDBt; - -wire [7:0] gpioA_dir,gpioB_dir,gpioA_out,gpioB_out; -wire [31:0] romA,romQ; - -wire int_pic,iack; -wire [7:0] ivect; -wire clk; -wire clk200; -wire dram_rst_out; -wire ui_clk_sync_rst; -wire init_calib_complete; -wire rstn_ddr; -wire locked; - -assign gpio_in = 0; - -clk_wiz_0 i_clk_wiz_0 - (.clk_in1(clk100), - .clk_out1(), - .clk_out2(), - .clk_out3(clk200), - .locked(locked) - ); - -always @(posedge clk200) debug <= debug_int[3:0]; - -RSTGEN rstgen(.CLK(clk200), .RST_X_I(~(~rstn | dram_rst_out)), .RST_X_O(rstn_ddr)); - -assign dram_rst_out = (ui_clk_sync_rst | ~init_calib_complete); - -STARTUPE2 #( - .PROG_USR("FALSE"), // Activate program event security feature. Requires encrypted bitstreams. - .SIM_CCLK_FREQ(0.0) // Set the Configuration Clock Frequency(ns) for simulation. -) -STARTUPE2_inst ( - .CFGCLK(), // 1-bit output: Configuration main clock output - .CFGMCLK(), // 1-bit output: Configuration internal oscillator clock output - .EOS(), // 1-bit output: Active high output signal indicating the End Of Startup. - .PREQ(), // 1-bit output: PROGRAM request to fabric output - .CLK(1'b0), // 1-bit input: User start-up clock input - .GSR(1'b0), // 1-bit input: Global Set/Reset input (GSR cannot be used for the port name) - .GTS(1'b0), // 1-bit input: Global 3-state input (GTS cannot be used for the port name) - .KEYCLEARB(1'b0), // 1-bit input: Clear AES Decrypter Key input from Battery-Backed RAM (BBRAM) - .PACK(1'b0), // 1-bit input: PROGRAM acknowledge input - .USRCCLKO(sdclk), // 1-bit input: User CCLK input - .USRCCLKTS(1'b0), // 1-bit input: User CCLK 3-state enable input - .USRDONEO(1'b1), // 1-bit input: User DONE pin output control - .USRDONETS(1'b1) // 1-bit input: User DONE 3-state enable output -); - -v586 v586 ( -.m00_AXI_RSTN(rstn_ddr),.m00_AXI_CLK(clk), -// axi interface 32bit -.m00_AXI_AWADDR(M_AXI_AW), .m00_AXI_AWVALID(M_AXI_AWVALID), .m00_AXI_AWREADY(M_AXI_AWREADY), -.m00_AXI_AWBURST(M_AXI_AWBURST), .m00_AXI_AWLEN(M_AXI_AWLEN), .m00_AXI_AWSIZE(M_AXI_AWSIZE), -.m00_AXI_WDATA(M_AXI_W), .m00_AXI_WVALID(M_AXI_WVALID), .m00_AXI_WREADY(M_AXI_WREADY), .m00_AXI_WSTRB(M_AXI_WSTRB), .m00_AXI_WLAST(M_AXI_WLAST), -.m00_AXI_ARADDR(M_AXI_AR), .m00_AXI_ARVALID(M_AXI_ARVALID), .m00_AXI_ARREADY(M_AXI_ARREADY), -.m00_AXI_ARBURST(M_AXI_ARBURST), .m00_AXI_ARLEN(M_AXI_ARLEN), .m00_AXI_ARSIZE(M_AXI_ARSIZE), -.m00_AXI_RDATA(M_AXI_R), .m00_AXI_RVALID(M_AXI_RVALID), .m00_AXI_RREADY(M_AXI_RREADY), .m00_AXI_RLAST(M_AXI_RLAST), -.m00_AXI_BVALID(1'b1),.m00_AXI_BREADY(M_AXI_BREADY), -// axi io interface 32bit -.m01_AXI_AWADDR(M_IO_AXI_AW), .m01_AXI_AWVALID(M_IO_AXI_AWVALID), .m01_AXI_AWREADY(M_IO_AXI_AWREADY), -.m01_AXI_AWBURST(M_IO_AXI_AWBURST), .m01_AXI_AWLEN(M_IO_AXI_AWLEN), .m01_AXI_AWSIZE(M_IO_AXI_AWSIZE), -.m01_AXI_WDATA(M_IO_AXI_W), .m01_AXI_WVALID(M_IO_AXI_WVALID), .m01_AXI_WREADY(M_IO_AXI_WREADY), .m01_AXI_WSTRB(M_IO_AXI_WSTRB), .m01_AXI_WLAST(M_IO_AXI_WLAST), -.m01_AXI_ARADDR(M_IO_AXI_AR), .m01_AXI_ARVALID(M_IO_AXI_ARVALID), .m01_AXI_ARREADY(M_IO_AXI_ARREADY), -.m01_AXI_ARBURST(M_IO_AXI_ARBURST), .m01_AXI_ARLEN(M_IO_AXI_ARLEN), .m01_AXI_ARSIZE(M_IO_AXI_ARSIZE), -.m01_AXI_RDATA(M_IO_AXI_R), .m01_AXI_RVALID(M_IO_AXI_RVALID), .m01_AXI_RREADY(M_IO_AXI_RREADY), .m01_AXI_RLAST(M_IO_AXI_RLAST), -.m01_AXI_BVALID(1'b1),.m01_AXI_BREADY(M_IO_AXI_BREADY), -// interrupts -.int_pic(int_pic),.ivect(ivect),.iack(iack), .debug(debug_int) -); - - -ddr_axi i_ddr_axi ( - // Inouts - .ddr2_dq(DDR2DQ), - .ddr2_dqs_n(DDR2DQS_N), - .ddr2_dqs_p(DDR2DQS_P), - // Outputs - .ddr2_addr(DDR2ADDR), - .ddr2_ba(DDR2BA), - .ddr2_ras_n(DDR2RAS_N), - .ddr2_cas_n(DDR2CAS_N), - .ddr2_we_n(DDR2WE_N), - .ddr2_ck_p(DDR2CK_P), - .ddr2_ck_n(DDR2CK_N), - .ddr2_cke(DDR2CKE), - .ddr2_cs_n(DDR2CS_N), - .ddr2_dm(DDR2DM), - .ddr2_odt(DDR2ODT), - - // Inputs - // Single-ended system clock - .sys_clk_i(clk200), - // Single-ended iodelayctrl clk (reference clock) - .clk_ref_i(clk200), - // user interface signals - .ui_clk(clk), - .ui_clk_sync_rst(ui_clk_sync_rst), - .mmcm_locked(), - .aresetn(rstn), - .app_sr_req(0), - .app_ref_req(0), - .app_zq_req(0), - .app_sr_active(), - .app_ref_ack(), - .app_zq_ack(), -// AXI - // AW CHANNEL - .s_axi_awid(4'b00), - .s_axi_awaddr(S_AXI_AW_ram), - .s_axi_awlen(S_AXI_AWLEN_ram), - .s_axi_awsize(S_AXI_AWSIZE_ram), - .s_axi_awburst(S_AXI_AWBURST_ram), - .s_axi_awlock(1'b0), - .s_axi_awcache(4'h0), - .s_axi_awprot(3'h0), - .s_axi_awqos(4'h0), - .s_axi_awvalid(S_AXI_AWVALID_ram), - .s_axi_awready(S_AXI_AWREADY_ram), - // W CHANNEL - .s_axi_wdata(S_AXI_W_ram), - .s_axi_wstrb(S_AXI_WSTRB_ram), - .s_axi_wlast(S_AXI_WLAST_ram), - .s_axi_wvalid(S_AXI_WVALID_ram), - .s_axi_wready(S_AXI_WREADY_ram), - // B CHANNEL - .s_axi_bid(), - .s_axi_bresp(), - .s_axi_bvalid(), - .s_axi_bready(1'b1), - // AR CHANNEL - .s_axi_arid(4'b0), - .s_axi_araddr(S_AXI_AR_ram), - .s_axi_arlen(S_AXI_ARLEN_ram), - .s_axi_arsize(S_AXI_ARSIZE_ram), - .s_axi_arburst(S_AXI_ARBURST_ram), - .s_axi_arlock(1'b0), - .s_axi_arcache(4'h0), - .s_axi_arprot(3'h0), - .s_axi_arqos(4'h0), - .s_axi_arvalid(S_AXI_ARVALID_ram), - .s_axi_arready(S_AXI_ARREADY_ram), - // R CHANNEL - .s_axi_rid(), - .s_axi_rdata(S_AXI_R_ram), - .s_axi_rresp(), - .s_axi_rlast(S_AXI_RLAST_ram), - .s_axi_rvalid(S_AXI_RVALID_ram), - .s_axi_rready(S_AXI_RREADY_ram), - - .init_calib_complete(init_calib_complete), - .sys_rst(~locked) - ); - -axi_rom bootrom ( - .clk(clk), - .rstn(rstn_ddr), - .axi_ARVALID(S_AXI_ARVALID_rom), - .axi_ARREADY(S_AXI_ARREADY_rom), - .axi_AR(S_AXI_AR_rom), - .axi_ARBURST(S_AXI_ARBURST_rom), - .axi_ARLEN(S_AXI_ARLEN_rom), - .axi_RLAST(S_AXI_RLAST_rom), - .axi_R(S_AXI_R_rom), - .axi_RVALID(S_AXI_RVALID_rom), - .axi_RREADY(S_AXI_RREADY_rom) - ); - -axi_ethernetlite_0 i_etherlite ( - .s_axi_aclk(clk), - .s_axi_aresetn(rstn_ddr), - - .ip2intc_irpt(int_net), - - .s_axi_awid(4'b000), - .s_axi_awaddr(S_AXI_AW_net[12:0]), - .s_axi_awlen(S_AXI_AWLEN_net), - .s_axi_awsize(S_AXI_AWSIZE_net), - .s_axi_awburst(S_AXI_AWBURST_net), - .s_axi_awcache(4'b0000), - .s_axi_awvalid(S_AXI_AWVALID_net), - .s_axi_awready(S_AXI_AWREADY_net), - .s_axi_wdata(S_AXI_W_net), - .s_axi_wstrb(S_AXI_WSTRB_net), - .s_axi_wlast(S_AXI_WLAST_net), - .s_axi_wvalid(S_AXI_WVALID_net), - .s_axi_wready(S_AXI_WREADY_net), - .s_axi_bid(), - .s_axi_bresp(), - .s_axi_bvalid(), - .s_axi_bready(1'b1), - .s_axi_arid(4'b0), - .s_axi_araddr(S_AXI_AR_net[12:0]), - .s_axi_arlen(S_AXI_ARLEN_net), - .s_axi_arsize(S_AXI_ARSIZE_net), - .s_axi_arburst(S_AXI_ARBURST_net), - .s_axi_arcache(4'b0), - .s_axi_arvalid(S_AXI_ARVALID_net), - .s_axi_arready(S_AXI_ARREADY_net), - .s_axi_rid(), - .s_axi_rdata(S_AXI_R_net), - .s_axi_rresp(), - .s_axi_rlast(S_AXI_RLAST_net), - .s_axi_rvalid(S_AXI_RVALID_net), - .s_axi_rready(S_AXI_RREADY_net), - // to RMII converter - .phy_tx_clk(rmii2mac_tx_clk), - .phy_rx_clk(rmii2mac_rx_clk), - .phy_crs(rmii2mac_crs), - .phy_dv(rmii2mac_rx_dv), - .phy_rx_data(rmii2mac_rxd), - .phy_tx_data(mac2rmii_txd), - .phy_col(rmii2mac_col), - .phy_rx_er(rmii2mac_rx_er), - .phy_tx_en(mac2rmii_tx_en), - - //.phy_tx_data(PhyTxd), - .phy_rst_n(PhyRstn), - .phy_mdio_i(PhyMdio_i), - .phy_mdio_o(PhyMdio_o), - .phy_mdio_t(PhyMdio_t), - .phy_mdc(PhyMdc) - ); - - IOBUF i_iobuf_mdio( - .O(PhyMdio_i), - .IO(PhyMdio), - .I(PhyMdio_o), - .T(PhyMdio_t)); - -axi_crossbar_0 i_axi_crossbar_0 ( - .aclk(clk), - .aresetn(rstn_ddr), - - .m_axi_awaddr({S_AXI_AW_net,S_AXI_AW_rom,S_AXI_AW_ram}), - .m_axi_awlen({S_AXI_AWLEN_net,S_AXI_AWLEN_rom,S_AXI_AWLEN_ram}), - .m_axi_awsize({S_AXI_AWSIZE_net,S_AXI_AWSIZE_rom,S_AXI_AWSIZE_ram}), - .m_axi_awburst({S_AXI_AWBURST_net,S_AXI_AWBURST_rom,S_AXI_AWBURST_ram}), - .m_axi_awlock(), - .m_axi_awcache(), - .m_axi_awprot(), - .m_axi_awqos(), - .m_axi_awuser(), - .m_axi_awvalid({S_AXI_AWVALID_net,S_AXI_AWVALID_rom,S_AXI_AWVALID_ram}), - .m_axi_awready({S_AXI_AWREADY_net,1'b1,S_AXI_AWREADY_ram}), - - .m_axi_wdata({S_AXI_W_net,S_AXI_W_rom,S_AXI_W_ram}), - .m_axi_wstrb({S_AXI_WSTRB_net,S_AXI_WSTRB_rom,S_AXI_WSTRB_ram}), - .m_axi_wlast({S_AXI_WLAST_net,S_AXI_WLAST_rom,S_AXI_WLAST_ram}), - .m_axi_wuser(), - .m_axi_wvalid({S_AXI_WVALID_net,S_AXI_WVALID_rom,S_AXI_WVALID_ram}), - .m_axi_wready({S_AXI_WREADY_net,1'b1,S_AXI_WREADY_ram}), - - .m_axi_bresp(0), - .m_axi_buser(0), - .m_axi_bvalid(3'b111), - .m_axi_bready(), - - .m_axi_araddr({S_AXI_AR_net,S_AXI_AR_rom,S_AXI_AR_ram}), - .m_axi_arlen({S_AXI_ARLEN_net,S_AXI_ARLEN_rom,S_AXI_ARLEN_ram}), - .m_axi_arsize({S_AXI_ARSIZE_net,S_AXI_ARSIZE_rom,S_AXI_ARSIZE_ram}), - .m_axi_arburst({S_AXI_ARBURST_net,S_AXI_ARBURST_rom,S_AXI_ARBURST_ram}), - .m_axi_arlock(), - .m_axi_arcache(), - .m_axi_arprot(), - .m_axi_arqos(), - .m_axi_aruser(), - .m_axi_arvalid({S_AXI_ARVALID_net,S_AXI_ARVALID_rom,S_AXI_ARVALID_ram}), - .m_axi_arready({S_AXI_ARREADY_net,S_AXI_ARREADY_rom,S_AXI_ARREADY_ram}), - - .m_axi_rdata({S_AXI_R_net,S_AXI_R_rom,S_AXI_R_ram}), - .m_axi_rresp(6'b0), - .m_axi_rlast({S_AXI_RLAST_net,S_AXI_RLAST_rom,S_AXI_RLAST_ram}), - .m_axi_ruser(12'b0), - .m_axi_rvalid({S_AXI_RVALID_net,S_AXI_RVALID_rom,S_AXI_RVALID_ram}), - .m_axi_rready({S_AXI_RREADY_net,S_AXI_RREADY_rom,S_AXI_RREADY_ram}), - - .s_axi_awaddr(M_AXI_AW), .s_axi_awvalid(M_AXI_AWVALID), .s_axi_awready(M_AXI_AWREADY), - .s_axi_awburst(M_AXI_AWBURST), .s_axi_awlen(M_AXI_AWLEN), .s_axi_awsize(M_AXI_AWSIZE), - .s_axi_wdata(M_AXI_W), .s_axi_wvalid(M_AXI_WVALID), .s_axi_wready(M_AXI_WREADY), .s_axi_wstrb(M_AXI_WSTRB), .s_axi_wlast(M_AXI_WLAST), - .s_axi_araddr(M_AXI_AR), .s_axi_arvalid(M_AXI_ARVALID), .s_axi_arready(M_AXI_ARREADY), - .s_axi_arburst(M_AXI_ARBURST), .s_axi_arlen(M_AXI_ARLEN), .s_axi_arsize(M_AXI_ARSIZE), - .s_axi_rdata(M_AXI_R), .s_axi_rvalid(M_AXI_RVALID), .s_axi_rready(M_AXI_RREADY), .s_axi_rlast(M_AXI_RLAST), - .s_axi_bvalid(),.s_axi_bready(1'b1), - .s_axi_arlock(0), .s_axi_arcache(0),.s_axi_arprot(0), .s_axi_arqos(0), .s_axi_aruser(0), - .s_axi_awlock(0), .s_axi_awcache(0),.s_axi_awprot(0), .s_axi_awqos(0), .s_axi_awuser(0), - .s_axi_wuser(0) -); - - -always @(posedge clk) if (rstn_ddr == 0) sdreset <=1; else sdreset <=0; -always @(posedge clk) if (rstn_ddr == 0) PhyClk50Mhz <=0; else PhyClk50Mhz <=~PhyClk50Mhz; - -assign gpioA[0] = (gpioA_dir[0] == 0) ? 1'bz : gpioA_out[0]; -assign gpioA[1] = (gpioA_dir[1] == 0) ? 1'bz : gpioA_out[1]; -assign gpioA[2] = (gpioA_dir[2] == 0) ? 1'bz : gpioA_out[2]; -assign gpioA[3] = (gpioA_dir[3] == 0) ? 1'bz : gpioA_out[3]; -assign gpioA[4] = (gpioA_dir[4] == 0) ? 1'bz : gpioA_out[4]; -assign gpioA[5] = (gpioA_dir[5] == 0) ? 1'bz : gpioA_out[5]; -assign gpioA[6] = (gpioA_dir[6] == 0) ? 1'bz : gpioA_out[6]; -assign gpioA[7] = (gpioA_dir[7] == 0) ? 1'bz : gpioA_out[7]; -assign gpioB[0] = (gpioB_dir[0] == 0) ? 1'bz : gpioB_out[0]; -assign gpioB[1] = (gpioB_dir[1] == 0) ? 1'bz : gpioB_out[1]; -assign gpioB[2] = (gpioB_dir[2] == 0) ? 1'bz : gpioB_out[2]; -assign gpioB[3] = (gpioB_dir[3] == 0) ? 1'bz : gpioB_out[3]; -assign gpioB[4] = (gpioB_dir[4] == 0) ? 1'bz : gpioB_out[4]; -assign gpioB[5] = (gpioB_dir[5] == 0) ? 1'bz : gpioB_out[5]; -assign gpioB[6] = (gpioB_dir[6] == 0) ? 1'bz : gpioB_out[6]; -assign gpioB[7] = (gpioB_dir[7] == 0) ? 1'bz : gpioB_out[7]; -assign sdwp = 1'b1; -assign sdhld = 1'b1; - -periph i_periph ( -.s00_AXI_RSTN(rstn_ddr), -.s00_AXI_CLK(clk), -.cfg(gpio_in[6:0]), -// spi -.spi_mosi(sdout), -.spi_miso(sdin), -.spi_clk(sdclk), -.spi_cs(sdcs), -// tiny spi -.mosi(mosi), -.miso(miso), -.sclk(sclk), -// interrupts -.int_pic(int_pic), -.iack(iack), -.ivect(ivect), -.int_bus({aclInt2,aclInt1,int_net,1'b0}), -// gpio -.gpioA_in(gpioA),.gpioB_in(gpioB), -.gpioA_out(gpioA_out),.gpioB_out(gpioB_out), -.gpioA_dir(gpioA_dir),.gpioB_dir(gpioB_dir), -//uart -.RXD(RXD), -.TXD(TXD), -// AXI4 IO 32 BIT BUS -.s00_AXI_AWADDR(M_IO_AXI_AW), -.s00_AXI_AWVALID(M_IO_AXI_AWVALID), -.s00_AXI_AWREADY(M_IO_AXI_AWREADY), -.s00_AXI_AWBURST(M_IO_AXI_AWBURST), -.s00_AXI_AWLEN(M_IO_AXI_AWLEN), -.s00_AXI_AWSIZE(M_IO_AXI_AWSIZE), -.s00_AXI_ARADDR(M_IO_AXI_AR), -.s00_AXI_ARVALID(M_IO_AXI_ARVALID), -.s00_AXI_ARREADY(M_IO_AXI_ARREADY), -.s00_AXI_ARBURST(M_IO_AXI_ARBURST), -.s00_AXI_ARLEN(M_IO_AXI_ARLEN), -.s00_AXI_ARSIZE(M_IO_AXI_ARSIZE), -.s00_AXI_WDATA(M_IO_AXI_W), -.s00_AXI_WVALID(M_IO_AXI_WVALID), -.s00_AXI_WREADY(M_IO_AXI_WREADY), -.s00_AXI_WSTRB(M_IO_AXI_WSTRB), -.s00_AXI_WLAST(M_IO_AXI_WLAST), -.s00_AXI_RDATA(M_IO_AXI_R), -.s00_AXI_RVALID(M_IO_AXI_RVALID), -.s00_AXI_RREADY(M_IO_AXI_RREADY), -.s00_AXI_RLAST(M_IO_AXI_RLAST), -.s00_AXI_BVALID(), -.s00_AXI_BREADY(1'b1) -); - -`ifndef simu -mii_to_rmii_0 mii_to_rmii_i ( - .rst_n(PhyRstn), - .ref_clk(PhyClk50Mhz), - // to/from mac - .mac2rmii_tx_en(mac2rmii_tx_en), - .mac2rmii_txd(mac2rmii_txd), - .mac2rmii_tx_er(mac2rmii_tx_er), - .rmii2mac_tx_clk(rmii2mac_tx_clk), - .rmii2mac_rx_clk(rmii2mac_rx_clk), - .rmii2mac_col(rmii2mac_col), - .rmii2mac_crs(rmii2mac_crs), - .rmii2mac_rx_dv(rmii2mac_rx_dv), - .rmii2mac_rx_er(rmii2mac_rx_er), - .rmii2mac_rxd(rmii2mac_rxd), - // external connections - .phy2rmii_crs_dv(PhyCrs), - .phy2rmii_rx_er(PhyRxErr), - .phy2rmii_rxd(PhyRxd), - .rmii2phy_txd(PhyTxd), - .rmii2phy_tx_en(PhyTxEn) - ); -`endif - -endmodule Index: rtl/rstgen.v =================================================================== --- rtl/rstgen.v (revision 117) +++ rtl/rstgen.v (nonexistent) @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2015, Arch Labolatory - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -module RSTGEN(CLK, RST_X_I, RST_X_O); - input CLK, RST_X_I; - output RST_X_O; - - reg [7:0] cnt; - assign RST_X_O = cnt[7]; - - always @(posedge CLK or negedge RST_X_I) begin - if (!RST_X_I) cnt <= 0; - else if (~RST_X_O) cnt <= (cnt + 1'b1); - end -endmodule Index: xci/ddr/mig_a.prj =================================================================== --- xci/ddr/mig_a.prj (revision 117) +++ xci/ddr/mig_a.prj (nonexistent) @@ -1,127 +0,0 @@ - - - - ddr_axi - 1 - 1 - OFF - 1024 - ON - Enabled - xc7a100t-csg324/-1 - 2.3 - No Buffer - No Buffer - ACTIVE HIGH - FALSE - 1 - 50 Ohms - 0 - - DDR2_SDRAM/Components/MT47H64M16HR-25E - 5000 - 1.8V - 2:1 - - 0 - 1200 - 1.000 - 1 - 1 - 1 - 1 - 16 - 1 - 1 - Disabled - Strict - FALSE - - 13 - 10 - 3 - BANK_ROW_COLUMN - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8 - Sequential - 3 - Normal - No - Fast exit - 3 - Enable-Normal - Fullstrength - Enable - 1 - 50ohms - 0 - OCD Exit - Enable - Disable - Enable - AXI - - RD_PRI_REG - 27 - 32 - 4 - 0 - - - -

xci/ddr/mig_a.prj Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: xci/ddr/mig_b.prj =================================================================== --- xci/ddr/mig_b.prj (revision 117) +++ xci/ddr/mig_b.prj (nonexistent) @@ -1,127 +0,0 @@ - - - - ddr_axi - 1 - 1 - OFF - 1024 - ON - Enabled - xc7a100t-csg324/-1 - 2.3 - No Buffer - No Buffer - ACTIVE HIGH - FALSE - 1 - 50 Ohms - 0 - - DDR2_SDRAM/Components/MT47H64M16HR-25E - 5000 - 1.8V - 2:1 - - 0 - 1200 - 1.000 - 1 - 1 - 1 - 1 - 16 - 1 - 1 - Disabled - Strict - FALSE - - 13 - 10 - 3 - BANK_ROW_COLUMN - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8 - Sequential - 3 - Normal - No - Fast exit - 3 - Enable-Normal - Fullstrength - Enable - 1 - 50ohms - 0 - OCD Exit - Enable - Disable - Enable - AXI - - RD_PRI_REG - 27 - 32 - 4 - 0 - - - -

xci/ddr/mig_b.prj Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: xci/ddr/mig.ucf =================================================================== --- xci/ddr/mig.ucf (revision 117) +++ xci/ddr/mig.ucf (nonexistent) @@ -1,46 +0,0 @@ -NET "ddr2_dq[0]" LOC = "R7" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[1]" LOC = "V6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[2]" LOC = "R8" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[3]" LOC = "U7" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[4]" LOC = "V7" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[5]" LOC = "R6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[6]" LOC = "U6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[7]" LOC = "R5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[8]" LOC = "T5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[9]" LOC = "U3" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[10]" LOC = "V5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[11]" LOC = "U4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[12]" LOC = "V4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[13]" LOC = "T4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[14]" LOC = "V1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dq[15]" LOC = "T3" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dm[0]" LOC = "T6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dm[1]" LOC = "U1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_dqs_p[0]" LOC = "U9" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_dqs_n[0]" LOC = "V9" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_dqs_p[1]" LOC = "U2" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_dqs_n[1]" LOC = "V2" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_addr[12]" LOC = "N6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[11]" LOC = "K5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[10]" LOC = "R2" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[9]" LOC = "N5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[8]" LOC = "L4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[7]" LOC = "N1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[6]" LOC = "M2" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[5]" LOC = "P5" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[4]" LOC = "L3" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[3]" LOC = "T1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[2]" LOC = "M6" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[1]" LOC = "P4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_addr[0]" LOC = "M4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_ba[2]" LOC = "R1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_ba[1]" LOC = "P3" | IOSTANDARD = SSTL18_II ; -NET "ddr2_ba[0]" LOC = "P2" | IOSTANDARD = SSTL18_II ; -NET "ddr2_ck_p[0]" LOC = "L6" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_ck_n[0]" LOC = "L5" | IOSTANDARD = DIFF_SSTL18_II ; -NET "ddr2_ras_n" LOC = "N4" | IOSTANDARD = SSTL18_II ; -NET "ddr2_cas_n" LOC = "L1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_we_n" LOC = "N2" | IOSTANDARD = SSTL18_II ; -NET "ddr2_cke[0]" LOC = "M1" | IOSTANDARD = SSTL18_II ; -NET "ddr2_odt[0]" LOC = "M3" | IOSTANDARD = SSTL18_II ; -NET "ddr2_cs_n[0]" LOC = "K6" | IOSTANDARD = SSTL18_II ; Index: xci/ddr/ddr_axi.xci =================================================================== --- xci/ddr/ddr_axi.xci (revision 117) +++ xci/ddr/ddr_axi.xci (nonexistent) @@ -1,1196 +0,0 @@ - - - xilinx.com - xci - unknown - 1.0 - - - ddr_axi - - - mig_a.prj - Custom - Custom - Custom - ddr_axi - 1 - 0 - NOBUF - DDR2 - INTERNAL - ACTIVE_HIGH - FALSE - NOBUF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 16 - 2 - 13 - 3 - 1 - 1 - 1 - 1 - 2 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 27 - 2 - 16 - 8 - 2 - 8 - 100000000 - 0.000 - FALSE - 1200 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 134217728 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - DDR3 - FALSE - DIFF - 0 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 8 - 1 - 14 - 3 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - OFF - 1 - OFF - 1 - OFF - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 8 - 2 - 8 - 100.0 - 0.000 - FALSE - 1200.0 - 10.0 - 10 - 10 - 10 - 10 - FALSE - FALSE - FALSE - FALSE - FALSE - 4 - 32 - 32 - 1048576 - 4 - 32 - 32 - 1048576 - 1 - 18 - 29 - 8 - OFF - 1 - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 8 - 1 - 1 - 1 - 2 - 1 - OFF - 1 - 18 - 29 - 2 - 1 - 1 - 1 - 29 - 1 - 1 - 29 - 1 - ACTIVE_LOW - artix7 - xc7a100t - csg324 - -1 - C - - VERILOG - MIXED - TRUE - TRUE - digilentinc.com:nexys4_ddr:part0:1.1 - TRUE - 2015.2 - 2 - OUT_OF_CONTEXT - - . - . - IP_Flow - - - - - - - - - - - - - - Index: xci/crossbar/axi_crossbar_0.xci =================================================================== --- xci/crossbar/axi_crossbar_0.xci (revision 117) +++ xci/crossbar/axi_crossbar_0.xci (nonexistent) @@ -1,1395 +0,0 @@ - - - xilinx.com - xci - unknown - 1.0 - - - axi_crossbar_0 - - - 6 - 1 - 3 - 32 - 0 - AXI4 - 32 - SAMD - 0 - 4 - 4 - 4 - 4 - 4 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0x00000000 - 0x00000001 - 0x00000002 - 0x00000003 - 0x00000004 - 0x00000005 - 0x00000006 - 0x00000007 - 0x00000008 - 0x00000009 - 0x0000000a - 0x0000000b - 0x0000000c - 0x0000000d - 0x0000000e - 0x0000000f - 0x0000000000000000 - 0x0000000000100000 - 0x0000000000200000 - 0x0000000000400000 - 0x0000000000800000 - 0x0000000000080000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x00000000000ff000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000040e00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000300000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000400000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000500000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000600000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000700000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000800000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000900000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000a00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000b00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000c00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000d00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000e00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000f00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 19 - 20 - 21 - 22 - 23 - 18 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 16 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - axi_crossbar_0 - artix7 - 1 - 3 - 1 - 32 - 32 - 0 - 6 - 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff00000000000ff000000000000008000000000000008000000000000000400000000000000020000000000000001000000000000000000000 - 0x00000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000c000000120000001700000016000000150000001400000013 - 0x00000000 - 0x00000000 - 1 - 4 - 4 - 4 - 4 - 4 - 0x000000010000000100000001 - 0x000000010000000100000001 - 0 - 0x00000001 - 0x00000002 - 0x00000002 - 0x000000040000000400000004 - 0x000000040000000400000004 - 0x00000000 - 0x000000000000000000000000 - 1 - 10000000 - artix7 - xc7a100t - csg324 - -1 - C - - VERILOG - MIXED - TRUE - TRUE - digilentinc.com:nexys4:part0:1.1 - TRUE - 2015.2 - 6 - OUT_OF_CONTEXT - - . - . - IP_Flow - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: xci/mii_to_rmii/mii_to_rmii_0.xci =================================================================== --- xci/mii_to_rmii/mii_to_rmii_0.xci (revision 117) +++ xci/mii_to_rmii/mii_to_rmii_0.xci (nonexistent) @@ -1,55 +0,0 @@ - - - xilinx.com - xci - unknown - 1.0 - - - mii_to_rmii_0 - - - reset - sys_clock - eth_rmii - 1 - 1 - mii_to_rmii_inst - mii_to_rmii_0 - 0 - mii_to_rmii_0 - 1 - 1 - 100000000 - artix7 - xc7a100t - csg324 - -1 - C - - VERILOG - MIXED - TRUE - TRUE - digilentinc.com:nexys4_ddr:part0:1.1 - TRUE - 2015.2 - 7 - OUT_OF_CONTEXT - - . - . - IP_Flow - - - - - - - - - - - - - Index: xci/crossbar_128m/axi_crossbar_0.xci =================================================================== --- xci/crossbar_128m/axi_crossbar_0.xci (revision 117) +++ xci/crossbar_128m/axi_crossbar_0.xci (nonexistent) @@ -1,1401 +0,0 @@ - - - xilinx.com - xci - unknown - 1.0 - - - axi_crossbar_0 - - - 9 - 1 - 3 - 32 - 0 - AXI4 - 32 - SAMD - 0 - 4 - 4 - 4 - 4 - 4 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 4 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0x00000000 - 0x00000001 - 0x00000002 - 0x00000003 - 0x00000004 - 0x00000005 - 0x00000006 - 0x00000007 - 0x00000008 - 0x00000009 - 0x0000000a - 0x0000000b - 0x0000000c - 0x0000000d - 0x0000000e - 0x0000000f - 0x0000000000000000 - 0x0000000000100000 - 0x0000000000200000 - 0x0000000000400000 - 0x0000000000800000 - 0x0000000000080000 - 0x0000000001000000 - 0x0000000002000000 - 0x0000000004000000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x00000000000ff000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000040e00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000300000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000400000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000500000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000600000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000700000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000800000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000900000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000a00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000b00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000c00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000d00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000e00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0x0000000000f00000 - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 0xFFFFFFFFFFFFFFFF - 19 - 20 - 21 - 22 - 23 - 18 - 24 - 25 - 26 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 16 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 12 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - axi_crossbar_0 - artix7 - 1 - 3 - 1 - 32 - 32 - 0 - 9 - 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff00000000000ff000000000000400000000000000020000000000000001000000000000000008000000000000008000000000000000400000000000000020000000000000001000000000000000000000 - 0x00000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000c0000001a0000001900000018000000120000001700000016000000150000001400000013 - 0x00000000 - 0x00000000 - 1 - 4 - 4 - 4 - 4 - 4 - 0x000000010000000100000001 - 0x000000010000000100000001 - 0 - 0x00000001 - 0x00000002 - 0x00000002 - 0x000000040000000400000004 - 0x000000040000000400000004 - 0x00000000 - 0x000000000000000000000000 - 1 - 10000000 - artix7 - xc7a100t - csg324 - -1 - C - - VERILOG - MIXED - TRUE - TRUE - digilentinc.com:nexys4:part0:1.1 - TRUE - 2015.2 - 6 - OUT_OF_CONTEXT - - . - . - IP_Flow - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: xci/etherlite/axi_ethernetlite_0.xci =================================================================== --- xci/etherlite/axi_ethernetlite_0.xci (revision 117) +++ xci/etherlite/axi_ethernetlite_0.xci (nonexistent) @@ -1,71 +0,0 @@ - - - xilinx.com - xci - unknown - 1.0 - - - axi_ethernetlite_0 - - - 0 - 0 - 1 - 0 - 1 - AXI4 - axi_ethernetlite_0 - 0 - 100 - 1 - false - Custom - eth_mdio_mdc - 4 - 0 - artix7 - 10000 - 4 - AXI4 - 1 - 0 - 1 - 0 - 0 - 0 - artix7 - xc7a100t - csg324 - -1 - C - - VERILOG - MIXED - TRUE - TRUE - digilentinc.com:nexys4_ddr:part0:1.1 - TRUE - 2015.2 - 3 - OUT_OF_CONTEXT - - . - . - IP_Flow - - - - - - - - - - - - - - - - Index: xdc/TOP_SYS.xdc =================================================================== --- xdc/TOP_SYS.xdc (revision 117) +++ xdc/TOP_SYS.xdc (nonexistent) @@ -1,314 +0,0 @@ - - -set_property PACKAGE_PIN E3 [get_ports clk100] -set_property IOSTANDARD LVCMOS33 [get_ports clk100] -create_clock -period 10.000 -name clk100 [get_ports clk100] - -set_property PACKAGE_PIN C4 [get_ports RXD] -set_property IOSTANDARD LVCMOS33 [get_ports RXD] -set_property PACKAGE_PIN D4 [get_ports TXD] -set_property IOSTANDARD LVCMOS33 [get_ports TXD] - -set_property PACKAGE_PIN C12 [get_ports rstn] -set_property IOSTANDARD LVCMOS33 [get_ports rstn] - - -set_property -dict { PACKAGE_PIN J13 IOSTANDARD LVCMOS33 } [get_ports { debug[0] }]; #IO_L18P_T2_A24_15 Sch=led[0] -set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { debug[1] }]; #IO_L24P_T3_RS1_15 Sch=led[1] -set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { debug[2] }]; #IO_L17N_T2_A25_15 Sch=led[2] -set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 } [get_ports { debug[3] }]; #IO_L8P_T1_D11_14 Sch=led[3] - - -## LEDs - -set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { gpioA[0] }]; #IO_L18P_T2_A24_15 Sch=led[0] -set_property -dict { PACKAGE_PIN K15 IOSTANDARD LVCMOS33 } [get_ports { gpioA[1] }]; #IO_L24P_T3_RS1_15 Sch=led[1] -#set_property -dict { PACKAGE_PIN J13 IOSTANDARD LVCMOS33 } [get_ports { gpioA[2] }]; #IO_L17N_T2_A25_15 Sch=led[2] -set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 } [get_ports { gpioA[3] }]; #IO_L8P_T1_D11_14 Sch=led[3] -#set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { gpioA[4] }]; #IO_L7P_T1_D09_14 Sch=led[4] -set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { gpioA[5] }]; #IO_L18N_T2_A11_D27_14 Sch=led[5] -#set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { gpioA[6] }]; #IO_L17P_T2_A14_D30_14 Sch=led[6] -#set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 } [get_ports { gpioA[7] }]; #IO_L18P_T2_A12_D28_14 Sch=led[7] -set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 } [get_ports { gpioB[0] }]; #IO_L16N_T2_A15_D31_14 Sch=led[8] -set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 } [get_ports { gpioB[1] }]; #IO_L14N_T2_SRCC_14 Sch=led[9] -set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { gpioB[2] }]; #IO_L22P_T3_A05_D21_14 Sch=led[10] -set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 } [get_ports { gpioB[3] }]; #IO_L15N_T2_DQS_DOUT_CSO_B_14 Sch=led[11] -set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports { gpioB[4] }]; #IO_L16P_T2_CSI_B_14 Sch=led[12] -set_property -dict { PACKAGE_PIN V14 IOSTANDARD LVCMOS33 } [get_ports { gpioB[5] }]; #IO_L22N_T3_A04_D20_14 Sch=led[13] -set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { gpioB[6] }]; #IO_L20N_T3_A07_D23_14 Sch=led[14] -set_property -dict { PACKAGE_PIN V11 IOSTANDARD LVCMOS33 } [get_ports { gpioB[7] }]; #IO_L21N_T3_DQS_A06_D22_14 Sch=led[15] - - -##Micro SD Connector -set_property -dict { PACKAGE_PIN E2 IOSTANDARD LVCMOS33 } [get_ports { sdreset }]; #IO_L14P_T2_SRCC_35 Sch=sd_reset -set_property -dict { PACKAGE_PIN B1 IOSTANDARD LVCMOS33 } [get_ports { gpioA[4] }]; #IO_L9P_T1_DQS_AD7P_35 Sch=sd_sck -set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { gpioA[6] }]; #IO_L16N_T2_35 Sch=sd_cmd -set_property -dict { PACKAGE_PIN C2 IOSTANDARD LVCMOS33 } [get_ports { gpioA[7] }]; #IO_L16P_T2_35 Sch=sd_dat[0] -set_property -dict { PACKAGE_PIN D2 IOSTANDARD LVCMOS33 } [get_ports { gpioA[2] }]; #IO_L14N_T2_SRCC_35 Sch=sd_dat[3] - -set_property PACKAGE_PIN C16 [get_ports {aclInt1}] -set_property IOSTANDARD LVCMOS33 [get_ports {aclInt1}] -set_property PACKAGE_PIN B13 [get_ports {aclInt2}] -set_property IOSTANDARD LVCMOS33 [get_ports {aclInt2}] - -set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { miso }]; #IO_L11P_T1_SRCC_15 Sch=acl_miso -set_property -dict { PACKAGE_PIN F14 IOSTANDARD LVCMOS33 } [get_ports { mosi }]; #IO_L5N_T0_AD9N_15 Sch=acl_mosi -set_property -dict { PACKAGE_PIN F15 IOSTANDARD LVCMOS33 } [get_ports { sclk }]; #IO_L14P_T2_SRCC_15 Sch=acl_sclk - - -## SMSC Ethernet PHY -##SMSC Ethernet PHY -##Bank = 16, Pin name = IO_L11P_T1_SRCC_16, Sch name = ETH_MDC -set_property PACKAGE_PIN C9 [get_ports PhyMdc] -set_property IOSTANDARD LVCMOS33 [get_ports PhyMdc] -##Bank = 16, Pin name = IO_L14N_T2_SRCC_16, Sch name = ETH_MDIO -set_property PACKAGE_PIN A9 [get_ports PhyMdio] -set_property IOSTANDARD LVCMOS33 [get_ports PhyMdio] -##Bank = 35, Pin name = IO_L10P_T1_AD15P_35, Sch name = ETH_RSTN -set_property PACKAGE_PIN B3 [get_ports PhyRstn] -set_property IOSTANDARD LVCMOS33 [get_ports PhyRstn] -##Bank = 16, Pin name = IO_L6N_T0_VREF_16, Sch name = ETH_CRSDV -set_property PACKAGE_PIN D9 [get_ports PhyCrs] -set_property IOSTANDARD LVCMOS33 [get_ports PhyCrs] -##Bank = 16, Pin name = IO_L13N_T2_MRCC_16, Sch name = ETH_RXERR -set_property PACKAGE_PIN C10 [get_ports PhyRxErr] -set_property IOSTANDARD LVCMOS33 [get_ports PhyRxErr] -##Bank = 16, Pin name = IO_L19N_T3_VREF_16, Sch name = ETH_RXD0 -set_property PACKAGE_PIN D10 [get_ports {PhyRxd[0]}] -set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[0]}] -##Bank = 16, Pin name = IO_L13P_T2_MRCC_16, Sch name = ETH_RXD1 -set_property PACKAGE_PIN C11 [get_ports {PhyRxd[1]}] -set_property IOSTANDARD LVCMOS33 [get_ports {PhyRxd[1]}] -##Bank = 16, Pin name = IO_L11N_T1_SRCC_16, Sch name = ETH_TXEN -set_property PACKAGE_PIN B9 [get_ports PhyTxEn] -set_property IOSTANDARD LVCMOS33 [get_ports PhyTxEn] -##Bank = 16, Pin name = IO_L14P_T2_SRCC_16, Sch name = ETH_TXD0 -set_property PACKAGE_PIN A10 [get_ports {PhyTxd[0]}] -set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[0]}] -##Bank = 16, Pin name = IO_L12N_T1_MRCC_16, Sch name = ETH_TXD1 -set_property PACKAGE_PIN A8 [get_ports {PhyTxd[1]}] -set_property IOSTANDARD LVCMOS33 [get_ports {PhyTxd[1]}] -##Bank = 35, Pin name = IO_L11P_T1_SRCC_35, Sch name = ETH_REFCLK -set_property PACKAGE_PIN D5 [get_ports PhyClk50Mhz] -set_property IOSTANDARD LVCMOS33 [get_ports PhyClk50Mhz] -##Bank = 16, Pin name = IO_L12P_T1_MRCC_16, Sch name = ETH_INTN -#set_property PACKAGE_PIN B8 [get_ports PhyIntn] -#set_property IOSTANDARD LVCMOS33 [get_ports PhyIntn] - -## Quad SPI Flash -#NET "sdclk" LOC = "E9" ; #Bank = CONFIG, Pin name = CCLK_0, Sch name = QSPI_SCK - -set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { sdout }]; #IO_L1P_T0_D00_MOSI_14 Sch=qspi_dq[0] -set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { sdin }]; #IO_L1N_T0_D01_DIN_14 Sch=qspi_dq[1] -set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { sdwp }]; #IO_L2N_T0_D03_14 Sch=qspi_dq[3] -set_property -dict { PACKAGE_PIN M14 IOSTANDARD LVCMOS33 } [get_ports { sdhld }]; #IO_L2N_T0_D03_14 Sch=qspi_dq[3] -set_property -dict { PACKAGE_PIN L13 IOSTANDARD LVCMOS33 } [get_ports { sdcs }]; #IO_L6P_T0_FCS_B_14 Sch=qspi_csn - -############################# -### DDR2 -############################# - -##DRAM -set_property SLEW FAST [get_ports {DDR2DQ[0]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[0]}] -set_property PACKAGE_PIN R7 [get_ports {DDR2DQ[0]}] - -set_property SLEW FAST [get_ports {DDR2DQ[1]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[1]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[1]}] -set_property PACKAGE_PIN V6 [get_ports {DDR2DQ[1]}] - -set_property SLEW FAST [get_ports {DDR2DQ[2]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[2]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[2]}] -set_property PACKAGE_PIN R8 [get_ports {DDR2DQ[2]}] - -set_property SLEW FAST [get_ports {DDR2DQ[3]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[3]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[3]}] -set_property PACKAGE_PIN U7 [get_ports {DDR2DQ[3]}] - -set_property SLEW FAST [get_ports {DDR2DQ[4]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[4]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[4]}] -set_property PACKAGE_PIN V7 [get_ports {DDR2DQ[4]}] - -set_property SLEW FAST [get_ports {DDR2DQ[5]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[5]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[5]}] -set_property PACKAGE_PIN R6 [get_ports {DDR2DQ[5]}] - -set_property SLEW FAST [get_ports {DDR2DQ[6]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[6]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[6]}] -set_property PACKAGE_PIN U6 [get_ports {DDR2DQ[6]}] - -set_property SLEW FAST [get_ports {DDR2DQ[7]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[7]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[7]}] -set_property PACKAGE_PIN R5 [get_ports {DDR2DQ[7]}] - -set_property SLEW FAST [get_ports {DDR2DQ[8]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[8]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[8]}] -set_property PACKAGE_PIN T5 [get_ports {DDR2DQ[8]}] - -set_property SLEW FAST [get_ports {DDR2DQ[9]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[9]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[9]}] -set_property PACKAGE_PIN U3 [get_ports {DDR2DQ[9]}] - -set_property SLEW FAST [get_ports {DDR2DQ[10]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[10]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[10]}] -set_property PACKAGE_PIN V5 [get_ports {DDR2DQ[10]}] - -set_property SLEW FAST [get_ports {DDR2DQ[11]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[11]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[11]}] -set_property PACKAGE_PIN U4 [get_ports {DDR2DQ[11]}] - -set_property SLEW FAST [get_ports {DDR2DQ[12]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[12]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[12]}] -set_property PACKAGE_PIN V4 [get_ports {DDR2DQ[12]}] - -set_property SLEW FAST [get_ports {DDR2DQ[13]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[13]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[13]}] -set_property PACKAGE_PIN T4 [get_ports {DDR2DQ[13]}] - -set_property SLEW FAST [get_ports {DDR2DQ[14]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[14]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[14]}] -set_property PACKAGE_PIN V1 [get_ports {DDR2DQ[14]}] - -set_property SLEW FAST [get_ports {DDR2DQ[15]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQ[15]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DQ[15]}] -set_property PACKAGE_PIN T3 [get_ports {DDR2DQ[15]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[12]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[12]}] -set_property PACKAGE_PIN N6 [get_ports {DDR2ADDR[12]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[11]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[11]}] -set_property PACKAGE_PIN K5 [get_ports {DDR2ADDR[11]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[10]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[10]}] -set_property PACKAGE_PIN R2 [get_ports {DDR2ADDR[10]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[9]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[9]}] -set_property PACKAGE_PIN N5 [get_ports {DDR2ADDR[9]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[8]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[8]}] -set_property PACKAGE_PIN L4 [get_ports {DDR2ADDR[8]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[7]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[7]}] -set_property PACKAGE_PIN N1 [get_ports {DDR2ADDR[7]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[6]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[6]}] -set_property PACKAGE_PIN M2 [get_ports {DDR2ADDR[6]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[5]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[5]}] -set_property PACKAGE_PIN P5 [get_ports {DDR2ADDR[5]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[4]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[4]}] -set_property PACKAGE_PIN L3 [get_ports {DDR2ADDR[4]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[3]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[3]}] -set_property PACKAGE_PIN T1 [get_ports {DDR2ADDR[3]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[2]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[2]}] -set_property PACKAGE_PIN M6 [get_ports {DDR2ADDR[2]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[1]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[1]}] -set_property PACKAGE_PIN P4 [get_ports {DDR2ADDR[1]}] - -set_property SLEW FAST [get_ports {DDR2ADDR[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ADDR[0]}] -set_property PACKAGE_PIN M4 [get_ports {DDR2ADDR[0]}] - -set_property SLEW FAST [get_ports {DDR2BA[2]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2BA[2]}] -set_property PACKAGE_PIN R1 [get_ports {DDR2BA[2]}] - -set_property SLEW FAST [get_ports {DDR2BA[1]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2BA[1]}] -set_property PACKAGE_PIN P3 [get_ports {DDR2BA[1]}] - -set_property SLEW FAST [get_ports {DDR2BA[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2BA[0]}] -set_property PACKAGE_PIN P2 [get_ports {DDR2BA[0]}] - -set_property SLEW FAST [get_ports {DDR2RAS_N}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2RAS_N}] -set_property PACKAGE_PIN N4 [get_ports {DDR2RAS_N}] - -set_property SLEW FAST [get_ports {DDR2CAS_N}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2CAS_N}] -set_property PACKAGE_PIN L1 [get_ports {DDR2CAS_N}] - -set_property SLEW FAST [get_ports {DDR2WE_N}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2WE_N}] -set_property PACKAGE_PIN N2 [get_ports {DDR2WE_N}] - -set_property SLEW FAST [get_ports {DDR2CKE[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2CKE[0]}] -set_property PACKAGE_PIN M1 [get_ports {DDR2CKE[0]}] - -set_property SLEW FAST [get_ports {DDR2ODT[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2ODT[0]}] -set_property PACKAGE_PIN M3 [get_ports {DDR2ODT[0]}] - -set_property SLEW FAST [get_ports {DDR2CS_N[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2CS_N[0]}] -set_property PACKAGE_PIN K6 [get_ports {DDR2CS_N[0]}] - -set_property SLEW FAST [get_ports {DDR2DM[0]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DM[0]}] -set_property PACKAGE_PIN T6 [get_ports {DDR2DM[0]}] - -set_property SLEW FAST [get_ports {DDR2DM[1]}] -set_property IOSTANDARD SSTL18_II [get_ports {DDR2DM[1]}] -set_property PACKAGE_PIN U1 [get_ports {DDR2DM[1]}] - -set_property SLEW FAST [get_ports {DDR2DQS_P[0]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQS_P[0]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2DQS_P[0]}] -set_property PACKAGE_PIN U9 [get_ports {DDR2DQS_P[0]}] - -set_property SLEW FAST [get_ports {DDR2DQS_N[0]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQS_N[0]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2DQS_N[0]}] -set_property PACKAGE_PIN V9 [get_ports {DDR2DQS_N[0]}] - -set_property SLEW FAST [get_ports {DDR2DQS_P[1]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQS_P[1]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2DQS_P[1]}] -set_property PACKAGE_PIN U2 [get_ports {DDR2DQS_P[1]}] - -set_property SLEW FAST [get_ports {DDR2DQS_N[1]}] -set_property IN_TERM UNTUNED_SPLIT_50 [get_ports {DDR2DQS_N[1]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2DQS_N[1]}] -set_property PACKAGE_PIN V2 [get_ports {DDR2DQS_N[1]}] - -set_property SLEW FAST [get_ports {DDR2CK_P[0]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2CK_P[0]}] -set_property PACKAGE_PIN L6 [get_ports {DDR2CK_P[0]}] - -set_property SLEW FAST [get_ports {DDR2CK_N[0]}] -set_property IOSTANDARD DIFF_SSTL18_II [get_ports {DDR2CK_N[0]}] -set_property PACKAGE_PIN L5 [get_ports {DDR2CK_N[0]}]

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