URL
https://opencores.org/ocsvn/versatile_io/versatile_io/trunk
Subversion Repositories versatile_io
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- This comparison shows the changes necessary to convert path
/versatile_io/trunk/rtl/verilog/include
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/versatile_io_defines.v
5,8 → 5,16
`define UART0_BASE_ADR 32'h92000000 |
`define UART0_MEM_MAP_HI 31 |
`define UART0_MEM_MAP_LO 24 |
`ifdef UART0 |
`define UART |
`endif |
//=comment |
//`define UART1 |
`define UART1_BASE 32'h92100000 |
`define UART1_MEM_MAP_HI 31 |
`define UART1_MEM_MAP_LO 24 |
`ifdef UART1 |
`ifndef UART |
`define UART |
`endif |
`endif |