URL
https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk
Subversion Repositories versatile_mem_ctrl
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_mem_ctrl/trunk/sim
- from Rev 28 to Rev 31
- ↔ Reverse comparison
Rev 28 → Rev 31
/rtl_sim/bin/sim_altera.tcl
20,6 → 20,7
if {![file exists altera_primitives] || $FORCE_LIBRARY_RECOMPILE} { |
vlib altera_primitives |
vmap altera_primitives altera_primitives |
#vlog -work altera_primitives /opt/altera9.1/quartus/eda/sim_lib/altera_primitives.v |
vcom -work altera_primitives /opt/altera9.1/quartus/eda/sim_lib/altera_primitives_components.vhd |
vcom -work altera_primitives /opt/altera9.1/quartus/eda/sim_lib/altera_primitives.vhd |
} |
26,6 → 27,7
if {![file exists altera_mf] || $FORCE_LIBRARY_RECOMPILE} { |
vlib altera_mf |
vmap altera_mf altera_mf |
#vlog -work altera_mf /opt/altera9.1/quartus/eda/sim_lib/altera_mf.v |
vcom -work altera_mf /opt/altera9.1/quartus/eda/sim_lib/altera_mf_components.vhd |
vcom -work altera_mf /opt/altera9.1/quartus/eda/sim_lib/altera_mf.vhd |
} |
/rtl_sim/bin/sim_xilinx.tcl
59,7 → 59,7
view signals |
|
# Run the .do file to load signals to the waveform viewer |
#do $WAVE_FILE |
do $WAVE_FILE |
|
# Run the simulation |
run 330 us |