URL
https://opencores.org/ocsvn/w11/w11/trunk
Subversion Repositories w11
Compare Revisions
- This comparison shows the changes necessary to convert path
/w11/tags/w11a_V0.6/rtl/sys_gen/tst_rlink/s3board
- from Rev 19 to Rev 24
- ↔ Reverse comparison
Rev 19 → Rev 24
/tb/Makefile
0,0 → 1,32
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $ |
# |
# Revision History: |
# Date Rev Version Comment |
# 2011-12-22 442 1.0 Initial version |
# |
EXE_all = tb_tst_rlink_s3 |
# |
include $(RETROBASE)/rtl/make/xflow_default_s3board.mk |
# |
.PHONY : all all_ssim all_tsim clean |
# |
all : $(EXE_all) |
all_ssim : $(EXE_all:=_ssim) |
all_tsim : $(EXE_all:=_tsim) |
# |
clean : ise_clean ghdl_clean |
rm -f sys_tst_rlink_s3.ucf |
# |
#----- |
# |
include $(RETROBASE)/rtl/make/generic_ghdl.mk |
include $(RETROBASE)/rtl/make/generic_xflow.mk |
# |
VBOM_all = $(wildcard *.vbom) |
# |
ifndef DONTINCDEP |
include $(VBOM_all:.vbom=.dep_xst) |
include $(VBOM_all:.vbom=.dep_ghdl) |
include $(wildcard *.o.dep_ghdl) |
endif |
# |
/tb/tb_tst_rlink_s3.vbom
0,0 → 1,7
# configure tb_s3board_fusp with sys_tst_rlink_s3 target; |
# use vhdl configure file (tb_tst_rlink_s3.vhd) to allow |
# that all configurations will co-exist in work library |
${s3board_aif := ../sys_tst_rlink_s3.vbom} |
sys_conf = sys_conf_sim.vhd |
../../../../bplib/s3board/tb/tb_s3board_fusp.vbom |
tb_tst_rlink_s3.vhd |
/tb/tbw.dat
0,0 → 1,6
# $Id: tbw.dat 442 2011-12-23 10:03:28Z mueller $ |
# |
[tb_tst_rlink_s3] |
rlink_cext_fifo_rx = <fifo> |
rlink_cext_fifo_tx = <fifo> |
rlink_cext_conf = <null> |
/tb/tb_tst_rlink_s3.vhd
0,0 → 1,39
-- $Id: tb_tst_rlink_s3.vhd 442 2011-12-23 10:03:28Z mueller $ |
-- |
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
-- Software Foundation, either version 2, or at your option any later version. |
-- |
-- This program is distributed in the hope that it will be useful, but |
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
-- for complete details. |
-- |
------------------------------------------------------------------------------ |
-- Module Name: tb_tst_rlink_s3 |
-- Description: Configuration for tb_tst_rlink_s3 for tb_s3board_fusp |
-- |
-- Dependencies: sys_tst_rlink_s3 |
-- |
-- To test: sys_tst_rlink_s3 |
-- |
-- Verified: |
-- Date Rev Code ghdl ise Target Comment |
-- 2011-12-22 442 - 0.29 13.1 O40d xc3s1000 u:ok |
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2011-12-22 442 1.0 Initial version |
------------------------------------------------------------------------------ |
|
configuration tb_tst_rlink_s3 of tb_s3board_fusp is |
|
for sim |
for all : s3board_fusp_aif |
use entity work.sys_tst_rlink_s3; |
end for; |
end for; |
|
end tb_tst_rlink_s3; |
/tb/sys_tst_rlink_s3.ucf_cpp
0,0 → 1,39
link ../sys_tst_rlink_s3.ucf_cpp |
tb/sys_tst_rlink_s3.ucf_cpp
Property changes :
Added: svn:special
## -0,0 +1 ##
+*
\ No newline at end of property
Index: tb/sys_conf_sim.vhd
===================================================================
--- tb/sys_conf_sim.vhd (nonexistent)
+++ tb/sys_conf_sim.vhd (revision 24)
@@ -0,0 +1,41 @@
+-- $Id: sys_conf_sim.vhd 442 2011-12-23 10:03:28Z mueller $
+--
+-- Copyright 2011- by Walter F.J. Mueller
+--
+-- This program is free software; you may redistribute and/or modify it under
+-- the terms of the GNU General Public License as published by the Free
+-- Software Foundation, either version 2, or at your option any later version.
+--
+-- This program is distributed in the hope that it will be useful, but
+-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for complete details.
+--
+------------------------------------------------------------------------------
+-- Package Name: sys_conf
+-- Description: Definitions for sys_tst_rlink_s3 (for simulation)
+--
+-- Dependencies: -
+-- Tool versions: xst 13.1; ghdl 0.29
+-- Revision History:
+-- Date Rev Version Comment
+-- 2011-12-22 442 1.0 Initial version
+------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.slvtypes.all;
+
+package sys_conf is
+
+ constant sys_conf_ser2rri_cdinit : integer := 1-1; -- 1 cycle/bit in sim
+
+ constant sys_conf_hio_debounce : boolean := false; -- no debouncers
+
+ -- derived constants
+
+ constant sys_conf_clksys : integer := 50000000;
+ constant sys_conf_clksys_mhz : integer := sys_conf_clksys/1000000;
+
+end package sys_conf;
Index: tb/.cvsignore
===================================================================
--- tb/.cvsignore (nonexistent)
+++ tb/.cvsignore (revision 24)
@@ -0,0 +1,7 @@
+tb_tst_rlink_s3
+tb_tst_rlink_s3_[sft]sim
+rlink_cext_fifo_rx
+rlink_cext_fifo_tx
+rlink_cext_conf
+sys_tst_rlink_s3.ucf
+*.dep_ucf_cpp
Index: tb
===================================================================
--- tb (nonexistent)
+++ tb (revision 24)
tb
Property changes :
Added: svn:ignore
## -0,0 +1,39 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+tb_tst_rlink_s3
+tb_tst_rlink_s3_[sft]sim
+rlink_cext_fifo_rx
+rlink_cext_fifo_tx
+rlink_cext_conf
+sys_tst_rlink_s3.ucf
+*.dep_ucf_cpp
Index: sys_tst_rlink_s3.vhd
===================================================================
--- sys_tst_rlink_s3.vhd (nonexistent)
+++ sys_tst_rlink_s3.vhd (revision 24)
@@ -0,0 +1,263 @@
+-- $Id: sys_tst_rlink_s3.vhd 476 2013-01-26 22:23:53Z mueller $
+--
+-- Copyright 2011- by Walter F.J. Mueller
+--
+-- This program is free software; you may redistribute and/or modify it under
+-- the terms of the GNU General Public License as published by the Free
+-- Software Foundation, either version 2, or at your option any later version.
+--
+-- This program is distributed in the hope that it will be useful, but
+-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for complete details.
+--
+------------------------------------------------------------------------------
+-- Module Name: sys_tst_rlink_s3 - syn
+-- Description: rlink tester design for s3board
+--
+-- Dependencies: vlib/genlib/clkdivce
+-- bplib/bpgen/bp_rs232_2l4l_iob
+-- bplib/bpgen/sn_humanio_rbus
+-- vlib/rlink/rlink_sp1c
+-- rbd_tst_rlink
+-- vlib/rbus/rb_sres_or_2
+-- bplib/s3board/s3_sram_dummy
+--
+-- Test bench: tb/tb_tst_rlink_s3
+--
+-- Target Devices: generic
+-- Tool versions: xst 13.1; ghdl 0.29
+--
+-- Synthesized (xst):
+-- Date Rev ise Target flop lutl lutm slic t peri
+-- 2011-12-22 442 13.1 O40d xc3s1000e-4 765 1672 96 1088 t 12.6
+--
+-- Revision History:
+-- Date Rev Version Comment
+-- 2011-12-22 442 1.0 Initial version (derived from sys_tst_rlink_n2)
+------------------------------------------------------------------------------
+-- Usage of S3board switches, Buttons, LEDs:
+--
+-- SWI(7:2): no function (only connected to sn_humanio_rbus)
+-- SWI(1): 1 enable XON
+-- SWI(0): 0 -> main board RS232 port - implemented in bp_rs232_2l4l_iob
+-- 1 -> Pmod B/top RS232 port /
+--
+-- LED(7): SER_MONI.abact
+-- LED(6:2): no function (only connected to sn_humanio_rbus)
+-- LED(0): timer 0 busy
+-- LED(1): timer 1 busy
+--
+-- DSP: SER_MONI.clkdiv (from auto bauder)
+-- DP(3): not SER_MONI.txok (shows tx back preasure)
+-- DP(2): SER_MONI.txact (shows tx activity)
+-- DP(1): not SER_MONI.rxok (shows rx back preasure)
+-- DP(0): SER_MONI.rxact (shows rx activity)
+--
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.slvtypes.all;
+use work.genlib.all;
+use work.serportlib.all;
+use work.rblib.all;
+use work.rlinklib.all;
+use work.bpgenlib.all;
+use work.bpgenrbuslib.all;
+use work.s3boardlib.all;
+use work.sys_conf.all;
+
+-- ----------------------------------------------------------------------------
+
+entity sys_tst_rlink_s3 is -- top level
+ -- implements s3board_fusp_aif
+ port (
+ I_CLK50 : in slbit; -- 50 MHz board clock
+ I_RXD : in slbit; -- receive data (board view)
+ O_TXD : out slbit; -- transmit data (board view)
+ I_SWI : in slv8; -- s3 switches
+ I_BTN : in slv4; -- s3 buttons
+ O_LED : out slv8; -- s3 leds
+ O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low)
+ O_SEG_N : out slv8; -- 7 segment disp: segments (act.low)
+ O_MEM_CE_N : out slv2; -- sram: chip enables (act.low)
+ O_MEM_BE_N : out slv4; -- sram: byte enables (act.low)
+ O_MEM_WE_N : out slbit; -- sram: write enable (act.low)
+ O_MEM_OE_N : out slbit; -- sram: output enable (act.low)
+ O_MEM_ADDR : out slv18; -- sram: address lines
+ IO_MEM_DATA : inout slv32; -- sram: data lines
+ O_FUSP_RTS_N : out slbit; -- fusp: rs232 rts_n
+ I_FUSP_CTS_N : in slbit; -- fusp: rs232 cts_n
+ I_FUSP_RXD : in slbit; -- fusp: rs232 rx
+ O_FUSP_TXD : out slbit -- fusp: rs232 tx
+ );
+end sys_tst_rlink_s3;
+
+architecture syn of sys_tst_rlink_s3 is
+
+ signal CLK : slbit := '0';
+
+ signal RXD : slbit := '1';
+ signal TXD : slbit := '0';
+ signal RTS_N : slbit := '0';
+ signal CTS_N : slbit := '0';
+
+ signal SWI : slv8 := (others=>'0');
+ signal BTN : slv4 := (others=>'0');
+ signal LED : slv8 := (others=>'0');
+ signal DSP_DAT : slv16 := (others=>'0');
+ signal DSP_DP : slv4 := (others=>'0');
+
+ signal RESET : slbit := '0';
+ signal CE_USEC : slbit := '0';
+ signal CE_MSEC : slbit := '0';
+
+ signal RB_MREQ : rb_mreq_type := rb_mreq_init;
+ signal RB_SRES : rb_sres_type := rb_sres_init;
+ signal RB_SRES_HIO : rb_sres_type := rb_sres_init;
+ signal RB_SRES_TST : rb_sres_type := rb_sres_init;
+
+ signal RB_LAM : slv16 := (others=>'0');
+ signal RB_STAT : slv3 := (others=>'0');
+
+ signal SER_MONI : serport_moni_type := serport_moni_init;
+ signal STAT : slv8 := (others=>'0');
+
+ constant rbaddr_hio : slv8 := "11000000"; -- 110000xx
+
+begin
+
+ assert (sys_conf_clksys mod 1000000) = 0
+ report "assert sys_conf_clksys on MHz grid"
+ severity failure;
+
+ RESET <= '0'; -- so far not used
+ CLK <= I_CLK50;
+
+ CLKDIV : clkdivce
+ generic map (
+ CDUWIDTH => 7,
+ USECDIV => sys_conf_clksys_mhz,
+ MSECDIV => 1000)
+ port map (
+ CLK => CLK,
+ CE_USEC => CE_USEC,
+ CE_MSEC => CE_MSEC
+ );
+
+ IOB_RS232 : bp_rs232_2l4l_iob
+ port map (
+ CLK => CLK,
+ RESET => '0',
+ SEL => SWI(0),
+ RXD => RXD,
+ TXD => TXD,
+ CTS_N => CTS_N,
+ RTS_N => RTS_N,
+ I_RXD0 => I_RXD,
+ O_TXD0 => O_TXD,
+ I_RXD1 => I_FUSP_RXD,
+ O_TXD1 => O_FUSP_TXD,
+ I_CTS1_N => I_FUSP_CTS_N,
+ O_RTS1_N => O_FUSP_RTS_N
+ );
+
+ HIO : sn_humanio_rbus
+ generic map (
+ DEBOUNCE => sys_conf_hio_debounce,
+ RB_ADDR => rbaddr_hio)
+ port map (
+ CLK => CLK,
+ RESET => RESET,
+ CE_MSEC => CE_MSEC,
+ RB_MREQ => RB_MREQ,
+ RB_SRES => RB_SRES_HIO,
+ SWI => SWI,
+ BTN => BTN,
+ LED => LED,
+ DSP_DAT => DSP_DAT,
+ DSP_DP => DSP_DP,
+ I_SWI => I_SWI,
+ I_BTN => I_BTN,
+ O_LED => O_LED,
+ O_ANO_N => O_ANO_N,
+ O_SEG_N => O_SEG_N
+ );
+
+ RLINK : rlink_sp1c
+ generic map (
+ ATOWIDTH => 6,
+ ITOWIDTH => 6,
+ CPREF => c_rlink_cpref,
+ IFAWIDTH => 5,
+ OFAWIDTH => 5,
+ ENAPIN_RLMON => sbcntl_sbf_rlmon,
+ ENAPIN_RBMON => sbcntl_sbf_rbmon,
+ CDWIDTH => 15,
+ CDINIT => sys_conf_ser2rri_cdinit)
+ port map (
+ CLK => CLK,
+ CE_USEC => CE_USEC,
+ CE_MSEC => CE_MSEC,
+ CE_INT => CE_MSEC,
+ RESET => RESET,
+ ENAXON => SWI(1),
+ ENAESC => SWI(1),
+ RXSD => RXD,
+ TXSD => TXD,
+ CTS_N => CTS_N,
+ RTS_N => RTS_N,
+ RB_MREQ => RB_MREQ,
+ RB_SRES => RB_SRES,
+ RB_LAM => RB_LAM,
+ RB_STAT => RB_STAT,
+ RL_MONI => open,
+ SER_MONI => SER_MONI
+ );
+
+ RBDTST : entity work.rbd_tst_rlink
+ port map (
+ CLK => CLK,
+ RESET => RESET,
+ CE_USEC => CE_USEC,
+ RB_MREQ => RB_MREQ,
+ RB_SRES => RB_SRES_TST,
+ RB_LAM => RB_LAM,
+ RB_STAT => RB_STAT,
+ RB_SRES_TOP => RB_SRES,
+ RXSD => RXD,
+ RXACT => SER_MONI.rxact,
+ STAT => STAT
+ );
+
+ RB_SRES_OR1 : rb_sres_or_2
+ port map (
+ RB_SRES_1 => RB_SRES_HIO,
+ RB_SRES_2 => RB_SRES_TST,
+ RB_SRES_OR => RB_SRES
+ );
+
+ SRAM : s3_sram_dummy -- connect SRAM to protection dummy
+ port map (
+ O_MEM_CE_N => O_MEM_CE_N,
+ O_MEM_BE_N => O_MEM_BE_N,
+ O_MEM_WE_N => O_MEM_WE_N,
+ O_MEM_OE_N => O_MEM_OE_N,
+ O_MEM_ADDR => O_MEM_ADDR,
+ IO_MEM_DATA => IO_MEM_DATA
+ );
+
+ DSP_DAT <= SER_MONI.abclkdiv;
+
+ DSP_DP(3) <= not SER_MONI.txok;
+ DSP_DP(2) <= SER_MONI.txact;
+ DSP_DP(1) <= not SER_MONI.rxok;
+ DSP_DP(0) <= SER_MONI.rxact;
+
+ LED(7) <= SER_MONI.abact;
+ LED(6 downto 2) <= (others=>'0');
+ LED(1) <= STAT(1);
+ LED(0) <= STAT(0);
+
+end syn;
Index: Makefile
===================================================================
--- Makefile (nonexistent)
+++ Makefile (revision 24)
@@ -0,0 +1,28 @@
+# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
+#
+# Revision History:
+# Date Rev Version Comment
+# 2011-12-22 442 1.0 Initial version
+#
+VBOM_all = $(wildcard *.vbom)
+BIT_all = $(VBOM_all:.vbom=.bit)
+#
+include $(RETROBASE)/rtl/make/xflow_default_s3board.mk
+#
+.PHONY : all clean
+#
+all : $(BIT_all)
+#
+clean : ise_clean
+ rm -f $(VBOM_all:.vbom=.ucf)
+#
+#----
+#
+include $(RETROBASE)/rtl/make/generic_xflow.mk
+include $(RETROBASE)/rtl/make/generic_ghdl.mk
+#
+ifndef DONTINCDEP
+include $(VBOM_all:.vbom=.dep_xst)
+include $(VBOM_all:.vbom=.dep_ghdl)
+endif
+#
Index: sys_tst_rlink_s3.vbom
===================================================================
--- sys_tst_rlink_s3.vbom (nonexistent)
+++ sys_tst_rlink_s3.vbom (revision 24)
@@ -0,0 +1,21 @@
+# libs
+../../../vlib/slvtypes.vhd
+../../../vlib/genlib/genlib.vhd
+../../../vlib/serport/serportlib.vbom
+../../../vlib/rbus/rblib.vhd
+../../../vlib/rlink/rlinklib.vbom
+../../../bplib/bpgen/bpgenlib.vbom
+../../../bplib/bpgen/bpgenrbuslib.vbom
+../../../bplib/s3board/s3boardlib.vbom
+${sys_conf := sys_conf.vhd}
+# components
+../../../vlib/genlib/clkdivce.vbom
+../../../bplib/bpgen/bp_rs232_2l4l_iob.vbom
+../../../bplib/bpgen/sn_humanio_rbus.vbom
+../../../vlib/rlink/rlink_sp1c.vbom
+../rbd_tst_rlink.vbom
+../../../vlib/rbus/rb_sres_or_2.vbom
+../../../bplib/s3board/s3_sram_dummy.vbom
+# design
+sys_tst_rlink_s3.vhd
+@ucf_cpp: sys_tst_rlink_s3.ucf
Index: sys_conf.vhd
===================================================================
--- sys_conf.vhd (nonexistent)
+++ sys_conf.vhd (revision 24)
@@ -0,0 +1,44 @@
+-- $Id: sys_conf.vhd 442 2011-12-23 10:03:28Z mueller $
+--
+-- Copyright 2011- by Walter F.J. Mueller
+--
+-- This program is free software; you may redistribute and/or modify it under
+-- the terms of the GNU General Public License as published by the Free
+-- Software Foundation, either version 2, or at your option any later version.
+--
+-- This program is distributed in the hope that it will be useful, but
+-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+-- for complete details.
+--
+------------------------------------------------------------------------------
+-- Package Name: sys_conf
+-- Description: Definitions for sys_tst_rlink_s3 (for synthesis)
+--
+-- Dependencies: -
+-- Tool versions: xst 13.1; ghdl 0.29
+-- Revision History:
+-- Date Rev Version Comment
+-- 2011-12-22 442 1.0 Initial version
+------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.slvtypes.all;
+
+package sys_conf is
+
+ constant sys_conf_ser2rri_defbaud : integer := 115200; -- default 115k baud
+
+ constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers
+
+ -- derived constants
+
+ constant sys_conf_clksys : integer := 50000000;
+ constant sys_conf_clksys_mhz : integer := sys_conf_clksys/1000000;
+
+ constant sys_conf_ser2rri_cdinit : integer :=
+ (sys_conf_clksys/sys_conf_ser2rri_defbaud)-1;
+
+end package sys_conf;
Index: sys_tst_rlink_s3.ucf_cpp
===================================================================
--- sys_tst_rlink_s3.ucf_cpp (nonexistent)
+++ sys_tst_rlink_s3.ucf_cpp (revision 24)
@@ -0,0 +1,19 @@
+## $Id: sys_tst_rlink_s3.ucf_cpp 442 2011-12-23 10:03:28Z mueller $
+##
+## Revision History:
+## Date Rev Version Comment
+## 2011-12-22 442 1.0 Initial version
+##
+
+NET "I_CLK50" TNM_NET = "I_CLK50";
+TIMESPEC "TS_I_CLK50" = PERIOD "I_CLK50" 20 ns HIGH 50 %;
+OFFSET = IN 10 ns BEFORE "I_CLK50";
+OFFSET = OUT 20 ns AFTER "I_CLK50";
+
+## std board
+##
+#include "bplib/s3board/s3board_pins.ucf"
+##
+## Pmod1-RS232 on A2 connector
+##
+#include "bplib/s3board/s3board_a2_pm1_rs232.ucf"
Index: .cvsignore
===================================================================
--- .cvsignore (nonexistent)
+++ .cvsignore (revision 24)
@@ -0,0 +1,4 @@
+_impactbatch.log
+sys_tst_rlink_s3.ucf
+*.dep_ucf_cpp
+*.svf
Index: .
===================================================================
--- . (nonexistent)
+++ . (revision 24)
.
Property changes :
Added: svn:ignore
## -0,0 +1,36 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+_impactbatch.log
+sys_tst_rlink_s3.ucf
+*.dep_ucf_cpp
+*.svf