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  • This comparison shows the changes necessary to convert path
    /w11/tags/w11a_V0.6/rtl/sys_gen/tst_snhumanio
    from Rev 19 to Rev 24
    Reverse comparison

Rev 19 → Rev 24

/nexys2/Makefile
0,0 → 1,28
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2011-09-17 410 1.0 Initial version
#
VBOM_all = $(wildcard *.vbom)
BIT_all = $(VBOM_all:.vbom=.bit)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
#
.PHONY : all clean
#
all : $(BIT_all)
#
clean : ise_clean
rm -f $(VBOM_all:.vbom=.ucf)
#
#----
#
include $(RETROBASE)/rtl/make/generic_xflow.mk
include $(RETROBASE)/rtl/make/generic_ghdl.mk
#
ifndef DONTINCDEP
include $(VBOM_all:.vbom=.dep_xst)
include $(VBOM_all:.vbom=.dep_ghdl)
endif
#
/nexys2/sys_tst_snhumanio_n2.vhd
0,0 → 1,161
-- $Id: sys_tst_snhumanio_n2.vhd 444 2011-12-25 10:04:58Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation, either version 2, or at your option any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for complete details.
--
------------------------------------------------------------------------------
-- Module Name: sys_tst_snhumanio_n2 - syn
-- Description: snhumanio tester design for nexys2
--
-- Dependencies: vlib/genlib/clkdivce
-- bplib/bpgen/sn_humanio
-- tst_snhumanio
-- vlib/nxcramlib/nx_cram_dummy
--
-- Test bench: -
--
-- Target Devices: generic
-- Tool versions: xst 13.1; ghdl 0.29
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2011-09-17 410 13.1 O40d xc3s1200e-4 149 207 - 144 t 10.2
--
-- Revision History:
-- Date Rev Version Comment
-- 2011-12-23 444 1.1 remove clksys output hack
-- 2011-11-26 433 1.0.3 use nx_cram_dummy now
-- 2011-11-23 432 1.0.3 update O_FLA_CE_N usage
-- 2011-10-25 419 1.0.2 get entity name right...
-- 2011-09-17 410 1.0 Initial version
------------------------------------------------------------------------------
-- Usage of Nexys 2 Switches, Buttons, LEDs:
--
 
library ieee;
use ieee.std_logic_1164.all;
 
use work.slvtypes.all;
use work.genlib.all;
use work.bpgenlib.all;
use work.nxcramlib.all;
use work.sys_conf.all;
 
-- ----------------------------------------------------------------------------
 
entity sys_tst_snhumanio_n2 is -- top level
-- implements nexys2_aif
port (
I_CLK50 : in slbit; -- 50 MHz clock
I_RXD : in slbit; -- receive data (board view)
O_TXD : out slbit; -- transmit data (board view)
I_SWI : in slv8; -- n2 switches
I_BTN : in slv4; -- n2 buttons
O_LED : out slv8; -- n2 leds
O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low)
O_SEG_N : out slv8; -- 7 segment disp: segments (act.low)
O_MEM_CE_N : out slbit; -- cram: chip enable (act.low)
O_MEM_BE_N : out slv2; -- cram: byte enables (act.low)
O_MEM_WE_N : out slbit; -- cram: write enable (act.low)
O_MEM_OE_N : out slbit; -- cram: output enable (act.low)
O_MEM_ADV_N : out slbit; -- cram: address valid (act.low)
O_MEM_CLK : out slbit; -- cram: clock
O_MEM_CRE : out slbit; -- cram: command register enable
I_MEM_WAIT : in slbit; -- cram: mem wait
O_MEM_ADDR : out slv23; -- cram: address lines
IO_MEM_DATA : inout slv16; -- cram: data lines
O_FLA_CE_N : out slbit -- flash ce.. (act.low)
);
end sys_tst_snhumanio_n2;
 
architecture syn of sys_tst_snhumanio_n2 is
 
signal CLK : slbit := '0';
 
signal SWI : slv8 := (others=>'0');
signal BTN : slv4 := (others=>'0');
signal LED : slv8 := (others=>'0');
signal DSP_DAT : slv16 := (others=>'0');
signal DSP_DP : slv4 := (others=>'0');
 
signal RESET : slbit := '0';
signal CE_MSEC : slbit := '0';
 
begin
 
RESET <= '0'; -- so far not used
CLK <= I_CLK50;
 
CLKDIV : clkdivce
generic map (
CDUWIDTH => 7,
USECDIV => 50,
MSECDIV => 1000)
port map (
CLK => CLK,
CE_USEC => open,
CE_MSEC => CE_MSEC
);
 
HIO : sn_humanio
generic map (
BWIDTH => 4,
DEBOUNCE => sys_conf_hio_debounce)
port map (
CLK => CLK,
RESET => RESET,
CE_MSEC => CE_MSEC,
SWI => SWI,
BTN => BTN,
LED => LED,
DSP_DAT => DSP_DAT,
DSP_DP => DSP_DP,
I_SWI => I_SWI,
I_BTN => I_BTN,
O_LED => O_LED,
O_ANO_N => O_ANO_N,
O_SEG_N => O_SEG_N
);
 
HIOTEST : entity work.tst_snhumanio
generic map (
BWIDTH => 4)
port map (
CLK => CLK,
RESET => RESET,
CE_MSEC => CE_MSEC,
SWI => SWI,
BTN => BTN,
LED => LED,
DSP_DAT => DSP_DAT,
DSP_DP => DSP_DP
);
 
O_TXD <= I_RXD;
 
SRAM_PROT : nx_cram_dummy -- connect CRAM to protection dummy
port map (
O_MEM_CE_N => O_MEM_CE_N,
O_MEM_BE_N => O_MEM_BE_N,
O_MEM_WE_N => O_MEM_WE_N,
O_MEM_OE_N => O_MEM_OE_N,
O_MEM_ADV_N => O_MEM_ADV_N,
O_MEM_CLK => O_MEM_CLK,
O_MEM_CRE => O_MEM_CRE,
I_MEM_WAIT => I_MEM_WAIT,
O_MEM_ADDR => O_MEM_ADDR,
IO_MEM_DATA => IO_MEM_DATA
);
 
O_FLA_CE_N <= '1'; -- keep Flash memory disabled
 
end syn;
/nexys2/sys_tst_snhumanio_n2.vbom
0,0 → 1,14
# libs
../../../vlib/slvtypes.vhd
../../../vlib/genlib/genlib.vhd
../../../bplib/bpgen/bpgenlib.vbom
../../../bplib/nxcramlib/nxcramlib.vhd
${sys_conf := sys_conf.vhd}
# components
../../../vlib/genlib/clkdivce.vbom
../../../bplib/bpgen/sn_humanio.vbom
../tst_snhumanio.vbom
../../../bplib/nxcramlib/nx_cram_dummy.vbom
# design
sys_tst_snhumanio_n2.vhd
@ucf_cpp: sys_tst_snhumanio_n2.ucf
/nexys2/sys_conf.vhd
0,0 → 1,35
-- $Id: sys_conf.vhd 410 2011-09-18 11:23:09Z mueller $
--
-- Copyright 2011- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation, either version 2, or at your option any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for complete details.
--
------------------------------------------------------------------------------
-- Package Name: sys_conf
-- Description: Definitions for sys_tst_snhumanio_n2 (for synthesis)
--
-- Dependencies: -
-- Tool versions: xst 13.1; ghdl 0.29
-- Revision History:
-- Date Rev Version Comment
-- 2011-09-17 410 1.0 Initial version
------------------------------------------------------------------------------
 
library ieee;
use ieee.std_logic_1164.all;
 
use work.slvtypes.all;
 
package sys_conf is
 
constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers
 
end package sys_conf;
 
/nexys2/sys_tst_snhumanio_n2.mfset
0,0 → 1,34
# $Id: sys_tst_snhumanio_n2.mfset 412 2011-10-08 15:15:20Z mueller $
#
# ----------------------------------------------------------------------------
[xst]
INFO:.*Mux is complete : default of case is discarded
 
Unconnected output port 'CE_USEC' of component 'clkdivce'
 
Input <I_MEM_WAIT> is never used
 
FF/Latch <R_REGS.ucnt_\d*> has a constant value of 0
Node <CLKDIV/R_REGS.usec> of sequential type is unconnected
 
#
# ----------------------------------------------------------------------------
[tra]
 
#
# ----------------------------------------------------------------------------
[map]
The signal <I_MEM_WAIT_IBUF> is incomplete
INFO:.*
 
#
# ----------------------------------------------------------------------------
[par]
The signal I_MEM_WAIT_IBUF has no load
There are 1 loadless signals in this design
 
#
# ----------------------------------------------------------------------------
[bgn]
Spartan-3 1200E and 1600E devices do not support bitstream
The signal <I_MEM_WAIT_IBUF> is incomplete
/nexys2/sys_tst_snhumanio_n2.ucf_cpp
0,0 → 1,15
## $Id: sys_tst_snhumanio_n2.ucf_cpp 410 2011-09-18 11:23:09Z mueller $
##
## Revision History:
## Date Rev Version Comment
## 2011-09-17 410 1.0 Initial version
##
 
NET "I_CLK50" TNM_NET = "I_CLK50";
TIMESPEC "TS_I_CLK50" = PERIOD "I_CLK50" 20.0 ns HIGH 50 %;
OFFSET = IN 10 ns BEFORE "I_CLK50";
OFFSET = OUT 20 ns AFTER "I_CLK50";
 
## std board
##
#include "bplib/nexys2/nexys2_pins.ucf"
/nexys2/.cvsignore
0,0 → 1,4
_impactbatch.log
sys_tst_snhumanio_n2.ucf
*.dep_ucf_cpp
*.svf
nexys2 Property changes : Added: svn:ignore ## -0,0 +1,36 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +_impactbatch.log +sys_tst_snhumanio_n2.ucf +*.dep_ucf_cpp +*.svf Index: nexys3/Makefile =================================================================== --- nexys3/Makefile (nonexistent) +++ nexys3/Makefile (revision 24) @@ -0,0 +1,28 @@ +# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $ +# +# Revision History: +# Date Rev Version Comment +# 2011-11-27 433 1.0 Initial version +# +VBOM_all = $(wildcard *.vbom) +BIT_all = $(VBOM_all:.vbom=.bit) +# +include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk +# +.PHONY : all clean +# +all : $(BIT_all) +# +clean : ise_clean + rm -f $(VBOM_all:.vbom=.ucf) +# +#---- +# +include $(RETROBASE)/rtl/make/generic_xflow.mk +include $(RETROBASE)/rtl/make/generic_ghdl.mk +# +ifndef DONTINCDEP +include $(VBOM_all:.vbom=.dep_xst) +include $(VBOM_all:.vbom=.dep_ghdl) +endif +# Index: nexys3/sys_tst_snhumanio_n3.vbom =================================================================== --- nexys3/sys_tst_snhumanio_n3.vbom (nonexistent) +++ nexys3/sys_tst_snhumanio_n3.vbom (revision 24) @@ -0,0 +1,14 @@ +# libs +../../../vlib/slvtypes.vhd +../../../vlib/genlib/genlib.vhd +../../../bplib/bpgen/bpgenlib.vbom +../../../bplib/nxcramlib/nxcramlib.vhd +${sys_conf := sys_conf.vhd} +# components +../../../vlib/genlib/clkdivce.vbom +../../../bplib/bpgen/sn_humanio.vbom +../tst_snhumanio.vbom +../../../bplib/nxcramlib/nx_cram_dummy.vbom +# design +sys_tst_snhumanio_n3.vhd +@ucf_cpp: sys_tst_snhumanio_n3.ucf Index: nexys3/.cvsignore =================================================================== --- nexys3/.cvsignore (nonexistent) +++ nexys3/.cvsignore (revision 24) @@ -0,0 +1,5 @@ +_impactbatch.log +sys_tst_snhumanio_n3.ucf +*.dep_ucf_cpp +_impact* +*.svf Index: nexys3/sys_conf.vhd =================================================================== --- nexys3/sys_conf.vhd (nonexistent) +++ nexys3/sys_conf.vhd (revision 24) @@ -0,0 +1,35 @@ +-- $Id: sys_conf.vhd 433 2011-11-27 22:04:39Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Package Name: sys_conf +-- Description: Definitions for sys_tst_snhumanio_n3 (for synthesis) +-- +-- Dependencies: - +-- Tool versions: xst 13.1; ghdl 0.29 +-- Revision History: +-- Date Rev Version Comment +-- 2011-11-27 433 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; + +package sys_conf is + + constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers + +end package sys_conf; + Index: nexys3/sys_tst_snhumanio_n3.ucf_cpp =================================================================== --- nexys3/sys_tst_snhumanio_n3.ucf_cpp (nonexistent) +++ nexys3/sys_tst_snhumanio_n3.ucf_cpp (revision 24) @@ -0,0 +1,15 @@ +## $Id: sys_tst_snhumanio_n3.ucf_cpp 433 2011-11-27 22:04:39Z mueller $ +## +## Revision History: +## Date Rev Version Comment +## 2011-11-27 433 1.0 Initial version +## + +NET "I_CLK100" TNM_NET = "I_CLK100"; +TIMESPEC "TS_I_CLK100" = PERIOD "I_CLK100" 10.0 ns HIGH 50 %; +OFFSET = IN 10 ns BEFORE "I_CLK100"; +OFFSET = OUT 20 ns AFTER "I_CLK100"; + +## std board +## +#include "bplib/nexys3/nexys3_pins.ucf" Index: nexys3/sys_tst_snhumanio_n3.vhd =================================================================== --- nexys3/sys_tst_snhumanio_n3.vhd (nonexistent) +++ nexys3/sys_tst_snhumanio_n3.vhd (revision 24) @@ -0,0 +1,159 @@ +-- $Id: sys_tst_snhumanio_n3.vhd 433 2011-11-27 22:04:39Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: sys_tst_snhumanio_n3 - syn +-- Description: snhumanio tester design for nexys3 +-- +-- Dependencies: vlib/genlib/clkdivce +-- bplib/bpgen/sn_humanio +-- tst_snhumanio +-- vlib/nxcramlib/nx_cram_dummy +-- +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Synthesized (xst): +-- Date Rev ise Target flop lutl lutm slic t peri +-- 2011-11-27 433 13.1 O40d xc3s1200e-4 151 195 - 65 t 6.1 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2011-11-27 433 1.0 Initial version +------------------------------------------------------------------------------ +-- Usage of Nexys 2 Switches, Buttons, LEDs: +-- + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; +use work.genlib.all; +use work.bpgenlib.all; +use work.nxcramlib.all; +use work.sys_conf.all; + +-- ---------------------------------------------------------------------------- + +entity sys_tst_snhumanio_n3 is -- top level + -- implements nexys3_aif + port ( + I_CLK100 : in slbit; -- 100 MHz clock + I_RXD : in slbit; -- receive data (board view) + O_TXD : out slbit; -- transmit data (board view) + I_SWI : in slv8; -- n3 switches + I_BTN : in slv5; -- n3 buttons + O_LED : out slv8; -- n3 leds + O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low) + O_SEG_N : out slv8; -- 7 segment disp: segments (act.low) + O_MEM_CE_N : out slbit; -- cram: chip enable (act.low) + O_MEM_BE_N : out slv2; -- cram: byte enables (act.low) + O_MEM_WE_N : out slbit; -- cram: write enable (act.low) + O_MEM_OE_N : out slbit; -- cram: output enable (act.low) + O_MEM_ADV_N : out slbit; -- cram: address valid (act.low) + O_MEM_CLK : out slbit; -- cram: clock + O_MEM_CRE : out slbit; -- cram: command register enable + I_MEM_WAIT : in slbit; -- cram: mem wait + O_MEM_ADDR : out slv23; -- cram: address lines + IO_MEM_DATA : inout slv16; -- cram: data lines + O_PPCM_CE_N : out slbit; -- ppcm: ... + O_PPCM_RST_N : out slbit -- ppcm: ... + ); +end sys_tst_snhumanio_n3; + +architecture syn of sys_tst_snhumanio_n3 is + + signal CLK : slbit := '0'; + + signal SWI : slv8 := (others=>'0'); + signal BTN : slv5 := (others=>'0'); + signal LED : slv8 := (others=>'0'); + signal DSP_DAT : slv16 := (others=>'0'); + signal DSP_DP : slv4 := (others=>'0'); + + signal RESET : slbit := '0'; + signal CE_MSEC : slbit := '0'; + +begin + + RESET <= '0'; -- so far not used + + CLK <= I_CLK100; + + CLKDIV : clkdivce + generic map ( + CDUWIDTH => 7, + USECDIV => 100, + MSECDIV => 1000) + port map ( + CLK => CLK, + CE_USEC => open, + CE_MSEC => CE_MSEC + ); + + HIO : sn_humanio + generic map ( + BWIDTH => 5, + DEBOUNCE => sys_conf_hio_debounce) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP, + I_SWI => I_SWI, + I_BTN => I_BTN, + O_LED => O_LED, + O_ANO_N => O_ANO_N, + O_SEG_N => O_SEG_N + ); + + HIOTEST : entity work.tst_snhumanio + generic map ( + BWIDTH => 5) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP + ); + + O_TXD <= I_RXD; + + SRAM_PROT : nx_cram_dummy -- connect CRAM to protection dummy + port map ( + O_MEM_CE_N => O_MEM_CE_N, + O_MEM_BE_N => O_MEM_BE_N, + O_MEM_WE_N => O_MEM_WE_N, + O_MEM_OE_N => O_MEM_OE_N, + O_MEM_ADV_N => O_MEM_ADV_N, + O_MEM_CLK => O_MEM_CLK, + O_MEM_CRE => O_MEM_CRE, + I_MEM_WAIT => I_MEM_WAIT, + O_MEM_ADDR => O_MEM_ADDR, + IO_MEM_DATA => IO_MEM_DATA + ); + + O_PPCM_CE_N <= '1'; -- keep parallel PCM memory disabled + O_PPCM_RST_N <= '1'; -- + +end syn; Index: nexys3 =================================================================== --- nexys3 (nonexistent) +++ nexys3 (revision 24)
nexys3 Property changes : Added: svn:ignore ## -0,0 +1,37 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +_impactbatch.log +sys_tst_snhumanio_n3.ucf +*.dep_ucf_cpp +_impact* +*.svf Index: atlys/Makefile =================================================================== --- atlys/Makefile (nonexistent) +++ atlys/Makefile (revision 24) @@ -0,0 +1,28 @@ +# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $ +# +# Revision History: +# Date Rev Version Comment +# 2011-10-11 414 1.0 Initial version +# +VBOM_all = $(wildcard *.vbom) +BIT_all = $(VBOM_all:.vbom=.bit) +# +include $(RETROBASE)/rtl/make/xflow_default_atlys.mk +# +.PHONY : all clean +# +all : $(BIT_all) +# +clean : ise_clean + rm -f $(VBOM_all:.vbom=.ucf) +# +#---- +# +include $(RETROBASE)/rtl/make/generic_xflow.mk +include $(RETROBASE)/rtl/make/generic_ghdl.mk +# +ifndef DONTINCDEP +include $(VBOM_all:.vbom=.dep_xst) +include $(VBOM_all:.vbom=.dep_ghdl) +endif +# Index: atlys/sys_tst_snhumanio_atlys.vbom =================================================================== --- atlys/sys_tst_snhumanio_atlys.vbom (nonexistent) +++ atlys/sys_tst_snhumanio_atlys.vbom (revision 24) @@ -0,0 +1,12 @@ +# libs +../../../vlib/slvtypes.vhd +../../../vlib/genlib/genlib.vhd +../../../bplib/bpgen/bpgenlib.vbom +${sys_conf := sys_conf.vhd} +# components +../../../vlib/genlib/clkdivce.vbom +../../../bplib/bpgen/sn_humanio_demu.vbom +../tst_snhumanio.vbom +# design +sys_tst_snhumanio_atlys.vhd +@ucf_cpp: sys_tst_snhumanio_atlys.ucf Index: atlys/sys_tst_snhumanio_atlys.vhd =================================================================== --- atlys/sys_tst_snhumanio_atlys.vhd (nonexistent) +++ atlys/sys_tst_snhumanio_atlys.vhd (revision 24) @@ -0,0 +1,130 @@ +-- $Id: sys_tst_snhumanio_atlys.vhd 439 2011-12-16 21:56:04Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: sys_tst_snhumanio_atlys - syn +-- Description: snhumanio tester design for atlys +-- +-- Dependencies: vlib/genlib/clkdivce +-- bplib/bpgen/sn_humanio_demu +-- tst_snhumanio +-- +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Synthesized (xst): +-- Date Rev ise Target flop lutl lutm slic t peri +-- 2011-10-11 414 13.1 O40d xc6slx45 166 196 - 60 t 4.9 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2011-10-11 414 1.0 Initial version +------------------------------------------------------------------------------ +-- Usage of Atlys Switches, Buttons, LEDs: +-- + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; +use work.genlib.all; +use work.bpgenlib.all; +use work.sys_conf.all; + +-- ---------------------------------------------------------------------------- + +entity sys_tst_snhumanio_atlys is -- top level + -- implements atlys_aif + port ( + I_CLK100 : in slbit; -- 100 MHz clock +-- O_CLKSYS : out slbit; -- DCM derived system clock + I_USB_RXD : in slbit; -- USB UART receive data (board view) + O_USB_TXD : out slbit; -- USB UART transmit data (board view) + I_HIO_SWI : in slv8; -- atlys hio switches + I_HIO_BTN : in slv6; -- atlys hio buttons + O_HIO_LED: out slv8; -- atlys hio leds + O_FUSP_RTS_N : out slbit; -- fusp: rs232 rts_n + I_FUSP_CTS_N : in slbit; -- fusp: rs232 cts_n + I_FUSP_RXD : in slbit; -- fusp: rs232 rx + O_FUSP_TXD : out slbit -- fusp: rs232 tx + ); +end sys_tst_snhumanio_atlys; + +architecture syn of sys_tst_snhumanio_atlys is + + signal CLK : slbit := '0'; + + signal SWI : slv8 := (others=>'0'); + signal BTN : slv4 := (others=>'0'); + signal LED : slv8 := (others=>'0'); + signal DSP_DAT : slv16 := (others=>'0'); + signal DSP_DP : slv4 := (others=>'0'); + + signal RESET : slbit := '0'; + signal CE_MSEC : slbit := '0'; + +begin + + RESET <= '0'; -- so far not used + + CLK <= I_CLK100; + + CLKDIV : clkdivce + generic map ( + CDUWIDTH => 7, + USECDIV => 100, + MSECDIV => 1000) + port map ( + CLK => CLK, + CE_USEC => open, + CE_MSEC => CE_MSEC + ); + + HIO : sn_humanio_demu + generic map ( + DEBOUNCE => sys_conf_hio_debounce) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP, + I_SWI => I_HIO_SWI, + I_BTN => I_HIO_BTN, + O_LED => O_HIO_LED + ); + + HIOTEST : entity work.tst_snhumanio + generic map ( + BWIDTH => 4) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP + ); + + O_USB_TXD <= I_USB_RXD; + O_FUSP_TXD <= I_FUSP_RXD; + O_FUSP_RTS_N <= I_FUSP_CTS_N; + +end syn; Index: atlys/sys_tst_snhumanio_atlys.mfset =================================================================== --- atlys/sys_tst_snhumanio_atlys.mfset (nonexistent) +++ atlys/sys_tst_snhumanio_atlys.mfset (revision 24) @@ -0,0 +1,29 @@ +# $Id: sys_tst_snhumanio_atlys.mfset 416 2011-10-15 13:32:57Z mueller $ +# +# ---------------------------------------------------------------------------- +[xst] +INFO:.*Case statement is complete. others clause is never selected + +sys_tst_snhumanio_atlys\..*Output port of the instance is unconnected + +Node of sequential type is unconnected + +The FF/Latch in Unit <.*> is equivalent +The small RAM <.*> will be implemented on LUTs + +# +# ---------------------------------------------------------------------------- +[tra] + +# +# ---------------------------------------------------------------------------- +[map] +INFO:.* + +# +# ---------------------------------------------------------------------------- +[par] + +# +# ---------------------------------------------------------------------------- +[bgn] Index: atlys/sys_conf.vhd =================================================================== --- atlys/sys_conf.vhd (nonexistent) +++ atlys/sys_conf.vhd (revision 24) @@ -0,0 +1,35 @@ +-- $Id: sys_conf.vhd 414 2011-10-11 19:38:12Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Package Name: sys_conf +-- Description: Definitions for sys_tst_snhumanio_atlys (for synthesis) +-- +-- Dependencies: - +-- Tool versions: xst 13.1; ghdl 0.29 +-- Revision History: +-- Date Rev Version Comment +-- 2011-10-11 414 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; + +package sys_conf is + + constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers + +end package sys_conf; + Index: atlys/sys_tst_snhumanio_atlys.ucf_cpp =================================================================== --- atlys/sys_tst_snhumanio_atlys.ucf_cpp (nonexistent) +++ atlys/sys_tst_snhumanio_atlys.ucf_cpp (revision 24) @@ -0,0 +1,16 @@ +## $Id: sys_tst_snhumanio_atlys.ucf_cpp 414 2011-10-11 19:38:12Z mueller $ +## +## Revision History: +## Date Rev Version Comment +## 2011-10-11 414 1.0 Initial version +## + +NET "I_CLK100" TNM_NET = "I_CLK100"; +TIMESPEC "TS_I_CLK100" = PERIOD "I_CLK100" 10.0 ns HIGH 50 %; +OFFSET = IN 10 ns BEFORE "I_CLK100"; +OFFSET = OUT 20 ns AFTER "I_CLK100"; + +## std board +## +#include "bplib/atlys/atlys_pins.ucf" +#include "bplib/atlys/atlys_pins_pma0_rs232.ucf" Index: atlys/.cvsignore =================================================================== --- atlys/.cvsignore (nonexistent) +++ atlys/.cvsignore (revision 24) @@ -0,0 +1,4 @@ +_impactbatch.log +sys_tst_snhumanio_atlys.ucf +*.dep_ucf_cpp +*.svf Index: atlys =================================================================== --- atlys (nonexistent) +++ atlys (revision 24)
atlys Property changes : Added: svn:ignore ## -0,0 +1,36 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +_impactbatch.log +sys_tst_snhumanio_atlys.ucf +*.dep_ucf_cpp +*.svf Index: Makefile =================================================================== --- Makefile (nonexistent) +++ Makefile (revision 24) @@ -0,0 +1,25 @@ +# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $ +# +# Revision History: +# Date Rev Version Comment +# 2011-09-17 410 1.0 Initial version +# +VBOM_all = $(wildcard *.vbom) +NGC_all = $(VBOM_all:.vbom=.ngc) +# +include $(RETROBASE)/rtl/make/xflow_default_s3board.mk +# +.PHONY : all clean +# +all : $(NGC_all) +# +clean : ise_clean +# +#---- +# +include $(RETROBASE)/rtl/make/generic_xflow.mk +# +ifndef DONTINCDEP +include $(VBOM_all:.vbom=.dep_xst) +endif +# Index: s3board/Makefile =================================================================== --- s3board/Makefile (nonexistent) +++ s3board/Makefile (revision 24) @@ -0,0 +1,28 @@ +# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $ +# +# Revision History: +# Date Rev Version Comment +# 2011-09-18 410 1.0 Initial version +# +VBOM_all = $(wildcard *.vbom) +BIT_all = $(VBOM_all:.vbom=.bit) +# +include $(RETROBASE)/rtl/make/xflow_default_s3board.mk +# +.PHONY : all clean +# +all : $(BIT_all) +# +clean : ise_clean + rm -f $(VBOM_all:.vbom=.ucf) +# +#---- +# +include $(RETROBASE)/rtl/make/generic_xflow.mk +include $(RETROBASE)/rtl/make/generic_ghdl.mk +# +ifndef DONTINCDEP +include $(VBOM_all:.vbom=.dep_xst) +include $(VBOM_all:.vbom=.dep_ghdl) +endif +# Index: s3board/sys_tst_snhumanio_s3.vbom =================================================================== --- s3board/sys_tst_snhumanio_s3.vbom (nonexistent) +++ s3board/sys_tst_snhumanio_s3.vbom (revision 24) @@ -0,0 +1,14 @@ +# libs +../../../vlib/slvtypes.vhd +../../../vlib/genlib/genlib.vhd +../../../bplib/bpgen/bpgenlib.vbom +../../../bplib/s3board/s3boardlib.vhd +${sys_conf := sys_conf.vhd} +# components +../../../vlib/genlib/clkdivce.vbom +../../../bplib/bpgen/sn_humanio.vbom +../tst_snhumanio.vbom +../../../bplib/s3board/s3_sram_dummy.vbom +# design +sys_tst_snhumanio_s3.vhd +@ucf_cpp: sys_tst_snhumanio_s3.ucf Index: s3board/sys_conf.vhd =================================================================== --- s3board/sys_conf.vhd (nonexistent) +++ s3board/sys_conf.vhd (revision 24) @@ -0,0 +1,35 @@ +-- $Id: sys_conf.vhd 410 2011-09-18 11:23:09Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Package Name: sys_conf +-- Description: Definitions for sys_tst_snhumanio_n2 (for synthesis) +-- +-- Dependencies: - +-- Tool versions: xst 13.1; ghdl 0.29 +-- Revision History: +-- Date Rev Version Comment +-- 2011-09-18 410 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; + +package sys_conf is + + constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers + +end package sys_conf; + Index: s3board/sys_tst_snhumanio_s3.mfset =================================================================== --- s3board/sys_tst_snhumanio_s3.mfset (nonexistent) +++ s3board/sys_tst_snhumanio_s3.mfset (revision 24) @@ -0,0 +1,27 @@ +# $Id: sys_tst_snhumanio_s3.mfset 417 2011-10-22 10:30:29Z mueller $ +# +# ---------------------------------------------------------------------------- +[xst] +INFO:.*Mux is complete : default of case is discarded + +Unconnected output port 'CE_USEC' of component 'clkdivce' + +FF/Latch has a constant value of 0 +Node of sequential type is unconnected + +# +# ---------------------------------------------------------------------------- +[tra] + +# +# ---------------------------------------------------------------------------- +[map] +INFO:.* + +# +# ---------------------------------------------------------------------------- +[par] + +# +# ---------------------------------------------------------------------------- +[bgn] Index: s3board/sys_tst_snhumanio_s3.ucf_cpp =================================================================== --- s3board/sys_tst_snhumanio_s3.ucf_cpp (nonexistent) +++ s3board/sys_tst_snhumanio_s3.ucf_cpp (revision 24) @@ -0,0 +1,15 @@ +## $Id: sys_tst_snhumanio_s3.ucf_cpp 410 2011-09-18 11:23:09Z mueller $ +## +## Revision History: +## Date Rev Version Comment +## 2011-09-18 410 1.0 Initial version +## + +NET "I_CLK50" TNM_NET = "I_CLK50"; +TIMESPEC "TS_I_CLK50" = PERIOD "I_CLK50" 20 ns HIGH 50 %; +OFFSET = IN 10 ns BEFORE "I_CLK50"; +OFFSET = OUT 20 ns AFTER "I_CLK50"; + +## std board +## +#include "bplib/s3board/s3board_pins.ucf" Index: s3board/.cvsignore =================================================================== --- s3board/.cvsignore (nonexistent) +++ s3board/.cvsignore (revision 24) @@ -0,0 +1,4 @@ +_impactbatch.log +sys_tst_snhumanio_s3.ucf +*.dep_ucf_cpp +*.svf Index: s3board/sys_tst_snhumanio_s3.vhd =================================================================== --- s3board/sys_tst_snhumanio_s3.vhd (nonexistent) +++ s3board/sys_tst_snhumanio_s3.vhd (revision 24) @@ -0,0 +1,148 @@ +-- $Id: sys_tst_snhumanio_s3.vhd 419 2011-11-01 19:42:30Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: sys_tst_snhumanio_s3 - syn +-- Description: snhumanio tester design for s3board +-- +-- Dependencies: vlib/genlib/clkdivce +-- bplib/bpgen/sn_humanio +-- tst_snhumanio +-- s3board/s3_sram_dummy +-- +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Synthesized (xst): +-- Date Rev ise Target flop lutl lutm slic t peri +-- 2011-09-18 410 13.1 O40d xc3s1000-4 149 211 - 143 t 11.4 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2011-10-25 419 1.0.2 get entity name right... +-- 2011-10-15 416 1.0.1 remove O_CLKSYS top level port +-- 2011-09-18 410 1.0 Initial version +------------------------------------------------------------------------------ +-- Usage of S3BOARD Switches, Buttons, LEDs: +-- + +library ieee; +use ieee.std_logic_1164.all; + +use work.slvtypes.all; +use work.genlib.all; +use work.bpgenlib.all; +use work.s3boardlib.all; +use work.sys_conf.all; + +-- ---------------------------------------------------------------------------- + +entity sys_tst_snhumanio_s3 is -- top level + -- implements s3board_aif + port ( + I_CLK50 : in slbit; -- 50 MHz clock + I_RXD : in slbit; -- receive data (board view) + O_TXD : out slbit; -- transmit data (board view) + I_SWI : in slv8; -- s3 switches + I_BTN : in slv4; -- s3 buttons + O_LED : out slv8; -- s3 leds + O_ANO_N : out slv4; -- 7 segment disp: anodes (act.low) + O_SEG_N : out slv8; -- 7 segment disp: segments (act.low) + O_MEM_CE_N : out slv2; -- sram: chip enables (act.low) + O_MEM_BE_N : out slv4; -- sram: byte enables (act.low) + O_MEM_WE_N : out slbit; -- sram: write enable (act.low) + O_MEM_OE_N : out slbit; -- sram: output enable (act.low) + O_MEM_ADDR : out slv18; -- sram: address lines + IO_MEM_DATA : inout slv32 -- sram: data lines + ); +end sys_tst_snhumanio_s3; + +architecture syn of sys_tst_snhumanio_s3 is + + signal CLK : slbit := '0'; + + signal SWI : slv8 := (others=>'0'); + signal BTN : slv4 := (others=>'0'); + signal LED : slv8 := (others=>'0'); + signal DSP_DAT : slv16 := (others=>'0'); + signal DSP_DP : slv4 := (others=>'0'); + + signal RESET : slbit := '0'; + signal CE_MSEC : slbit := '0'; + +begin + + RESET <= '0'; -- so far not used + + CLK <= I_CLK50; + + CLKDIV : clkdivce + generic map ( + CDUWIDTH => 7, + USECDIV => 50, + MSECDIV => 1000) + port map ( + CLK => CLK, + CE_USEC => open, + CE_MSEC => CE_MSEC + ); + + HIO : sn_humanio + generic map ( + BWIDTH => 4, + DEBOUNCE => sys_conf_hio_debounce) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP, + I_SWI => I_SWI, + I_BTN => I_BTN, + O_LED => O_LED, + O_ANO_N => O_ANO_N, + O_SEG_N => O_SEG_N + ); + + HIOTEST : entity work.tst_snhumanio + generic map ( + BWIDTH => 4) + port map ( + CLK => CLK, + RESET => RESET, + CE_MSEC => CE_MSEC, + SWI => SWI, + BTN => BTN, + LED => LED, + DSP_DAT => DSP_DAT, + DSP_DP => DSP_DP + ); + + O_TXD <= I_RXD; + + SRAM_PROT : s3_sram_dummy -- connect SRAM to protection dummy + port map ( + O_MEM_CE_N => O_MEM_CE_N, + O_MEM_BE_N => O_MEM_BE_N, + O_MEM_WE_N => O_MEM_WE_N, + O_MEM_OE_N => O_MEM_OE_N, + O_MEM_ADDR => O_MEM_ADDR, + IO_MEM_DATA => IO_MEM_DATA + ); + +end syn; Index: s3board =================================================================== --- s3board (nonexistent) +++ s3board (revision 24)
s3board Property changes : Added: svn:ignore ## -0,0 +1,36 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +_impactbatch.log +sys_tst_snhumanio_s3.ucf +*.dep_ucf_cpp +*.svf Index: tst_snhumanio.vhd =================================================================== --- tst_snhumanio.vhd (nonexistent) +++ tst_snhumanio.vhd (revision 24) @@ -0,0 +1,234 @@ +-- $Id: tst_snhumanio.vhd 416 2011-10-15 13:32:57Z mueller $ +-- +-- Copyright 2011- by Walter F.J. Mueller +-- +-- This program is free software; you may redistribute and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation, either version 2, or at your option any later version. +-- +-- This program is distributed in the hope that it will be useful, but +-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for complete details. +-- +------------------------------------------------------------------------------ +-- Module Name: tst_snhumanio - syn +-- Description: simple stand-alone tester for sn_humanio +-- +-- Dependencies: - +-- Test bench: - +-- +-- Target Devices: generic +-- Tool versions: xst 13.1; ghdl 0.29 +-- +-- Revision History: +-- Date Rev Version Comment +-- 2011-10-15 416 1.0.2 fix sensitivity list of proc_next +-- 2011-10-08 412 1.0.1 use better rndm init (so that swi=0 is non-const) +-- 2011-09-17 410 1.0 Initial version +------------------------------------------------------------------------------ + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.slvtypes.all; +use work.comlib.all; + +-- ---------------------------------------------------------------------------- + +entity tst_snhumanio is -- tester for rlink + generic ( + BWIDTH : positive := 4); -- BTN port width + port ( + CLK : in slbit; -- clock + RESET : in slbit; -- reset + CE_MSEC : in slbit; -- msec pulse + SWI : in slv8; -- switch settings + BTN : in slv(BWIDTH-1 downto 0); -- button settings + LED : out slv8; -- led data + DSP_DAT : out slv16; -- display data + DSP_DP : out slv4 -- display decimal points + ); +end tst_snhumanio; + +architecture syn of tst_snhumanio is + + constant c_mode_rndm : slv2 := "00"; + constant c_mode_cnt : slv2 := "01"; + constant c_mode_swi : slv2 := "10"; + constant c_mode_btst : slv2 := "11"; + + type regs_type is record + mode : slv2; -- current mode + allon : slbit; -- all LEDs on if set + cnt : slv16; -- counter + tcnt : slv16; -- swi/btn toggle counter + rndm : slv8; -- random number + swi_1 : slv8; -- last SWI state + btn_1 : slv(BWIDTH-1 downto 0); -- last BTN state + led : slv8; -- LED output state + dsp : slv16; -- display data + dp : slv4; -- display decimal points + end record regs_type; + + -- the rndm start value is /= 0 because a seed of 0 with a SWI setting of 0 + -- will result in a 0-0-0 sequence. The 01010101 start will get trapped in a + -- constant sequence with a 01100011 switch setting, which is rather unlikely. + constant rndminit : slv8 := "01010101"; + + constant btnzero : slv(BWIDTH-1 downto 0) := (others=>'0'); + + constant regs_init : regs_type := ( + c_mode_rndm, -- mode + '0', -- allon + (others=>'0'), -- cnt + (others=>'0'), -- tcnt + rndminit, -- rndm + (others=>'0'), -- swi_1 + btnzero, -- btn_1 + (others=>'0'), -- led + (others=>'0'), -- dsp + (others=>'0') -- dp + + ); + + signal R_REGS : regs_type := regs_init; -- state registers + signal N_REGS : regs_type := regs_init; -- next value state regs + + signal BTN4 : slbit := '0'; + +begin + + assert BWIDTH>=4 + report "assert(BWIDTH>=4): at least 4 BTNs available" + severity failure; + + B4YES: if BWIDTH > 4 generate + BTN4 <= BTN(4); + end generate B4YES; + B4NO: if BWIDTH = 4 generate + BTN4 <= '0'; + end generate B4NO; + + proc_regs: process (CLK) + begin + + if rising_edge(CLK) then + if RESET = '1' then + R_REGS <= regs_init; + else + R_REGS <= N_REGS; + end if; + end if; + + end process proc_regs; + + proc_next: process (R_REGS, CE_MSEC, SWI, BTN, BTN4) + + variable r : regs_type := regs_init; + variable n : regs_type := regs_init; + variable btn03 : slv4 := (others=>'0'); + + begin + r := R_REGS; + n := R_REGS; + + n.swi_1 := SWI; + n.btn_1 := BTN; + + if SWI/=r.swi_1 or BTN/=r.btn_1 then + n.tcnt := slv(unsigned(r.tcnt) + 1); + end if; + + btn03 := BTN(3 downto 0); + n.allon := BTN4; + + if unsigned(BTN) /= 0 then -- is a button being pressed ? + if r.mode /= c_mode_btst then -- not in btst mode + case btn03 is + when "0001" => -- 0001 single button -> rndm mode + n.mode := c_mode_rndm; + n.rndm := rndminit; + + when "0010" => -- 0010 single button -> cnt mode + n.mode := c_mode_cnt; + + when "0100" => -- 0100 single button -> swi mode + n.mode := c_mode_swi; + + when "1000" => -- 1001 single button -> btst mode + n.mode := c_mode_btst; + n.tcnt := (others=>'0'); + + when others => -- any 2+ button combo -> led test + n.allon := '1'; + end case; + + else -- button press in btst mode + + case btn03 is + when "1001" => -- 1001 double btn -> rndm mode + n.mode := c_mode_rndm; + when "1010" => -- 1010 double btn -> rndm cnt + n.mode := c_mode_cnt; + when "1100" => -- 1100 double btn -> rndm swi + n.mode := c_mode_swi; + when others => null; + end case; + + end if; + + else -- no button being pressed + + if CE_MSEC = '1' then -- on every usec + n.cnt := slv(unsigned(r.cnt) + 1); -- inc counter + if unsigned(r.cnt(8 downto 0)) = 0 then -- every 1/2 sec (approx.) + n.rndm := crc8_update(r.rndm, SWI); -- update rndm state + end if; + end if; + end if; + + if r.allon = '1' then -- if led test selected + n.led := (others=>'1'); -- all led,dsp,dp on + n.dsp := (others=>'1'); + n.dp := (others=>'1'); + + else -- no led test, normal output + + case r.mode is + when c_mode_rndm => + n.led := r.rndm; + n.dsp(7 downto 0) := r.rndm; + n.dsp(15 downto 8) := not r.rndm; + + when c_mode_cnt => + n.led := r.cnt(14 downto 7); + n.dsp := r.cnt; + + when c_mode_swi => + n.led := SWI; + n.dsp(7 downto 0) := SWI; + n.dsp(15 downto 8) := not SWI; + + when c_mode_btst => + n.led := SWI; + n.dsp := r.tcnt; + + when others => null; + end case; + + n.dp := BTN(3 downto 0); + + end if; + + N_REGS <= n; + + LED <= r.led; + DSP_DAT <= r.dsp; + DSP_DP <= r.dp; + + end process proc_next; + + +end syn; Index: tst_snhumanio.vbom =================================================================== --- tst_snhumanio.vbom (nonexistent) +++ tst_snhumanio.vbom (revision 24) @@ -0,0 +1,6 @@ +# libs +../../vlib/slvtypes.vhd +../../vlib/comlib/comlib.vhd +# components +# design +tst_snhumanio.vhd Index: . =================================================================== --- . (nonexistent) +++ . (revision 24)
. Property changes : Added: svn:ignore ## -0,0 +1,32 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log

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