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    /w11/tags/w11a_V0.61/rtl/make
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Rev 25 → Rev 26

/generic_ghdl.mk
0,0 → 1,52
# $Id: generic_ghdl.mk 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.3.2 use XTWI_PATH now (ise/vivado switch done later)
# 2013-01-27 477 1.3.1 use dontincdep.mk to suppress .dep include on clean
# 2011-08-13 405 1.3 renamed, moved to rtl/make;
# 2007-11-04 95 1.2.2 fix find statement in ghdl_tmp_clean
# 2007-11-02 94 1.2.1 don't delete cext_*.o in ghdl_tmp_clean
# 2007-07-08 65 1.2 support now autobuilding of _fsim and _tsim models
# 2007-06-16 57 1.1 cleanup ghdl_clean handling
# 2007-06-10 52 1.0 Initial version
#
GHDLIEEE = --ieee=synopsys
GHDLUNISIM = -P$(XTWI_PATH)/ISE_DS/ISE/ghdl/unisim
GHDLSIMPRIM = -P$(XTWI_PATH)/ISE_DS/ISE/ghdl/simprim
GHDL = ghdl
COMPILE.vhd = $(GHDL) -a $(GHDLIEEE)
LINK.vhd = $(GHDL) -e $(GHDLIEEE)
#
% : %.vbom
vbomconv --ghdl_i $<
vbomconv --ghdl_m $<
#
# rules for _[ft]sim to use 'virtual' [ft]sim vbom's (derived from _ssim)
#
%_fsim : %_ssim.vbom
vbomconv --ghdl_i $*_fsim.vbom
vbomconv --ghdl_m $*_fsim.vbom
#
%_tsim : %_ssim.vbom
vbomconv --ghdl_i $*_tsim.vbom
vbomconv --ghdl_m $*_tsim.vbom
#
%.dep_ghdl: %.vbom
vbomconv --dep_ghdl $< > $@
#
include $(RETROBASE)/rtl/make/dontincdep.mk
#
.PHONY: ghdl_clean ghdl_tmp_clean
#
ghdl_clean: ghdl_tmp_clean
rm -f $(EXE_all)
rm -f $(EXE_all:%=%_[sft]sim)
rm -f $(EXE_all:%=%.exe)
rm -f $(EXE_all:%=%_[sft]sim.exe)
rm -f cext_*.o
#
ghdl_tmp_clean:
find -maxdepth 1 -name "*.o" | grep -v "^\./cext_" | xargs rm -f
rm -f work-obj93.cf
#
/syn_7a_speed.opt
0,0 → 1,42
FLOWTYPE = FPGA_SYNTHESIS;
#
# $Id: syn_7a_speed.opt 540 2013-10-13 18:42:50Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-13 540 1.2 use -shreg_min_size=3
# 2013-09-21 534 1.0 Initial version (cloned from imp_s6_speed.opt)
#
# Derived from ISE xst_mixed.opt
#
# ----------------------------------------------------------------------------
# Options for XST
#
Program xst
-ifn <design>_xst.scr; # input XST script file
-ofn <design>_xst.log; # output XST log file
-intstyle xflow; # Message Reporting Style
#
# ParamFile lists the XST Properties that can be set by the user.
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>"; # Input/Project File Name
"-ifmt mixed"; # Input Format (Verilog and VHDL)
"-ofn <design>"; # Output File Name
"-ofmt ngc"; # Output File Format
"-top $top_entity"; # Top Design Name
"-p <partname>"; # Target Device
"-opt_mode SPEED"; # Optimization Criteria # AREA or SPEED
"-opt_level 2"; # Optimization Effort Criteria: 2=High
"-shreg_min_size 3"; # default is 2 !!
"-uc <design>.xcf"; # Constraint File name
#
# The following are HDL Options
#
End ParamFile
End Program xst
#
/xflow_default_nexys4.mk
0,0 → 1,24
# $Id: xflow_default_nexys4.mk 534 2013-09-22 21:37:24Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-09-21 534 1.0 Initial version
#---
#
# Setup for Digilent Nexys4
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = nexys4
ISE_PATH = xc7a100t-csg324-1
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_7a_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_7a_speed.opt
endif
#
/syn_s6_speed_ise133.opt
0,0 → 1,41
FLOWTYPE = FPGA_SYNTHESIS;
#
# $Id: syn_s6_speed_ise133.opt 537 2013-10-06 09:06:23Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2012-02-05 456 1.1 use $top_entity variable for -top attribute
# 2011-08-13 405 1.0 Initial version
#
# Derived from ISE xst_mixed.opt
#
# ----------------------------------------------------------------------------
# Options for XST
#
Program xst
-ifn <design>_xst.scr; # input XST script file
-ofn <design>_xst.log; # output XST log file
-intstyle xflow; # Message Reporting Style
#
# ParamFile lists the XST Properties that can be set by the user.
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>"; # Input/Project File Name
"-ifmt mixed"; # Input Format (Verilog and VHDL)
"-ofn <design>"; # Output File Name
"-ofmt ngc"; # Output File Format
"-top $top_entity"; # Top Design Name
"-p <partname>"; # Target Device
"-opt_mode SPEED"; # Optimization Criteria # AREA or SPEED
"-opt_level 2"; # Optimization Effort Criteria: 2=High
"-uc <design>.xcf"; # Constraint File name
#
# The following are HDL Options
#
End ParamFile
End Program xst
#
/imp_7a_speed.opt
0,0 → 1,97
FLOWTYPE = FPGA;
#
# $Id: imp_7a_speed.opt 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-11 539 1.1.1 use -fastpaths, -u, -tsi for trce
# 2013-10-02 537 1.1 Proper options for Artix-7 (RegDup only); -detail
# 2013-09-21 534 1.0 Initial version (cloned from imp_s6_speed.opt)
#
# Derived from ISE balanced.opt
# Uses uses settings like 'mapgloboptlogoptregdup' SmartExplorer strategy
#
# ----------------------------------------------------------------------------
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<userdesign>; # User design - pick from xflow command line
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
 
#
# ----------------------------------------------------------------------------
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-ol high; # Effort level
-xe n; # Extra effort level for timing-driven packing (normal)
-register_duplication on;# Duplicate registers/luts during timing-driven packing
-w; # Always overwrite any existing output files
-mt 2; # Multi-threading
-detail; # detailed map report
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
 
#
# ----------------------------------------------------------------------------
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-xml <design>_map.twx; # Output XML version of the timing report
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
 
#
# ----------------------------------------------------------------------------
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
-xe n; # extra effort level
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-mt 2; # Multi-threading
<design>_map.ncd; # Input mapped NCD file
<inputdir><design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
 
#
# ----------------------------------------------------------------------------
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-v 3; # Produce verbose timing report
-fastpaths; # report fastest paths/verbose hold paths
-u 25; # report unconstrained paths
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>.twx; # Output XML version of the timing report
-tsi <design>.tsi; # produce timing specification interaction report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce
 
 
/syn_s3_speed.opt
0,0 → 1,43
FLOWTYPE = FPGA_SYNTHESIS;
#
# $Id: syn_s3_speed.opt 540 2013-10-13 18:42:50Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-05 540 1.2 use -shreg_extract NO to avoid shreg capture flops
# 2011-08-13 405 1.1 renamed, moved to rtl/make;
# 2007-07-20 67 1.0 Initial version
#
# Derived from ISE xst_vhdl.opt
#
# ----------------------------------------------------------------------------
# Options for XST
#
Program xst
-ifn <design>_xst.scr; # input XST script file
-ofn <design>_xst.log; # output XST log file
-intstyle xflow; # Message Reporting Style
#
# ParamFile lists the XST Properties that can be set by the user.
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>"; # Input/Project File Name
"-ifmt VHDL"; # Input Format (Verilog or VHDL)
"-ofn <design>"; # Output File Name
"-ofmt ngc"; # Output File Format
"-p <partname>"; # Target Device
"-opt_mode SPEED"; # Optimization Criteria # AREA or SPEED
"-opt_level 2"; # Optimization Effort Criteria: 2=High
## "-shreg_min_size 3"; # not available for Spartan-3 !!
"-shreg_extract NO"; # --> switch shreg extrtaction off instead
"-uc <design>.xcf"; # Constraint File name
#
# The following are HDL Options
#
End ParamFile
End Program xst
#
/imp_s3_speed_maptd.opt
0,0 → 1,97
FLOWTYPE = FPGA;
#
# $Id: imp_s3_speed_maptd.opt 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-11 539 1.2.1 use -fastpaths, -u, -tsi for trce
# 2013-10-05 537 1.2 use -detail for map
# 2011-08-13 405 1.1 renamed, moved to rtl/make;
# 2007-07-20 67 1.0 Initial version
#
# Derived from ISE balanced.opt
# Uses timing driven map like 'mapphyssynthesis' SmartExplorer strategy
#
# ----------------------------------------------------------------------------
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<userdesign>; # User design - pick from xflow command line
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
 
#
# ----------------------------------------------------------------------------
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-timing; # Perform a timing-driven packing
-ol high; # Effort level
-xe n; # Extra effort level for timing-driven packing (normal)
-register_duplication on;# Duplicate registers/luts during timing-driven packing
-logic_opt on; # Perform physical synthesis combinatorial logic opt.
-detail; # detailed map report
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
 
#
# ----------------------------------------------------------------------------
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-v 3; # Produce verbose timing report
-fastpaths; # report fastest paths/verbose hold paths
-u 25; # report unconstrained paths
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>_map.twx; # Output XML version of the timing report
-tsi <design>.tsi; # produce timing specification interaction report
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
 
#
# ----------------------------------------------------------------------------
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
-xe n; # Extra effort level
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<design>_map.ncd; # Input mapped NCD file
<inputdir><design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
 
#
# ----------------------------------------------------------------------------
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>.twx; # Output XML version of the timing report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce
 
 
/generic_xflow.mk
0,0 → 1,334
# $Id: generic_xflow.mk 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-12 539 1.9 use xtwi; support trce tsi file; use -C for cpp
# 2013-01-27 477 1.8 remove defaults for ISE_(BOARD|PATH) and XFLOWOPT_*
# use dontincdep.mk to suppress .dep include on clean
# 2013-01-05 470 1.7.6 remove '-r' from all non-dir clean rm's
# 2012-02-05 456 1.7.5 use vbomvonv --get_top for xflow calls
# 2012-01-08 451 1.7.4 use xilinx_ghdl_sdf_filter
# 2012-01-04 450 1.7.3 display isemsg_filter for ncd and bit targets too
# 2011-12-29 446 1.7.2 add fx2load_wrapper in jconfig target
# 2011-08-14 406 1.7.1 use isemsg_filter; new %.mfsum target
# 2011-08-13 405 1.7 renamed, moved to rtl/make;
# 2011-07-17 394 1.6.2 add rm *.svf to ise_clean rule
# 2011-07-11 392 1.6.1 use config_wrapper, support jtag via svf generation
# 2011-06-26 385 1.6 use ISE_PATH for vbomconv -xst_prj
# 2010-11-26 340 1.5.8 fix path for .opt defaults (now rtl/vlib)
# 2010-05-06 289 1.5.7 add xilinx_tsim_xon support
# 2010-04-24 282 1.5.6 add %.impact rule to run impact_wrapper
# 2010-04-17 278 1.4.5 add '|| true' after grep in diag summary to prevent
# a make abort in case no diags are seen
# 2010-04-02 273 1.4.4 add -I{RETROBASE} to ucf_cpp processing rules
# 2010-03-14 268 1.4.3 add XFLOWOPT_SYN and XFLOWOPT_IMP
# 2009-11-21 252 1.4.2 use bitgen directly, use ISE_USERID
# 2007-12-17 102 1.4.1 fix %.dep_ucf_cpp : %.ucf_cpp rule
# 2007-12-16 101 1.4 add ucf_cpp rules
# 2007-12-09 100 1.3.7 ifndef define ISE_PATH to xc3s1000-ft256-4
# 2007-11-02 94 1.3.6 use .SECONDARY to keep intermediate files
# 2007-10-28 93 1.3.5 call xst_count_bels -xsts when _ssim is generated
# 2007-10-12 88 1.3.4 support <design>.xcf files, if provided
# 2007-10-06 87 1.3.3 remove *_twr.log in clean
# 2007-07-20 67 1.3.2 handle local/global xst_vhdl.opt
# 2007-07-15 66 1.3.1 add rule "%.ngc: ../%.vbom" to support _*sim in ./tb
# add XST diagnostics summary at end of listing
# 2007-07-06 64 1.3 all vbom based now
# 2007-06-16 57 1.2.1 cleanup ghdl_clean handling (rm _[sft]sim)
# 2007-06-10 52 1.2 reorganized svn directory structure
# 2007-06-10 51 1.1 consolidate test bench generation
# 2007-06-03 45 1.0 Initial version
#---
#
# setup default board (for impact), device and userid (for bitgen)
#
ifndef ISE_BOARD
$(error ISE_BOARD is not defined)
endif
#
ifndef ISE_PATH
$(error ISE_PATH is not defined)
endif
#
ifndef ISE_USERID
ISE_USERID = 0xffffffff
endif
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
$(error XFLOWOPT_SYN is not defined)
endif
#
ifndef XFLOWOPT_IMP
$(error XFLOWOPT_IMP is not defined)
endif
#
XFLOW = xflow -p ${ISE_PATH}
#
# $@ first target
# $< first dependency
# $* stem in rule match
#
# when chaining, don't delete 'expensive' intermediate files:
.SECONDARY :
#
# Synthesize (xst)
# input: %.vbom vbom project description
# output: %.ngc
# %_xst.log xst log file
#
%.ngc: %.vbom
if [ ! -d ./ise ]; then mkdir ./ise; fi
(cd ./ise; vbomconv --ise_path=${ISE_PATH} --xst_prj ../$< > $*.prj)
(cd ./ise; touch $*.xcf)
if [ -r $*.xcf ]; then cp $*.xcf ./ise; fi
if [ -r ${RETROBASE}/rtl/make/${XFLOWOPT_SYN} ]; then \
cp ${RETROBASE}/rtl/make/${XFLOWOPT_SYN} ./ise; fi
if [ -r ${XFLOWOPT_SYN} ]; then cp ${XFLOWOPT_SYN} ./ise; fi
xtwi ${XFLOW} -wd ise -synth ${XFLOWOPT_SYN} \
-g top_entity:`vbomconv --get_top $<` $*.prj
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ngc ]; then cp -p ./ise/$*.ngc .; fi
if [ -r ./ise/$*_xst.log ]; then cp -p ./ise/$*_xst.log .; fi
@ echo "==============================================================="
@ echo "* XST Diagnostic Summary *"
@ echo "==============================================================="
@ if [ -r $*.mfset ]; then isemsg_filter xst $*.mfset $*_xst.log; fi
@ if [ ! -r $*.mfset ]; then grep -i -A 1 ":.*:" $*_xst.log || true; fi
@ echo "==============================================================="
#
# the following rule needed to generate an %_*sim.vhd in a ./tb sub-directory
# it will look for a matching vbom in the parent directory
%.ngc: ../%.vbom
if [ ! -d ./ise ]; then mkdir ./ise; fi
(cd ./ise; vbomconv --xst_prj ../$< > $*.prj)
(cd ./ise; touch $*.xcf)
if [ -r $*.xcf ]; then cp $*.xcf ./ise; fi
if [ -r ${RETROBASE}/rtl/make/${XFLOWOPT_SYN} ]; then \
cp ${RETROBASE}/rtl/make/${XFLOWOPT_SYN} ./ise; fi
if [ -r ${XFLOWOPT_SYN} ]; then cp ${XFLOWOPT_SYN} ./ise; fi
xtwi ${XFLOW} -wd ise -synth ${XFLOWOPT_SYN} \
-g top_entity:`vbomconv --get_top $<` $*.prj
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ngc ]; then cp -p ./ise/$*.ngc .; fi
if [ -r ./ise/$*_xst.log ]; then cp -p ./ise/$*_xst.log .; fi
@ echo "==============================================================="
@ echo "* XST Diagnostic Summary *"
@ echo "==============================================================="
@ if [ -r $*.mfset ]; then isemsg_filter xst $*.mfset $*_xst.log; fi
@ if [ ! -r $*.mfset ]; then grep -i -A 1 ":.*:" $*_xst.log || true; fi
@ echo "==============================================================="
#
# Implement 1 (map+par)
# input: %.ngc
# %.ucf constraint file (if available)
# output: %.ncd
# %.pcf
# %_tra.log translate (ngdbuild) log file (renamed %.bld)
# %_map.log map log file (renamed %_map.mrp)
# %_par.log par log file (renamed %.par)
# %_pad.log pad file (renamed %_pad.txt)
# %_tsi.log trce tsi file (renamed %.tsi)
# %_twr.log trce log file (renamed %.twr)
#
%.ncd %.pcf: %.ngc
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ngc ]; then cp -p $*.ngc ./ise; fi
if [ -r $*.ucf ]; then cp -p $*.ucf ./ise; fi
if [ -r ${RETROBASE}/rtl/make/${XFLOWOPT_IMP} ]; then \
cp ${RETROBASE}/rtl/make/${XFLOWOPT_IMP} ./ise; fi
if [ -r ${XFLOWOPT_IMP} ]; then cp -p ${XFLOWOPT_IMP} ./ise; fi
xtwi ${XFLOW} -wd ise -implement ${XFLOWOPT_IMP} $<
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ncd ]; then cp -p ./ise/$*.ncd .; fi
if [ -r ./ise/$*.pcf ]; then cp -p ./ise/$*.pcf .; fi
if [ -r ./ise/$*.bld ]; then cp -p ./ise/$*.bld ./$*_tra.log; fi
if [ -r ./ise/$*_map.mrp ]; then cp -p ./ise/$*_map.mrp ./$*_map.log; fi
if [ -r ./ise/$*.par ]; then cp -p ./ise/$*.par ./$*_par.log; fi
if [ -r ./ise/$*_pad.txt ]; then cp -p ./ise/$*_pad.txt ./$*_pad.log; fi
if [ -r ./ise/$*.twr ]; then cp -p ./ise/$*.twr ./$*_twr.log; fi
if [ -r ./ise/$*.tsi ]; then cp -p ./ise/$*.tsi ./$*_tsi.log; fi
@ if [ -r $*.mfset ]; then \
echo "=============================================================";\
echo "* Translate Diagnostic Summary *";\
echo "=============================================================";\
isemsg_filter tra $*.mfset $*_tra.log;\
echo "=============================================================";\
echo "* MAP Diagnostic Summary *";\
echo "=============================================================";\
isemsg_filter map $*.mfset $*_map.log;\
echo "=============================================================";\
echo "* PAR Diagnostic Summary *";\
echo "=============================================================";\
isemsg_filter par $*.mfset $*_par.log;\
echo "=============================================================";\
fi
#
# Implement 2 (bitgen)
# input: %.ncd
# output: %.bit
# %.msk
# %_bgn.log bitgen log file (renamed %.bgn)
#
%.bit: %.ncd
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ncd ]; then cp -p $*.ncd ./ise; fi
(cd ./ise; xtwi bitgen -l -w -m -g ReadBack -g UserId:${ISE_USERID} -intstyle xflow $*.ncd)
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.bit ]; then cp -p ./ise/$*.bit .; fi
if [ -r ./ise/$*.msk ]; then cp -p ./ise/$*.msk .; fi
if [ -r ./ise/$*.bgn ]; then cp -p ./ise/$*.bgn ./$*_bgn.log; fi
@ if [ -r $*.mfset ]; then \
echo "=============================================================";\
echo "* Bitgen Diagnostic Summary *";\
echo "=============================================================";\
isemsg_filter bgn $*.mfset $*_bgn.log;\
echo "=============================================================";\
fi
#
# Create svf from bitstream
# input: %.bit
# output: %.svf
#
%.svf: %.bit
xtwi config_wrapper --board=${ISE_BOARD} --path=${ISE_PATH} bit2svf $*.bit
 
#
# Configure FPGA with impact
# input: %.bit
# output: .PHONY
#
%.iconfig: %.bit
xtwi config_wrapper --board=${ISE_BOARD} --path=${ISE_PATH} iconfig $*.bit
 
#
# Configure FPGA with jtag
# input: %.svf
# output: .PHONY
#
ifneq "$(origin FX2_FILE)" "undefined"
FX2LOAD_OPT = --file=${FX2_FILE}
endif
#
%.jconfig: %.svf
fx2load_wrapper --board=${ISE_BOARD} ${FX2LOAD_OPT}
xtwi config_wrapper --board=${ISE_BOARD} --path=${ISE_PATH} jconfig $*.svf
 
#
# Print log file summary
# input: %_*.log (not depended)
# output: .PHONY
%.mfsum: %.mfset
@ echo "=== XST summary ============================================="
@ if [ -r $*_xst.log ]; then isemsg_filter xst $*.mfset $*_xst.log; fi
@ echo "=== Translate summary ======================================="
@ if [ -r $*_tra.log ]; then isemsg_filter tra $*.mfset $*_tra.log; fi
@ echo "=== MAP summary ============================================="
@ if [ -r $*_map.log ]; then isemsg_filter map $*.mfset $*_map.log; fi
@ echo "=== PAR summary ============================================="
@ if [ -r $*_par.log ]; then isemsg_filter par $*.mfset $*_par.log; fi
@ echo "=== Bitgen summary =========================================="
@ if [ -r $*_bgn.log ]; then isemsg_filter bgn $*.mfset $*_bgn.log; fi
 
#
#
#
# Post-XST simulation model (netgen -sim; UNISIM based)
# input: %.ngc
# output: %_ssim.vhd
# %_ngn_ssim.log netgen log file (renamed %.nlf)
#
%_ssim.vhd: %.ngc
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ngc ]; then cp -p $*.ngc ./ise; fi
(cd ise; xtwi netgen -sim -intstyle xflow -ofmt vhdl -w $*.ngc)
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.vhd ]; then cp -p ./ise/$*.vhd ./$*_ssim.vhd; fi
if [ -r ./ise/$*.nlf ]; then cp -p ./ise/$*.nlf ./$*_ngn_ssim.log; fi
if [ -r $*_ssim.vhd ]; then xst_count_bels -xsts $*_ssim.vhd; fi
#
# Post-XST simulation model (netgen -sim; SIMPRIM based)
# input: %.ngc
# output: %_fsim.vhd
# %_ngn_fsim.log netgen log file (renamed %.nlf)
#
%_fsim.vhd: %.ngc
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ngc ]; then cp -p $*.ngc ./ise; fi
(cd ise; xtwi ngdbuild -p ${ISE_PATH} -nt timestamp -intstyle xflow \
$*.ngc $*.ngd)
(cd ise; netgen -sim -intstyle xflow -ofmt vhdl -w $*.ngd)
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.vhd ]; then cp -p ./ise/$*.vhd ./$*_fsim.vhd; fi
if [ -r ./ise/$*.nlf ]; then cp -p ./ise/$*.nlf ./$*_ngn_fsim.log; fi
#
# Post-par timing simulation model (netgen -sim)
# input: %.ncd
# %.tsim_xon_dat xon disable descriptor file (optional)
# output: %_tsim.vhd
# %_ngn_tsim.log netgen log file (renamed time_sim.nlf)
# %_tsim.sdf delay annotation
# %_tsim.sdf_ghdl delay annotation with ghdl patches
#
#!! use netgen directly because xflow 8.1 goes mad when -tsim used a 2nd time
#!! see blog_xilinx_webpack.txt 2007-06-10
#
%_tsim.vhd %_tsim.sdf: %.ncd
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ncd ]; then cp -p $*.ncd ./ise; fi
if [ -r $*.pcf ]; then cp -p $*.pcf ./ise; fi
(cd ise; xtwi netgen -ofmt vhdl -sim -w -intstyle xflow -pcf \
$*.pcf $*.ncd $*_tsim.vhd )
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*_tsim.vhd ]; then cp -p ./ise/$*_tsim.vhd .; fi
if [ -r ./ise/$*_tsim.sdf ]; then cp -p ./ise/$*_tsim.sdf .; fi
if [ -r ./ise/$*_tsim.nlf ]; then cp -p ./ise/$*_tsim.nlf ./$*_ngn_tsim.log; fi
if [ -r $*_tsim.vhd -a -r $*.tsim_xon_dat ]; then xilinx_tsim_xon $*; fi
if [ -r $*_tsim.sdf ]; then xilinx_ghdl_sdf_filter $*_tsim.sdf > $*_tsim.sdf_ghdl ; fi
#
# generate dep_xst files from vbom
#
%.dep_xst: %.vbom
vbomconv --dep_xst $< > $@
#
# generate cpp'ed ucf files from ucf_cpp
#
%.ucf : %.ucf_cpp
cpp -C -I${RETROBASE}/rtl $*.ucf_cpp $*.ucf
#
# generate nested dependency rules for cpp'ed ucf files from ucf_cpp
#
%.dep_ucf_cpp : %.ucf_cpp
cpp -C -I${RETROBASE}/rtl -MM $*.ucf_cpp |\
sed 's/\.o:/\.ucf:/' > $*.dep_ucf_cpp
#
include $(RETROBASE)/rtl/make/dontincdep.mk
#
.PHONY : ise_clean ise_tmp_clean
#
ise_clean: ise_tmp_clean
rm -f *.ngc
rm -f *.ncd
rm -f *.pcf
rm -f *.bit
rm -f *.msk
rm -f *.svf
rm -f *_[sft]sim.vhd
rm -f *_tsim.sdf
rm -f *_tsim.sdf_ghdl
rm -f *_xst.log
rm -f *_tra.log
rm -f *_map.log
rm -f *_par.log
rm -f *_pad.log
rm -f *_twr.log
rm -f *_tsi.log
rm -f *_bgn.log
rm -f *_ngn_[sft]sim.log
rm -f *_svn.log
rm -f *_sum.log
#
ise_tmp_clean:
rm -rf ./ise
#
/syn_s6_speed.opt
0,0 → 1,85
FLOWTYPE = FPGA_SYNTHESIS;
#
# $Id: syn_s6_speed.opt 537 2013-10-06 09:06:23Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-05 537 1.2 define all, use -opt_level=2, -shreg_min_size=3
# 2012-02-05 456 1.1 use $top_entity variable for -top attribute
# 2011-08-13 405 1.0 Initial version
#
# Derived from ISE xst_mixed.opt
#
# ----------------------------------------------------------------------------
# Options for XST
#
Program xst
-ifn <design>_xst.scr; # input XST script file
-ofn <design>_xst.log; # output XST log file
-intstyle xflow; # Message Reporting Style
#
# ParamFile lists the XST Properties that can be set by the user.
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>"; # Input/Project File Name
"-ifmt mixed"; # Input Format (Verilog and VHDL)
"-ofn <design>"; # Output File Name
"-ofmt ngc"; # Output File Format
"-top $top_entity"; # Top Design Name
"-p <partname>"; # Target Device
"-uc <design>.xcf"; # Constraint File name
"-opt_mode SPEED"; # Optimization Criteria # AREA or SPEED
"-opt_level 2"; # Optimization Effort Criteria def=1 !
"-power NO"; # def
"-iuc NO"; # def
"-keep_hierarchy No"; # def
"-netlist_hierarchy As_Optimized";# def
"-rtlview No"; # def=yes if from ISE
"-glob_opt AllClockNets"; # likely def
"-read_cores YES"; # def (irrelevant)
"-write_timing_constraints NO"; # def
"-cross_clock_analysis NO"; # def
"-hierarchy_separator /"; # ?
"-bus_delimiter <>"; # def
"-case Maintain"; # def
"-slice_utilization_ratio 100"; # ?
"-bram_utilization_ratio 100"; # ?
"-dsp_utilization_ratio 100"; # ?
"-lc Auto"; # def
"-reduce_control_sets Auto"; # def
"-fsm_extract YES"; # def
"-fsm_encoding Auto"; # def
"-safe_implementation No"; # def
"-fsm_style LUT"; # def
"-ram_extract Yes"; # def
"-ram_style Auto"; # def
"-rom_extract Yes"; # def
"-rom_style Auto"; # def
"-shreg_extract YES"; # def
"-shreg_min_size 3"; # default is 2 !!
"-auto_bram_packing NO"; # def
"-resource_sharing YES"; # def
"-async_to_sync NO"; # def
"-use_dsp48 Auto"; # def
"-iobuf YES"; # def
"-max_fanout 100000"; # def
"-bufg 16"; # def (for S-6)
"-register_duplication YES"; # def
"-register_balancing No"; # def
"-optimize_primitives NO"; # def
"-use_clock_enable Auto"; # def
"-use_sync_set Auto"; # def
"-use_sync_reset Auto"; # def
"-iob Auto"; # ?
"-equivalent_register_removal YES"; # def
"-slice_utilization_ratio_maxmargin 5"; # ?
#
# The following are HDL Options
#
End ParamFile
End Program xst
#
/generic_isim.mk
0,0 → 1,54
# $Id: generic_isim.mk 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-12 539 1.3 use xtwi
# 2013-01-27 477 1.2.1 use dontincdep.mk to suppress .dep include on clean
# 2011-08-13 405 1.2 renamed, moved to rtl/make;
# 2010-04-26 284 1.1 add _[sft]sim support
# 2009-11-22 252 1.0 Initial version
#
FUSE = fuse
#
%_ISim : %.vbom
vbomconv -isim_prj $< > $*_isim.prj
xtwi $(FUSE) $* -prj $*_isim.prj -o $*_ISim
rm -rf $*_isim.prj
#
# rule for _ssim to call FUSE with right top level name
#
%_ISim_ssim : %_ssim.vbom
vbomconv -isim_prj $*_ssim.vbom > $*_isim_ssim.prj
xtwi $(FUSE) $* -prj $*_isim_ssim.prj -o $*_ISim_ssim
rm -rf $*_isim_ssim.prj
#
# rule for _[ft]sim to use 'virtual' _[ft]sim vbom's (derived from _ssim)
#
%_ISim_fsim : %_ssim.vbom
vbomconv -isim_prj $*_fsim.vbom > $*_isim_fsim.prj
xtwi $(FUSE) $* -prj $*_isim_fsim.prj -o $*_ISim_fsim
rm -rf $*_isim_fsim.prj
#
%_ISim_tsim : %_ssim.vbom
vbomconv -isim_prj $*_tsim.vbom > $*_isim_tsim.prj
xtwi $(FUSE) $* -prj $*_isim_tsim.prj -o $*_ISim_tsim
rm -rf $*_isim_tsim.prj
#
%.dep_isim: %.vbom
vbomconv --dep_isim $< > $@
#
include $(RETROBASE)/rtl/make/dontincdep.mk
#
.PHONY: isim_clean isim_tmp_clean
#
isim_clean: isim_tmp_clean
rm -f $(EXE_all:%=%_ISim)
rm -f $(EXE_all:%=%_ISim_ssim)
rm -f $(EXE_all:%=%_ISim_fsim)
rm -f $(EXE_all:%=%_ISim_tsim)
#
isim_tmp_clean:
rm -f isim.log isim.wdb
rm -f fuse.log
rm -rf isim
#
/generic_xflow_cpld.mk
0,0 → 1,132
# $Id: generic_xflow_cpld.mk 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-12 539 1.2 use xtwi
# 2013-01-05 470 1.1.1 remove '-r' from all non-dir clean rm's
# 2011-08-13 405 1.1 renamed, moved to rtl/make;
# 2010-03-13 268 1.0 Initial version, cloned from .xflow Rev 252
#---
#
# setup default device
#
ifndef ISE_PATH
ISE_PATH = xc2c64a-7-vq44
endif
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = xst_vhdl.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = balanced.opt
endif
#
XFLOW = xflow -p ${ISE_PATH}
#
# $@ first target
# $< first dependency
# $* stem in rule match
#
# when chaining, don't delete 'expensive' intermediate files:
.SECONDARY :
#
# Synthesize (xst)
# input: %.prj project file
# output: %.ngc
# %_xst.log xst log file
#
# Note: removed "cp ${RETROBASE}/vlib/${XFLOWOPT_SYN} ./ise" option
#
%.ngc: %.vbom
if [ ! -d ./ise ]; then mkdir ./ise; fi
(cd ./ise; vbomconv --xst_prj ../$< > $*.prj)
(cd ./ise; touch $*.xcf)
if [ -r $*.xcf ]; then cp $*.xcf ./ise; fi
if [ -r ${XFLOWOPT_SYN} ]; then cp ${XFLOWOPT_SYN} ./ise; fi
xtwi ${XFLOW} -wd ise -synth ${XFLOWOPT_SYN} $*.prj
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ngc ]; then cp -p ./ise/$*.ngc .; fi
if [ -r ./ise/$*_xst.log ]; then cp -p ./ise/$*_xst.log .; fi
@ echo "==============================================================="
@ echo "* Makefile.xflow: XST Diagnostic Summary *"
@ echo "==============================================================="
@ grep -i -A 1 ":.*:" $*_xst.log
@ echo "==============================================================="
#
# the following rule needed to generate an %_*sim.vhd in a ./tb sub-directory
# it will look for a matching vbom in the parent directory
%.ngc: ../%.vbom
if [ ! -d ./ise ]; then mkdir ./ise; fi
(cd ./ise; vbomconv --xst_prj ../$< > $*.prj)
(cd ./ise; touch $*.xcf)
if [ -r $*.xcf ]; then cp $*.xcf ./ise; fi
if [ -r ${XFLOWOPT_SYN} ]; then cp ${XFLOWOPT_SYN} ./ise; fi
xtwi ${XFLOW} -wd ise -synth ${XFLOWOPT_SYN} $*.prj
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ngc ]; then cp -p ./ise/$*.ngc .; fi
if [ -r ./ise/$*_xst.log ]; then cp -p ./ise/$*_xst.log .; fi
@ echo "==============================================================="
@ echo "* Makefile.xflow: XST Diagnostic Summary *"
@ echo "==============================================================="
@ grep -i -A 1 ":.*:" $*_xst.log
@ echo "==============================================================="
#
# Fit (map + cpldfit +
# input: %.ngc project file
# output: %.ncd
# %.jed
# %_tra.log translate (ngdbuild) log file (renamed %.bld)
# %_fit.log cpldfit log file (renamed %.rpt)
# %_tim.log timing analyser log file (renamed %.tim)
# %_pad.log pad file (renamed %.pad)
#
# Note: removed "cp ${RETROBASE}/vlib/balanced.opt" option
# currently ise 'density.opt' as steering file
#
%.ncd %.jed: %.ngc
if [ ! -d ./ise ]; then mkdir ./ise; fi
if [ -r $*.ngc ]; then cp -p $*.ngc ./ise; fi
if [ -r $*.ucf ]; then cp -p $*.ucf ./ise; fi
if [ -r ${XFLOWOPT_IMP} ]; then cp -p ${XFLOWOPT_IMP} ./ise; fi
xtwi ${XFLOW} -wd ise -fit ${XFLOWOPT_IMP} $<
(cd ./ise; chmod -x *.* )
if [ -r ./ise/$*.ncd ]; then cp -p ./ise/$*.ncd .; fi
if [ -r ./ise/$*.jed ]; then cp -p ./ise/$*.jed .; fi
if [ -r ./ise/$*.bld ]; then cp -p ./ise/$*.bld ./$*_tra.log; fi
if [ -r ./ise/$*.rpt ]; then cp -p ./ise/$*.rpt ./$*_fit.log; fi
if [ -r ./ise/$*.tim ]; then cp -p ./ise/$*.tim ./$*_tim.log; fi
if [ -r ./ise/$*.pad ]; then cp -p ./ise/$*.pad ./$*_pad.log; fi
#
# generate dep_xst files from vbom
#
%.dep_xst: %.vbom
vbomconv --dep_xst $< > $@
#
# generate cpp'ed ucf files from ucf_cpp
#
%.ucf : %.ucf_cpp
cpp $*.ucf_cpp $*.ucf
#
# generate nested dependency rules for cpp'ed ucf files from ucf_cpp
#
%.dep_ucf_cpp : %.ucf_cpp
cpp -MM $*.ucf_cpp | sed 's/\.o:/\.ucf:/' > $*.dep_ucf_cpp
#
.PHONY : ise_clean ise_tmp_clean
#
ise_clean: ise_tmp_clean
rm -f *.ngc
rm -f *.ncd
rm -f *.jed
rm -f *_xst.log
rm -f *_tra.log
rm -f *_fit.log
rm -f *_tim.log
rm -f *_pad.log
#
ise_tmp_clean:
rm -rf ./ise
#
/imp_s6_speed_ise133.opt
0,0 → 1,96
FLOWTYPE = FPGA;
#
# $Id: imp_s6_speed_ise133.opt 537 2013-10-06 09:06:23Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2012-01-03 449 1.1 use '-mt 2' in map and par
# 2011-08-13 405 1.0 Initial version
#
# Derived from ISE balanced.opt
# Uses uses settings like 'mapgloboptlogoptregdup' SmartExplorer strategy
#
# ----------------------------------------------------------------------------
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<userdesign>; # User design - pick from xflow command line
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
 
#
# ----------------------------------------------------------------------------
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-ol high; # Effort level
-xe n; # Extra effort level for timing-driven packing (normal)
-global_opt speed; # Perform global optimization before mapping
-logic_opt on; # Perform physical synthesis combinatorial logic opt.
-register_duplication on;# Duplicate registers/luts during timing-driven packing
-w; # Always overwrite any existing output files
-mt 2; # Multi-threading
-detail; # detailed map report
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
 
#
# ----------------------------------------------------------------------------
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-xml <design>_map.twx; # Output XML version of the timing report
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
 
#
# ----------------------------------------------------------------------------
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
-xe n; # extra effort level
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-mt 2; # Multi-threading
<design>_map.ncd; # Input mapped NCD file
<inputdir><design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
 
#
# ----------------------------------------------------------------------------
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>.twx; # Output XML version of the timing report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce
 
 
/imp_s3_speed.opt
0,0 → 1,91
FLOWTYPE = FPGA;
#
# $Id: imp_s3_speed.opt 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-11 539 1.2.1 use -fastpaths, -u, -tsi for trce
# 2013-10-05 537 1.2 use -detail for map
# 2011-08-13 405 1.1 renamed, moved to rtl/make;
# 2007-07-20 67 1.0 Initial version
#
# Derived from ISE balanced.opt
#
# ----------------------------------------------------------------------------
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<userdesign>; # User design - pick from xflow command line
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
 
#
# ----------------------------------------------------------------------------
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-detail; # detailed map report
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
 
#
# ----------------------------------------------------------------------------
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-xml <design>_map.twx; # Output XML version of the timing report
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
 
#
# ----------------------------------------------------------------------------
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
-xe n; # extra effort level
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<design>_map.ncd; # Input mapped NCD file
<inputdir><design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
 
#
# ----------------------------------------------------------------------------
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-v 3; # Produce verbose timing report
-fastpaths; # report fastest paths/verbose hold paths
-u 25; # report unconstrained paths
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>.twx; # Output XML version of the timing report
-tsi <design>.tsi; # produce timing specification interaction report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce
 
 
/imp_s6_speed.opt
0,0 → 1,99
FLOWTYPE = FPGA;
#
# $Id: imp_s6_speed.opt 539 2013-10-13 17:06:35Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-10-11 539 1.2.1 use -fastpaths, -u, -tsi for trce
# 2013-10-02 537 1.2 for ISE 14.x: for map drop -global_opt and -logic_opt
# use only -register_duplication; use -detail
# 2012-01-03 449 1.1 use '-mt 2' in map and par
# 2011-08-13 405 1.0 Initial version
#
# Derived from ISE balanced.opt
# Uses uses settings like 'mapgloboptlogoptregdup' SmartExplorer strategy
#
# ----------------------------------------------------------------------------
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<userdesign>; # User design - pick from xflow command line
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
 
#
# ----------------------------------------------------------------------------
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-ol high; # Effort level
-xe n; # Extra effort level for timing-driven packing (normal)
-register_duplication on;# Duplicate registers/luts during timing-driven packing
-w; # Always overwrite any existing output files
-mt 2; # Multi-threading
-detail; # detailed map report
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
 
#
# ----------------------------------------------------------------------------
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-v 3; # Produce verbose timing report
#-e 3; # Produce error report (limit 3 items/constraint)
-xml <design>_map.twx; # Output XML version of the timing report
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
 
#
# ----------------------------------------------------------------------------
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
-xe n; # extra effort level
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-mt 2; # Multi-threading
<design>_map.ncd; # Input mapped NCD file
<inputdir><design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
 
#
# ----------------------------------------------------------------------------
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-v 3; # Produce verbose timing report
-fastpaths; # report fastest paths/verbose hold paths
-u 100; # report unconstrained paths
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
-xml <design>.twx; # Output XML version of the timing report
-tsi <design>.tsi; # produce timing specification interaction report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce
 
 
/xflow_default_nexys2.mk
0,0 → 1,24
# $Id: xflow_default_nexys2.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#---
#
# Setup for Digilent Nexys2
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = nexys2
ISE_PATH = xc3s1200e-fg320-4
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_s3_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_s3_speed.opt
endif
#
/xflow_default_nexys3.mk
0,0 → 1,24
# $Id: xflow_default_nexys3.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#---
#
# Setup for Digilent Nexys3
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = nexys3
ISE_PATH = xc6slx16-csg324-2
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_s6_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_s6_speed.opt
endif
#
/xflow_default_atlys.mk
0,0 → 1,24
# $Id: xflow_default_atlys.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#---
#
# Setup for Digilent Atlys
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = atlys
ISE_PATH = xc6slx45-csg324-2
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_s6_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_s6_speed.opt
endif
#
/xflow_default_s3board.mk
0,0 → 1,24
# $Id: xflow_default_s3board.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#---
#
# Setup for Digilent S3BOARD (with 1000 die size)
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = s3board
ISE_PATH = xc3s1000-ft256-4
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_s3_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_s3_speed.opt
endif
#
/xflow_default_s3board_200.mk
0,0 → 1,24
# $Id: xflow_default_s3board_200.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#---
#
# Setup for Digilent S3BOARD (with 200 die size)
#
# setup default board (for impact), device and userid (for bitgen)
#
ISE_BOARD = s3board
ISE_PATH = xc3s200-ft256-4
#
# setup defaults for xflow option files for synthesis and implementation
#
ifndef XFLOWOPT_SYN
XFLOWOPT_SYN = syn_s3_speed.opt
endif
#
ifndef XFLOWOPT_IMP
XFLOWOPT_IMP = imp_s3_speed.opt
endif
#
/dontincdep.mk
0,0 → 1,21
# $Id: dontincdep.mk 477 2013-01-27 14:07:10Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-27 477 1.0 Initial version
#
# DONTINCDEP controls whether dependency files are included. Set it if
# any of the 'clean' type targets is involved
#
ifneq ($(findstring clean, $(MAKECMDGOALS)),)
DONTINCDEP = 1
endif
ifneq ($(findstring realclean, $(MAKECMDGOALS)),)
DONTINCDEP = 1
endif
ifneq ($(findstring distclean, $(MAKECMDGOALS)),)
DONTINCDEP = 1
endif
ifdef DONTINCDEP
$(info DONTINCDEP set, *.dep files not included)
endif
/.
. Property changes : Added: svn:ignore ## -0,0 +1,33 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_tsi.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log

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