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URL https://opencores.org/ocsvn/w11/w11/trunk

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  • This comparison shows the changes necessary to convert path
    /w11/tags/w11a_V0.7/tools/tcl/rbtest
    from Rev 30 to Rev 33
    Reverse comparison

Rev 30 → Rev 33

/test_fifo.tcl
0,0 → 1,132
# $Id: test_fifo.tcl 662 2015-04-05 08:02:54Z mueller $
#
# Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2015-04-03 661 2.1 drop estatdef; use estaterr
# 2014-11-09 603 2.0 use rlink v4 address layout and iface
# 2011-03-27 374 1.0 Initial version
# 2011-03-13 369 0.1 First draft
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# Basic tests with cntl and fifo registers.
#
proc test_fifo {} {
#
set errcnt 0
rlc errcnt -clear
#
rlc log "rbtest::test_fifo - init: clear cntl, data, and fifo"
# Note: fifo clear via init is tested later, used here 'speculatively'
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
#-------------------------------------------------------------------------
rlc log " test 1: fifo write/read with wreg/rreg"
# single word
rlc exec \
-wreg te.fifo 0x0000 \
-rreg te.fifo -estat 0x00
# three words
rlc exec \
-wreg te.fifo 0xdead \
-wreg te.fifo 0xbeaf \
-wreg te.fifo 0x1234 \
-rreg te.fifo -edata 0xdead \
-rreg te.fifo -edata 0xbeaf \
-rreg te.fifo -edata 0x1234
#
#-------------------------------------------------------------------------
rlc log " test 2: fifo write/read with wblk/rblk and -edone"
# two words
set blk {0x1111 0x2222}
rlc exec \
-wblk te.fifo $blk -edone [llength $blk] \
-rblk te.fifo [llength $blk] -edata $blk -edone [llength $blk]
# six words
set blk {0x3333 0x4444 0x5555 0x6666 0x7777 0x8888}
rlc exec \
-wblk te.fifo $blk -edone [llength $blk] \
-rblk te.fifo [llength $blk] -edata $blk -edone [llength $blk]
#
#-------------------------------------------------------------------------
rlc log " test 3a: fifo read error (write 3, read 4) and -edone"
set blk {0xdead 0xbeaf 0x1234}
rlc exec \
-wblk te.fifo $blk -edone [llength $blk] \
-rblk te.fifo 4 -edata $blk -edone 3 -estaterr
#
#
rlc log " test 3b: fifo write error (write 17, read 16)"
set blk {}
for { set i 0 } { $i < 17 } { incr i } {
lappend blk [expr {$i | ( $i << 8 ) }]
}
rlc exec \
-wblk te.fifo $blk -edone 16 -estaterr \
-rblk te.fifo 16 -edata [lrange $blk 0 15] -edone 16
#
#-------------------------------------------------------------------------
rlc log " test 4a: verify that init 100 clears fifo and not cntl&data"
# check fifo empty; write a value; clear fifo via init; check fifo empty
# check that cntl and data not affected
rlc exec \
-wreg te.cntl [regbld rbtest::CNTL {nbusy 0x1}] \
-wreg te.data 0x1234 \
-rreg te.fifo -estaterr \
-wreg te.fifo 0x4321 \
-init te.cntl [regbld rbtest::INIT fifo] \
-rreg te.fifo -estaterr \
-rreg te.cntl -edata [regbld rbtest::CNTL {nbusy 0x1}] \
-rreg te.data -edata 0x1234
#
#-------------------------------------------------------------------------
rlc log " test 6: test that te.ncyc returns # of cycles for te.fifo w&r"
foreach nbusy {0x03 0x07 0x0f 0x1f 0x00} {
set valc [regbld rbtest::CNTL [list nbusy $nbusy]]
rlc exec \
-wreg te.cntl $valc \
-wreg te.fifo [expr {$nbusy | ( $nbusy << 8 ) }] \
-rreg te.ncyc -edata [expr {$nbusy + 1 }] \
-rreg te.fifo -edata [expr {$nbusy | ( $nbusy << 8 ) }] \
-rreg te.ncyc -edata [expr {$nbusy + 1 }]
}
#
#-------------------------------------------------------------------------
rlc log " test 7: verify escaping (all 256 byte codes transported)"
for {set i 0} {$i < 8} {incr i} {
set blk {}
for {set j 0} {$j < 16} {incr j} {
set bcode [expr {32 * $i + 2 * $j}]
lappend blk [expr {( $bcode << 8 ) | ( $bcode + 1 )}]
}
rlc exec \
-wblk te.fifo $blk \
-rblk te.fifo [llength $blk] -edata $blk
}
#
#-------------------------------------------------------------------------
rlc log "rbtest::test_fifo - cleanup: clear cntl, data, and fifo"
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}
/test_attn.tcl
0,0 → 1,86
# $Id: test_attn.tcl 661 2015-04-03 18:28:41Z mueller $
#
# Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2015-04-03 661 2.1 drop estatdef (stat err check default now)
# 2014-11-09 603 2.0 use rlink v4 address layout and iface
# 2011-03-27 374 1.0 Initial version
# 2011-03-20 372 0.1 First Draft
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# Test with stat connectivity of the cntl register.
#
proc test_attn {{attnmsk 0x0}} {
# quit if nothing to do...
if {$attnmsk == 0} {return 0}
#
set apats {}
for {set i 0} {$i < 16} {incr i} {
set apat [expr {1 << $i}]
if {[expr {$apat & $attnmsk}]} {lappend apats $apat}
}
#
set errcnt 0
rlc errcnt -clear
#
rlc log "rbtest::test_attn - init: clear regs and attn flags"
rlc exec -init te.cntl [regbld rbtest::INIT cntl data fifo]
rlc exec -attn
 
#
#-------------------------------------------------------------------------
rlc log " test 1: verify connection of attn bits"
foreach apat $apats {
rlc exec \
-wreg te.attn $apat \
-rreg te.cntl -estat [regbld rlink::STAT attn] \
-attn -edata $apat \
-rreg te.cntl -estat 0x0
}
 
#
#-------------------------------------------------------------------------
rlc log " test 2: verify that attn flags accumulate"
foreach apat $apats {
rlc exec -wreg te.attn $apat
}
rlc exec -attn -edata $attnmsk
 
#
#-------------------------------------------------------------------------
#rlc log " test 3: verify that <attn> comma is send"
#set apat [lindex $apats 0]
#rlc exec -init 0xff [regbld rlink::INIT anena] -estat $esdval $esdmsk
#rlc exec -wreg te.attn $apat -estat $esdval $esdmsk
#rlc wtlam 1.
#rlc exec -attn -edata $apat -estat $esdval $esdmsk
 
#
#-------------------------------------------------------------------------
rlc log "rbtest::test_attn - cleanup: clear regs and attn flags"
rlc exec -init te.cntl [regbld rbtest::INIT cntl data fifo]
rlc exec -attn
#
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}
/test_all.tcl
0,0 → 1,37
# $Id: test_all.tcl 662 2015-04-05 08:02:54Z mueller $
#
# Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2015-04-03 662 1.1 add test_labo
# 2011-03-27 374 1.0 Initial version
# 2011-03-13 369 0.1 First draft
#
 
package provide rbtest 1.0
 
namespace eval rbtest {
#
# Driver for all rbtest tests
#
proc test_all {{statmsk 0x0} {attnmsk 0x0}} {
#
set errcnt 0
incr errcnt [rbtest::test_data]
incr errcnt [rbtest::test_fifo]
incr errcnt [rbtest::test_labo]
incr errcnt [rbtest::test_stat $statmsk]
incr errcnt [rbtest::test_attn $attnmsk]
return $errcnt
}
}
/test_data.tcl
0,0 → 1,129
# $Id: test_data.tcl 661 2015-04-03 18:28:41Z mueller $
#
# Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2015-04-03 661 2.1 drop estatdef, use estattout
# 2014-12-21 617 2.0.1 use rbtout stat bit for timeout
# 2014-11-09 603 2.0 use rlink v4 address layout and iface
# 2011-03-27 374 1.0 Initial version
# 2011-03-13 369 0.1 First Draft
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# Basic tests with cntl, stat, data and dinc registers.
# All tests depend only on rbd_tester logic alone and not on how the
# rbd_tester is embedded in the design (e.g. stat and attn connections)
#
proc test_data {} {
#
set errcnt 0
rlc errcnt -clear
#
rlc log "rbtest::test_data - init: clear cntl, data, and fifo"
# Note: fifo clear via init is tested later, used here 'speculatively'
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
#-------------------------------------------------------------------------
rlc log " test 1a: cntl, stat and data are write- and read-able"
foreach {addr valw valr} [list te.cntl 0xffff 0x83ff \
te.cntl 0x0000 0x0000 \
te.stat 0xffff 0x000f \
te.stat 0x0000 0x0000 \
te.data 0xffff 0xffff \
te.data 0x0000 0x0000 ] {
rlc exec -wreg $addr $valw
rlc exec -rreg $addr -edata $valr
}
#
#
rlc log " test 1b: as test 1a, use clists, check cntl,stat,data distinct"
foreach {valc vals vald} [list 0x1 0x2 0x3 0x0 0x0 0x0] {
rlc exec \
-wreg te.cntl $valc \
-wreg te.stat $vals \
-wreg te.data $vald \
-rreg te.cntl -edata $valc \
-rreg te.stat -edata $vals \
-rreg te.data -edata $vald
}
#
#-------------------------------------------------------------------------
rlc log " test 2: verify that large nbusy causes timeout"
rlc exec \
-wreg te.data 0xdead \
-rreg te.data -edata 0xdead \
-wreg te.cntl [regbld rbtest::CNTL {nbusy 0x3ff}] \
-wreg te.data 0xbeaf -estattout \
-rreg te.data -estattout \
-wreg te.cntl 0x0000 \
-rreg te.data -edata 0xdead
#
# -------------------------------------------------------------------------
rlc log " test 3a: verify that init 001 clears cntl,stat and not data"
set valc [regbld rbtest::CNTL {nbusy 1}]
rlc exec \
-wreg te.cntl $valc \
-wreg te.stat 0x0002 \
-wreg te.data 0x1234 \
-init te.cntl [regbld rbtest::INIT cntl] \
-rreg te.cntl -edata 0x0 \
-rreg te.stat -edata 0x0 \
-wreg te.data 0x1234
rlc log " test 3b: verify that init 010 clears data and not cntl,stat"
set valc [regbld rbtest::CNTL {nbusy 2}]
rlc exec \
-wreg te.cntl $valc \
-wreg te.stat 0x0003 \
-wreg te.data 0x4321 \
-init te.cntl [regbld rbtest::INIT data] \
-rreg te.cntl -edata $valc \
-rreg te.stat -edata 0x0003 \
-wreg te.data 0x0
rlc log " test 3c: verify that init 011 clears data and cntl,stat"
rlc exec \
-wreg te.cntl [regbld rbtest::CNTL {nbusy 3}] \
-wreg te.stat 0x0004 \
-wreg te.data 0xabcd \
-init te.cntl [regbld rbtest::INIT data cntl] \
-rreg te.cntl -edata 0x0 \
-rreg te.stat -edata 0x0 \
-wreg te.data 0x0
#
# -------------------------------------------------------------------------
rlc log " test 4: test that te.ncyc returns # of cycles for te.data w&r"
foreach nbusy {0x03 0x07 0x0f 0x1f 0x00} {
set valc [regbld rbtest::CNTL [list nbusy $nbusy]]
rlc exec \
-wreg te.cntl $valc \
-wreg te.data [expr {$nbusy | ( $nbusy << 8 ) }] \
-rreg te.ncyc -edata [expr {$nbusy + 1 }] \
-rreg te.data -edata [expr {$nbusy | ( $nbusy << 8 ) }] \
-rreg te.ncyc -edata [expr {$nbusy + 1 }]
}
#
#-------------------------------------------------------------------------
rlc log "rbtest::test_data - cleanup: clear cntl and data"
rlc exec -init te.cntl [regbld rbtest::INIT data cntl]
#
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}
/test_labo.tcl
0,0 → 1,175
# $Id: test_labo.tcl 662 2015-04-05 08:02:54Z mueller $
#
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2015-04-03 662 1.0 Initial version
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# Test labo with fifo
#
proc test_labo {} {
#
set errcnt 0
rlc errcnt -clear
#
rlc log "rbtest::test_labo - init: clear cntl, data, and fifo"
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
#-------------------------------------------------------------------------
rlc log " test 1: check that sucessfull blk's do not abort chain"
 
# use data reg to monitor labo aborts
rlc exec \
-wreg te.data 0x0000
 
set blk0 {0x1111 0x2222}
set blk1 {0x3333 0x4444}
set blk {0x1111 0x2222 0x3333 0x4444}
rlc exec \
-wblk te.fifo $blk0 \
-labo -edata 0 \
-wblk te.fifo $blk1 \
-labo -edata 0 \
-rblk te.fifo 4 -edata $blk \
-labo -edata 0 \
-wreg te.data 0x0001
 
# no labo above, so 0x01 written to data !
rlc exec \
-rreg te.data -edata 0x0001
 
#
#-------------------------------------------------------------------------
rlc log " test 2: check that failed rblk aborts chain"
 
rlc exec \
-wblk te.fifo $blk0 \
-labo -edata 0 \
-wblk te.fifo $blk1 \
-labo -edata 0 \
-wreg te.data 0x0010 \
-rblk te.fifo 6 -edata $blk -edone 4 -estaterr \
-labo -edata 1 \
-wreg te.data 0x0011 \
-rreg te.data -edata 0xffff \
-wreg te.data 0x0012
 
# last labo aborted, so 0x10 written, but not 0x11 or 0x12
rlc exec \
-rreg te.data -edata 0x0010
 
#
#-------------------------------------------------------------------------
rlc log " test 3: check that failed wblk aborts chain"
 
set blk {}
for { set i 0 } { $i < 17 } { incr i } {
lappend blk [expr {$i | ( $i << 8 ) }]
}
rlc exec \
-wreg te.data 0x0020 \
-wblk te.fifo $blk -edone 16 -estaterr \
-labo -edata 1 \
-wreg te.data 0x0021 \
-rreg te.data -edata 0xffff \
-wreg te.data 0x0022
 
# last labo aborted, so 0x20 written, but not 0x21
rlc exec \
-rreg te.data -edata 0x0020
 
#
#-------------------------------------------------------------------------
rlc log " test 4a: check that babo state kept over clists"
 
rlc exec \
-wreg te.data 0x0030 \
-labo -edata 1 \
-wreg te.data 0x0031
 
# no blk done, so labo state sicks, so 0x30 written, but not 0x31
rlc exec \
-rreg te.data -edata 0x0030
 
#
#-------------------------------------------------------------------------
rlc log " test 4b: check that babo readable from RLSTAT"
 
# babo still set
set babomsk [regbld rlink::RLSTAT babo]
rlc exec \
-rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk
 
#
#-------------------------------------------------------------------------
rlc log " test 4c: check that babo reset by successful rblk"
 
rlc exec \
-wreg te.data 0x0040 \
-rblk te.fifo 8 -edata [lrange $blk 0 7] \
-rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk \
-rblk te.fifo 8 -edata [lrange $blk 8 15] \
-rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk \
-rblk te.fifo 8 -edone 0 -estaterr \
-rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk \
-labo -edata 1 \
-wreg te.data 0x0041
 
# last rblk failed again so 0x40 written, but not 0x41
rlc exec \
-rreg te.data -edata 0x0040
 
#
#-------------------------------------------------------------------------
rlc log " test 4d: check that babo reset by successful wblk"
 
set blk2 {0x5555 0x6666}
rlc exec \
-wblk te.fifo $blk2 \
-rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk
 
#
#-------------------------------------------------------------------------
rlc log " test 5: check commands between blk and labo are accepted"
 
# there are two words in fifo from previous test
rlc exec \
-wreg te.data 0x0050 \
-rblk te.fifo 4 -edata $blk2 -edone 2 -estaterr \
-rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk \
-wreg te.data 0x0051 \
-labo -edata 1 \
-wreg te.data 0x0052
 
# last rblk failed so 0x50 written, also 0x51, but not 0x52
rlc exec \
-rreg te.data -edata 0x0051
 
#
#-------------------------------------------------------------------------
rlc log "rbtest::test_fifo - cleanup: clear cntl, data, and fifo"
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}
/util.tcl
0,0 → 1,171
# $Id: util.tcl 661 2015-04-03 18:28:41Z mueller $
#
# Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2014-12-21 617 2.0.1 use rbtout stat bit for timeout
# 2014-11-09 603 2.0 use rlink v4 address layout and iface with 8 regs
# 2011-03-27 374 1.0 Initial version
# 2011-03-13 369 0.1 Frist draft
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# setup register descriptions for rbd_tester
#
regdsc CNTL {wchk 15} {nbusy 9 10}
regdsc INIT {fifo 2} {data 1} {cntl 0}
#
# setup: amap definitions for rbd_tester
#
proc setup {{base 0xffe0}} {
rlc amap -insert te.cntl [expr {$base + 0x00}]
rlc amap -insert te.stat [expr {$base + 0x01}]
rlc amap -insert te.attn [expr {$base + 0x02}]
rlc amap -insert te.ncyc [expr {$base + 0x03}]
rlc amap -insert te.data [expr {$base + 0x04}]
rlc amap -insert te.dinc [expr {$base + 0x05}]
rlc amap -insert te.fifo [expr {$base + 0x06}]
rlc amap -insert te.lnak [expr {$base + 0x07}]
}
#
# init: reset rbd_tester (clear via init)
#
proc init {} {
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
}
#
# nbusymax: returns maximal nbusy value not causing timeout
# set te.cntl nbusy to max
# do read to te.data (will fail, check stat)
# get cycle count from te.ncyc --> this minus one is nbusymax
# restore te.cntl
 
proc nbusymax {} {
set esdmsk [regbld rlink::STAT rbtout rbnak rberr]
rlc exec \
-rreg te.cntl sav_cntl \
-wreg te.cntl [regbld rbtest::CNTL {nbusy -1}] \
-rreg te.data -estat [regbld rlink::STAT rbtout] $esdmsk \
-rreg te.ncyc ncyc
rlc exec \
-wreg te.cntl $sav_cntl
return [expr {$ncyc - 1}]
}
#
# probe: determine rbd_tester environment (max nbusy, stat and attn wiring)
#
proc probe {} {
set esdmsktout [regbld rlink::STAT rbnak rberr]
set rbusy {}
set rstat {}
set rattn {}
#
# probe max nbusy for write and read
#
set wrerr {}
set rderr {}
for {set i 3} { $i < 8 } {incr i} {
set nbusy0 [expr {( 1 << $i )}]
for {set j -1} { $j <= 1 } {incr j} {
set nbusy [expr {$nbusy0 + $j}]
set valc [regbld rbtest::CNTL [list nbusy $nbusy]]
rlc exec \
-wreg te.cntl $valc \
-wreg te.data 0x0000 statwr -estat 0x0 $esdmsktout \
-rreg te.data dummy statrd -estat 0x0 $esdmsktout
if {[llength $wrerr] == 0 && [regget rlink::STAT(rbnak) $statwr] != 0} {
lappend wrerr $i $j $nbusy
}
if {[llength $rderr] == 0 && [regget rlink::STAT(rbnak) $statrd] != 0} {
lappend rderr $i $j $nbusy
}
}
}
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
lappend rbusy $wrerr $rderr
#
# probe stat wiring
#
for {set i 0} { $i < 4 } {incr i} {
rlc exec \
-wreg te.stat [expr {1 << $i}] \
-rreg te.data dummy statrd
lappend rstat [list $i [regget rlink::STAT(stat) $statrd]]
}
rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl]
#
# probe attn wiring
#
rlc exec -attn
for {set i 0} { $i < 16 } {incr i} {
rlc exec \
-wreg te.attn [expr {1 << $i}] \
-attn attnpat
lappend rattn [list $i $attnpat]
}
rlc exec -attn
#
return [list $rbusy $rstat $rattn]
}
#
# probe_print: print probe results
#
proc probe_print {{plist {}}} {
set rval {}
 
if {[llength $plist] == 0} {
set plist [probe]
}
 
set rbusy [lindex $plist 0]
set rstat [lindex $plist 1]
set rattn [lindex $plist 2]
#
append rval \
"nbusy: write max [lindex $rbusy 0 2] --> WIDTH=[lindex $rbusy 0 0]"
append rval \
"\nnbusy: read max [lindex $rbusy 1 2] --> WIDTH=[lindex $rbusy 1 0]"
#
for {set i 0} { $i < 4 } {incr i} {
set rcvpat [lindex $rstat $i 1]
set rcvind [print_bitind $rcvpat]
append rval [format "\nstat: te.stat line %2d --> design %2d %s" \
$i $rcvind [pbvi b4 $rcvpat]]
}
#
for {set i 0} { $i < 16 } {incr i} {
set rcvpat [lindex $rattn $i 1]
set rcvind [print_bitind $rcvpat]
append rval [format "\nattn: te.attn line %2d --> design %2d %s" \
$i $rcvind [pbvi b16 $rcvpat]]
}
return $rval
}
 
#
# print_bitind: helper for probe_print:
#
proc print_bitind {pat} {
for {set i 0} { $i < 16 } {incr i} {
if {[expr {$pat & [expr {1 << $i}] }] } { return $i}
}
return -1
}
}
/test_stat.tcl
0,0 → 1,61
# $Id: test_stat.tcl 603 2014-11-09 22:50:26Z mueller $
#
# Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2014-11-09 603 2.0 use rlink v4 address layout and iface
# 2011-03-27 374 1.0 Initial version
# 2011-03-20 372 0.1 First Draft
#
 
package provide rbtest 1.0
 
package require rutiltpp
package require rutil
package require rlink
 
namespace eval rbtest {
#
# Test with stat connectivity of the stat register.
#
proc test_stat {{statmsk 0x0}} {
# quit if nothing to do...
if {$statmsk == 0} {return 0}
 
#
set errcnt 0
rlc errcnt -clear
#
rlc log "rbtest::test_stat - init: clear cntl"
rlc exec -init te.cntl [regbld rbtest::INIT cntl]
#
#-------------------------------------------------------------------------
rlc log " test 1: verify connection of cntl stat bits to stat return"
for {set i 0} {$i < 4} {incr i} {
set spat [expr {1 << $i}]
if {[expr {$spat & $statmsk}]} {
rlc exec \
-wreg te.stat $spat \
-rreg te.stat -edata $spat \
-estat [regbld rlink::STAT [list stat $spat]]
}
}
#
#-------------------------------------------------------------------------
rlc log "rbtest::test_stat - cleanup: clear cntl"
rlc exec -init te.cntl [regbld rbtest::INIT cntl]
#
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}
/.cvsignore
0,0 → 1,61
pkgIndex.tcl
/.
. Property changes : Added: svn:ignore ## -0,0 +1,34 ## +*.dep_ghdl +*.dep_isim +*.dep_xst +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +isim +isim.log +isim.wdb +fuse.log +*_[sft]sim.vhd +*_tsim.sdf +*_xst.log +*_tra.log +*_twr.log +*_map.log +*_par.log +*_tsi.log +*_pad.log +*_bgn.log +*_svn.log +*_sum.log +*_[dsft]sim.log +pkgIndex.tcl

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