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URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

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  • This comparison shows the changes necessary to convert path 
    /w11/tags/w11a_V0.74/tools/asm-11/lib
    from Rev 35 to Rev 38
    ↔ Reverse comparison
  •

Rev 35 → Rev 38

/vec_devcatch_reset.mac
0,0 → 1,49
; $Id: vec_devcatch_reset.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; re-write vector catcher for device interrupts (subset used by w11)
;
mov #v..dlr+2,v..dlr ; vec 60 (DL11-RX 1st)
clr v..dlr+2
mov #v..dlt+2,v..dlt ; vec 64 (DL11-TX 1st)
clr v..dlt+2
;
mov #v..ptr+2,v..ptr ; vec 70 (PC11/PTR)
clr v..ptr+2
mov #v..ptp+2,v..ptp ; vec 74 (PC11/PTP)
clr v..ptp+2
;
mov #v..kwl+2,v..kwl ; vec 100 (KW11-L)
clr v..kwl+2
mov #v..kwp+2,v..kwp ; vec 104 (KW11-P)
clr v..kwp+2
;
mov #v..deu+2,v..deu ; vec 120 (DEUNA)
clr v..deu+2
;
mov #v..rl+2,v..rl ; vec 120 (RL11)
clr v..rl+2
;
mov #v..lp+2,v..lp ; vec 200 (LP11)
clr v..lp+2
;
mov #v..rk+2,v..rk ; vec 220 (RK11)
clr v..rk+2
mov #v..tm+2,v..tm ; vec 224 (TM11)
clr v..tm+2
;
mov #v..rp+2,v..rp ; vec 254 (RHRP)
clr v..rp+2
mov #v..iis+2,v..iis ; vec 250 (IIST)
clr v..iis+2
;
mov #v..d2r+2,v..d2r ; vec 300 (DL11-RX 2nd)
clr v..d2r+2
mov #v..d2t+2,v..d2t ; vec 304 (DL11-TX 2nd)
clr v..d2t+2
mov #v..dzr+2,v..dzr ; vec 310 (DZ11-RX)
clr v..dzr+2
mov #v..dzt+2,v..dzt ; vec 314 (DZ11-TX)
clr v..dzt+2
;
/defs_nzvc.mac
0,0 → 1,22
; $Id: defs_nzvc.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for condition code combinations
;
cp0000=000000 ; N=0 Z=0 V=0 C=0
cp000c=000001 ; N=0 Z=0 V=0 C=1
cp00v0=000002 ; N=0 Z=0 V=1 C=0
cp00vc=000003 ; N=0 Z=0 V=1 C=1
cp0z00=000004 ; N=0 Z=1 V=0 C=0
cp0z0c=000005 ; N=0 Z=1 V=0 C=1
cp0zv0=000006 ; N=0 Z=1 V=1 C=0
cp0zvc=000007 ; N=0 Z=1 V=1 C=1
cpn000=000010 ; N=1 Z=0 V=0 C=0
cpn00c=000011 ; N=1 Z=0 V=0 C=1
cpn0v0=000012 ; N=1 Z=0 V=1 C=0
cpn0vc=000013 ; N=1 Z=0 V=1 C=1
cpnz00=000014 ; N=1 Z=1 V=0 C=0
cpnz0c=000015 ; N=1 Z=1 V=0 C=1
cpnzv0=000016 ; N=1 Z=1 V=1 C=0
cpnzvc=000017 ; N=1 Z=1 V=1 C=1
/tcode_std_start.mac
0,0 → 1,63
; $Id: tcode_std_start.mac 712 2015-11-01 22:53:45Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; Default tcode startup code
;
.include |lib/defs_bits.mac|
.include |lib/defs_cpu.mac|
.include |lib/defs_nzvc.mac|
;
.include |lib/vec_cpucatch.mac|
.include |lib/vec_devcatch.mac|
;
. = 000200
jmp @#start
;
. = 002000
stack:
;
dostop: halt ; successful halt address is 2002 !!
stop: br dostop ; no restart after successful halt !!
;
psreg: .word cp.dsr ; pointer to switch reg (default->hardware)
pdreg: .word cp.dsr ; pointer to display reg (default->hardware)
swsreg: .word 0 ; software switch reg
swdreg: .word 0 ; software display reg
;
tstno: .word 0 ; test number
runno: .word 0 ; run number
;
;
start: reset ; general reset
mov #stack,sp ; setup stack
;
mov #v..lp+2,v..lp ; setup LP11 vector catcher
clr v..lp
;
tst swsreg ; software switch reg setup ?
bne 200$ ; if yes use software swi and disp reg
;
mov #100$,v..iit ; setup IIT handler
mov #cp.pr7,v..iit+2
;
mov 200$,r5 ; setup failed probe code pointer
mov @#cp.dsr,r0 ; test switch register
clr @#cp.dsr ; test display register
br 300$
;
; IIT handler for probing. Simply use r5 as return address
; --> successful probes simply fall through
; --> unsuccessful probes branch to address given in r5
;
100$: mov r5,(sp)
rti
;
; setup software swi and disp reg
;
200$: mov #swsreg,psreg
mov #swdreg,pdreg
;
300$: mov #v..iit+2,v..iit ; reset to iit vector catcher
clr v..iit+2
;
/defs_reg70.mac
0,0 → 1,30
; $Id: defs_reg70.mac 707 2015-08-02 12:10:42Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for 11/70 CPU registers (as in defs_reg70.das)
;
stklim = 177774
pirq = 177772
mbrk = 177770
cpuerr = 177766
sysid = 177764
hisize = 177762
losize = 177760
ubmap = 170200
;
ms.hm = 177752
ms.mai = 177750
ms.ctl = 177746
ms.err = 177744
ms.ehi = 177742
ms.elo = 177740
;
; symbol definitions for cpuerr
;
cp.hlt = 000200
cp.aer = 000100
cp.nxm = 000040
cp.ito = 000020
cp.ysv = 000010
cp.rsv = 000004
/vec_cpucatch.mac
0,0 → 1,29
; $Id: vec_cpucatch.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; vector catcher for basic cpu interrupts
;
. = 000004
v..iit: .word v..iit+2 ; vec 4
.word 0
v..rit: .word v..rit+2 ; vec 10
.word 0
v..bpt: .word v..bpt+2 ; vec 14 (T bit; BPT)
.word 0
v..iot: .word v..iot+2 ; vec 20 (IOT)
.word 0
v..pwr: .word v..pwr+2 ; vec 24 (Power fail, not used)
.word 0
v..emt: .word v..emt+2 ; vec 30 (EMT)
.word 0
v..trp: .word v..trp+2 ; vec 34 (TRAP)
.word 0
 
. = 000240
v..pir: .word v..pir+2 ; vec 240 (PIRQ)
.word 0
v..fpp: .word v..fpp+2 ; vec 244 (FPP)
.word 0
v..mmu: .word v..mmu+2 ; vec 250 (MMU)
.word 0
/vec_cpucatch_reset.mac
0,0 → 1,29
; $Id: vec_cpucatch_reset.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; re-write vector catcher for basic cpu interrupts
;
mov #v..iit+2,v..iit ; vec 4
clr v..iit+2
mov #v..rit+2,v..rit ; vec 10
clr v..rit+2
;
mov #v..bpt+2,v..bpt ; vec 14 (T bit; BPT)
clr v..bpt+2
mov #v..iot+2,v..iot ; vec 20 (IOT)
clr v..iot+2
mov #v..pwr+2,v..pwr ; vec 24 (Power fail, not used)
clr v..pwr+2
mov #v..emt+2,v..emt ; vec 30 (EMT)
clr v..emt+2
mov #v..trp+2,v..trp ; vec 34 (TRAP)
clr v..trp+2
;
mov #v..pir+2,v..pir ; vec 240 (PIRQ)
clr v..pir+2
mov #v..fpp+2,v..fpp ; vec 244 (FPP)
clr v..fpp+2
mov #v..mmu+2,v..mmu ; vec 250 (MMU)
clr v..mmu+2
;
/defs_mmu.mac
0,0 → 1,57
; $Id: defs_mmu.mac 707 2015-08-02 12:10:42Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for mmu registers (as in defs_mmu.das)
;
ssr0 = 177572
ssr1 = 177574
ssr2 = 177576
ssr3 = 172516
;
uipdr = 177600 ; usr i page dsc base
udpdr = 177620 ; usr d page dsc base
udpdr = 177620 ; usr d page dsc base
uipar = 177640 ; usr i page addr base
udpar = 177660 ; usr d page addr base
sipdr = 172200 ; sup i page dsc base
sdpdr = 172220 ; sup d page dsc base
sipar = 172240 ; sup i page addr base
sdpar = 172260 ; sup d page addr base
kipdr = 172300 ; ker i page dsc base
kdpdr = 172320 ; ker d page dsc base
kipar = 172340 ; ker i page addr base
kdpar = 172360 ; ker d page addr base
;
; symbol definitions for ssr0
;
m0.anr = 100000
m0.ale = 040000
m0.ard = 020000
m0.trp = 010000
m0.ent = 001000
m0.mai = 000400
m0.ico = 000200
m0.dsp = 000020
m0.ena = 000001
;
; symbol definitions for ssr3
;
m3.eub = 000040
m3.e22 = 000020
m3.dkm = 000004
m3.dsm = 000002
m3.dum = 000001
;
; symbol definitions for pdr regs
;
md.aia = 000200
md.aiw = 000100
md.dwn = 000010
md.an7 = 000007
md.arw = 000006
md.atw = 000005
md.atr = 000004
md.an3 = 000003
md.aro = 000002
md.art = 000001
/tcode_std_base.mac
0,0 → 1,37
; $Id: tcode_std_base.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; Default tcode base code for simple tests
;
.include |lib/tcode_std_start.mac|
;
clr @pdreg ; clear display reg
jmp loop1
;
; IOT handler
; called at end of each test
; increments tstno and updates display register
;
vh.iot: inc tstno ; bump test number
; setup display reg
movb tstno,swdreg ; low byte: test number
movb runno,swdreg+1 ; high byte: pass number
mov swdreg,@pdreg ; write display reg (is noop when sw dreg used)
rtt
;
loop: bit #bit00,@psreg ; test 'loop bit'
bne 1$
jmp stop
 
1$: reset ; re-reset CPU for each pass
mov #stack,sp ; re-init SP
clr tstno ; reset test counter
inc runno ; bump pass counter
;
.include |lib/vec_cpucatch_reset.mac|
.include |lib/vec_devcatch_reset.mac|
;
loop1:
mov #vh.iot,v..iot ; setup IOT trap handler
mov #cp.pr7,v..iot+2
/vec_devcatch.mac
0,0 → 1,82
; $Id: vec_devcatch.mac 710 2015-08-31 06:19:56Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; vector catcher for device interrupts (subset used by w11)
;
; w11 device summary from ibdr_maxisys.vhd:
;
; ibbase vec pri slot attn sror device name
; 177560 060 4 7 7 1 3/2 DL11-RX 1st
; 064 4 6 6 ^ DL11-TX 1st
; 177550 070 4 3 3 10 4/1 PC11/PTR
; 074 4 2 2 ^ PC11/PTP
; 177546 100 6 14 15 - 1/3 KW11-L
; 172540 104 7 17 - 1/1 KW11-P
; 174510 120 5 14 9 1/4 DEUNA
; 174400 160 5 12 12 5 2/2 RL11
; 177514 200 4 1 1 8 4/2 LP11
; 177400 220 5 11 11 4 2/3 RK11
; 172520 224 5 10 10 7 2/4 TM11
; 176700 254 5 13 13 6 2/1 RHRP
; 177500 260 6 15 16 - 1/2 IIST
; 176500 300 4 5 5 2 3/3 DL11-RX 2nd
; 304 4 4 4 ^ DL11-TX 2nd
; 160100 310? 5 9 9 3 3/1 DZ11-RX
; 314? 5 8 8 ^ DZ11-TX
;
. = 000060
v..dlr: .word v..dlr+2 ; vec 60 (DL11-RX 1st)
.word 0
v..dlt: .word v..dlt+2 ; vec 64 (DL11-TX 1st)
.word 0
;
v..ptr: .word v..ptr+2 ; vec 70 (PC11/PTR)
.word 0
v..ptp: .word v..ptp+2 ; vec 74 (PC11/PTP)
.word 0
;
. = 000100
v..kwl: .word v..kwl+2 ; vec 100 (KW11-L)
.word 0
v..kwp: .word v..kwp+2 ; vec 104 (KW11-P)
.word 0
;
. = 000120
v..deu: .word v..deu+2 ; vec 120 (DEUNA)
.word 0
;
. = 000160
v..rl: .word v..rl+2 ; vec 120 (RL11)
.word 0
;
; Note on vector 200
; MAINDECs use 200 also as default start address. This vector catcher
; might therefore be overwritten later by startup code of test programs.
;
. = 000200
v..lp: .word v..lp+2 ; vec 200 (LP11)
.word 0
;
. = 000220
v..rk: .word v..rk+2 ; vec 220 (RK11)
.word 0
v..tm: .word v..tm+2 ; vec 224 (TM11)
.word 0
;
. = 000254
v..rp: .word v..rp+2 ; vec 254 (RHRP)
.word 0
v..iis: .word v..iis+2 ; vec 250 (IIST)
.word 0
;
. = 000300
v..d2r: .word v..d2r+2 ; vec 300 (DL11-RX 2nd)
.word 0
v..d2t: .word v..d2t+2 ; vec 304 (DL11-TX 2nd)
.word 0
v..dzr: .word v..dzr+2 ; vec 310 (DZ11-RX)
.word 0
v..dzt: .word v..dzt+2 ; vec 314 (DZ11-TX)
.word 0
;
/defs_rp.mac
0,0 → 1,77
; $Id: defs_rp.mac 691 2015-06-15 21:22:08Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for RH70/RPRM controler
;
; register addresses
;
rp.cs1=176700
rp.wc =176702
rp.ba =176704
rp.da =176706
rp.cs2=176710
rp.ds =176712
rp.er1=176714
rp.as =176716
rp.la =176720
rp.db =176722
rp.mr1=176724
rp.dt =176726
rp.sn =176730
rp.of =176732
rp.dc =176734
rp.m13=176736
rp.m14=176740
rp.m15=176742
rp.ec1=176744
rp.ec2=176746
rp.bae=176750
rp.cs3=176752
;
; symbol definitions for rp.cs1
;
rp.sc =100000
rp.tre=040000
rp.dva=004000
rp.rdy=000200
rp.ie =000100
rp.fsk=000004 ; seek
rp.fcl=000010 ; drive clear
rp.fse=000030 ; search
rp.fwr=000060 ; write
rp.frd=000070 ; read
rp.go =000001
;
; symbol definitions for rp.ds
;
rp.ata=100000
rp.erp=040000
rp.pip=020000
rp.mol=010000
rp.wrl=004000
rp.lbt=002000
rp.pgm=001000
rp.dpr=000400
rp.dry=000200
rp.vv =000100
rp.om =000001
;
; symbol definitions for rp.er1
;
rp.dck=100000
rp.uns=040000
rp.opi=020000
rp.dte=010000
rp.wle=004000
rp.iae=002000
rp.aoe=001000
rp.hcr=000400
rp.hce=000200
rp.ech=000100
rp.wcf=000040
rp.fer=000020
rp.par=000010
rp.rmr=000004
rp.ilr=000002
rp.ilf=000001
/defs_tm.mac
0,0 → 1,38
; $Id: defs_tm.mac 683 2015-05-17 21:54:35Z mueller $
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for RK11 controler
;
; register addresses
;
tm.sr =172520
tm.cr =172522
tm.bc =172524
tm.ba =172526
tm.db =172530
tm.rl =172532
;
; symbol definitions for tm.sr
;
tm.icm=100000
tm.eof=040000
tm.pae=010000
tm.eot=002000
tm.rle=001000
tm.bte=000400
tm.nxm=000200
tm.onl=000100
tm.bot=000040
tm.wrl=000004
tm.rew=000002
tm.tur=000001
;
; symbol definitions for tm.cr
;
tm.err=100000
tm.ini=010000
tm.pev=004000
tm.rdy=000200
tm.ie =000100
tm.go =000001
/kproct.mac
0,0 → 1,38
; $Id: kproct.mac 503 2013-04-06 19:44:13Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; synchronous (polling) console print: print octal number
; Call:
; jsr pc, kproct
; Arguments:
; r0: number to print
;
; r1-r5 registers preserved
;
 
kproct: mov r1,-(sp) ; save r1,..,r3
mov r2,-(sp)
mov r3,-(sp)
mov #101$,r1 ; r1 points behind end of buffer
clrb -(r1) ; ensure 0-termination
mov #6,r2 ; loop over 6 digits
1$: mov r0,r3 ; get reminder
bic #177770,r3 ; mask 3 lsb
add #'0,r3 ; add ascii 0 code
movb r3,-(r1) ; write (backwards) to buffer
clc ; unsigned divide by 8
ror r0
asr r0
asr r0
sob r2,1$ ; go for next digit
mov r1,r0 ; r1 now points to convered string
jsr pc,kprstr ; print it
mov (sp)+,r3 ; restore r1,..,r3
mov (sp)+,r2
mov (sp)+,r1
rts pc
 
100$: .blkb 7. ; buffer
101$: ; end-of-buffer
.even
/defs_bits.mac
0,0 → 1,22
; $Id: defs_bits.mac 622 2014-12-28 20:45:26Z mueller $
; Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for generic bits names (as in defs_bits.das)
;
bit15=100000
bit14=040000
bit13=020000
bit12=010000
bit11=004000
bit10=002000
bit09=001000
bit08=000400
bit07=000200
bit06=000100
bit05=000040
bit04=000020
bit03=000010
bit02=000004
bit01=000002
bit00=000001
/kprfmt.mac
0,0 → 1,53
; $Id: kprfmt.mac 503 2013-04-06 19:44:13Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; synchronous (polling) console print: very simple printf
; Call:
; jsr pc, kprfmt
; Arguments:
; r0: pointer format string
; r1: pointer to argument list
;
; r2-r5 registers preserved
;
 
kprfmt: mov r2,-(sp) ; save r2
 
mov r0,r2 ; r2 now ptr to fmt string
 
1$: movb (r2)+,r0 ; next fmt char
beq 20$ ; if zero quit
cmpb #'%,r0 ; is it '%' ?
bne 10$ ; if not, print
movb (r2)+,r0 ; if yes, get next
beq 20$ ; if zero quit
 
cmpb #'s,r0 ; %s found ?
bne 2$
mov (r1)+,r0 ; get next arg
jsr pc,kprstr ; and print string
br 1$ ; go for next fmt char
 
2$: cmpb #'o,r0 ; %o found ?
bne 3$
mov (r1)+,r0 ; get next arg
jsr pc,kproct ; and print octal number
br 1$ ; go for next fmt char
 
3$: cmpb #'d,r0 ; %d found
bne 4$
mov (r1)+,r0 ; get next arg
jsr pc,kprdec ; and print as decimal number
br 1$
 
4$: movb -2(r2),r0 ; was neither %s,%o,%d
jsr pc,kprchr ; so simply print these two letters...
movb -1(r2),r0
 
10$: jsr pc,kprchr ; print fmt char
br 1$ ; go for next fmt char
 
20$: mov (sp)+,r2 ; restore r2
rts pc
 
/kprstr.mac
0,0 → 1,21
; $Id: kprstr.mac 503 2013-04-06 19:44:13Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; synchronous (polling) console print: print 0-terminated string
; Call:
; jsr pc, kprstr
; Arguments:
; r0: pointer to 0-terminated string
;
; r1-r5 registers preserved
;
 
kprstr: mov r1,-(sp) ; save r1
mov r0,r1 ; r1 now ptr to string
1$: movb (r1)+,r0 ; get next char
beq 2$ ; quit if 0 char
jsr pc,kprchr ; otherwise print char
br 1$ ; go for next char
2$: mov (sp)+,r1 ; restore r1
rts pc
/defs_cpu.mac
0,0 → 1,29
; $Id: defs_cpu.mac 622 2014-12-28 20:45:26Z mueller $
; Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for basic CPU registers (as in defs_cpu.das)
;
cp.psw = 177776
cp.dsr = 177570
;
; symbol definitions for cp.psw
;
cp.cms=040000
cp.cmu=140000
cp.pms=010000
cp.pmu=030000
cp.ars=004000
cp.pr0=000000
cp.pr1=000040
cp.pr2=000100
cp.pr3=000140
cp.pr4=000200
cp.pr5=000240
cp.pr6=000300
cp.pr7=000340
cp.t=000020
cp.n=000010
cp.z=000004
cp.v=000002
cp.c=000001
/kprdec.mac
0,0 → 1,52
; $Id: kprdec.mac 503 2013-04-06 19:44:13Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; synchronous (polling) console print: print signed decimal number
; Call:
; jsr pc, kprdec
; Arguments:
; r0: number to print
;
; r1-r5 registers preserved
;
 
kprdec: mov r1,-(sp) ; save r1,..,r3
mov r2,-(sp)
mov r3,-(sp)
 
mov r0,r2 ; setup number to convert
bge 1$ ; if negative
neg r2 ; negate
mov #'-,r0 ; and print a '-'
jsr pc,kprchr
 
1$: mov #101$,r1 ; r1 points behind end of buffer
clrb -(r1) ; ensure 0-termination
movb #'.,-(r1) ; and trailing '.' to indicate decimal
mov #5,r0 ; loop over 5 digits
 
tst r2 ; number 0
bne 2$ ; if not convert
movb #'0,-(r1) ; if yes, ensure that '0' is printed
br 3$
 
2$: mov r2,r3 ; r2 is rest to convert
beq 3$ ; break if zero
clr r2 ; now (r2,r3) 32bit rest to convert
div #10.,r2 ; div: r2->quotient; r3->reminder
add #'0,r3 ; r3 is reminder, convert to char
movb r3,-(r1) ; write (backwards) to buffer
sob r0,2$ ; go for next digit
 
3$: mov r1,r0 ; r1 now points to convered string
jsr pc,kprstr ; print it
 
mov (sp)+,r3 ; restore r1,..,r3
mov (sp)+,r2
mov (sp)+,r1
rts pc
 
100$: .blkb 7. ; buffer
101$: ; end-of-buffer
.even
/kprchr.mac
0,0 → 1,22
; $Id: kprchr.mac 503 2013-04-06 19:44:13Z mueller $
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; synchronous (polling) console print: single character
; Call:
; jsr pc, kprchr
; Arguments:
; r0: character to be printed
;
; All registers preserved
;
 
XCSR = 177564
XBUF = 177566
 
kprchr: tstb @#XCSR
bpl kprchr
movb r0,@#XBUF
1$: tstb @#XCSR
bpl 1$
rts pc
/defs_rk.mac
0,0 → 1,71
; $Id: defs_rk.mac 667 2015-04-18 20:16:05Z mueller $
; Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
;
; definitions for RK11 controler (as in defs_rk.das)
;
; register addresses
;
rk.ds=177400
rk.er=177402
rk.cs=177404
rk.wc=177406
rk.ba=177410
rk.da=177412
rk.mr=177414
;
; symbol definitions for rk.cs
;
rk.err=100000
rk.he=040000
rk.scp=020000
rk.mai=010000
rk.iba=004000
rk.fmt=002000
rk.rwa=001000
rk.sse=000400
rk.rdy=000200
rk.ie=000100
rk.fwr=000002
rk.frd=000004
rk.fwc=000006
rk.fse=000010
rk.frc=000012
rk.fdr=000014
rk.fwl=000016
rk.go=000001
;
; symbol definitions for rk.ds
;
rk.id1=020000
rk.id2=040000
rk.id3=060000
rk.id4=100000
rk.id5=120000
rk.id6=140000
rk.id7=160000
rk.dpl=010000
rk.hde=004000
rk.dru=002000
rk.sin=001000
rk.sok=000400
rk.dry=000200
rk.ary=000100
rk.wps=000040
rk.seq=000020
;
; symbol definitions for rk.er
;
rk.dre=100000
rk.ovr=040000
rk.wlo=020000
rk.ske=010000
rk.pce=004000
rk.nxm=002000
rk.dlt=001000
rk.rte=000400
rk.nxd=000200
rk.nxc=000100
rk.nxs=000040
rk.cse=000002
rk.wce=000001
/.
. Property changes : Added: svn:ignore ## -0,0 +1,42 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb

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