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  • This comparison shows the changes necessary to convert path 
    /w11/tags/w11a_V0.74/tools/tbench/tm11
    from Rev 35 to Rev 38
    ↔ Reverse comparison
  •

Rev 35 → Rev 38

/test_tm11_int.tcl
0,0 → 1,159
# $Id: test_tm11_int.tcl 704 2015-07-25 14:18:03Z mueller $
#
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2015-07-25 704 1.0.1 tmpproc_dotest: use args rather opts
# 2015-05-17 683 1.0 Initial version
#
# Test interrupt response
# A:
 
# ----------------------------------------------------------------------------
rlc log "test_tm11_int: test interrupt response ------------------------------"
rlc log " setup: all units online"
package require ibd_tm11
ibd_tm11::setup
 
rlc set statmask $rw11::STAT_DEFMASK
rlc set statvalue 0
 
# configure drives
set rsronl [regbld ibd_tm11::RRL {onl 1} {bot 1}]
$cpu cp -wibr "tma.cr" [ibd_tm11::rcr_wunit 0] \
-wibr "tma.rl" $rsronl \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 1] \
-wibr "tma.rl" $rsronl \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 2] \
-wibr "tma.rl" $rsronl \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 3] \
-wibr "tma.rl" $rsronl
 
# load test code
$cpu ldasm -lst lst -sym sym {
.include |lib/defs_cpu.mac|
.include |lib/defs_tm.mac|
;
.include |lib/vec_cpucatch.mac|
;
. = 000224 ; setup TM11 interrupt vector
v..tm: .word vh.tm
.word cp.pr7
;
. = 1000 ; data area
stack:
ibuf: .blkw 3. ; input buffer
obuf: .blkw 5. ; output buffer
fbuf: .blkw 4. ; final buffer
;
. = 2000 ; code area
start: spl 7 ; lock out interrupts
;
mov #obuf,r0 ; clear obuf
clr (r0)+
clr (r0)+
clr (r0)+
clr (r0)+
clr (r0)+
;
mov #ibuf,r0 ; setup regs from ibuf
mov (r0)+,@#tm.bc ; bc
mov (r0)+,@#tm.ba ; ba
mov (r0)+,@#tm.cr ; cr
spl 0 ; allow interrupts
;
poll: tstb @#tm.cr ; check cr
bpl poll ; if rdy=0 keep polling
;
4$: mov #fbuf,r0 ; store final regs in fbuf
mov @#tm.sr,(r0)+ ; sr
mov @#tm.cr,(r0)+ ; cr
mov @#tm.bc,(r0)+ ; bc
mov @#tm.ba,(r0)+ ; ba
 
halt ; halt if done
stop:
 
; TM11 interrupt handler
vh.tm: mov #obuf,r0 ; store regs in obuf
mov #1,(r0)+ ; flag
mov @#tm.sr,(r0)+ ; sr
mov @#tm.cr,(r0)+ ; cr
mov @#tm.bc,(r0)+ ; bc
mov @#tm.ba,(r0)+ ; ba
rti ; and return
}
 
##puts $lst
 
# define tmpproc for readback checks
proc tmpproc_dotest {cpu symName args} {
upvar 1 $symName sym
 
set tout 10.; # FIXME_code: parameter ??
 
# setup defs hash, first defaults, than write over concrete run values
args2opts opts {i.cr 0 \
i.bc 0 \
i.ba 0 \
o.sr 0 \
o.cr 0 \
o.bc 0 \
o.ba 0 \
do.lam 0 } {*}$args
 
# build ibuf
set ibuf [list $opts(i.bc) $opts(i.ba) $opts(i.cr)]
 
# setup write ibuf, setup stack, and start cpu at start:
$cpu cp -wal $sym(ibuf) \
-bwm $ibuf \
-wsp $sym(stack) \
-stapc $sym(start)
 
# here do minimal lam handling (harvest + send DONE)
if {$opts(do.lam)} {
rlc wtlam $tout apat
$cpu cp -attn \
-wibr tma.cs [ibd_rhrp::cr_func $ibd_tm11::RFUNC_DONE]
}
 
$cpu wtcpu -reset $tout
 
# determine regs after cleanup
$cpu cp -rpc -edata $sym(stop) \
-rsp -edata $sym(stack) \
-wal $sym(obuf) \
-rmi -edata 1 \
-rmi -edata $opts(o.sr) \
-rmi -edata $opts(o.cr) \
-rmi -edata $opts(o.bc) \
-rmi -edata $opts(o.ba) \
-wal $sym(fbuf) \
-rmi -edata $opts(o.sr) \
-rmi -edata $opts(o.cr) \
-rmi -edata $opts(o.bc) \
-rmi -edata $opts(o.ba)
 
return ""
}
 
# discard pending attn to be on save side
rlc wtlam 0.
rlc exec -attn
 
# -- Section A ---------------------------------------------------------------
rlc log " A1.1 set cr.ie=1 -> software interrupt -------------"
 
tmpproc_dotest $cpu sym \
i.cr [regbld ibd_tm11::CR ie] \
i.bc 0xff00 \
i.ba 0x8800 \
o.sr [regbld ibd_tm11::SR onl bot tur] \
o.cr [regbld ibd_tm11::CR rdy ie] \
o.bc 0xff00 \
o.ba 0x8800
 
 
/tm11_all.dat
0,0 → 1,6
# $Id: tm11_all.dat 683 2015-05-17 21:54:35Z mueller $
#
## steering file for all tm11 tests
#
test_tm11_regs.tcl
test_tm11_int.tcl
/test_tm11_regs.tcl
0,0 → 1,175
# $Id: test_tm11_regs.tcl 683 2015-05-17 21:54:35Z mueller $
#
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2015-05-17 683 1.0 Initial version
#
# Test register response
# A: register basics
 
# ----------------------------------------------------------------------------
rlc log "test_tm11_regs: test register response ------------------------------"
package require ibd_tm11
ibd_tm11::setup
 
rlc set statmask $rw11::STAT_DEFMASK
rlc set statvalue 0
 
# -- Section A ---------------------------------------------------------------
rlc log " A1: test read ---------------------------------------------"
rlc log " A1.1: loc read sr,...,rl ---------------------------"
 
$cpu cp -rma tma.sr \
-rma tma.cr \
-rma tma.bc \
-rma tma.ba \
-rma tma.db \
-rma tma.rl
 
rlc log " A1.2: rem read sr,...,rl ---------------------------"
 
$cpu cp -ribr tma.sr \
-ribr tma.cr \
-ribr tma.bc \
-ribr tma.ba \
-ribr tma.db \
-ribr tma.rl
 
rlc log " A1.3: test that rl+2,+4 gives no ack (loc) ---------"
 
set iaddr2 [expr {[cpu0 imap tma.rl] + 2}]
set iaddr4 [expr {[cpu0 imap tma.rl] + 4}]
 
$cpu cp -ribr $iaddr2 -estaterr \
-ribr $iaddr4 -estaterr
 
# -- Section B ---------------------------------------------------------------
rlc log " B1: test sr setup -------------------------------------------------"
 
rlc log " B1.1: rem write via rl -----------------------------"
# setup units with eof=!u1 eot=!u0 onl=1 bot=u0 wrl=u1
set rsr0 [regbld ibd_tm11::RRL {eof 1} {eot 1} {onl 1} {bot 0} {wrl 0} {unit 0}]
set rsr1 [regbld ibd_tm11::RRL {eof 1} {eot 0} {onl 1} {bot 1} {wrl 0} {unit 1}]
set rsr2 [regbld ibd_tm11::RRL {eof 0} {eot 1} {onl 1} {bot 0} {wrl 1} {unit 2}]
set rsr3 [regbld ibd_tm11::RRL {eof 0} {eot 0} {onl 1} {bot 1} {wrl 1} {unit 3}]
# on readback SR has tur=1
set sr0 [regbld ibd_tm11::SR {eof 1} {eot 1} {onl 1} {bot 0} {wrl 0} {tur 1}]
set sr1 [regbld ibd_tm11::SR {eof 1} {eot 0} {onl 1} {bot 1} {wrl 0} {tur 1}]
set sr2 [regbld ibd_tm11::SR {eof 0} {eot 1} {onl 1} {bot 0} {wrl 1} {tur 1}]
set sr3 [regbld ibd_tm11::SR {eof 0} {eot 0} {onl 1} {bot 1} {wrl 1} {tur 1}]
set sr7 [regbld ibd_tm11::SR {tur 1}]
 
$cpu cp -wibr "tma.cr" [ibd_tm11::rcr_wunit 0] \
-wibr "tma.rl" $rsr0 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 1] \
-wibr "tma.rl" $rsr1 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 2] \
-wibr "tma.rl" $rsr2 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 3] \
-wibr "tma.rl" $rsr3
 
rlc log " B1.2: rem read via rl ------------------------------"
 
$cpu cp -wibr "tma.cr" [ibd_tm11::rcr_wunit 0] \
-ribr "tma.rl" -edata $rsr0 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 1] \
-ribr "tma.rl" -edata $rsr1 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 2] \
-ribr "tma.rl" -edata $rsr2 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 3] \
-ribr "tma.rl" -edata $rsr3
 
rlc log " B1.3: loc read via sr ------------------------------"
 
$cpu cp -wma "tma.cr" [regbld ibd_tm11::CR {unit 0}]\
-rma "tma.sr" -edata $sr0 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 1}]\
-rma "tma.sr" -edata $sr1 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 2}]\
-rma "tma.sr" -edata $sr2 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 3}]\
-rma "tma.sr" -edata $sr3
 
rlc log " B1.4: ensure unit 4,..,7 signal offline ------------"
 
$cpu cp -wma "tma.cr" [regbld ibd_tm11::CR {unit 4}]\
-rma "tma.sr" -edata $sr7 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 5}]\
-rma "tma.sr" -edata $sr7 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 6}]\
-rma "tma.sr" -edata $sr7 \
-wma "tma.cr" [regbld ibd_tm11::CR {unit 7}]\
-rma "tma.sr" -edata $sr7
 
rlc log " B1.5: setup unit 0:3 as onl=1 bot=1 ----------------"
 
# use use ONL=1 BOT=1 for all units -> no error flags
set rsr0 [regbld ibd_tm11::RRL {onl 1} {bot 1} {unit 0}]
set rsr1 [regbld ibd_tm11::RRL {onl 1} {bot 1} {unit 1}]
set rsr2 [regbld ibd_tm11::RRL {onl 1} {bot 1} {unit 2}]
set rsr3 [regbld ibd_tm11::RRL {onl 1} {bot 1} {unit 3}]
# on readback SR has tur=1
set sr0 [regbld ibd_tm11::SR {onl 1} {bot 1} {tur 1}]
set sr1 [regbld ibd_tm11::SR {onl 1} {bot 1} {tur 1}]
set sr2 [regbld ibd_tm11::SR {onl 1} {bot 1} {tur 1}]
set sr3 [regbld ibd_tm11::SR {onl 1} {bot 1} {tur 1}]
$cpu cp -wibr "tma.cr" [ibd_tm11::rcr_wunit 0] \
-wibr "tma.rl" $rsr0 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 1] \
-wibr "tma.rl" $rsr1 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 2] \
-wibr "tma.rl" $rsr2 \
-wibr "tma.cr" [ibd_tm11::rcr_wunit 3] \
-wibr "tma.rl" $rsr3
 
rlc log " B2.1: loc write loc/rem read of cr -----------------"
# test all cr fields except ie and go (no interrupts and functions yet)
set crlist [list \
[regbld ibd_tm11::CR {den 0} {pevn 0} {unit 0} {ea 0} {func 0}] \
[regbld ibd_tm11::CR {den 3} {pevn 0} {unit 0} {ea 0} {func 0}] \
[regbld ibd_tm11::CR {den 3} {pevn 1} {unit 0} {ea 0} {func 0}] \
[regbld ibd_tm11::CR {den 3} {pevn 1} {unit 7} {ea 0} {func 0}] \
[regbld ibd_tm11::CR {den 3} {pevn 1} {unit 3} {ea 3} {func 0}] \
[regbld ibd_tm11::CR {den 3} {pevn 1} {unit 3} {ea 3} {func 7}] \
]
foreach cr $crlist {
# on cr read here always rdy=1
set crread [expr {$cr | [regbld ibd_tm11::CR {rdy 1}] } ]
$cpu cp -wma "tma.cr" $cr \
-rma "tma.cr" -edata $crread \
-ribr "tma.cr" -edata $crread
}
 
rlc log " B3.1: loc write loc/rem read for bc,ba -------------"
# Note: ba ignores bit 0, only word addresses
$cpu cp -wma "tma.bc" 0x0010 \
-wma "tma.ba" 0x0020 \
-rma "tma.bc" -edata 0x0010 \
-rma "tma.ba" -edata 0x0020 \
-ribr "tma.bc" -edata 0x0010 \
-ribr "tma.ba" -edata 0x0020
$cpu cp -wma "tma.bc" 0x8888 \
-wma "tma.ba" 0x7777 \
-rma "tma.bc" -edata 0x8888 \
-rma "tma.ba" -edata 0x7776 \
-ribr "tma.bc" -edata 0x8888 \
-ribr "tma.ba" -edata 0x7776
 
rlc log " B3.2: rem write loc/rem read for bc,ba -------------"
 
$cpu cp -wibr "tma.bc" 0x1234 \
-wibr "tma.ba" 0x4321 \
-rma "tma.bc" -edata 0x1234 \
-rma "tma.ba" -edata 0x4320 \
-ribr "tma.bc" -edata 0x1234 \
-ribr "tma.ba" -edata 0x4320
$cpu cp -wibr "tma.bc" 0x0000 \
-wibr "tma.ba" 0x0000 \
-rma "tma.bc" -edata 0x0000 \
-rma "tma.ba" -edata 0x0000 \
-ribr "tma.bc" -edata 0x0000 \
-ribr "tma.ba" -edata 0x0000
/.
. Property changes : Added: svn:ignore ## -0,0 +1,42 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb

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