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Rev 37 → Rev 38

/setup_packages
0,0 → 1,32
#! /usr/bin/env tclshcpp
# $Id: setup_packages 741 2016-03-12 23:49:03Z mueller $
#
pkg_mkIndex -verbose ../lib \
librlinktpp.so \
librusbtpp.so \
librutiltpp.so \
librwxxtpp.so
#
pkg_mkIndex -verbose rutil *.tcl
pkg_mkIndex -verbose rlink *.tcl
pkg_mkIndex -verbose rbtest *.tcl
pkg_mkIndex -verbose rbmoni *.tcl
pkg_mkIndex -verbose rbbram *.tcl
pkg_mkIndex -verbose rbs3hio *.tcl
pkg_mkIndex -verbose rbemon *.tcl
pkg_mkIndex -verbose rbsysmon *.tcl
#
pkg_mkIndex -verbose rw11 *.tcl
pkg_mkIndex -verbose rw11util *.tcl
#
pkg_mkIndex -verbose ibd_dl11 *.tcl
pkg_mkIndex -verbose ibd_ibmon *.tcl
pkg_mkIndex -verbose ibd_lp11 *.tcl
pkg_mkIndex -verbose ibd_pc11 *.tcl
pkg_mkIndex -verbose ibd_rhrp *.tcl
pkg_mkIndex -verbose ibd_rk11 *.tcl
pkg_mkIndex -verbose ibd_rl11 *.tcl
pkg_mkIndex -verbose ibd_tm11 *.tcl
#
pkg_mkIndex -verbose tst_rlink *.tcl
pkg_mkIndex -verbose tst_sram *.tcl
setup_packages Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: tst_sram/.cvsignore =================================================================== --- tst_sram/.cvsignore (nonexistent) +++ tst_sram/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: tst_sram/test_all.tcl =================================================================== --- tst_sram/test_all.tcl (nonexistent) +++ tst_sram/test_all.tcl (revision 38) @@ -0,0 +1,120 @@ +# $Id: test_all.tcl 785 2016-07-10 12:22:41Z mueller $ +# +# Copyright 2014-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-07-09 784 2.1 add test_all test driver +# 2014-11-23 606 2.0 use new rlink v4 iface +# 2014-08-14 582 1.0 Initial version +# + +package provide tst_sram 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval tst_sram { + # + # test_all: Driver for all tst_sram tests + # + proc test_all {{tout 10.}} { + # + set errcnt 0 + tst_sram::init + incr errcnt [test_regs] + incr errcnt [test_seq $tout] + + puts "tst_sram::test_all errcnt = $errcnt --> [rutil::errcnt2txt $errcnt]" + return $errcnt + } + + # + # test_sim: test suite for sim tests --------------------------------------- + # port of cmd_tst_sram_stress_sim.dat + # + proc test_sim {} { + rlink::anena 1; # enable attn notify + rlc exec -attn; # harvest spurious attn + init + scmd_write [test_scmdlist] + + set lmdi {0x0000 0x0000 \ + 0xffff 0xffff \ + 0x0000 0xffff \ + 0xffff 0x0000 \ + 0xaaaa 0xaaaa \ + 0x5555 0x5555 } + + set lmaddr {0x0000 0x0000 \ + 0x0003 0xffff \ + 0x0000 0xffff \ + 0x000f 0x0000 \ + 0x000a 0xaaaa \ + 0x0005 0x5555 } + + set lmaddr_ran {} + for {set i 0} { $i < 3 } {incr i} { + lappend lmaddr_ran [expr {int(65536*rand()) & 0x000f}] + lappend lmaddr_ran [expr {int(65536*rand()) & 0xffff}] + } + + srun_lists $lmdi $lmaddr + srun_lists $lmdi $lmaddr_ran + return "" + } + # + # test_fpga: test suite for fpga tests ------------------------------------- + # port of cmd_tst_sram_stress_fpga.dat + # + proc test_fpga {{wide -1} {tout 1000.}} { + rlink::anena 1; # enable attn notify + rlc exec -attn; # harvest spurious attn + init + scmd_write [test_scmdlist] + + set lmdi {0x0000 0x0000 \ + 0xffff 0xffff \ + 0x0000 0xffff \ + 0xffff 0x0000 \ + 0xaaaa 0xaaaa \ + 0x5555 0x5555 \ + 0x1e25 0x4e58 \ + 0xa9d8 0xd6d4 \ + 0xbcbd 0x0815 \ + 0x7424 0x7466 } + + set lmdi_ran {} + for {set i 0} { $i < 3 } {incr i} { + lappend lmdi_ran [expr {int(65536*rand()) & 0xffff}] + lappend lmdi_ran [expr {int(65536*rand()) & 0xffff}] + } + + if {$wide < 0} { set wide [iswide] } + + set maddrh 0x0000 + set maddrl 0x0000 + if {[rlink::issim]} { + set maddrh [expr {$wide ? 0x003f : 0x0003}] + set maddrl 0xfffc + } + + foreach {mdih mdil} $lmdi { + srun_loop $mdih $mdil $maddrh $maddrl $wide $tout + } + foreach {mdih mdil} $lmdi_ran { + srun_loop $mdih $mdil $maddrh $maddrl $wide $tout + } + return "" + } +} Index: tst_sram/test_regs.tcl =================================================================== --- tst_sram/test_regs.tcl (nonexistent) +++ tst_sram/test_regs.tcl (revision 38) @@ -0,0 +1,346 @@ +# $Id: test_regs.tcl 785 2016-07-10 12:22:41Z mueller $ +# +# Copyright 2016- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-07-10 785 1.1 add memory test (touch evenly distributed addr) +# 2016-07-09 784 1.0 Initial version (ported from tb_tst_sram_stim.dat) +# + +package provide tst_sram 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval tst_sram { + # + # test_regs: Test registers: mdi*,mdo*,maddr*,mcmd,mblk,sblk* + # and saddr,slim,sblk* + # + proc test_regs {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "tst_sram::test_regs ---------------------------------------------" + rlc log " init: reset via init, clear sfail ect" + rlc exec -init sr.mdih 0x0003; # reset MEM,SEQ + # + #------------------------------------------------------------------------- + rlc log " test 1a: test mdi* ,maddr*" + rlc exec \ + -wreg sr.mdih 0x5555 \ + -wreg sr.mdil 0xaaaa \ + -wreg sr.maddrh 0x0001 \ + -wreg sr.maddrl 0xcccc \ + -rreg sr.mdih -edata 0x5555 \ + -rreg sr.mdil -edata 0xaaaa \ + -rreg sr.maddrh -edata 0x0001 \ + -rreg sr.maddrl -edata 0xcccc + # + #------------------------------------------------------------------------- + rlc log " test 1b: test maddrh range" + set maddrh_max [expr {[iswide] ? 0x3f : 0x03}] + rlc exec \ + -wreg sr.maddrh 0xffff \ + -rreg sr.maddrh -edata $maddrh_max + # + #------------------------------------------------------------------------- + rlc log " test 2: test direct memory write/read via mcmd" + # write mem(0) = 0xdeadbeaf; mem(1)=a5a55a5a + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mdih 0xdead \ + -wreg sr.mdil 0xbeaf \ + -wreg sr.mcmd [regbld tst_sram::MCMD we {be 0xf}] \ + -wreg sr.maddrl 0x0001 \ + -wreg sr.mdih 0xa5a5 \ + -wreg sr.mdil 0x5a5a \ + -wreg sr.mcmd [regbld tst_sram::MCMD we {be 0xf}] + # read back + rlc exec \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD {be 0xf}] \ + -rreg sr.mdoh -edata 0xdead \ + -rreg sr.mdol -edata 0xbeaf \ + -wreg sr.maddrl 0x0001 \ + -wreg sr.mcmd [regbld tst_sram::MCMD {be 0xf}] \ + -rreg sr.mdoh -edata 0xa5a5 \ + -rreg sr.mdol -edata 0x5a5a + # check that mdi* unchanged (value from last write) + rlc exec \ + -rreg sr.mdih -edata 0xa5a5 \ + -rreg sr.mdil -edata 0x5a5a + # verify that mcmd write only + rlc exec -rreg sr.mcmd -estaterr; # expect err on read + # + #------------------------------------------------------------------------- + rlc log " test 3: test block write/read via mblk" + # write 8 longwords, check maddrl incremented + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0010 \ + -wblk sr.mblk {0x3020 0x1000 \ + 0x3121 0x1101 \ + 0x3222 0x1202 \ + 0x3323 0x1303 \ + 0x3424 0x1404 \ + 0x3525 0x1505 \ + 0x3626 0x1606 \ + 0x3727 0x1707} \ + -rreg sr.maddrh -edata 0x0000 \ + -rreg sr.maddrl -edata 0x0018 + # read 8 longwords, check maddrl incremented + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0010 \ + -rblk sr.mblk 16 -edata {0x3020 0x1000 \ + 0x3121 0x1101 \ + 0x3222 0x1202 \ + 0x3323 0x1303 \ + 0x3424 0x1404 \ + 0x3525 0x1505 \ + 0x3626 0x1606 \ + 0x3727 0x1707} \ + -rreg sr.maddrh -edata 0x0000 \ + -rreg sr.maddrl -edata 0x0018 + # + #------------------------------------------------------------------------- + rlc log " test 4: mcmd: ld,inc and be functionality" + # use memory as setup by previous test + # overwrite bytes 12(0001)=42, 13(0010)=53, 14(0100)=64, 15(1000)=75 + rlc exec \ + -wreg sr.maddrh 0x0003 \ + -wreg sr.maddrl 0x0012 \ + -wreg sr.mdih 0xffff \ + -wreg sr.mdil 0xff42 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0x1} {addrh 0x0}] \ + -wreg sr.mdil 0x53ff \ + -wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x2} ] \ + -wreg sr.mdih 0xff64 \ + -wreg sr.mdil 0xffff \ + -wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x4} ] \ + -wreg sr.mdih 0x75ff \ + -wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x8} ] + # check load maddrh and increment of maddrl; read back and check + rlc exec \ + -rreg sr.maddrh -edata 0x0000 \ + -rreg sr.maddrl -edata 0x0016 \ + -wreg sr.maddrl 0x0010 \ + -rblk sr.mblk 16 -edata {0x3020 0x1000 \ + 0x3121 0x1101 \ + 0x3222 0x1242 \ + 0x3323 0x5303 \ + 0x3464 0x1404 \ + 0x7525 0x1505 \ + 0x3626 0x1606 \ + 0x3727 0x1707} + # + #------------------------------------------------------------------------- + rlc log " test 5: test saddr,slim,sblk,sblkc,sblkd" + # write/read saddr/slim + rlc exec \ + -wreg sr.slim 0x0123 \ + -wreg sr.saddr 0x0345 \ + -rreg sr.slim -edata 0x0123 \ + -rreg sr.saddr -edata 0x0345 + # sblk write of 8 lines, check saddr incremented + rlc exec \ + -wreg sr.saddr 0x0000 \ + -wblk sr.sblk {0x0300 0x0200 0x0100 0x0000 \ + 0x0301 0x0201 0x0101 0x0001 \ + 0x0302 0x0202 0x0102 0x0002 \ + 0x0303 0x0203 0x0103 0x0003 \ + 0x0304 0x0204 0x0104 0x0004 \ + 0x0305 0x0205 0x0105 0x0005 \ + 0x0306 0x0206 0x0106 0x0006 \ + 0x0307 0x0207 0x0107 0x0007 } \ + -rreg sr.saddr -edata 0x0008 + # sblk read back + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblk 32 -edata {0x0300 0x0200 0x0100 0x0000 \ + 0x0301 0x0201 0x0101 0x0001 \ + 0x0302 0x0202 0x0102 0x0002 \ + 0x0303 0x0203 0x0103 0x0003 \ + 0x0304 0x0204 0x0104 0x0004 \ + 0x0305 0x0205 0x0105 0x0005 \ + 0x0306 0x0206 0x0106 0x0006 \ + 0x0307 0x0207 0x0107 0x0007 } \ + -rreg sr.saddr -edata 0x0008 + # sblkc (over-)write of 4 lines (1-4) + rlc exec \ + -wreg sr.saddr 0x0001 \ + -wblk sr.sblkc {0x1301 0x1201 \ + 0x1302 0x1202 \ + 0x1303 0x1203 \ + 0x1304 0x1204 } \ + -rreg sr.saddr -edata 0x0005 + # sblkd (over-)write of 4 lines (3-6) + rlc exec \ + -wreg sr.saddr 0x0003 \ + -wblk sr.sblkd {0x2103 0x2003 \ + 0x2104 0x2004 \ + 0x2105 0x2005 \ + 0x2106 0x2006 } \ + -rreg sr.saddr -edata 0x0007 + # sblk read back of all 8 lines, verify c and d updates + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblk 32 -edata {0x0300 0x0200 0x0100 0x0000 \ + 0x1301 0x1201 0x0101 0x0001 \ + 0x1302 0x1202 0x0102 0x0002 \ + 0x1303 0x1203 0x2103 0x2003 \ + 0x1304 0x1204 0x2104 0x2004 \ + 0x0305 0x0205 0x2105 0x2005 \ + 0x0306 0x0206 0x2106 0x2006 \ + 0x0307 0x0207 0x0107 0x0007} \ + -rreg sr.saddr -edata 0x0008 + # sblkc read back of all 8 lines + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblkc 16 -edata {0x0300 0x0200 \ + 0x1301 0x1201 \ + 0x1302 0x1202 \ + 0x1303 0x1203 \ + 0x1304 0x1204 \ + 0x0305 0x0205 \ + 0x0306 0x0206 \ + 0x0307 0x0207} \ + -rreg sr.saddr -edata 0x0008 + # sblkd read back of all 8 lines + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblkd 16 -edata {0x0100 0x0000 \ + 0x0101 0x0001 \ + 0x0102 0x0002 \ + 0x2103 0x2003 \ + 0x2104 0x2004 \ + 0x2105 0x2005 \ + 0x2106 0x2006 \ + 0x0107 0x0007} \ + -rreg sr.saddr -edata 0x0008 + # + #------------------------------------------------------------------------- + rlc log " test 5: test sstat bits" + set sm [rutil::com16 [regbld tst_sram::SSTAT wide]] + rlc exec \ + -wreg sr.sstat 0 \ + -rreg sr.sstat -edata 0 $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT veri ] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT veri ] $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT xora ] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT xora ] $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT xord ] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT xord ] $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT loop ] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT loop ] $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT wloop] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT wloop] $sm \ + -wreg sr.sstat [regbld tst_sram::SSTAT wswap] \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT wswap] $sm + # + #------------------------------------------------------------------------- + rlc log " test 6: test memory (touch 5(+5) evenly spaced addresses)" + # writes + # 18bit: 0x000000 0x010001 0x020002 0x030003 0x03ffff + rlc exec \ + -wreg sr.mdih 0x5500 \ + -wreg sr.mdil 0xaa00 \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x00}] \ + -wreg sr.mdih 0x5501 \ + -wreg sr.mdil 0xaa01 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x01}] \ + -wreg sr.mdih 0x5502 \ + -wreg sr.mdil 0xaa02 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x02}] \ + -wreg sr.mdih 0x5503 \ + -wreg sr.mdil 0xaa03 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x03}] \ + -rreg sr.maddrl -edata 0x0004 \ + -wreg sr.mdih 0x5504 \ + -wreg sr.mdil 0xaa04 \ + -wreg sr.maddrl 0xffff \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld we {be 0xf} {addrh 0x03}] + # 22bit: 0x040000 0x100001 0x200002 0x300003 0x3fffff + if {[iswide]} { + rlc exec \ + -wreg sr.mdih 0xa500 \ + -wreg sr.mdil 0x5a00 \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x04}] \ + -wreg sr.mdih 0x5a01 \ + -wreg sr.mdil 0x5a01 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x10}] \ + -wreg sr.mdih 0x5a02 \ + -wreg sr.mdil 0x5a02 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x20}] \ + -wreg sr.mdih 0x5a03 \ + -wreg sr.mdil 0x5a03 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x30}] \ + -rreg sr.maddrl -edata 0x0004 \ + -wreg sr.mdih 0x5a04 \ + -wreg sr.mdil 0x5a04 \ + -wreg sr.maddrl 0xffff \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld we {be 0xf} {addrh 0x3f}] + } + # reads + rlc exec \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x00}] \ + -rreg sr.mdoh -edata 0x5500 \ + -rreg sr.mdol -edata 0xaa00 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x01}] \ + -rreg sr.mdoh -edata 0x5501 \ + -rreg sr.mdol -edata 0xaa01 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x02}] \ + -rreg sr.mdoh -edata 0x5502 \ + -rreg sr.mdol -edata 0xaa02 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x03}] \ + -rreg sr.mdoh -edata 0x5503 \ + -rreg sr.mdol -edata 0xaa03 \ + -rreg sr.maddrl -edata 0x0004 \ + -wreg sr.maddrl 0xffff \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x03}] \ + -rreg sr.mdoh -edata 0x5504 \ + -rreg sr.mdol -edata 0xaa04 + if {[iswide]} { + rlc exec \ + -wreg sr.maddrl 0x0000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x04}] \ + -rreg sr.mdoh -edata 0xa500 \ + -rreg sr.mdol -edata 0x5a00 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x10}] \ + -rreg sr.mdoh -edata 0x5a01 \ + -rreg sr.mdol -edata 0x5a01 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x20}] \ + -rreg sr.mdoh -edata 0x5a02 \ + -rreg sr.mdol -edata 0x5a02 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x30}] \ + -rreg sr.mdoh -edata 0x5a03 \ + -rreg sr.mdol -edata 0x5a03 \ + -rreg sr.maddrl -edata 0x0004 \ + -wreg sr.maddrl 0xffff \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x3f}] \ + -rreg sr.mdoh -edata 0x5a04 \ + -rreg sr.mdol -edata 0x5a04 + } + # + #------------------------------------------------------------------------- + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: tst_sram/test_scmdlist.tcl =================================================================== --- tst_sram/test_scmdlist.tcl (nonexistent) +++ tst_sram/test_scmdlist.tcl (revision 38) @@ -0,0 +1,690 @@ +# $Id: test_scmdlist.tcl 784 2016-07-09 22:17:01Z mueller $ +# +# Copyright 2014- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-08-14 582 1.0 Initial version +# + +package provide tst_sram 1.0 + +namespace eval tst_sram { + # + # test_scmdlist: default scmd list ----------------------------------------- + # was converted with conv_sblk from cmd_tst_sram_stress_sblk.dat + # + proc test_scmdlist {} { + set clist {} + ## C Setup Memory stress test + ## C write 16 unique byte patterns (and verify) + lappend clist { 0 w 1111 0x000000 0x30201000}; + lappend clist { 0 w 1111 0x000001 0x31211101}; + lappend clist { 0 w 1111 0x000002 0x32221202}; + lappend clist { 0 w 1111 0x000003 0x33231303}; + lappend clist { 0 w 1111 0x000004 0x34241404}; + lappend clist { 0 w 1111 0x000005 0x35251505}; + lappend clist { 0 w 1111 0x000006 0x36261606}; + lappend clist { 0 w 1111 0x000007 0x37271707}; + lappend clist { 0 w 1111 0x000008 0x38281808}; + lappend clist { 0 w 1111 0x000009 0x39291909}; + lappend clist { 0 w 1111 0x00000a 0x3a2a1a0a}; + lappend clist { 0 w 1111 0x00000b 0x3b2b1b0b}; + lappend clist { 0 w 1111 0x00000c 0x3c2c1c0c}; + lappend clist { 0 w 1111 0x00000d 0x3d2d1d0d}; + lappend clist { 0 w 1111 0x00000e 0x3e2e1e0e}; + lappend clist { 0 w 1111 0x00000f 0x3f2f1f0f}; + lappend clist { 0 r 1111 0x000000 0x30201000}; + lappend clist { 0 r 1111 0x000001 0x31211101}; + lappend clist { 0 r 1111 0x000002 0x32221202}; + lappend clist { 0 r 1111 0x000003 0x33231303}; + lappend clist { 0 r 1111 0x000004 0x34241404}; + lappend clist { 0 r 1111 0x000005 0x35251505}; + lappend clist { 0 r 1111 0x000006 0x36261606}; + lappend clist { 0 r 1111 0x000007 0x37271707}; + lappend clist { 0 r 1111 0x000008 0x38281808}; + lappend clist { 0 r 1111 0x000009 0x39291909}; + lappend clist { 0 r 1111 0x00000a 0x3a2a1a0a}; + lappend clist { 0 r 1111 0x00000b 0x3b2b1b0b}; + lappend clist { 0 r 1111 0x00000c 0x3c2c1c0c}; + lappend clist { 0 r 1111 0x00000d 0x3d2d1d0d}; + lappend clist { 0 r 1111 0x00000e 0x3e2e1e0e}; + lappend clist { 0 r 1111 0x00000f 0x3f2f1f0f}; + ## C single byte writes, all 16 pattern (and verify) + lappend clist { 0 w 0000 0x000000 0x70605040}; + lappend clist { 0 w 0001 0x000001 0x71615141}; + lappend clist { 0 w 0010 0x000002 0x72625242}; + lappend clist { 0 w 0011 0x000003 0x73635343}; + lappend clist { 0 w 0100 0x000004 0x74645444}; + lappend clist { 0 w 0101 0x000005 0x75655545}; + lappend clist { 0 w 0110 0x000006 0x76665646}; + lappend clist { 0 w 0111 0x000007 0x77675747}; + lappend clist { 0 w 1000 0x000008 0x78685848}; + lappend clist { 0 w 1001 0x000009 0x79695949}; + lappend clist { 0 w 1010 0x00000a 0x7a6a5a4a}; + lappend clist { 0 w 1011 0x00000b 0x7b6b5b4b}; + lappend clist { 0 w 1100 0x00000c 0x7c6c5c4c}; + lappend clist { 0 w 1101 0x00000d 0x7d6d5d4d}; + lappend clist { 0 w 1110 0x00000e 0x7e6e5e4e}; + lappend clist { 0 w 1111 0x00000f 0x7f6f5f4f}; + lappend clist { 0 r 1111 0x000000 0x30201000}; + lappend clist { 0 r 1111 0x000001 0x31211141}; + lappend clist { 0 r 1111 0x000002 0x32225202}; + lappend clist { 0 r 1111 0x000003 0x33235343}; + lappend clist { 0 r 1111 0x000004 0x34641404}; + lappend clist { 0 r 1111 0x000005 0x35651545}; + lappend clist { 0 r 1111 0x000006 0x36665606}; + lappend clist { 0 r 1111 0x000007 0x37675747}; + lappend clist { 0 r 1111 0x000008 0x78281808}; + lappend clist { 0 r 1111 0x000009 0x79291949}; + lappend clist { 0 r 1111 0x00000a 0x7a2a5a0a}; + lappend clist { 0 r 1111 0x00000b 0x7b2b5b4b}; + lappend clist { 0 r 1111 0x00000c 0x7c6c1c0c}; + lappend clist { 0 r 1111 0x00000d 0x7d6d1d4d}; + lappend clist { 0 r 1111 0x00000e 0x7e6e5e0e}; + lappend clist { 0 r 1111 0x00000f 0x7f6f5f4f}; + ## C write various 0-1 transition patterns (and verify) + lappend clist { 0 w 1111 0x000010 0x00000000}; + lappend clist { 0 w 1111 0x000011 0xffffffff}; + lappend clist { 0 w 1111 0x000012 0x00000000}; + lappend clist { 0 w 1111 0x000013 0xa5a5a5a5}; + lappend clist { 0 w 1111 0x000014 0x5a5a5a5a}; + lappend clist { 0 w 1111 0x000015 0x00000000}; + lappend clist { 0 w 1111 0x000016 0x0f0f0f0f}; + lappend clist { 0 w 1111 0x000017 0xf0f0f0f0}; + lappend clist { 0 w 1111 0x000018 0x00ff00ff}; + lappend clist { 0 w 1111 0x000019 0xff00ff00}; + lappend clist { 0 w 1111 0x00001a 0x0000ffff}; + lappend clist { 0 w 1111 0x00001b 0xffff0000}; + lappend clist { 0 w 1111 0x00001c 0x0ff00ff0}; + lappend clist { 0 w 1111 0x00001d 0xf00ff00f}; + lappend clist { 0 w 1111 0x00001e 0x01234567}; + lappend clist { 0 w 1111 0x00001f 0x89abcdef}; + lappend clist { 0 r 1111 0x000010 0x00000000}; + lappend clist { 0 r 1111 0x000011 0xffffffff}; + lappend clist { 0 r 1111 0x000012 0x00000000}; + lappend clist { 0 r 1111 0x000013 0xa5a5a5a5}; + lappend clist { 0 r 1111 0x000014 0x5a5a5a5a}; + lappend clist { 0 r 1111 0x000015 0x00000000}; + lappend clist { 0 r 1111 0x000016 0x0f0f0f0f}; + lappend clist { 0 r 1111 0x000017 0xf0f0f0f0}; + lappend clist { 0 r 1111 0x000018 0x00ff00ff}; + lappend clist { 0 r 1111 0x000019 0xff00ff00}; + lappend clist { 0 r 1111 0x00001a 0x0000ffff}; + lappend clist { 0 r 1111 0x00001b 0xffff0000}; + lappend clist { 0 r 1111 0x00001c 0x0ff00ff0}; + lappend clist { 0 r 1111 0x00001d 0xf00ff00f}; + lappend clist { 0 r 1111 0x00001e 0x01234567}; + lappend clist { 0 r 1111 0x00001f 0x89abcdef}; + ## C alternate read sequence of 0-1 transition patterns + lappend clist { 0 r 1111 0x000010 0x00000000}; + lappend clist { 0 r 1111 0x000011 0xffffffff}; + lappend clist { 0 r 1111 0x00001a 0x0000ffff}; + lappend clist { 0 r 1111 0x00001b 0xffff0000}; + lappend clist { 0 r 1111 0x000012 0x00000000}; + lappend clist { 0 r 1111 0x000013 0xa5a5a5a5}; + lappend clist { 0 r 1111 0x000011 0xffffffff}; + lappend clist { 0 r 1111 0x000014 0x5a5a5a5a}; + lappend clist { 0 r 1111 0x000015 0x00000000}; + lappend clist { 0 r 1111 0x000013 0xa5a5a5a5}; + lappend clist { 0 r 1111 0x000015 0x00000000}; + lappend clist { 0 r 1111 0x000014 0x5a5a5a5a}; + lappend clist { 0 r 1111 0x000017 0xf0f0f0f0}; + lappend clist { 0 r 1111 0x000016 0x0f0f0f0f}; + lappend clist { 0 r 1111 0x000019 0xff00ff00}; + lappend clist { 0 r 1111 0x000018 0x00ff00ff}; + lappend clist { 0 r 1111 0x00001d 0xf00ff00f}; + lappend clist { 0 r 1111 0x00001c 0x0ff00ff0}; + lappend clist { 0 r 1111 0x000010 0x00000000}; + lappend clist { 0 r 1111 0x00001e 0x01234567}; + lappend clist { 0 r 1111 0x00001a 0x0000ffff}; + lappend clist { 0 r 1111 0x00001f 0x89abcdef}; + lappend clist { 0 r 1111 0x00001b 0xffff0000}; + lappend clist { 0 r 1111 0x000012 0x00000000}; + lappend clist { 0 r 1111 0x00001f 0x89abcdef}; + lappend clist { 0 r 1111 0x000016 0x0f0f0f0f}; + lappend clist { 0 r 1111 0x000018 0x00ff00ff}; + lappend clist { 0 r 1111 0x000017 0xf0f0f0f0}; + lappend clist { 0 r 1111 0x000019 0xff00ff00}; + lappend clist { 0 r 1111 0x00001d 0xf00ff00f}; + lappend clist { 0 r 1111 0x00001c 0x0ff00ff0}; + lappend clist { 0 r 1111 0x00001e 0x01234567}; + ## C write alternating all-0 and all-1 at low and top addresses + lappend clist { 0 w 1111 0x000020 0x00000000}; + lappend clist { 0 w 1111 0x000021 0xffffffff}; + lappend clist { 0 w 1111 0x000022 0x00000000}; + lappend clist { 0 w 1111 0x000023 0xffffffff}; + lappend clist { 0 w 1111 0x000024 0x00000000}; + lappend clist { 0 w 1111 0x000025 0xffffffff}; + lappend clist { 0 w 1111 0x000026 0x00000000}; + lappend clist { 0 w 1111 0x000027 0xffffffff}; + lappend clist { 0 w 1111 0x000028 0x00000000}; + lappend clist { 0 w 1111 0x03fff9 0xffffffff}; + lappend clist { 0 w 1111 0x00002a 0x00000000}; + lappend clist { 0 w 1111 0x03fffb 0xffffffff}; + lappend clist { 0 w 1111 0x03fffc 0x00000000}; + lappend clist { 0 w 1111 0x00002d 0xffffffff}; + lappend clist { 0 w 1111 0x03fffe 0x00000000}; + lappend clist { 0 w 1111 0x00002f 0xffffffff}; + lappend clist { 0 w 1111 0x03fff0 0x00000000}; + lappend clist { 0 w 1111 0x03fff1 0xffffffff}; + lappend clist { 0 w 1111 0x03fff2 0x00000000}; + lappend clist { 0 w 1111 0x03fff3 0xffffffff}; + lappend clist { 0 w 1111 0x03fff4 0x00000000}; + lappend clist { 0 w 1111 0x03fff5 0xffffffff}; + lappend clist { 0 w 1111 0x03fff6 0x00000000}; + lappend clist { 0 w 1111 0x03fff7 0xffffffff}; + lappend clist { 0 w 1111 0x03fff8 0x00000000}; + lappend clist { 0 w 1111 0x000029 0xffffffff}; + lappend clist { 0 w 1111 0x03fffa 0x00000000}; + lappend clist { 0 w 1111 0x00002b 0xffffffff}; + lappend clist { 0 w 1111 0x00002c 0x00000000}; + lappend clist { 0 w 1111 0x03fffd 0xffffffff}; + lappend clist { 0 w 1111 0x00002e 0x00000000}; + lappend clist { 0 w 1111 0x03ffff 0xffffffff}; + ## C read alternating all-0 and all-1 sequence, only data bounce + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000022 0x00000000}; + lappend clist { 0 r 1111 0x000023 0xffffffff}; + lappend clist { 0 r 1111 0x000024 0x00000000}; + lappend clist { 0 r 1111 0x000025 0xffffffff}; + lappend clist { 0 r 1111 0x000026 0x00000000}; + lappend clist { 0 r 1111 0x000027 0xffffffff}; + lappend clist { 0 r 1111 0x000028 0x00000000}; + lappend clist { 0 r 1111 0x000029 0xffffffff}; + lappend clist { 0 r 1111 0x00002a 0x00000000}; + lappend clist { 0 r 1111 0x00002b 0xffffffff}; + lappend clist { 0 r 1111 0x00002c 0x00000000}; + lappend clist { 0 r 1111 0x00002d 0xffffffff}; + lappend clist { 0 r 1111 0x00002e 0x00000000}; + lappend clist { 0 r 1111 0x00002f 0xffffffff}; + lappend clist { 0 r 1111 0x03fff0 0x00000000}; + lappend clist { 0 r 1111 0x03fff1 0xffffffff}; + lappend clist { 0 r 1111 0x03fff2 0x00000000}; + lappend clist { 0 r 1111 0x03fff3 0xffffffff}; + lappend clist { 0 r 1111 0x03fff4 0x00000000}; + lappend clist { 0 r 1111 0x03fff5 0xffffffff}; + lappend clist { 0 r 1111 0x03fff6 0x00000000}; + lappend clist { 0 r 1111 0x03fff7 0xffffffff}; + lappend clist { 0 r 1111 0x03fff8 0x00000000}; + lappend clist { 0 r 1111 0x03fff9 0xffffffff}; + lappend clist { 0 r 1111 0x03fffa 0x00000000}; + lappend clist { 0 r 1111 0x03fffb 0xffffffff}; + lappend clist { 0 r 1111 0x03fffc 0x00000000}; + lappend clist { 0 r 1111 0x03fffd 0xffffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + ## C read alternating all-0 and all-1 sequence, addr and data bounce + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x03fff1 0xffffffff}; + lappend clist { 0 r 1111 0x000022 0x00000000}; + lappend clist { 0 r 1111 0x03fff3 0xffffffff}; + lappend clist { 0 r 1111 0x000024 0x00000000}; + lappend clist { 0 r 1111 0x03fff5 0xffffffff}; + lappend clist { 0 r 1111 0x000026 0x00000000}; + lappend clist { 0 r 1111 0x03fff7 0xffffffff}; + lappend clist { 0 r 1111 0x000028 0x00000000}; + lappend clist { 0 r 1111 0x000029 0xffffffff}; + lappend clist { 0 r 1111 0x03fffa 0x00000000}; + lappend clist { 0 r 1111 0x00002b 0xffffffff}; + lappend clist { 0 r 1111 0x03fffc 0x00000000}; + lappend clist { 0 r 1111 0x00002d 0xffffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00002f 0xffffffff}; + lappend clist { 0 r 1111 0x03fff0 0x00000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x03fff2 0x00000000}; + lappend clist { 0 r 1111 0x000023 0xffffffff}; + lappend clist { 0 r 1111 0x03fff4 0x00000000}; + lappend clist { 0 r 1111 0x000025 0xffffffff}; + lappend clist { 0 r 1111 0x03fff6 0x00000000}; + lappend clist { 0 r 1111 0x000027 0xffffffff}; + lappend clist { 0 r 1111 0x03fff8 0x00000000}; + lappend clist { 0 r 1111 0x03fff9 0xffffffff}; + lappend clist { 0 r 1111 0x00002a 0x00000000}; + lappend clist { 0 r 1111 0x03fffb 0xffffffff}; + lappend clist { 0 r 1111 0x00002c 0x00000000}; + lappend clist { 0 r 1111 0x03fffd 0xffffffff}; + lappend clist { 0 r 1111 0x00002e 0x00000000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + ## C write 32 words with single 1 bit (and verify) + lappend clist { 0 w 1111 0x000040 0x00000001}; + lappend clist { 0 w 1111 0x000041 0x00000002}; + lappend clist { 0 w 1111 0x000042 0x00000004}; + lappend clist { 0 w 1111 0x000043 0x00000008}; + lappend clist { 0 w 1111 0x000044 0x00000010}; + lappend clist { 0 w 1111 0x000045 0x00000020}; + lappend clist { 0 w 1111 0x000046 0x00000040}; + lappend clist { 0 w 1111 0x000047 0x00000080}; + lappend clist { 0 w 1111 0x000048 0x00000100}; + lappend clist { 0 w 1111 0x000049 0x00000200}; + lappend clist { 0 w 1111 0x00004a 0x00000400}; + lappend clist { 0 w 1111 0x00004b 0x00000800}; + lappend clist { 0 w 1111 0x00004c 0x00001000}; + lappend clist { 0 w 1111 0x00004d 0x00002000}; + lappend clist { 0 w 1111 0x00004e 0x00004000}; + lappend clist { 0 w 1111 0x00004f 0x00008000}; + lappend clist { 0 w 1111 0x000050 0x00010000}; + lappend clist { 0 w 1111 0x000051 0x00020000}; + lappend clist { 0 w 1111 0x000052 0x00040000}; + lappend clist { 0 w 1111 0x000053 0x00080000}; + lappend clist { 0 w 1111 0x000054 0x00100000}; + lappend clist { 0 w 1111 0x000055 0x00200000}; + lappend clist { 0 w 1111 0x000056 0x00400000}; + lappend clist { 0 w 1111 0x000057 0x00800000}; + lappend clist { 0 w 1111 0x000058 0x01000000}; + lappend clist { 0 w 1111 0x000059 0x02000000}; + lappend clist { 0 w 1111 0x00005a 0x04000000}; + lappend clist { 0 w 1111 0x00005b 0x08000000}; + lappend clist { 0 w 1111 0x00005c 0x10000000}; + lappend clist { 0 w 1111 0x00005d 0x20000000}; + lappend clist { 0 w 1111 0x00005e 0x40000000}; + lappend clist { 0 w 1111 0x00005f 0x80000000}; + lappend clist { 0 r 1111 0x000040 0x00000001}; + lappend clist { 0 r 1111 0x000041 0x00000002}; + lappend clist { 0 r 1111 0x000042 0x00000004}; + lappend clist { 0 r 1111 0x000043 0x00000008}; + lappend clist { 0 r 1111 0x000044 0x00000010}; + lappend clist { 0 r 1111 0x000045 0x00000020}; + lappend clist { 0 r 1111 0x000046 0x00000040}; + lappend clist { 0 r 1111 0x000047 0x00000080}; + lappend clist { 0 r 1111 0x000048 0x00000100}; + lappend clist { 0 r 1111 0x000049 0x00000200}; + lappend clist { 0 r 1111 0x00004a 0x00000400}; + lappend clist { 0 r 1111 0x00004b 0x00000800}; + lappend clist { 0 r 1111 0x00004c 0x00001000}; + lappend clist { 0 r 1111 0x00004d 0x00002000}; + lappend clist { 0 r 1111 0x00004e 0x00004000}; + lappend clist { 0 r 1111 0x00004f 0x00008000}; + lappend clist { 0 r 1111 0x000050 0x00010000}; + lappend clist { 0 r 1111 0x000051 0x00020000}; + lappend clist { 0 r 1111 0x000052 0x00040000}; + lappend clist { 0 r 1111 0x000053 0x00080000}; + lappend clist { 0 r 1111 0x000054 0x00100000}; + lappend clist { 0 r 1111 0x000055 0x00200000}; + lappend clist { 0 r 1111 0x000056 0x00400000}; + lappend clist { 0 r 1111 0x000057 0x00800000}; + lappend clist { 0 r 1111 0x000058 0x01000000}; + lappend clist { 0 r 1111 0x000059 0x02000000}; + lappend clist { 0 r 1111 0x00005a 0x04000000}; + lappend clist { 0 r 1111 0x00005b 0x08000000}; + lappend clist { 0 r 1111 0x00005c 0x10000000}; + lappend clist { 0 r 1111 0x00005d 0x20000000}; + lappend clist { 0 r 1111 0x00005e 0x40000000}; + lappend clist { 0 r 1111 0x00005f 0x80000000}; + ## C alternating read of 1 bit and all-1 word + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000040 0x00000001}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000041 0x00000002}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000042 0x00000004}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000043 0x00000008}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000044 0x00000010}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000045 0x00000020}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000046 0x00000040}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000047 0x00000080}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000048 0x00000100}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000049 0x00000200}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00004a 0x00000400}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00004b 0x00000800}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00004c 0x00001000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00004d 0x00002000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00004e 0x00004000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00004f 0x00008000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000050 0x00010000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000051 0x00020000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000052 0x00040000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000053 0x00080000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000054 0x00100000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000055 0x00200000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000056 0x00400000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000057 0x00800000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000058 0x01000000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000059 0x02000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00005a 0x04000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00005b 0x08000000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00005c 0x10000000}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00005d 0x20000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00005e 0x40000000}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00005f 0x80000000}; + ## C write 32 words with thermometer code (and verify) + lappend clist { 0 w 1111 0x000060 0x00000001}; + lappend clist { 0 w 1111 0x000061 0x00000003}; + lappend clist { 0 w 1111 0x000062 0x00000007}; + lappend clist { 0 w 1111 0x000063 0x0000000f}; + lappend clist { 0 w 1111 0x000064 0x0000001f}; + lappend clist { 0 w 1111 0x000065 0x0000003f}; + lappend clist { 0 w 1111 0x000066 0x0000007f}; + lappend clist { 0 w 1111 0x000067 0x000000ff}; + lappend clist { 0 w 1111 0x000068 0x000001ff}; + lappend clist { 0 w 1111 0x000069 0x000003ff}; + lappend clist { 0 w 1111 0x00006a 0x000007ff}; + lappend clist { 0 w 1111 0x00006b 0x00000fff}; + lappend clist { 0 w 1111 0x00006c 0x00001fff}; + lappend clist { 0 w 1111 0x00006d 0x00003fff}; + lappend clist { 0 w 1111 0x00006e 0x00007fff}; + lappend clist { 0 w 1111 0x00006f 0x0000ffff}; + lappend clist { 0 w 1111 0x000070 0x0001ffff}; + lappend clist { 0 w 1111 0x000071 0x0003ffff}; + lappend clist { 0 w 1111 0x000072 0x0007ffff}; + lappend clist { 0 w 1111 0x000073 0x000fffff}; + lappend clist { 0 w 1111 0x000074 0x001fffff}; + lappend clist { 0 w 1111 0x000075 0x003fffff}; + lappend clist { 0 w 1111 0x000076 0x007fffff}; + lappend clist { 0 w 1111 0x000077 0x00ffffff}; + lappend clist { 0 w 1111 0x000078 0x01ffffff}; + lappend clist { 0 w 1111 0x000079 0x03ffffff}; + lappend clist { 0 w 1111 0x00007a 0x07ffffff}; + lappend clist { 0 w 1111 0x00007b 0x0fffffff}; + lappend clist { 0 w 1111 0x00007c 0x1fffffff}; + lappend clist { 0 w 1111 0x00007d 0x3fffffff}; + lappend clist { 0 w 1111 0x00007e 0x7fffffff}; + lappend clist { 0 w 1111 0x00007f 0xffffffff}; + lappend clist { 0 r 1111 0x000060 0x00000001}; + lappend clist { 0 r 1111 0x000061 0x00000003}; + lappend clist { 0 r 1111 0x000062 0x00000007}; + lappend clist { 0 r 1111 0x000063 0x0000000f}; + lappend clist { 0 r 1111 0x000064 0x0000001f}; + lappend clist { 0 r 1111 0x000065 0x0000003f}; + lappend clist { 0 r 1111 0x000066 0x0000007f}; + lappend clist { 0 r 1111 0x000067 0x000000ff}; + lappend clist { 0 r 1111 0x000068 0x000001ff}; + lappend clist { 0 r 1111 0x000069 0x000003ff}; + lappend clist { 0 r 1111 0x00006a 0x000007ff}; + lappend clist { 0 r 1111 0x00006b 0x00000fff}; + lappend clist { 0 r 1111 0x00006c 0x00001fff}; + lappend clist { 0 r 1111 0x00006d 0x00003fff}; + lappend clist { 0 r 1111 0x00006e 0x00007fff}; + lappend clist { 0 r 1111 0x00006f 0x0000ffff}; + lappend clist { 0 r 1111 0x000070 0x0001ffff}; + lappend clist { 0 r 1111 0x000071 0x0003ffff}; + lappend clist { 0 r 1111 0x000072 0x0007ffff}; + lappend clist { 0 r 1111 0x000073 0x000fffff}; + lappend clist { 0 r 1111 0x000074 0x001fffff}; + lappend clist { 0 r 1111 0x000075 0x003fffff}; + lappend clist { 0 r 1111 0x000076 0x007fffff}; + lappend clist { 0 r 1111 0x000077 0x00ffffff}; + lappend clist { 0 r 1111 0x000078 0x01ffffff}; + lappend clist { 0 r 1111 0x000079 0x03ffffff}; + lappend clist { 0 r 1111 0x00007a 0x07ffffff}; + lappend clist { 0 r 1111 0x00007b 0x0fffffff}; + lappend clist { 0 r 1111 0x00007c 0x1fffffff}; + lappend clist { 0 r 1111 0x00007d 0x3fffffff}; + lappend clist { 0 r 1111 0x00007e 0x7fffffff}; + lappend clist { 0 r 1111 0x00007f 0xffffffff}; + ## C alternating read of thermometer code and all-1 word + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000060 0x00000001}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000061 0x00000003}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000062 0x00000007}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000063 0x0000000f}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000064 0x0000001f}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000065 0x0000003f}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000066 0x0000007f}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000067 0x000000ff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000068 0x000001ff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000069 0x000003ff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00006a 0x000007ff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00006b 0x00000fff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00006c 0x00001fff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00006d 0x00003fff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00006e 0x00007fff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00006f 0x0000ffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000070 0x0001ffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000071 0x0003ffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000072 0x0007ffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000073 0x000fffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000074 0x001fffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000075 0x003fffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000076 0x007fffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x000077 0x00ffffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000078 0x01ffffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x000079 0x03ffffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00007a 0x07ffffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00007b 0x0fffffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00007c 0x1fffffff}; + lappend clist { 0 r 1111 0x000021 0xffffffff}; + lappend clist { 0 r 1111 0x00007d 0x3fffffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00007e 0x7fffffff}; + lappend clist { 0 r 1111 0x03ffff 0xffffffff}; + lappend clist { 0 r 1111 0x00007f 0xffffffff}; + ## C alternating read of thermometer code and all-0 word + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000060 0x00000001}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000061 0x00000003}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000062 0x00000007}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000063 0x0000000f}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000064 0x0000001f}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000065 0x0000003f}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000066 0x0000007f}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000067 0x000000ff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000068 0x000001ff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000069 0x000003ff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00006a 0x000007ff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00006b 0x00000fff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x00006c 0x00001fff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x00006d 0x00003fff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00006e 0x00007fff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00006f 0x0000ffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000070 0x0001ffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000071 0x0003ffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000072 0x0007ffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000073 0x000fffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000074 0x001fffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000075 0x003fffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000076 0x007fffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x000077 0x00ffffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000078 0x01ffffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x000079 0x03ffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00007a 0x07ffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00007b 0x0fffffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x00007c 0x1fffffff}; + lappend clist { 0 r 1111 0x000020 0x00000000}; + lappend clist { 0 r 1111 0x00007d 0x3fffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00007e 0x7fffffff}; + lappend clist { 0 r 1111 0x03fffe 0x00000000}; + lappend clist { 0 r 1111 0x00007f 0xffffffff}; +## # random sequence generated with gen_tst_sram_ranseq 64 +## C now do some write/read tests with random addr/data +## C 16 writes + lappend clist { 0 w 1111 0x0039dc 0x96d0e73e}; + lappend clist { 0 w 1111 0x006d4a 0xbbbb4372}; + lappend clist { 0 w 1111 0x0092b6 0xf58ace40}; + lappend clist { 0 w 1111 0x01393e 0xeb748a98}; + lappend clist { 0 w 1111 0x019b4c 0x69281826}; + lappend clist { 0 w 1111 0x02a8ba 0xdae538d7}; + lappend clist { 0 w 1111 0x00341a 0x8f42ffbd}; + lappend clist { 0 w 1111 0x01b18a 0x5b523e97}; + lappend clist { 0 w 1111 0x039bb7 0x46eea237}; + lappend clist { 0 w 1111 0x03f294 0x8824fcef}; + lappend clist { 0 w 1111 0x036375 0xd1c10ba8}; + lappend clist { 0 w 1111 0x0067f6 0xfc93d1dc}; + lappend clist { 0 w 1111 0x01242e 0x1316562d}; + lappend clist { 0 w 1111 0x00a090 0x0779b757}; + lappend clist { 0 w 1111 0x01aebe 0xe06ae43f}; + lappend clist { 0 w 1111 0x019109 0xf558ccb4}; + ## C 16 writes and 16 reads mixed + lappend clist { 0 w 1111 0x03c4a6 0x96dbbcff}; + lappend clist { 0 r 1111 0x0039dc 0x96d0e73e}; + lappend clist { 0 w 1111 0x016ea6 0x14010c8f}; + lappend clist { 0 r 1111 0x006d4a 0xbbbb4372}; + lappend clist { 0 r 1111 0x0092b6 0xf58ace40}; + lappend clist { 0 w 1111 0x037728 0xe4b4e052}; + lappend clist { 0 w 1111 0x0265d5 0x9d612c95}; + lappend clist { 0 r 1111 0x01393e 0xeb748a98}; + lappend clist { 0 w 1111 0x017b76 0xfe2576be}; + lappend clist { 0 r 1111 0x019b4c 0x69281826}; + lappend clist { 0 w 1111 0x0172cc 0x4f67af1f}; + lappend clist { 0 w 1111 0x005b4b 0x8f7e559d}; + lappend clist { 0 w 1111 0x019341 0xa829717d}; + lappend clist { 0 r 1111 0x02a8ba 0xdae538d7}; + lappend clist { 0 r 1111 0x00341a 0x8f42ffbd}; + lappend clist { 0 r 1111 0x01b18a 0x5b523e97}; + lappend clist { 0 w 1111 0x034de2 0xd53f120f}; + lappend clist { 0 r 1111 0x039bb7 0x46eea237}; + lappend clist { 0 w 1111 0x02119e 0x6253f647}; + lappend clist { 0 r 1111 0x03f294 0x8824fcef}; + lappend clist { 0 w 1111 0x00f1ac 0x936c2522}; + lappend clist { 0 r 1111 0x036375 0xd1c10ba8}; + lappend clist { 0 w 1111 0x00716b 0x2db9e1fa}; + lappend clist { 0 r 1111 0x0067f6 0xfc93d1dc}; + lappend clist { 0 w 1111 0x01781f 0xae31b1e7}; + lappend clist { 0 r 1111 0x01242e 0x1316562d}; + lappend clist { 0 w 1111 0x0187bf 0xccdbf8e7}; + lappend clist { 0 w 1111 0x029b82 0x95274e53}; + lappend clist { 0 r 1111 0x00a090 0x0779b757}; + lappend clist { 0 r 1111 0x01aebe 0xe06ae43f}; + lappend clist { 0 w 1111 0x0244c7 0x5fd2ee97}; + lappend clist { 0 r 1111 0x019109 0xf558ccb4}; + ## C 16 writes and 16 reads mixed, with waits + lappend clist { 0 w 1111 0x0239b6 0x8f147909}; + lappend clist { 1 r 1111 0x03c4a6 0x96dbbcff}; + lappend clist { 0 w 1111 0x03b485 0x9f2c58f4}; + lappend clist { 2 r 1111 0x016ea6 0x14010c8f}; + lappend clist { 0 w 1111 0x01e384 0xde6a4ad3}; + lappend clist { 0 r 1111 0x037728 0xe4b4e052}; + lappend clist { 1 w 1111 0x00abc1 0x4a3aafbe}; + lappend clist { 0 r 1111 0x0265d5 0x9d612c95}; + lappend clist { 2 w 1111 0x03cbb0 0x0adff6f0}; + lappend clist { 0 r 1111 0x017b76 0xfe2576be}; + lappend clist { 2 r 1111 0x0172cc 0x4f67af1f}; + lappend clist { 0 w 1111 0x0128cc 0x94959a76}; + lappend clist { 1 r 1111 0x005b4b 0x8f7e559d}; + lappend clist { 0 r 1111 0x019341 0xa829717d}; + lappend clist { 2 w 1111 0x029a71 0xad031981}; + lappend clist { 0 r 1111 0x034de2 0xd53f120f}; + lappend clist { 3 r 1111 0x02119e 0x6253f647}; + lappend clist { 0 w 1111 0x004b60 0xcb3cfc9a}; + lappend clist { 1 r 1111 0x00f1ac 0x936c2522}; + lappend clist { 0 w 1111 0x03dc56 0x1bd4948d}; + lappend clist { 2 w 1111 0x01a28a 0x9b8c1f3d}; + lappend clist { 0 r 1111 0x00716b 0x2db9e1fa}; + lappend clist { 3 w 1111 0x037682 0x4f8e2aca}; + lappend clist { 0 w 1111 0x00d920 0xb6f4fdfc}; + lappend clist { 1 r 1111 0x01781f 0xae31b1e7}; + lappend clist { 0 w 1111 0x024aed 0x289e121a}; + lappend clist { 2 w 1111 0x037d2d 0x43b8b430}; + lappend clist { 0 r 1111 0x0187bf 0xccdbf8e7}; + lappend clist { 3 w 1111 0x008798 0x19a1600a}; + lappend clist { 0 w 1111 0x02eb94 0xda68509a}; + lappend clist { 1 r 1111 0x029b82 0x95274e53}; + lappend clist { 2 r 1111 0x0244c7 0x5fd2ee97}; + ## C finally 16 reads + lappend clist { 0 r 1111 0x0239b6 0x8f147909}; + lappend clist { 0 r 1111 0x03b485 0x9f2c58f4}; + lappend clist { 0 r 1111 0x01e384 0xde6a4ad3}; + lappend clist { 0 r 1111 0x00abc1 0x4a3aafbe}; + lappend clist { 0 r 1111 0x03cbb0 0x0adff6f0}; + lappend clist { 0 r 1111 0x0128cc 0x94959a76}; + lappend clist { 0 r 1111 0x029a71 0xad031981}; + lappend clist { 0 r 1111 0x004b60 0xcb3cfc9a}; + lappend clist { 0 r 1111 0x03dc56 0x1bd4948d}; + lappend clist { 0 r 1111 0x01a28a 0x9b8c1f3d}; + lappend clist { 0 r 1111 0x037682 0x4f8e2aca}; + lappend clist { 0 r 1111 0x00d920 0xb6f4fdfc}; + lappend clist { 0 r 1111 0x024aed 0x289e121a}; + lappend clist { 0 r 1111 0x037d2d 0x43b8b430}; + lappend clist { 0 r 1111 0x008798 0x19a1600a}; + lappend clist { 0 r 1111 0x02eb94 0xda68509a}; + + return $clist + } +} Index: tst_sram/test_seq.tcl =================================================================== --- tst_sram/test_seq.tcl (nonexistent) +++ tst_sram/test_seq.tcl (revision 38) @@ -0,0 +1,634 @@ +# $Id: test_seq.tcl 785 2016-07-10 12:22:41Z mueller $ +# +# Copyright 2016- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-07-10 785 1.1 add wswap and wloop tests +# 2016-07-09 784 1.0 Initial version (ported from tb_tst_sram_stim.dat) +# + +package provide tst_sram 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval tst_sram { + # + # test_seq_srum: helper: run sequencer and check status + # + proc test_seq_srun {{sstat 0} {tout 10.} {seaddr 0} {sedath 0} {sedatl 0}} { + variable nscmd + if {$nscmd == 0} {error "no or empty scmd list loaded"} + # + # set slim, sstat and start sequencer + rlc exec \ + -wreg sr.slim [expr {$nscmd-1}] \ + -wreg sr.sstat $sstat \ + -wreg sr.sstart 0 + # wait for completion + rlc wtlam $tout + # harvest attn and check sequencer status + # also check rlink command status (RB_STAT(1) <= R_REGS.sfail) + set seqmsk [rutil::com16 [regbld tst_sram::SSTAT wide]]; # ign sstat.wide ! + set stamsk [regbld rlink::STAT {stat -1} rbtout rbnak rberr]; + + if {$seaddr == 0} { # fail=0 --> check saddr + rlc exec \ + -attn -edata 0x0001 \ + -rreg sr.sstat -edata $sstat $seqmsk -estat 0 $stamsk \ + -rreg sr.saddr -edata $nscmd -estat 0 $stamsk + } else { # fail=1 --> check seaddr + set sstat_exp [expr {$sstat | [regbld tst_sram::SSTAT fail]}] + set stabad [regbld rlink::STAT {stat 2}]; # expect status.stat = 0x2 + rlc exec \ + -attn -edata 0x0001 \ + -rreg sr.sstat -edata $sstat_exp $seqmsk -estat $stabad $stamsk \ + -rreg sr.seaddr -edata $seaddr -estat $stabad $stamsk \ + -rreg sr.sedath -edata $sedath -estat $stabad $stamsk \ + -rreg sr.sedatl -edata $sedatl -estat $stabad $stamsk + } + return "" + } + + # + # test_seq_setxor: helper: setup maddr* and mdi* + # + proc test_seq_setxor {maddrh maddrl mdih mdil} { + rlc exec \ + -wreg sr.maddrh $maddrh \ + -wreg sr.maddrl $maddrl \ + -wreg sr.mdih $mdih \ + -wreg sr.mdil $mdil + } + + # + # test_seq: Test sequencer, basic 18 bit mode + # + proc test_seq {{tout 10.}} { + variable nscmd + # + set errcnt 0 + rlc errcnt -clear + set sm [rutil::com16 [regbld tst_sram::SSTAT wide]] + + rlink::anena 1; # enable attn notify + + # + rlc log "tst_sram::test_seq ----------------------------------------------" + # + #------------------------------------------------------------------------- + rlc log " test 1: list of write commands" + # load list of 8 mem write commands + set clist {} + lappend clist { 0 w 1111 0x000110 0x70605040}; + lappend clist { 0 w 1111 0x000111 0x71615141}; + lappend clist { 0 w 1111 0x000112 0x72625242}; + lappend clist { 0 w 1111 0x000113 0x73635343}; + lappend clist { 0 w 1111 0x000114 0x74645444}; + lappend clist { 0 w 1111 0x000115 0x75655545}; + lappend clist { 0 w 1111 0x000116 0x76665646}; + lappend clist { 0 w 1111 0x000117 0x77675747}; + scmd_write $clist + + # run sequencer (plain xord=0 xora=0 veri=0) + test_seq_srun 0 $tout + # read back 8 longwords + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0110 \ + -wblk sr.mblk {0x7060 0x5040 \ + 0x7161 0x5141 \ + 0x7262 0x5242 \ + 0x7363 0x5343 \ + 0x7464 0x5444 \ + 0x7565 0x5545 \ + 0x7666 0x5646 \ + 0x7767 0x5747} + # + #------------------------------------------------------------------------- + rlc log " test 2: list of read commands" + # load list of 8 mem read commands + set clist {} + lappend clist { 0 r 1111 0x000110 0xdead0000}; + lappend clist { 0 r 1111 0x000111 0xbeaf1111}; + lappend clist { 0 r 1111 0x000112 0xdead2222}; + lappend clist { 0 r 1111 0x000113 0xbeaf3333}; + lappend clist { 0 r 1111 0x000114 0xdead4444}; + lappend clist { 0 r 1111 0x000115 0xbeaf5555}; + lappend clist { 0 r 1111 0x000116 0xdead6666}; + lappend clist { 0 r 1111 0x000117 0xbeaf7777}; + scmd_write $clist + + # run sequencer (plain xord=0 xora=0 veri=0) + test_seq_srun 0 $tout + # read back data part of sequencer + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblkd 16 -edata {0x7060 0x5040 + 0x7161 0x5141 \ + 0x7262 0x5242 \ + 0x7363 0x5343 \ + 0x7464 0x5444 \ + 0x7565 0x5545 \ + 0x7666 0x5646 \ + 0x7767 0x5747} + # + #------------------------------------------------------------------------- + rlc log " test 3: mixed list of writes (some byte wise) and reads" + # this list modifies the memory left from previous test ! + set clist {} + lappend clist { 0 w 0001 0x000112 0x00000082}; # wr 12 0001 + lappend clist { 0 w 0010 0x000113 0x00009300}; # wr 13 0010 + lappend clist { 0 r 1111 0x000110 0x00000000}; # rd 10 + lappend clist { 0 w 0100 0x000114 0x00a40000}; # wr 14 0100 + lappend clist { 0 r 1111 0x000111 0x00000000}; # rd 11 + lappend clist { 0 w 1000 0x000115 0xb5000000}; # wr 15 1000 + lappend clist { 0 r 1111 0x000112 0x00000000}; # rd 12 + lappend clist { 0 r 1111 0x000113 0x00000000}; # rd 13 + lappend clist { 0 w 1111 0x000118 0x78685848}; # wr 18 + lappend clist { 0 r 1111 0x000114 0x00000000}; # rd 14 + lappend clist { 0 w 1111 0x000119 0x79695949}; # wr 19 + lappend clist { 0 w 1111 0x00011a 0x7a6a5a4a}; # wr 1a + lappend clist { 0 r 1111 0x000115 0x00000000}; # rd 15 + lappend clist { 0 w 1111 0x00011b 0x7b6b5b4b}; # wr 1b + lappend clist { 0 r 1111 0x000116 0x00000000}; # rd 16 + lappend clist { 0 w 1111 0x00011c 0x7c6c5c4c}; # wr 1c + lappend clist { 0 w 1111 0x00011d 0x7d6d5d4d}; # wr 1d + lappend clist { 0 r 1111 0x000117 0x00000000}; # rd 17 + lappend clist { 0 r 1111 0x000118 0x00000000}; # rd 18 + lappend clist { 0 w 1111 0x00011e 0x7e6e5e4e}; # wr 1e + lappend clist { 0 w 1111 0x00011f 0x7f6f5f4f}; # wr 1f + lappend clist { 0 r 1111 0x000119 0x00000000}; # rd 19 + lappend clist { 0 r 1111 0x00011a 0x00000000}; # rd 1a + lappend clist { 0 r 1111 0x00011b 0x00000000}; # rd 1b + lappend clist { 0 r 1111 0x00011c 0x00000000}; # rd 1c + lappend clist { 0 r 1111 0x00011d 0x00000000}; # rd 1d + lappend clist { 0 r 1111 0x00011e 0x00000000}; # rd 1e + lappend clist { 0 r 1111 0x00011f 0x00000000}; # rd 1f + scmd_write $clist + + # run sequencer (plain xord=0 xora=0 veri=0) + test_seq_srun 0 $tout + # read back data part of sequencer + rlc exec \ + -wreg sr.saddr 0x0000 \ + -rblk sr.sblkd 56 -edata {0x0000 0x0082 \ + 0x0000 0x9300 \ + 0x7060 0x5040 \ + 0x00a4 0x0000 \ + 0x7161 0x5141 \ + 0xb500 0x0000 \ + 0x7262 0x5282 \ + 0x7363 0x9343 \ + 0x7868 0x5848 \ + 0x74a4 0x5444 \ + 0x7969 0x5949 \ + 0x7a6a 0x5a4a \ + 0xb565 0x5545 \ + 0x7b6b 0x5b4b \ + 0x7666 0x5646 \ + 0x7c6c 0x5c4c \ + 0x7d6d 0x5d4d \ + 0x7767 0x5747 \ + 0x7868 0x5848 \ + 0x7e6e 0x5e4e \ + 0x7f6f 0x5f4f \ + 0x7969 0x5949 \ + 0x7a6a 0x5a4a \ + 0x7b6b 0x5b4b \ + 0x7c6c 0x5c4c \ + 0x7d6d 0x5d4d \ + 0x7e6e 0x5e4e \ + 0x7f6f 0x5f4f} + + # + #------------------------------------------------------------------------- + rlc log " test 4: sequencer verify mode" + # list of 4 mem write and 4 read commands + set clist {} + lappend clist { 0 w 1111 0x000220 0xb0a09080}; + lappend clist { 0 w 1111 0x000221 0xb1a19181}; + lappend clist { 0 r 1111 0x000220 0xb0a09080}; + lappend clist { 0 w 1111 0x000222 0xb2a29282}; + lappend clist { 0 r 1111 0x000221 0xb1a19181}; + lappend clist { 0 w 1111 0x000223 0xb3a39383}; + lappend clist { 0 r 1111 0x000222 0xb2a29282}; + lappend clist { 0 r 1111 0x000223 0xb3a39383}; + scmd_write $clist + + # run sequencer (veri=1) + test_seq_srun [regbld tst_sram::SSTAT veri] $tout + + # again, but with mismatch on 2nd read + set clist {} + lappend clist { 0 w 1111 0x000230 0xb0a09080}; # 0 + lappend clist { 0 w 1111 0x000231 0xb1a19181}; # 1 + lappend clist { 0 r 1111 0x000230 0xb0a09080}; # 2 + lappend clist { 0 w 1111 0x000232 0xb2a29282}; # 3 + lappend clist { 0 r 1111 0x000231 0x00000000}; # 4 <-- read mismatch here + lappend clist { 0 w 1111 0x000233 0xb3a39383}; # 5 + lappend clist { 0 r 1111 0x000232 0xb2a29282}; # 6 + lappend clist { 0 r 1111 0x000233 0xb3a39383}; # 7 + scmd_write $clist + + # run sequencer (veri=1, expect fail) + test_seq_srun [regbld tst_sram::SSTAT veri] $tout 4 0xb1a1 0x9181 + + # sblkd re-read data, check that data part wasn't overwritten + rlc exec \ + -wreg sr.saddr 0 \ + -rblk sr.sblkd 16 -edata {0xb0a0 0x9080 \ + 0xb1a1 0x9181 \ + 0xb0a0 0x9080 \ + 0xb2a2 0x9282 \ + 0x0000 0x0000 \ + 0xb3a3 0x9383 \ + 0xb2a2 0x9282 \ + 0xb3a3 0x9383} + # + #------------------------------------------------------------------------- + rlc log " test 5: test reset via init" + # expects state from fail srun of previous test with + # seaddr=0x0004 sedath=0xb1a1 sedatl=0x9181 + + # re-check fail bit status bit set from previous test + rlc exec \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \ + -rreg sr.seaddr -edata 0x0004 \ + -rreg sr.sedath -edata 0xb1a1 \ + -rreg sr.sedatl -edata 0x9181 + # init 0x0 --> noop + rlc exec \ + -init sr.mdih 0x0000 \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \ + -rreg sr.seaddr -edata 0x0004 \ + -rreg sr.sedath -edata 0xb1a1 \ + -rreg sr.sedatl -edata 0x9181 + # init 0x2 --> reset MEM, no effect on SEQ state + rlc exec \ + -init sr.mdih 0x0002 \ + -rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \ + -rreg sr.seaddr -edata 0x0004 \ + -rreg sr.sedath -edata 0xb1a1 \ + -rreg sr.sedatl -edata 0x9181 + # init 0x1 --> reset SEQ, add registers cleared + rlc exec \ + -init sr.mdih 0x0001 \ + -rreg sr.sstat -edata 0 $sm \ + -rreg sr.seaddr -edata 0 \ + -rreg sr.sedath -edata 0 \ + -rreg sr.sedatl -edata 0 + # + #------------------------------------------------------------------------- + rlc log " test 6: xord and xora options" + # list of 4 mem write and 4 read commands + set clist {} + lappend clist { 0 w 1111 0x000440 0xc0b0a090}; + lappend clist { 0 w 1111 0x000441 0xc1b1a191}; + lappend clist { 0 r 1111 0x000440 0xc0b0a090}; + lappend clist { 0 w 1111 0x000442 0xc2b2a292}; + lappend clist { 0 r 1111 0x000441 0xc1b1a191}; + lappend clist { 0 w 1111 0x000443 0xc3b3a393}; + lappend clist { 0 r 1111 0x000442 0xc2b2a292}; + lappend clist { 0 r 1111 0x000443 0xc3b3a393}; + scmd_write $clist + + # run sequencer (xord=1,xora=1,veri=1) and maddr=0 mdi=0 + test_seq_setxor 0x00 0x0000 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout + + # read and check mem data (in 440...443, data as in smem) + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0440 \ + -rblk sr.mblk 8 -edata {0xc0b0 0xa090 \ + 0xc1b1 0xa191 \ + 0xc2b2 0xa292 \ + 0xc3b3 0xa393} + + # start sequencer with xord=1 and mdi=f0f0f0f0 + # now 9=1001 <-> 6=0110 + # now a=1010 <-> 5=0101 + # now b=1011 <-> 4=0100 + # now c=1100 <-> 3=0011 + test_seq_setxor 0x00 0x0000 0xf0f0 0xf0f0 + test_seq_srun [regbld tst_sram::SSTAT xord veri] $tout + # read and check mem data (in 440...443, now xord'ed) + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0440 \ + -rblk sr.mblk 8 -edata {0x3040 0x5060 \ + 0x3141 0x5161 \ + 0x3242 0x5262 \ + 0x3343 0x5363} + + # start sequencer with xord=1 and mdi=0f0f0f0f + # now 0=0000 -> f=1111 + # now 1=0001 -> e=1110 + # now 2=0010 -> d=1101 + # now 3=0011 -> c=1100 + test_seq_setxor 0x00 0x0000 0x0f0f 0x0f0f + test_seq_srun [regbld tst_sram::SSTAT xord veri] $tout + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x0440 \ + -rblk sr.mblk 8 -edata {0xcfbf 0xaf9f \ + 0xcebe 0xae9e \ + 0xcdbd 0xad9d \ + 0xccbc 0xac9c} + + # start sequencer with xora=1 and maddr=1000 + test_seq_setxor 0x00 0x1000 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout + # read and check mem data (in 1440...1443, data as in smem) + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x1440 \ + -rblk sr.mblk 8 -edata {0xc0b0 0xa090 \ + 0xc1b1 0xa191 \ + 0xc2b2 0xa292 \ + 0xc3b3 0xa393} + + # start sequencer with xord=1,xora=1 and maddr=2000,mdi=f0f0f0f0 + test_seq_setxor 0x00 0x2000 0xf0f0 0xf0f0 + test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout + # read and check mem data (in 2440...2443, data xord'ed) + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x2440 \ + -rblk sr.mblk 8 -edata {0x3040 0x5060 \ + 0x3141 0x5161 \ + 0x3242 0x5262 \ + 0x3343 0x5363} + + # finally check, that sedat hold pure mem data + # list of 4 mem write and 4 read commands + set clist {} + lappend clist { 0 w 1111 0x000550 0xc0b0a090}; + lappend clist { 0 w 1111 0x000551 0xc1b1a191}; + lappend clist { 0 w 1111 0x000552 0xc2b2a292}; + lappend clist { 0 w 1111 0x000553 0xc3b3a393}; + lappend clist { 0 r 1111 0x000550 0x00000000}; # add read deta wrong + lappend clist { 0 r 1111 0x000551 0x00000000}; + lappend clist { 0 r 1111 0x000552 0x00000000}; + lappend clist { 0 r 1111 0x000553 0x00000000}; + scmd_write $clist + + # start sequencer with xord=1,xora=1 and maddr=4000,mdi=f0f0f0f0 + # check that data in sedat is xor'ed !! + test_seq_setxor 0x00 0x4000 0xf0f0 0xf0f0 + test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout \ + 4 0x3040 0x5060 + # read and check mem data (in 4550...4553, data xord'ed) + rlc exec \ + -wreg sr.maddrh 0x0000 \ + -wreg sr.maddrl 0x4550 \ + -rblk sr.mblk 8 -edata {0x3040 0x5060 \ + 0x3141 0x5161 \ + 0x3242 0x5262 \ + 0x3343 0x5363} + + # finally clear veri error + rlc exec -init sr.mdih 0x1; # reset SEQ + # + #------------------------------------------------------------------------- + rlc log " test 7: loop option (with xora)" + # list of 4 mem write and 4 read commands + set clist {} + lappend clist { 0 w 1111 0x000000 0x00102030}; + lappend clist { 0 w 1111 0x000001 0x01112131}; + lappend clist { 0 r 1111 0x000000 0x00102030}; + lappend clist { 0 w 1111 0x000002 0x02122232}; + lappend clist { 0 r 1111 0x000001 0x01112131}; + lappend clist { 0 w 1111 0x000003 0x03132333}; + lappend clist { 0 r 1111 0x000002 0x02122232}; + lappend clist { 0 r 1111 0x000003 0x03132333}; + scmd_write $clist + + # start sequencer with loop=1,xora=1 and maddr=3fff0 (will loop to 3ffff) + test_seq_setxor 0x03 0xfff0 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT loop xora veri] $tout + # check that maddr incremented + rlc exec \ + -rreg sr.maddrh -edata 0x0003 \ + -rreg sr.maddrl -edata 0xffff + # last iteration will write into + # 00000 xor 03ffff -> 03ffff (00102030) + # 00001 xor 03ffff -> 03fffe (01112131) + # 00002 xor 03ffff -> 03fffd (02122232) + # 00003 xor 03ffff -> 03fffc (03132333) + # read back 4 longwords 03fffc..03ffff + rlc exec \ + -wreg sr.maddrh 0x0003 \ + -wreg sr.maddrl 0xfffc \ + -rblk sr.mblk 8 -edata {0x0313 0x2333 \ + 0x0212 0x2232 \ + 0x0111 0x2131 \ + 0x0010 0x2030} + + # + #------------------------------------------------------------------------- + rlc log " test 8: loop option (with xora), verify fail case" + # list of 4 mem write and 4 read commands, 2nd read will fail + set clist {} + lappend clist { 0 w 1111 0x000100 0x00102030}; + lappend clist { 0 w 1111 0x000101 0x01112131}; + lappend clist { 0 w 1111 0x000102 0x02122232}; + lappend clist { 0 w 1111 0x000103 0x03132333}; + lappend clist { 0 r 1111 0x000100 0x00102030}; + lappend clist { 0 r 1111 0x000101 0x00000000}; # <-- will fail + lappend clist { 0 r 1111 0x000102 0x00000000}; + lappend clist { 0 r 1111 0x000103 0x00000000}; + scmd_write $clist + + # start with loop=1,xora=1 and maddr=03fff0 (tried to loop to 03ffff) + test_seq_setxor 0x03 0xfff0 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT loop xora veri] $tout \ + 5 0x0111 0x2131 + # check that maddr do not increment (fail on first loop !) + rlc exec \ + -rreg sr.maddrh -edata 0x0003 \ + -rreg sr.maddrl -edata 0xfff0 + + # finally clear veri error + rlc exec -init sr.mdih 0x1; # reset SEQ + + # + #------------------------------------------------------------------------- + rlc log " test 9: wait field in sequencer" + # list of 16 writes and 16 reads, with increasing waits + set clist {} + lappend clist { 0x0 w 1111 0x000110 0x20001000}; # writes + lappend clist { 0x1 w 1111 0x000111 0x20011001}; + lappend clist { 0x2 w 1111 0x000112 0x20021002}; + lappend clist { 0x3 w 1111 0x000113 0x20031003}; + lappend clist { 0x4 w 1111 0x000114 0x20041004}; + lappend clist { 0x5 w 1111 0x000115 0x20051005}; + lappend clist { 0x6 w 1111 0x000116 0x20061006}; + lappend clist { 0x7 w 1111 0x000117 0x20071007}; + lappend clist { 0x8 w 1111 0x000118 0x20081008}; + lappend clist { 0x9 w 1111 0x000119 0x20091009}; + lappend clist { 0xa w 1111 0x00011a 0x200a100a}; + lappend clist { 0xb w 1111 0x00011b 0x200b100b}; + lappend clist { 0xc w 1111 0x00011c 0x200c100c}; + lappend clist { 0xd w 1111 0x00011d 0x200d100d}; + lappend clist { 0xe w 1111 0x00011e 0x200e100e}; + lappend clist { 0xf w 1111 0x00011f 0x200f100f}; + lappend clist { 0x0 r 1111 0x000110 0x20001000}; # read + lappend clist { 0x1 r 1111 0x000111 0x20011001}; + lappend clist { 0x2 r 1111 0x000112 0x20021002}; + lappend clist { 0x3 r 1111 0x000113 0x20031003}; + lappend clist { 0x4 r 1111 0x000114 0x20041004}; + lappend clist { 0x5 r 1111 0x000115 0x20051005}; + lappend clist { 0x6 r 1111 0x000116 0x20061006}; + lappend clist { 0x7 r 1111 0x000117 0x20071007}; + lappend clist { 0x8 r 1111 0x000118 0x20081008}; + lappend clist { 0x9 r 1111 0x000119 0x20091009}; + lappend clist { 0xa r 1111 0x00011a 0x200a100a}; + lappend clist { 0xb r 1111 0x00011b 0x200b100b}; + lappend clist { 0xc r 1111 0x00011c 0x200c100c}; + lappend clist { 0xd r 1111 0x00011d 0x200d100d}; + lappend clist { 0xe r 1111 0x00011e 0x200e100e}; + lappend clist { 0xf r 1111 0x00011f 0x200f100f}; + scmd_write $clist + + # start sequencer with xora=1 and maddr=11000 + test_seq_setxor 0x01 0x1000 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout + + # list of groups of 2 write / 2 read, with increasing wait + set clist {} + lappend clist { 0x0 w 1111 0x000120 0x30002000}; # write + lappend clist { 0x0 w 1111 0x000121 0x30012001}; + lappend clist { 0x0 r 1111 0x000120 0x30002000}; # read + lappend clist { 0x0 r 1111 0x000121 0x30012001}; + lappend clist { 0x1 w 1111 0x000122 0x30022002}; # write + lappend clist { 0x1 w 1111 0x000123 0x30032003}; + lappend clist { 0x1 r 1111 0x000122 0x30022002}; # read + lappend clist { 0x1 r 1111 0x000123 0x30032003}; + lappend clist { 0x2 w 1111 0x000124 0x30042004}; # write + lappend clist { 0x2 w 1111 0x000125 0x30052005}; + lappend clist { 0x2 r 1111 0x000124 0x30042004}; # read + lappend clist { 0x2 r 1111 0x000125 0x30052005}; + lappend clist { 0x3 w 1111 0x000126 0x30062006}; # write + lappend clist { 0x3 w 1111 0x000127 0x30072007}; + lappend clist { 0x3 r 1111 0x000126 0x30062006}; # read + lappend clist { 0x3 r 1111 0x000127 0x30072007}; + lappend clist { 0x4 w 1111 0x000128 0x30082008}; # write + lappend clist { 0x4 w 1111 0x000129 0x30092009}; + lappend clist { 0x4 r 1111 0x000128 0x30082008}; # read + lappend clist { 0x4 r 1111 0x000129 0x30092009}; + lappend clist { 0x5 w 1111 0x00012a 0x300a200a}; # write + lappend clist { 0x5 w 1111 0x00012b 0x300b200b}; + lappend clist { 0x5 r 1111 0x00012a 0x300a200a}; # read + lappend clist { 0x5 r 1111 0x00012b 0x300b200b}; + lappend clist { 0x6 w 1111 0x00012c 0x300c200c}; # write + lappend clist { 0x6 w 1111 0x00012d 0x300d200d}; + lappend clist { 0x6 r 1111 0x00012c 0x300c200c}; # read + lappend clist { 0x6 r 1111 0x00012d 0x300d200d}; + lappend clist { 0x7 w 1111 0x00012e 0x300e200e}; # write + lappend clist { 0x7 w 1111 0x00012f 0x300f200f}; + lappend clist { 0x7 r 1111 0x00012e 0x300e200e}; # read + lappend clist { 0x7 r 1111 0x00012f 0x300f200f}; + scmd_write $clist + + # start sequencer with xora=1 and maddr=22000 + test_seq_setxor 0x02 0x2000 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout + + # + #------------------------------------------------------------------------- + if {[iswide]} { + rlc log " test 10: wswap option" + # write with sequencer + # list of writes, top 2 bits of seq address change; do read back + set clist {} + lappend clist { 0x0 w 1111 0x000000 0x12340000}; # -> 0x001000 + lappend clist { 0x0 w 1111 0x010011 0x12340011}; # -> 0x101011 + lappend clist { 0x0 w 1111 0x020022 0x12340022}; # -> 0x201022 + lappend clist { 0x0 w 1111 0x030033 0x12340033}; # -> 0x301033 + lappend clist { 0x0 r 1111 0x000000 0x12340000}; # <- 0x001000 + lappend clist { 0x0 r 1111 0x010011 0x12340011}; # <- 0x101011 + lappend clist { 0x0 r 1111 0x020022 0x12340022}; # <- 0x201022 + lappend clist { 0x0 r 1111 0x030033 0x12340033}; # <- 0x301033 + scmd_write $clist + + # start sequencer with xora=1 and maddr=001000 + test_seq_setxor 0x00 0x1000 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT wswap xora veri] $tout + + # check memory via mcmd reads + rlc exec \ + -wreg sr.maddrl 0x1000 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x00}] \ + -rreg sr.mdoh -edata 0x1234 \ + -rreg sr.mdol -edata 0x0000 \ + -wreg sr.maddrl 0x1011 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x10}] \ + -rreg sr.mdoh -edata 0x1234 \ + -rreg sr.mdol -edata 0x0011 \ + -wreg sr.maddrl 0x1022 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x20}] \ + -rreg sr.mdoh -edata 0x1234 \ + -rreg sr.mdol -edata 0x0022 \ + -wreg sr.maddrl 0x1033 \ + -wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x30}] \ + -rreg sr.mdoh -edata 0x1234 \ + -rreg sr.mdol -edata 0x0033 + } + # + #------------------------------------------------------------------------- + if {[iswide]} { + rlc log " test 11: wloop option" + # like test previous test 7, but now using wloop + # list of 4 mem write and 4 read commands + set clist {} + lappend clist { 0 w 1111 0x000000 0x00102030}; + lappend clist { 0 w 1111 0x000001 0x01112131}; + lappend clist { 0 r 1111 0x000000 0x00102030}; + lappend clist { 0 w 1111 0x000002 0x02122232}; + lappend clist { 0 r 1111 0x000001 0x01112131}; + lappend clist { 0 w 1111 0x000003 0x03132333}; + lappend clist { 0 r 1111 0x000002 0x02122232}; + lappend clist { 0 r 1111 0x000003 0x03132333}; + scmd_write $clist + + # start with wloop=1,loop=1,xora=1 and maddr=3ffff0 (will loop to 3fffff) + test_seq_setxor 0x3f 0xfff0 0x0000 0x0000 + test_seq_srun [regbld tst_sram::SSTAT wloop loop xora veri] $tout + # check that maddr incremented + rlc exec \ + -rreg sr.maddrh -edata 0x003f \ + -rreg sr.maddrl -edata 0xffff + # last iteration will write into + # 00000 xor 3fffff -> 3fffff (00102030) + # 00001 xor 3fffff -> 3ffffe (01112131) + # 00002 xor 3fffff -> 3ffffd (02122232) + # 00003 xor 3fffff -> 3ffffc (03132333) + # read back 4 longwords 3ffffc..3fffff + rlc exec \ + -wreg sr.maddrh 0x003f \ + -wreg sr.maddrl 0xfffc \ + -rblk sr.mblk 8 -edata {0x0313 0x2333 \ + 0x0212 0x2232 \ + 0x0111 0x2131 \ + 0x0010 0x2030} + + } + # + #------------------------------------------------------------------------- + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: tst_sram/util.tcl =================================================================== --- tst_sram/util.tcl (nonexistent) +++ tst_sram/util.tcl (revision 38) @@ -0,0 +1,244 @@ +# $Id: util.tcl 785 2016-07-10 12:22:41Z mueller $ +# +# Copyright 2011-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-07-09 784 1.2 22bit support: mask sstat(wide); add iswide +# 2015-04-03 661 1.1 drop estatdef (stat err check default now) +# 2014-08-14 582 1.0.1 add srun* procs; add nscmd and tout variables +# 2014-08-10 581 1.0 Initial version +# 2011-07-03 387 0.1 Frist draft +# + +package provide tst_sram 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval tst_sram { + # name space variables + # + variable nscmd 0; # length of current sequencer command list + variable tout 10.; # default time out + variable iswide -1; # sstat.wide cache + # + # setup register descriptions for tst_sram core design --------------------- + # + regdsc MCMD {ld 14} {inc 13} {we 12} {be 11 4} {addrh 5 6} + regdsc SSTAT {wide 15} {wswap 9} {wloop 8} \ + {loop 7} {xord 6} {xora 5} {veri 4} {fail 1} {run 0} + regdsc SCMD {wait 31 4} {we 24} {be 23 4} {addr 17 18} + # + # setup: amap definitions for tst_sram core design ------------------------- + # + proc setup {{base 0x0000}} { + rlc amap -insert sr.mdih [expr {$base + 0x00}] + rlc amap -insert sr.mdil [expr {$base + 0x01}] + rlc amap -insert sr.mdoh [expr {$base + 0x02}] + rlc amap -insert sr.mdol [expr {$base + 0x03}] + rlc amap -insert sr.maddrh [expr {$base + 0x04}] + rlc amap -insert sr.maddrl [expr {$base + 0x05}] + rlc amap -insert sr.mcmd [expr {$base + 0x06}] + rlc amap -insert sr.mblk [expr {$base + 0x07}] + rlc amap -insert sr.slim [expr {$base + 0x08}] + rlc amap -insert sr.saddr [expr {$base + 0x09}] + rlc amap -insert sr.sblk [expr {$base + 0x0a}] + rlc amap -insert sr.sblkc [expr {$base + 0x0b}] + rlc amap -insert sr.sblkd [expr {$base + 0x0c}] + rlc amap -insert sr.sstat [expr {$base + 0x0d}] + rlc amap -insert sr.sstart [expr {$base + 0x0e}] + rlc amap -insert sr.sstop [expr {$base + 0x0f}] + rlc amap -insert sr.seaddr [expr {$base + 0x10}] + rlc amap -insert sr.sedath [expr {$base + 0x11}] + rlc amap -insert sr.sedatl [expr {$base + 0x12}] + } + # + # init: reset tst_sram ----------------------------------------------------- + # + proc init {} { + rlc exec \ + -wreg sr.sstop 1 \ + -wreg sr.sstat 0 + } + # + # iswide: 1 if 22bit system ------------------------------------------------ + # + proc iswide {} { + variable iswide + if {$iswide < 0} { + rlc exec -rreg sr.sstat sstat + set iswide [regget tst_sram::SSTAT(wide) $sstat] + } + return $iswide + } + # + # scmd_write: write a scmd list -------------------------------------------- + # + proc scmd_write {scmdlist} { + variable nscmd + set buf {} + set nscmd 0 + rlc exec -wreg sr.saddr 0 + + foreach scmditem $scmdlist { + set wait [lindex $scmditem 0] + set wec [lindex $scmditem 1] + set bec [lindex $scmditem 2] + set addr [lindex $scmditem 3] + set mval [lindex $scmditem 4] + set we [expr {($wec eq "w") ? 1 : 0}] + set scmd [regbld tst_sram::SCMD \ + [list wait $wait] \ + [list we $we] \ + [list be [bvi b $bec]] \ + [list addr $addr] ] + set scmdh [expr {($scmd>>16) & 0xffff}] + set scmdl [expr { $scmd & 0xffff}] + set mvalh [expr {($mval>>16) & 0xffff}] + set mvall [expr { $mval & 0xffff}] + lappend buf $scmdh $scmdl $mvalh $mvall + if {[llength $buf] == 256} { + rlc exec -wblk sr.sblk $buf + set buf {} + } + incr nscmd + } + if {[llength $buf] > 0} { + rlc exec -wblk sr.sblk $buf + } + return "" + } + + # + # scmd_read: read a scmd list --------------------------------------------- + # + proc scmd_read {length} { + set scmdlist {} + if {$length == 0} {return $scmdlist} + + rlc exec -rreg sr.saddr saddr_save \ + -wreg sr.saddr 0 + while {$length > 0} { + set chunk $length + if {$chunk > 64} {set chunk 64} + set length [expr {$length - $chunk}] + rlc exec -rblk sr.sblk [expr {4*$chunk}] buf + foreach {scmdh scmdl mvalh mvall} $buf { + set scmd [expr {($scmdh<<16) | $scmdl}] + set mval [expr {($mvalh<<16) | $mvall}] + set wait [regget tst_sram::SCMD(wait) $scmd] + set we [regget tst_sram::SCMD(we) $scmd] + set be [regget tst_sram::SCMD(be) $scmd] + set addr [regget tst_sram::SCMD(addr) $scmd] + set wec [expr {($we) ? "w" : "r"}] + set bec [pbvi b4 $be] + lappend scmdlist [list $wait $wec $bec $addr $mval] + } + } + rlc exec -wreg sr.saddr $saddr_save + return $scmdlist + } + + # + # scmd_print: print a scmd list ------------------------------------------- + # + proc scmd_print {scmdlist} { + set rval " ind: dly we be addr mval" + set ind 0 + foreach scmditem $scmdlist { + set wait [lindex $scmditem 0] + set wec [lindex $scmditem 1] + set bec [lindex $scmditem 2] + set addr [lindex $scmditem 3] + set mval [lindex $scmditem 4] + append rval "\n" + append rval [format "%4d: %2d %s %s 0x%6.6x 0x%8.8x" \ + $ind $wait $wec $bec $addr $mval] + incr ind + } + return $rval + } + + # + # srun: single pass run of sequencer --------------------------------------- + # + proc srun {mdih mdil maddrh maddrl {tout 0.}} { + variable nscmd + if {$tout == 0} {set tout $tst_sram::tout} + if {$nscmd == 0} {error "no or empty scmd list loaded"} + set sm [rutil::com16 [regbld tst_sram::SSTAT wide]] + rlc exec -init 0 1 + rlc exec -wreg sr.sstat [regbld tst_sram::SSTAT xord xora veri] \ + -wreg sr.mdih $mdih \ + -wreg sr.mdil $mdil \ + -wreg sr.maddrh $maddrh \ + -wreg sr.maddrl $maddrl \ + -wreg sr.slim [expr {$nscmd-1}] \ + -wreg sr.sstart 0x0000 + rlc wtlam $tout + rlc exec -attn -edata 0x0001 + rlc exec -rreg sr.sstat -edata [regbld tst_sram::SSTAT xord xora veri] $sm \ + -rreg sr.seaddr -edata 0x0000 \ + -rreg sr.sedath -edata 0x0000 \ + -rreg sr.sedatl -edata 0x0000 + return "" + } + # + # srun_lists: call srun for mdi and maddr lists ---------------------------- + # + proc srun_lists {lmdi lmaddr {tout 0.}} { + foreach {maddrh maddrl} $lmaddr { + foreach {mdih mdil} $lmdi { + srun $mdih $mdil $maddrh $maddrl $tout + } + } + return "" + } + # + # srun_loop: full maddr* loop of sequencer --------------------------------- + # + proc srun_loop {mdih mdil maddrh maddrl {wide 0} {tout 0.}} { + variable nscmd + if {$tout == 0} {set tout $tst_sram::tout} + if {$nscmd == 0} {error "no or empty scmd list loaded"} + set sm [rutil::com16 [regbld tst_sram::SSTAT wide]] + set sstat [regbldkv tst_sram::SSTAT wswap $wide wloop $wide loop 1 \ + xord 1 xora 1 veri 1] + rlc exec -init 0 1 + rlc exec -wreg sr.sstat $sstat \ + -wreg sr.mdih $mdih \ + -wreg sr.mdil $mdil \ + -wreg sr.maddrh $maddrh \ + -wreg sr.maddrl $maddrl \ + -wreg sr.slim [expr {$nscmd-1}] \ + -wreg sr.sstart 0x0000 + + set tbeg [clock milliseconds] + rlc wtlam $tout + set tend [clock milliseconds] + + rlc exec -attn -edata 0x0001 + rlc exec -rreg sr.sstat -edata $sstat $sm \ + -rreg sr.seaddr -edata 0x0000 \ + -rreg sr.sedath -edata 0x0000 \ + -rreg sr.sedatl -edata 0x0000 + + set trun [expr {($tend-$tbeg)/1000.}] + set line [format "loop done maddr=%2.2x %4.4x mdi=%4.4x %4.4x in %7.2f s" \ + $maddrh $maddrl $mdih $mdil $trun] + rlc log $line + return "" + } +} + Index: tst_sram =================================================================== --- tst_sram (nonexistent) +++ tst_sram (revision 38)
tst_sram Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rlink/util.tcl =================================================================== --- rlink/util.tcl (nonexistent) +++ rlink/util.tcl (revision 38) @@ -0,0 +1,131 @@ +# $Id: util.tcl 758 2016-04-02 18:01:39Z mueller $ +# +# Copyright 2011-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-04-02 758 2.1 add USR_ACCESS register support (RLUA0/RLUA1) +# 2014-12-21 617 2.0.1 add rbtout definition in STAT +# 2014-12-07 609 2.0 use new rlink v4 iface; remove SINIT again +# 2014-08-09 580 1.0.2 add run_rri +# 2011-08-06 403 1.0.1 add SINT and SINIT defs for serport init +# 2011-03-26 373 1.0 Initial version +# 2011-03-19 372 0.1 First draft +# + +package provide rlink 1.0 + +package require rutil 1.0 + +namespace eval rlink { + regdsc STAT {stat 7 4} {attn 3} {rbtout 2} {rbnak 1} {rberr 0} + variable STAT_DEFMASK [regbld rlink::STAT rbtout rbnak rberr] + + regdsc RLCNTL {anena 15} {atoena 14} {atoval 7 8} + regdsc RLSTAT {lcmd 15 8} {babo 7} {rbsize 2 3} + + # RLUSRACC describes the 32 bit value returned by the usracc property + # assuming that standart Xilinx TIMESTAMP format is used for USR_ACCESS + regdsc RLUSRACC {day 31 5} {mon 26 4} {yr 22 6} {hr 16 5} {min 11 6} {sec 5 6} + + # 'pseudo register', describes 3rd word in return list element for -rlist + regdsc FLAGS {vol 16} \ + {chkdata 13} {chkstat 12} \ + {errcrc 11} {errcmd 10} {errmiss 9} {errnak 8} \ + {resend 7} {recov 6} {pktend 5} {pktbeg 4} \ + {done 2} {send 1} {init 0} + + # define rlink core regs addresses (are system constants) + variable ADDR_RLCNTL 0xffff + variable ADDR_RLSTAT 0xfffe + variable ADDR_RLID1 0xfffd + variable ADDR_RLID0 0xfffc + # define rlink optinal regs addresses (are system constants too) + variable ADDR_RLUA1 0xfffb + variable ADDR_RLUA0 0xfffa + + # + # setup: currently noop, amap definitions done at cpp level + # + proc setup {} { + } + + # + # init: reset rlink: disable enables; clear attn register + # + proc init {} { + rlc exec \ + -wreg $rlink::ADDR_RLCNTL 0 \ + -attn + return "" + } + + # + # anena: enable/disable attn notify messages + # + proc anena {{ena 0}} { + rlc exec \ + -wreg $rlink::ADDR_RLCNTL [regbld rlink::RLCNTL [list anena $ena]] + } + + # + # isopen: returns 1 if open and 0 if close + # + proc isopen {} { + if {[rlc open] eq ""} { return 0 } + return 1 + } + + # + # isfifo: returns 1 if open and fifo, 0 otherwise + # + proc isfifo {} { + set name [rlc open] + if {$name ne "" && [regexp -- {^fifo:} $name]} { return 1 } + return 0 + } + + # + # issim: returns 1 if open and in simulation mode, 0 otherwise + # + proc issim {} { + if {![info exists rlink::sim_mode]} { return 0} + return $rlink::sim_mode + } + + # + # run_rri: execute rri type command file + # + proc run_rri {fname} { + rlc errcnt -clear + set code [exec ticonv_rri $fname] + eval $code + set errcnt [rlc errcnt] + if { $errcnt } { + puts [format "run_rri: FAIL after %d errors" $errcnt] + } + return $errcnt + } + + # + # format_usracc: format usracc timestamp + # + proc format_usracc {usracc} { + reggetkv rlink::RLUSRACC $usracc "ua_" + set ua_yr [expr {$ua_yr + 2000}] + set rval [format "%04d-%02d-%02d %02d:%02d:%02d" \ + $ua_yr $ua_mon $ua_day $ua_hr $ua_min $ua_sec] + return $rval + } + + +} Index: rlink/.cvsignore =================================================================== --- rlink/.cvsignore (nonexistent) +++ rlink/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rlink =================================================================== --- rlink (nonexistent) +++ rlink (revision 38)
rlink Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbtest/test_flow.tcl =================================================================== --- rbtest/test_flow.tcl (nonexistent) +++ rbtest/test_flow.tcl (revision 38) @@ -0,0 +1,70 @@ +# $Id: test_flow.tcl 777 2016-06-19 20:24:15Z mueller $ +# +# Copyright 2016- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-06-18 777 1.0 Initial version +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Test flow control + # + proc test_flow {{bufmax 512} {bufmin 4}} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_flow - init: clear cntl" + rlc exec -init te.cntl [regbld rbtest::INIT cntl] + # + #------------------------------------------------------------------------- + rlc log " test 1: create back pressure with wreg after a rblk" + set rbase 0x8000 + set wbase 0xc000 + set nw $bufmin + set nmax [expr {[rlc get bsizeprudent] / 2}]; # /2 because rblk and wblk ! + if {$bufmax < $nmax} {set nmax $bufmax} + while {$nw <= $nmax} { + rlc log [format " buffer size: %4d" $nw] + set rbuf {} + set wbuf {} + for {set i 0} {$i < $nw} {incr i} { + lappend rbuf [expr {$rbase + $i}] + lappend wbuf [expr {$wbase + $i}] + } + rlc exec \ + -wreg te.data $rbase \ + -rblk te.dinc $nw -edata $rbuf -edone $nw \ + -wreg te.data $wbase \ + -wblk te.dinc $wbuf \ + -rreg te.cntl -edata 0 + set nw [expr {2*$nw}] + incr rbase 0x0400 + incr wbase 0x0400 + } + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_flow - cleanup: clear cntl" + rlc exec -init te.cntl [regbld rbtest::INIT cntl] + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/test_all.tcl =================================================================== --- rbtest/test_all.tcl (nonexistent) +++ rbtest/test_all.tcl (revision 38) @@ -0,0 +1,39 @@ +# $Id: test_all.tcl 777 2016-06-19 20:24:15Z mueller $ +# +# Copyright 2011-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-06-18 777 1.2 add test_flow +# 2015-04-03 662 1.1 add test_labo +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First draft +# + +package provide rbtest 1.0 + +namespace eval rbtest { + # + # Driver for all rbtest tests + # + proc test_all {{statmsk 0x0} {attnmsk 0x0}} { + # + set errcnt 0 + incr errcnt [rbtest::test_data] + incr errcnt [rbtest::test_fifo] + incr errcnt [rbtest::test_labo] + incr errcnt [rbtest::test_stat $statmsk] + incr errcnt [rbtest::test_attn $attnmsk] + incr errcnt [rbtest::test_flow 256] + return $errcnt + } +} Index: rbtest/test_data.tcl =================================================================== --- rbtest/test_data.tcl (nonexistent) +++ rbtest/test_data.tcl (revision 38) @@ -0,0 +1,161 @@ +# $Id: test_data.tcl 777 2016-06-19 20:24:15Z mueller $ +# +# Copyright 2011-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-06-19 777 2.1.1 add dinc tests +# 2015-04-03 661 2.1 drop estatdef, use estattout +# 2014-12-21 617 2.0.1 use rbtout stat bit for timeout +# 2014-11-09 603 2.0 use rlink v4 address layout and iface +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First Draft +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Basic tests with cntl, stat, data and dinc registers. + # All tests depend only on rbd_tester logic alone and not on how the + # rbd_tester is embedded in the design (e.g. stat and attn connections) + # + proc test_data {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_data - init: clear cntl, data, and fifo" + # Note: fifo clear via init is tested later, used here 'speculatively' + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + #------------------------------------------------------------------------- + rlc log " test 1a: cntl, stat and data are write- and read-able" + foreach {addr valw valr} [list te.cntl 0xffff 0x83ff \ + te.cntl 0x0000 0x0000 \ + te.stat 0xffff 0x000f \ + te.stat 0x0000 0x0000 \ + te.data 0xffff 0xffff \ + te.data 0x0000 0x0000 ] { + rlc exec -wreg $addr $valw + rlc exec -rreg $addr -edata $valr + } + # + # + rlc log " test 1b: as test 1a, use clists, check cntl,stat,data distinct" + foreach {valc vals vald} [list 0x1 0x2 0x3 0x0 0x0 0x0] { + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.stat $vals \ + -wreg te.data $vald \ + -rreg te.cntl -edata $valc \ + -rreg te.stat -edata $vals \ + -rreg te.data -edata $vald + } + # + #------------------------------------------------------------------------- + rlc log " test 2: verify that large nbusy causes timeout" + rlc exec \ + -wreg te.data 0xdead \ + -rreg te.data -edata 0xdead \ + -wreg te.cntl [regbld rbtest::CNTL {nbusy 0x3ff}] \ + -wreg te.data 0xbeaf -estattout \ + -rreg te.data -estattout \ + -wreg te.cntl 0x0000 \ + -rreg te.data -edata 0xdead + # + # ------------------------------------------------------------------------- + rlc log " test 3a: verify that init 001 clears cntl,stat and not data" + set valc [regbld rbtest::CNTL {nbusy 1}] + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.stat 0x0002 \ + -wreg te.data 0x1234 \ + -init te.cntl [regbld rbtest::INIT cntl] \ + -rreg te.cntl -edata 0x0 \ + -rreg te.stat -edata 0x0 \ + -wreg te.data 0x1234 + rlc log " test 3b: verify that init 010 clears data and not cntl,stat" + set valc [regbld rbtest::CNTL {nbusy 2}] + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.stat 0x0003 \ + -wreg te.data 0x4321 \ + -init te.cntl [regbld rbtest::INIT data] \ + -rreg te.cntl -edata $valc \ + -rreg te.stat -edata 0x0003 \ + -wreg te.data 0x0 + rlc log " test 3c: verify that init 011 clears data and cntl,stat" + rlc exec \ + -wreg te.cntl [regbld rbtest::CNTL {nbusy 3}] \ + -wreg te.stat 0x0004 \ + -wreg te.data 0xabcd \ + -init te.cntl [regbld rbtest::INIT data cntl] \ + -rreg te.cntl -edata 0x0 \ + -rreg te.stat -edata 0x0 \ + -wreg te.data 0x0 + # + # ------------------------------------------------------------------------- + rlc log " test 4: test that te.ncyc returns # of cycles for te.data w&r" + foreach nbusy {0x03 0x07 0x0f 0x1f 0x00} { + set valc [regbld rbtest::CNTL [list nbusy $nbusy]] + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.data [expr {$nbusy | ( $nbusy << 8 ) }] \ + -rreg te.ncyc -edata [expr {$nbusy + 1 }] \ + -rreg te.data -edata [expr {$nbusy | ( $nbusy << 8 ) }] \ + -rreg te.ncyc -edata [expr {$nbusy + 1 }] + } + # + # ------------------------------------------------------------------------- + rlc log " test 5a: test dinc: post-increment on read" + rlc exec \ + -wreg te.data 0x1100 \ + -rreg te.dinc -edata 0x1100 \ + -rreg te.dinc -edata 0x1101 \ + -rreg te.dinc -edata 0x1102 \ + -rreg te.data -edata 0x1103 + # + # ------------------------------------------------------------------------- + rlc log " test 5b: test dinc: write-check and post-increment on write" + # clear wchk, do proper writes + rlc exec \ + -wreg te.cntl [regbld rbtest::CNTL {wchk 0} {nbusy 0}] \ + -wreg te.data 0x1200 \ + -wreg te.dinc 0x1200 \ + -wreg te.dinc 0x1201 \ + -wreg te.dinc 0x1202 \ + -rreg te.data -edata 0x1203 \ + -rreg te.cntl -edata [regbld rbtest::CNTL {wchk 0}] + # wchk still clear; bad write (ff03, expected 1203); check wchk; + # good write; check wchk (must stick); check that data write clears wchk + rlc exec \ + -wreg te.dinc 0xff03 \ + -rreg te.cntl -edata [regbld rbtest::CNTL {wchk 1}] \ + -wreg te.dinc 0x1204 \ + -rreg te.cntl -edata [regbld rbtest::CNTL {wchk 1}] \ + -rreg te.dinc -edata 0x1205 \ + -wreg te.data 0x1300 \ + -rreg te.cntl -edata [regbld rbtest::CNTL {wchk 0}] + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_data - cleanup: clear cntl and data" + rlc exec -init te.cntl [regbld rbtest::INIT data cntl] + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/test_fifo.tcl =================================================================== --- rbtest/test_fifo.tcl (nonexistent) +++ rbtest/test_fifo.tcl (revision 38) @@ -0,0 +1,132 @@ +# $Id: test_fifo.tcl 662 2015-04-05 08:02:54Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 2.1 drop estatdef; use estaterr +# 2014-11-09 603 2.0 use rlink v4 address layout and iface +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First draft +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Basic tests with cntl and fifo registers. + # + proc test_fifo {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_fifo - init: clear cntl, data, and fifo" + # Note: fifo clear via init is tested later, used here 'speculatively' + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + #------------------------------------------------------------------------- + rlc log " test 1: fifo write/read with wreg/rreg" + # single word + rlc exec \ + -wreg te.fifo 0x0000 \ + -rreg te.fifo -estat 0x00 + # three words + rlc exec \ + -wreg te.fifo 0xdead \ + -wreg te.fifo 0xbeaf \ + -wreg te.fifo 0x1234 \ + -rreg te.fifo -edata 0xdead \ + -rreg te.fifo -edata 0xbeaf \ + -rreg te.fifo -edata 0x1234 + # + #------------------------------------------------------------------------- + rlc log " test 2: fifo write/read with wblk/rblk and -edone" + # two words + set blk {0x1111 0x2222} + rlc exec \ + -wblk te.fifo $blk -edone [llength $blk] \ + -rblk te.fifo [llength $blk] -edata $blk -edone [llength $blk] + # six words + set blk {0x3333 0x4444 0x5555 0x6666 0x7777 0x8888} + rlc exec \ + -wblk te.fifo $blk -edone [llength $blk] \ + -rblk te.fifo [llength $blk] -edata $blk -edone [llength $blk] + # + #------------------------------------------------------------------------- + rlc log " test 3a: fifo read error (write 3, read 4) and -edone" + set blk {0xdead 0xbeaf 0x1234} + rlc exec \ + -wblk te.fifo $blk -edone [llength $blk] \ + -rblk te.fifo 4 -edata $blk -edone 3 -estaterr + # + # + rlc log " test 3b: fifo write error (write 17, read 16)" + set blk {} + for { set i 0 } { $i < 17 } { incr i } { + lappend blk [expr {$i | ( $i << 8 ) }] + } + rlc exec \ + -wblk te.fifo $blk -edone 16 -estaterr \ + -rblk te.fifo 16 -edata [lrange $blk 0 15] -edone 16 + # + #------------------------------------------------------------------------- + rlc log " test 4a: verify that init 100 clears fifo and not cntl&data" + # check fifo empty; write a value; clear fifo via init; check fifo empty + # check that cntl and data not affected + rlc exec \ + -wreg te.cntl [regbld rbtest::CNTL {nbusy 0x1}] \ + -wreg te.data 0x1234 \ + -rreg te.fifo -estaterr \ + -wreg te.fifo 0x4321 \ + -init te.cntl [regbld rbtest::INIT fifo] \ + -rreg te.fifo -estaterr \ + -rreg te.cntl -edata [regbld rbtest::CNTL {nbusy 0x1}] \ + -rreg te.data -edata 0x1234 + # + #------------------------------------------------------------------------- + rlc log " test 6: test that te.ncyc returns # of cycles for te.fifo w&r" + foreach nbusy {0x03 0x07 0x0f 0x1f 0x00} { + set valc [regbld rbtest::CNTL [list nbusy $nbusy]] + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.fifo [expr {$nbusy | ( $nbusy << 8 ) }] \ + -rreg te.ncyc -edata [expr {$nbusy + 1 }] \ + -rreg te.fifo -edata [expr {$nbusy | ( $nbusy << 8 ) }] \ + -rreg te.ncyc -edata [expr {$nbusy + 1 }] + } + # + #------------------------------------------------------------------------- + rlc log " test 7: verify escaping (all 256 byte codes transported)" + for {set i 0} {$i < 8} {incr i} { + set blk {} + for {set j 0} {$j < 16} {incr j} { + set bcode [expr {32 * $i + 2 * $j}] + lappend blk [expr {( $bcode << 8 ) | ( $bcode + 1 )}] + } + rlc exec \ + -wblk te.fifo $blk \ + -rblk te.fifo [llength $blk] -edata $blk + } + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_fifo - cleanup: clear cntl, data, and fifo" + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/test_attn.tcl =================================================================== --- rbtest/test_attn.tcl (nonexistent) +++ rbtest/test_attn.tcl (revision 38) @@ -0,0 +1,86 @@ +# $Id: test_attn.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 2.1 drop estatdef (stat err check default now) +# 2014-11-09 603 2.0 use rlink v4 address layout and iface +# 2011-03-27 374 1.0 Initial version +# 2011-03-20 372 0.1 First Draft +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Test with stat connectivity of the cntl register. + # + proc test_attn {{attnmsk 0x0}} { + # quit if nothing to do... + if {$attnmsk == 0} {return 0} + # + set apats {} + for {set i 0} {$i < 16} {incr i} { + set apat [expr {1 << $i}] + if {[expr {$apat & $attnmsk}]} {lappend apats $apat} + } + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_attn - init: clear regs and attn flags" + rlc exec -init te.cntl [regbld rbtest::INIT cntl data fifo] + rlc exec -attn + + # + #------------------------------------------------------------------------- + rlc log " test 1: verify connection of attn bits" + foreach apat $apats { + rlc exec \ + -wreg te.attn $apat \ + -rreg te.cntl -estat [regbld rlink::STAT attn] \ + -attn -edata $apat \ + -rreg te.cntl -estat 0x0 + } + + # + #------------------------------------------------------------------------- + rlc log " test 2: verify that attn flags accumulate" + foreach apat $apats { + rlc exec -wreg te.attn $apat + } + rlc exec -attn -edata $attnmsk + + # + #------------------------------------------------------------------------- + #rlc log " test 3: verify that comma is send" + #set apat [lindex $apats 0] + #rlc exec -init 0xff [regbld rlink::INIT anena] -estat $esdval $esdmsk + #rlc exec -wreg te.attn $apat -estat $esdval $esdmsk + #rlc wtlam 1. + #rlc exec -attn -edata $apat -estat $esdval $esdmsk + + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_attn - cleanup: clear regs and attn flags" + rlc exec -init te.cntl [regbld rbtest::INIT cntl data fifo] + rlc exec -attn + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/test_labo.tcl =================================================================== --- rbtest/test_labo.tcl (nonexistent) +++ rbtest/test_labo.tcl (revision 38) @@ -0,0 +1,175 @@ +# $Id: test_labo.tcl 662 2015-04-05 08:02:54Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 662 1.0 Initial version +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Test labo with fifo + # + proc test_labo {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_labo - init: clear cntl, data, and fifo" + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + #------------------------------------------------------------------------- + rlc log " test 1: check that sucessfull blk's do not abort chain" + + # use data reg to monitor labo aborts + rlc exec \ + -wreg te.data 0x0000 + + set blk0 {0x1111 0x2222} + set blk1 {0x3333 0x4444} + set blk {0x1111 0x2222 0x3333 0x4444} + rlc exec \ + -wblk te.fifo $blk0 \ + -labo -edata 0 \ + -wblk te.fifo $blk1 \ + -labo -edata 0 \ + -rblk te.fifo 4 -edata $blk \ + -labo -edata 0 \ + -wreg te.data 0x0001 + + # no labo above, so 0x01 written to data ! + rlc exec \ + -rreg te.data -edata 0x0001 + + # + #------------------------------------------------------------------------- + rlc log " test 2: check that failed rblk aborts chain" + + rlc exec \ + -wblk te.fifo $blk0 \ + -labo -edata 0 \ + -wblk te.fifo $blk1 \ + -labo -edata 0 \ + -wreg te.data 0x0010 \ + -rblk te.fifo 6 -edata $blk -edone 4 -estaterr \ + -labo -edata 1 \ + -wreg te.data 0x0011 \ + -rreg te.data -edata 0xffff \ + -wreg te.data 0x0012 + + # last labo aborted, so 0x10 written, but not 0x11 or 0x12 + rlc exec \ + -rreg te.data -edata 0x0010 + + # + #------------------------------------------------------------------------- + rlc log " test 3: check that failed wblk aborts chain" + + set blk {} + for { set i 0 } { $i < 17 } { incr i } { + lappend blk [expr {$i | ( $i << 8 ) }] + } + rlc exec \ + -wreg te.data 0x0020 \ + -wblk te.fifo $blk -edone 16 -estaterr \ + -labo -edata 1 \ + -wreg te.data 0x0021 \ + -rreg te.data -edata 0xffff \ + -wreg te.data 0x0022 + + # last labo aborted, so 0x20 written, but not 0x21 + rlc exec \ + -rreg te.data -edata 0x0020 + + # + #------------------------------------------------------------------------- + rlc log " test 4a: check that babo state kept over clists" + + rlc exec \ + -wreg te.data 0x0030 \ + -labo -edata 1 \ + -wreg te.data 0x0031 + + # no blk done, so labo state sicks, so 0x30 written, but not 0x31 + rlc exec \ + -rreg te.data -edata 0x0030 + + # + #------------------------------------------------------------------------- + rlc log " test 4b: check that babo readable from RLSTAT" + + # babo still set + set babomsk [regbld rlink::RLSTAT babo] + rlc exec \ + -rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk + + # + #------------------------------------------------------------------------- + rlc log " test 4c: check that babo reset by successful rblk" + + rlc exec \ + -wreg te.data 0x0040 \ + -rblk te.fifo 8 -edata [lrange $blk 0 7] \ + -rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk \ + -rblk te.fifo 8 -edata [lrange $blk 8 15] \ + -rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk \ + -rblk te.fifo 8 -edone 0 -estaterr \ + -rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk \ + -labo -edata 1 \ + -wreg te.data 0x0041 + + # last rblk failed again so 0x40 written, but not 0x41 + rlc exec \ + -rreg te.data -edata 0x0040 + + # + #------------------------------------------------------------------------- + rlc log " test 4d: check that babo reset by successful wblk" + + set blk2 {0x5555 0x6666} + rlc exec \ + -wblk te.fifo $blk2 \ + -rreg $rlink::ADDR_RLSTAT -edata 0x0 $babomsk + + # + #------------------------------------------------------------------------- + rlc log " test 5: check commands between blk and labo are accepted" + + # there are two words in fifo from previous test + rlc exec \ + -wreg te.data 0x0050 \ + -rblk te.fifo 4 -edata $blk2 -edone 2 -estaterr \ + -rreg $rlink::ADDR_RLSTAT -edata $babomsk $babomsk \ + -wreg te.data 0x0051 \ + -labo -edata 1 \ + -wreg te.data 0x0052 + + # last rblk failed so 0x50 written, also 0x51, but not 0x52 + rlc exec \ + -rreg te.data -edata 0x0051 + + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_fifo - cleanup: clear cntl, data, and fifo" + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/util.tcl =================================================================== --- rbtest/util.tcl (nonexistent) +++ rbtest/util.tcl (revision 38) @@ -0,0 +1,171 @@ +# $Id: util.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-12-21 617 2.0.1 use rbtout stat bit for timeout +# 2014-11-09 603 2.0 use rlink v4 address layout and iface with 8 regs +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 Frist draft +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # setup register descriptions for rbd_tester + # + regdsc CNTL {wchk 15} {nbusy 9 10} + regdsc INIT {fifo 2} {data 1} {cntl 0} + # + # setup: amap definitions for rbd_tester + # + proc setup {{base 0xffe0}} { + rlc amap -insert te.cntl [expr {$base + 0x00}] + rlc amap -insert te.stat [expr {$base + 0x01}] + rlc amap -insert te.attn [expr {$base + 0x02}] + rlc amap -insert te.ncyc [expr {$base + 0x03}] + rlc amap -insert te.data [expr {$base + 0x04}] + rlc amap -insert te.dinc [expr {$base + 0x05}] + rlc amap -insert te.fifo [expr {$base + 0x06}] + rlc amap -insert te.lnak [expr {$base + 0x07}] + } + # + # init: reset rbd_tester (clear via init) + # + proc init {} { + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + } + # + # nbusymax: returns maximal nbusy value not causing timeout + # set te.cntl nbusy to max + # do read to te.data (will fail, check stat) + # get cycle count from te.ncyc --> this minus one is nbusymax + # restore te.cntl + + proc nbusymax {} { + set esdmsk [regbld rlink::STAT rbtout rbnak rberr] + rlc exec \ + -rreg te.cntl sav_cntl \ + -wreg te.cntl [regbld rbtest::CNTL {nbusy -1}] \ + -rreg te.data -estat [regbld rlink::STAT rbtout] $esdmsk \ + -rreg te.ncyc ncyc + rlc exec \ + -wreg te.cntl $sav_cntl + return [expr {$ncyc - 1}] + } + # + # probe: determine rbd_tester environment (max nbusy, stat and attn wiring) + # + proc probe {} { + set esdmsktout [regbld rlink::STAT rbnak rberr] + set rbusy {} + set rstat {} + set rattn {} + # + # probe max nbusy for write and read + # + set wrerr {} + set rderr {} + for {set i 3} { $i < 8 } {incr i} { + set nbusy0 [expr {( 1 << $i )}] + for {set j -1} { $j <= 1 } {incr j} { + set nbusy [expr {$nbusy0 + $j}] + set valc [regbld rbtest::CNTL [list nbusy $nbusy]] + rlc exec \ + -wreg te.cntl $valc \ + -wreg te.data 0x0000 statwr -estat 0x0 $esdmsktout \ + -rreg te.data dummy statrd -estat 0x0 $esdmsktout + if {[llength $wrerr] == 0 && [regget rlink::STAT(rbnak) $statwr] != 0} { + lappend wrerr $i $j $nbusy + } + if {[llength $rderr] == 0 && [regget rlink::STAT(rbnak) $statrd] != 0} { + lappend rderr $i $j $nbusy + } + } + } + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + lappend rbusy $wrerr $rderr + # + # probe stat wiring + # + for {set i 0} { $i < 4 } {incr i} { + rlc exec \ + -wreg te.stat [expr {1 << $i}] \ + -rreg te.data dummy statrd + lappend rstat [list $i [regget rlink::STAT(stat) $statrd]] + } + rlc exec -init te.cntl [regbld rbtest::INIT fifo data cntl] + # + # probe attn wiring + # + rlc exec -attn + for {set i 0} { $i < 16 } {incr i} { + rlc exec \ + -wreg te.attn [expr {1 << $i}] \ + -attn attnpat + lappend rattn [list $i $attnpat] + } + rlc exec -attn + # + return [list $rbusy $rstat $rattn] + } + # + # probe_print: print probe results + # + proc probe_print {{plist {}}} { + set rval {} + + if {[llength $plist] == 0} { + set plist [probe] + } + + set rbusy [lindex $plist 0] + set rstat [lindex $plist 1] + set rattn [lindex $plist 2] + # + append rval \ + "nbusy: write max [lindex $rbusy 0 2] --> WIDTH=[lindex $rbusy 0 0]" + append rval \ + "\nnbusy: read max [lindex $rbusy 1 2] --> WIDTH=[lindex $rbusy 1 0]" + # + for {set i 0} { $i < 4 } {incr i} { + set rcvpat [lindex $rstat $i 1] + set rcvind [print_bitind $rcvpat] + append rval [format "\nstat: te.stat line %2d --> design %2d %s" \ + $i $rcvind [pbvi b4 $rcvpat]] + } + # + for {set i 0} { $i < 16 } {incr i} { + set rcvpat [lindex $rattn $i 1] + set rcvind [print_bitind $rcvpat] + append rval [format "\nattn: te.attn line %2d --> design %2d %s" \ + $i $rcvind [pbvi b16 $rcvpat]] + } + return $rval + } + + # + # print_bitind: helper for probe_print: + # + proc print_bitind {pat} { + for {set i 0} { $i < 16 } {incr i} { + if {[expr {$pat & [expr {1 << $i}] }] } { return $i} + } + return -1 + } +} Index: rbtest/test_stat.tcl =================================================================== --- rbtest/test_stat.tcl (nonexistent) +++ rbtest/test_stat.tcl (revision 38) @@ -0,0 +1,61 @@ +# $Id: test_stat.tcl 603 2014-11-09 22:50:26Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-11-09 603 2.0 use rlink v4 address layout and iface +# 2011-03-27 374 1.0 Initial version +# 2011-03-20 372 0.1 First Draft +# + +package provide rbtest 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbtest { + # + # Test with stat connectivity of the stat register. + # + proc test_stat {{statmsk 0x0}} { + # quit if nothing to do... + if {$statmsk == 0} {return 0} + + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbtest::test_stat - init: clear cntl" + rlc exec -init te.cntl [regbld rbtest::INIT cntl] + # + #------------------------------------------------------------------------- + rlc log " test 1: verify connection of cntl stat bits to stat return" + for {set i 0} {$i < 4} {incr i} { + set spat [expr {1 << $i}] + if {[expr {$spat & $statmsk}]} { + rlc exec \ + -wreg te.stat $spat \ + -rreg te.stat -edata $spat \ + -estat [regbld rlink::STAT [list stat $spat]] + } + } + # + #------------------------------------------------------------------------- + rlc log "rbtest::test_stat - cleanup: clear cntl" + rlc exec -init te.cntl [regbld rbtest::INIT cntl] + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbtest/.cvsignore =================================================================== --- rbtest/.cvsignore (nonexistent) +++ rbtest/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbtest =================================================================== --- rbtest (nonexistent) +++ rbtest (revision 38)
rbtest Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_dl11/.cvsignore =================================================================== --- ibd_dl11/.cvsignore (nonexistent) +++ ibd_dl11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_dl11/util.tcl =================================================================== --- ibd_dl11/util.tcl (nonexistent) +++ ibd_dl11/util.tcl (revision 38) @@ -0,0 +1,38 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0 Initial version +# + +package provide ibd_dl11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_dl11 { + # + # setup register descriptions for ibd_dl11 --------------------------------- + # + + regdsc RCSR {done 7} {ie 6} + regdsc RRCSR {done 7} {ie 6} {rlim 14 3} + + regdsc XCSR {done 7} {ie 6} {maint 2} + + rw11util::regmap_add ibd_dl11 tt?.rcsr {l? RCSR r? RRCSR} + rw11util::regmap_add ibd_dl11 tt?.xcsr {?? XCSR} + +} Index: ibd_dl11 =================================================================== --- ibd_dl11 (nonexistent) +++ ibd_dl11 (revision 38)
ibd_dl11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_ibmon/util.tcl =================================================================== --- ibd_ibmon/util.tcl (nonexistent) +++ ibd_ibmon/util.tcl (revision 38) @@ -0,0 +1,299 @@ +# $Id: util.tcl 722 2015-12-30 19:45:46Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-28 721 1.0.2 add regmap_add defs; add symbolic register dump +# 2015-07-25 704 1.0.1 start: use args and args2opts +# 2015-04-25 668 1.0 Initial version +# + +package provide ibd_ibmon 1.0 + +package require rutil +package require rlink +package require rw11util + +namespace eval ibd_ibmon { + # + # setup register descriptions for ibd_ibmon + # + regdsc CNTL {conena 5} {remena 4} {locena 3} {wena 2} {stop 1} {start 0} + regdsc STAT {bsize 15 3} {wrap 0} + regdsc ADDR {laddr 15 14} {waddr 1 2} + # + regdsc DAT3 {burst 15} {tout 14} {nak 13} {ack 12} \ + {busy 11} {we 9} {rmw 8} {ndlymsb 7 8} + regdsc DAT2 {ndlylsb 15 6} {nbusy 9 10} + regdsc DAT0 {be1 15} {be0 14} {racc 13} {addr 12 12} {cacc 0} + # + # 'pseudo register', describes 1st word in return list element of read proc + # all flag bits from DAT3 and DAT0 + regdsc FLAGS {burst 11} {tout 10} {nak 9} {ack 8} \ + {busy 7} {cacc 5} {racc 4} {rmw 3} {be1 2} {be0 1} {we 0} + # + rw11util::regmap_add ibd_ibmon im.cntl {r? CNTL} + rw11util::regmap_add ibd_ibmon im.stat {r? STAT} + rw11util::regmap_add ibd_ibmon im.addr {r? ADDR} + # + # setup: amap definitions for ibd_ibmon + # + proc setup {{cpu "cpu0"} {base 0160000}} { + $cpu imap -insert im.cntl [expr {$base + 000}] + $cpu imap -insert im.stat [expr {$base + 002}] + $cpu imap -insert im.hilim [expr {$base + 004}] + $cpu imap -insert im.lolim [expr {$base + 006}] + $cpu imap -insert im.addr [expr {$base + 010}] + $cpu imap -insert im.data [expr {$base + 012}] + } + # + # init: reset ibd_ibmon (stop, reset alim) + # + proc init {{cpu "cpu0"}} { + $cpu cp \ + -wibr im.cntl [regbld ibd_ibmon::CNTL stop] \ + -wibr im.hilim 0177776 \ + -wibr im.lolim 0160000 \ + -wibr im.addr 0x0000 + } + # + # start: start the ibmon + # + proc start {{cpu "cpu0"} args} { + args2opts opts { conena 1 remena 1 locena 1 wena 1 } {*}$args + $cpu cp -wibr im.cntl [regbld ibd_ibmon::CNTL start \ + [list wena $opts(wena)] \ + [list locena $opts(locena)] \ + [list remena $opts(remena)] \ + [list conena $opts(conena)] \ + ] + } + # + # stop: stop the ibmon + # + proc stop {{cpu "cpu0"}} { + $cpu cp -wibr im.cntl [regbld ibd_ibmon::CNTL stop] + } + # + # read: read nent last entries (by default all) + # + proc read {{cpu "cpu0"} {nent -1}} { + $cpu cp -ribr im.addr raddr \ + -ribr im.stat rstat + + set bsize [regget ibd_ibmon::STAT(bsize) $rstat] + set amax [expr {( 512 << $bsize ) - 1}] + if {$nent == -1} { set nent $amax } + + set laddr [regget ibd_ibmon::ADDR(laddr) $raddr] + set nval $laddr + if {[regget ibd_ibmon::STAT(wrap) $rstat]} { set nval $amax } + + if {$nent > $nval} {set nent $nval} + if {$nent == 0} { return {} } + + set caddr [expr {( $laddr - $nent ) & $amax}] + $cpu cp -wibr im.addr [regbld ibd_ibmon::ADDR [list laddr $caddr]] + + set rval {} + + set nrest $nent + while {$nrest > 0} { + set nblk [expr {$nrest << 2}] + if {$nblk > 256} {set nblk 256} + set iaddr [$cpu imap im.data] + $cpu cp -rbibr $iaddr $nblk rawdat + + foreach {d0 d1 d2 d3} $rawdat { + set d3burst [regget ibd_ibmon::DAT3(burst) $d3] + set d3tout [regget ibd_ibmon::DAT3(tout) $d3] + set d3nak [regget ibd_ibmon::DAT3(nak) $d3] + set d3ack [regget ibd_ibmon::DAT3(ack) $d3] + set d3busy [regget ibd_ibmon::DAT3(busy) $d3] + set d3we [regget ibd_ibmon::DAT3(we) $d3] + set d3rmw [regget ibd_ibmon::DAT3(rmw) $d3] + set d0be1 [regget ibd_ibmon::DAT0(be1) $d0] + set d0be0 [regget ibd_ibmon::DAT0(be0) $d0] + set d0racc [regget ibd_ibmon::DAT0(racc) $d0] + set d0addr [regget ibd_ibmon::DAT0(addr) $d0] + set d0cacc [regget ibd_ibmon::DAT0(cacc) $d0] + + set eflag [regbld ibd_ibmon::FLAGS \ + [list burst $d3burst] \ + [list tout $d3tout] \ + [list nak $d3nak] \ + [list ack $d3ack] \ + [list busy $d3busy] \ + [list cacc $d0cacc] \ + [list racc $d0racc] \ + [list rmw $d3rmw] \ + [list be1 $d0be1] \ + [list be0 $d0be0] \ + [list we $d3we] \ + ] + + set edelay [expr {( [regget ibd_ibmon::DAT3(ndlymsb) $d3] << 6 ) | + [regget ibd_ibmon::DAT2(ndlylsb) $d2] }] + set enbusy [regget ibd_ibmon::DAT2(nbusy) $d2] + set edata $d1 + set eaddr [expr {0160000 | ($d0addr<<1)}] + lappend rval [list $eflag $eaddr $edata $edelay $enbusy] + } + + set nrest [expr {$nrest - ( $nblk >> 2 ) }] + } + + $cpu cp -wibr im.addr $raddr + + return $rval + } + # + # print: print ibmon data (optionally also read them) + # + proc print {{cpu "cpu0"} {mondat -1}} { + + if {[llength $mondat] == 1} { + set ele [lindex $mondat 0] + if {[llength $ele] == 1} { + set nent [lindex $ele 0] + set mondat [read $cpu $nent] + } + } + + set rval {} + set edlymax 16383 + + set eind [expr {1 - [llength $mondat] }] + append rval \ + " ind addr data delay nbsy btnab-crm10w acc-mod" + + set mtout [regbld ibd_ibmon::FLAGS tout ] + set mnak [regbld ibd_ibmon::FLAGS nak ] + set mack [regbld ibd_ibmon::FLAGS ack ] + set mbusy [regbld ibd_ibmon::FLAGS busy ] + set mcacc [regbld ibd_ibmon::FLAGS cacc ] + set mracc [regbld ibd_ibmon::FLAGS racc ] + set mrmw [regbld ibd_ibmon::FLAGS rmw ] + set mbe1 [regbld ibd_ibmon::FLAGS be1 ] + set mbe0 [regbld ibd_ibmon::FLAGS be0 ] + set mwe [regbld ibd_ibmon::FLAGS we ] + + foreach {ele} $mondat { + foreach {eflag eaddr edata edly enbusy} $ele { break } + + set ftout [expr {$eflag & $mtout} ] + set fnak [expr {$eflag & $mnak} ] + set fack [expr {$eflag & $mack} ] + set fbusy [expr {$eflag & $mbusy} ] + set fcacc [expr {$eflag & $mcacc} ] + set fracc [expr {$eflag & $mracc} ] + set frmw [expr {$eflag & $mrmw} ] + set fbe1 [expr {$eflag & $mbe1} ] + set fbe0 [expr {$eflag & $mbe0} ] + set fwe [expr {$eflag & $mwe} ] + + set prw "r" + set pmod " " + set pwe1 " " + set pwe0 " " + + if {$fwe } { + set prw "w" + set pwe1 "0" + set pwe0 "0" + if {$fbe1} { set pwe1 "1"} + if {$fbe0} { set pwe0 "1"} + } + if {$frmw} { set pmod "m"} + + set prmw "$pmod$prw$pwe1$pwe0" + set pacc "loc" + if {$fcacc} { set pacc "con"} + if {$fracc} { set pacc "rem"} + + set pedly [expr {$edly!=$edlymax ? [format "%5d" $edly] : " --"}] + + set ename [format "%6.6o" $eaddr] + set etext "" + if {[$cpu imap -testaddr $eaddr]} { + set ename [$cpu imap -name $eaddr] + set eam "l${prw}" + if {$fracc} { set eam "r${prw}"} + set etext [rw11util::regmap_txt $ename $eam $edata] + } + + set comment "" + if {$fnak} {append comment " NAK=1!"} + if {$ftout} {append comment " TOUT=1!"} + + append rval [format \ + "\n%5d %-10s %6.6o %5s %4d %s %s %s" \ + $eind $ename $edata $pedly $enbusy [pbvi b12 $eflag] \ + $prmw $pacc] + if {$etext ne ""} {append rval " $etext"} + if {$comment ne ""} {append rval " $comment"} + incr eind + } + + return $rval + } + + # + # raw_edata: prepare edata lists for raw data reads in tests + # args is list of {eflag eaddr edata enbusy} sublists + + proc raw_edata {edat emsk args} { + upvar $edat uedat + upvar $emsk uemsk + set uedat {} + set uemsk {} + + set m3 [rutil::com16 [regbld ibd_ibmon::DAT3 {ndlymsb -1}]]; # all but ndly + set m2 [rutil::com16 [regbld ibd_ibmon::DAT2 {ndlylsb -1}]]; # all but ndly + set m1 0xffff + set m0 0xffff + + foreach line $args { + foreach {eflags eaddr edata enbusy} $line { break } + set d3 [regbld ibd_ibmon::DAT3 [list flags $eflags]] + set d2 [regbld ibd_ibmon::DAT2 [list nbusy $enbusy]] + if {$edata ne ""} { + set m1 0xffff + set d1 $edata + } else { + set m1 0x0000 + set d1 0x0000 + } + set d0 $eaddr + + lappend uedat $d0 $d1 $d2 $d3 + lappend uemsk $m0 $m1 $m2 $m3 + } + + return "" + } + + # + # raw_check: check raw data against expect values prepared by raw_edata + # + proc raw_check {{cpu "cpu0"} edat emsk} { + + $cpu cp \ + -ribr im.addr -edata [llength $edat] \ + -wibr im.addr 0 \ + -rbibr im.data [llength $edat] -edata $edat $emsk \ + -ribr im.addr -edata [llength $edat] + return "" + } + +} Index: ibd_ibmon/.cvsignore =================================================================== --- ibd_ibmon/.cvsignore (nonexistent) +++ ibd_ibmon/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_ibmon =================================================================== --- ibd_ibmon (nonexistent) +++ ibd_ibmon (revision 38)
ibd_ibmon Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_pc11/.cvsignore =================================================================== --- ibd_pc11/.cvsignore (nonexistent) +++ ibd_pc11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_pc11/util.tcl =================================================================== --- ibd_pc11/util.tcl (nonexistent) +++ ibd_pc11/util.tcl (revision 38) @@ -0,0 +1,38 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0 Initial version +# + +package provide ibd_pc11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_pc11 { + # + # setup register descriptions for ibd_pc11 --------------------------------- + # + + regdsc RCSR {err 15} {busy 11} {done 7} {ie 6} {enb 0} + + regdsc PCSR {err 15} {done 7} {ie 6} + + rw11util::regmap_add ibd_pc11 pc?.rcsr {?? RCSR} + rw11util::regmap_add ibd_pc11 pc?.xcsr {?? PCSR} + + variable ANUM 10 +} Index: ibd_pc11 =================================================================== --- ibd_pc11 (nonexistent) +++ ibd_pc11 (revision 38)
ibd_pc11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbemon/test_regs.tcl =================================================================== --- rbemon/test_regs.tcl (nonexistent) +++ rbemon/test_regs.tcl (revision 38) @@ -0,0 +1,94 @@ +# $Id: test_regs.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 1.1 drop estatdef, use estaterr; fix test 4 +# 2011-12-18 440 1.0.1 increase npoll in "CNTL.clr->0" test +# 2011-04-02 375 1.0 Initial version +# + +package provide rbemon 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbemon { + # + # Basic tests with rbd_eyemon registers + # + proc test_regs {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbemon::test_regs - start" + # + #------------------------------------------------------------------------- + rlc log " test 1a: write/read cntl" + # ensure that last value 0x0 -> go=0 + foreach val [list [regbld rbemon::CNTL ena01] [regbld rbemon::CNTL ena10] \ + [regbld rbemon::CNTL go] 0x0 ] { + rlc exec \ + -wreg em.cntl $val \ + -rreg em.cntl -edata $val + } + # + #------------------------------------------------------------------------- + rlc log " test 1b: write/read rdiv" + foreach val [list [regbld rbemon::RDIV {rdiv -1}] 0x0 ] { + rlc exec \ + -wreg em.rdiv $val \ + -rreg em.rdiv -edata $val + } + # + #------------------------------------------------------------------------- + rlc log " test 1c: write/read addr" + set amax [regget rbemon::ADDR(addr) -1] + foreach addr [list 0x1 $amax 0x0] { + rlc exec \ + -wreg em.addr $addr \ + -rreg em.addr -edata $addr + } + # + #------------------------------------------------------------------------- + rlc log " test 2: verify addr increments on data reads" + foreach addr [list 0x0 0x011 [expr {$amax - 1}]] { + rlc exec \ + -wreg em.addr $addr \ + -rreg em.data \ + -rreg em.addr -edata [expr {( $addr + 1 ) & $amax}] \ + -rreg em.data \ + -rreg em.addr -edata [expr {( $addr + 2 ) & $amax}] + } + # + #------------------------------------------------------------------------- + rlc log " test 3: verify rberr on DATA write and DATE read if in go state" + rlc exec \ + -wreg em.data 0x0000 -estaterr \ + -wreg em.cntl [regbld rbemon::CNTL go] \ + -rreg em.data -estaterr + # + #------------------------------------------------------------------------- + rlc log " test 4: verify that CNTL.clr returns to 0" + set npoll 64; # wait 64 rbus cycles, than test + rlc exec \ + -wreg em.cntl [regbld rbemon::CNTL clr] \ + -rblk em.cntl $npoll \ + -rreg em.cntl -edata 0x0 + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbemon/util.tcl =================================================================== --- rbemon/util.tcl (nonexistent) +++ rbemon/util.tcl (revision 38) @@ -0,0 +1,126 @@ +# $Id: util.tcl 643 2015-02-07 17:41:53Z mueller $ +# +# Copyright 2011-2013 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-02-07 642 1.1 add print() +# 2011-04-17 376 1.0.1 add proc read +# 2011-04-02 375 1.0 Initial version +# + +package provide rbemon 1.0 + +package require rutil +package require rlink + +namespace eval rbemon { + # + # setup register descriptions for rbd_eyemon + # + regdsc CNTL {ena01 3} {ena10 2} {clr 1} {go 0} + regdsc RDIV {rdiv 7 8} + regdsc ADDR {addr 9 10 "-"} {laddr 9 8} {waddr 0} + # + # setup: amap definitions for rbd_eyemon + # + proc setup {{base 0xffd0}} { + rlc amap -insert em.cntl [expr {$base + 0x00}] + rlc amap -insert em.rdiv [expr {$base + 0x01}] + rlc amap -insert em.addr [expr {$base + 0x02}] + rlc amap -insert em.data [expr {$base + 0x03}] + } + # + # init: reset rbd_eyemon (stop monitor, clear rdiv and addr) + # + proc init {} { + rlc exec \ + -wreg em.cntl 0x0000 \ + -wreg em.rdiv 0x0000 + } + # + # clear: clear eyemon data + # + proc clear {} { + set clrbit [regbld rbemon::CNTL clr] + rlc exec -rreg em.cntl cur_cntl + rlc exec -wreg em.cntl [expr {$cur_cntl | $clrbit}] + set clrrun $clrbit + set npoll 0 + while {$clrrun != 0} { + rlc exec -rreg em.cntl cur_cntl + set clrrun [expr {$cur_cntl & $clrbit}] + incr npoll 1 + if {$npoll > 10} { + error "-E: rbemon::clear failed, CNTL.clr didn't go back to 0" + } + } + return "" + } + # + # start: start the eyemon + # + proc start {{ena01 0} {ena10 0}} { + if {$ena01 == 0 && $ena10 == 0} { + set ena01 1 + set ena10 1 + } + rlc exec -wreg em.cntl [regbld rbemon::CNTL go \ + [list ena01 $ena01] [list ena10 $ena10] ] + } + # + # stop: stop the eyemon + # + proc stop {} { + rlc exec -wreg em.cntl 0x0000 + } + # + # read: read eyemon data + # + proc read {{nval 512}} { + set addr 0 + set rval {} + while {$nval > 0} { + set nblk [expr {$nval << 1}] + if {$nblk > 256} {set nblk 256} + rlc exec \ + -wreg em.addr $addr \ + -rblk em.data $nblk rawdat + foreach {dl dh} $rawdat { + lappend rval [expr {( $dh << 16 ) | $dl}] + } + incr addr $nblk + set nval [expr {$nval - ( $nblk >> 1 ) }] + } + return $rval + } + # + # print: pretty print eyemon data + # + proc print {{nval 512}} { + set edat [read $nval] + set emax 0 + foreach {dat} $edat { + if {$dat > $emax} {set emax $dat} + } + set lemax [expr {$emax > 0 ? log($emax) : 1.}] + set rval " ind data" + set i 0 + foreach {dat} $edat { + append rval [format "\n%4d : %9d :" $i $dat] + set nh [expr {$dat > 0 ? 60. * log($dat) / $lemax : 0 }] + for {set j 1} {$j < $nh} {incr j} { append rval "=" } + incr i + } + return $rval + } +} Index: rbemon/test_rbtest_sim.tcl =================================================================== --- rbemon/test_rbtest_sim.tcl (nonexistent) +++ rbemon/test_rbtest_sim.tcl (revision 38) @@ -0,0 +1,101 @@ +# $Id: test_rbtest_sim.tcl 516 2013-05-05 21:24:52Z mueller $ +# +# Copyright 2011-2013 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2011-04-17 376 1.0 Initial version +# + +package provide rbemon 1.0 + +package require rbtest + +namespace eval rbemon { + # + # some simple tests against rbd_tester registers in sim mode + # + proc test_rbtest_sim {} { + set esdval 0x00 + set esdmsk [regbld rlink::STAT {stat -1}] + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbemon::test_rbtest_sim - start" + # + #------------------------------------------------------------------------- + rlc log " test 1: write to te.data, verify that transitions seen" + set bsize 25 + # + rlc exec -wreg em.rdiv 0 -estat $esdval $esdmsk + rlc log " - data - 01 10 va00 va01 va02 va03 va04 va05 va06 va07 va08 va09" + # + # Note: avoid chars which will be escpaped, like 10000000, for this test + # + foreach {pat ena01 ena10 exp} \ + [list [bvi b 00000000] 1 1 [list 0 0 0 0 0 0 0 0 1 0]\ + [bvi b 00000001] 1 1 [list 1 1 0 0 0 0 0 0 1 0]\ + [bvi b 00000010] 1 1 [list 0 1 1 0 0 0 0 0 1 0]\ + [bvi b 00000100] 1 1 [list 0 0 1 1 0 0 0 0 1 0]\ + [bvi b 00001000] 1 1 [list 0 0 0 1 1 0 0 0 1 0]\ + [bvi b 00010000] 1 1 [list 0 0 0 0 1 1 0 0 1 0]\ + [bvi b 00100000] 1 1 [list 0 0 0 0 0 1 1 0 1 0]\ + [bvi b 01000000] 1 1 [list 0 0 0 0 0 0 1 1 1 0]\ + [bvi b 11111111] 1 1 [list 1 0 0 0 0 0 0 0 0 0]\ + [bvi b 11111110] 1 1 [list 0 1 0 0 0 0 0 0 0 0]\ + [bvi b 01010101] 1 1 [list 1 1 1 1 1 1 1 1 1 0]\ + [bvi b 00110011] 1 1 [list 1 0 1 0 1 0 1 0 1 0]\ + [bvi b 00000001] 0 1 [list 0 1 0 0 0 0 0 0 0 0]\ + [bvi b 00000001] 1 0 [list 1 0 0 0 0 0 0 0 1 0]\ + [bvi b 01010101] 0 1 [list 0 1 0 1 0 1 0 1 0 0]\ + [bvi b 01010101] 1 0 [list 1 0 1 0 1 0 1 0 1 0]\ + ] { + set bdata {} + for {set i 0} {$i < $bsize} {incr i} { + lappend bdata [expr {( $pat << 8 ) | $pat}] + } + + rbemon::clear + rbemon::start $ena01 $ena10 + rlc exec -wblk te.data $bdata -estat $esdval $esdmsk + rbemon::stop + + set edata [rbemon::read 10] + + set oline " " + set pafa "OK" + append oline [pbvi b8 $pat] + append oline [format " %d %d" $ena01 $ena10] + for {set i 0} {$i < 10} {incr i} { + set ebin [lindex $edata $i] + set eexp [lindex $exp $i] + append oline [format " %3d" $ebin] + if {($eexp != 0 && $ebin < 2 * $bsize) || + ($eexp == 0 && $ebin >= 2 * $bsize)} { + append oline "#" + set pafa "FAIL" + incr errcnt + } else { + append oline "!" + } + } + append oline " " + append oline $pafa + rlc log $oline + } + # + #------------------------------------------------------------------------- + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbemon/.cvsignore =================================================================== --- rbemon/.cvsignore (nonexistent) +++ rbemon/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbemon =================================================================== --- rbemon (nonexistent) +++ rbemon (revision 38)
rbemon Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbmoni/test_regs.tcl =================================================================== --- rbmoni/test_regs.tcl (nonexistent) +++ rbmoni/test_regs.tcl (revision 38) @@ -0,0 +1,96 @@ +# $Id: test_regs.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 2.1 drop estatdef (stat err check default now) +# 2014-12-27 622 2.0 rbd_rbmon reorganized, supports now 16 bit addresses +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First Draft +# + +package provide rbmoni 1.0 + +package require rutiltpp +package require rutil +package require rlink + +namespace eval rbmoni { + # + # Basic tests with rbtester registers + # + proc test_regs {} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbmoni::test_regs - start" + # + #------------------------------------------------------------------------- + rlc log " test 1: write/read cntl" + rlc exec \ + -wreg rm.cntl [regbld rbmoni::CNTL start] \ + -rreg rm.cntl -edata [regbld rbmoni::CNTL start] \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -rreg rm.cntl -edata 0 \ + -wreg rm.cntl [regbld rbmoni::CNTL start wena] \ + -rreg rm.cntl -edata [regbld rbmoni::CNTL start wena] \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -rreg rm.cntl -edata 0 + # + #------------------------------------------------------------------------- + rlc log " test 2: read stat" + rlc exec \ + -rreg rm.stat rstat + set bsize [regget rbmoni::STAT(bsize) $rstat] + set amax [expr {( 512 << $bsize ) - 1}] + # + #------------------------------------------------------------------------- + rlc log " test 3: write/read hilim/lolim" + foreach {lolim hilim} {0xffff 0x0000 \ + 0x0000 0xfffb} { + rlc exec \ + -wreg rm.lolim $lolim -wreg rm.hilim $hilim \ + -rreg rm.lolim -edata $lolim -rreg rm.hilim -edata $hilim + } + # + #------------------------------------------------------------------------- + rlc log " test 4: write/read addr" + foreach {laddr waddr} [list 0x0000 0 0x0000 3 $amax 0 $amax 3] { + set addr [regbld rbmoni::ADDR [list laddr $laddr] [list waddr $waddr]] + rlc exec \ + -wreg rm.addr $addr \ + -rreg rm.addr -edata $addr + } + # + #------------------------------------------------------------------------- + rlc log " test 5: verify that cntl.go 0->1 clear addr" + rlc exec \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -rreg rm.cntl -edata 0x0 \ + -wreg rm.addr [regbld rbmoni::ADDR [list laddr $amax]] \ + -rreg rm.addr -edata [regbld rbmoni::ADDR [list laddr $amax]] \ + -wreg rm.cntl [regbld rbmoni::CNTL start] \ + -rreg rm.cntl -edata [regbld rbmoni::CNTL start] \ + -rreg rm.addr -edata 0x00 \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -rreg rm.cntl -edata 0x0 + # + #------------------------------------------------------------------------- + rlc log "rbmoni::test_regs - cleanup" + rbmoni::init + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbmoni/test_rbtest.tcl =================================================================== --- rbmoni/test_rbtest.tcl (nonexistent) +++ rbmoni/test_rbtest.tcl (revision 38) @@ -0,0 +1,342 @@ +# $Id: test_rbtest.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 2.1 drop estatdef; fix test 5 (wrong regs accessed) +# 2014-12-22 619 2.0 adopt to new rbd_rbmon and rlink v4 +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First Draft +# + +package provide rbmoni 1.0 + +package require rutiltpp +package require rutil +package require rlink +package require rbtest + +namespace eval rbmoni { + # + # Basic tests with rbtester registers + # + proc test_rbtest {{print 0}} { + # + set errcnt 0 + rlc errcnt -clear + # + rlc log "rbmoni::test_rbtest - init" + rbmoni::init + rbtest::init + # + set atecntl [rlc amap te.cntl] + set atestat [rlc amap te.stat] + set ateattn [rlc amap te.attn] + set atencyc [rlc amap te.ncyc] + set atedata [rlc amap te.data] + set atedinc [rlc amap te.dinc] + set atefifo [rlc amap te.fifo] + set atelnak [rlc amap te.lnak] + + # + #------------------------------------------------------------------------- + rlc log " test 1: exercise monitor data access via data/addr regs" + + set vtestat 0xf + set vtedata 0x1234 + + # write/read te.stat and te.data with rbmoni on; check that 4 lines aquired + rlc exec \ + -wreg rm.cntl [regbld rbmoni::CNTL start] \ + -wreg te.stat $vtestat \ + -wreg te.data $vtedata \ + -rreg te.stat -edata $vtestat \ + -rreg te.data -edata $vtedata \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -rreg rm.addr -edata [regbld rbmoni::ADDR {laddr 4}] + + if {$print} {puts [print]} + rlc exec -wreg te.stat 0x0; # clear stat to simplify later stat tests + + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atestat $vtestat 0] \ + [list [regbld rbmoni::FLAGS ack we] $atedata $vtedata 0] \ + [list [regbld rbmoni::FLAGS ack] $atestat $vtestat 0] \ + [list [regbld rbmoni::FLAGS ack] $atedata $vtedata 0] + + # + #------------------------------------------------------------------------- + rlc log " test 1a: read all in one rblk" + rlc exec \ + -wreg rm.addr 0x0000 \ + -rblk rm.data 16 -edata $edat $emsk \ + -rreg rm.addr -edata 16 + + # + #------------------------------------------------------------------------- + rlc log " test 1b: random address with rreg" + foreach addr {0x1 0x3 0x5 0x7 0x6 0x4 0x2 0x0 \ + 0x9 0xb 0xd 0xf 0xe 0xc 0xa 0x8} { + rlc exec \ + -wreg rm.addr $addr \ + -rreg rm.data -edata [lindex $edat $addr] [lindex $emsk $addr] \ + -rreg rm.addr -edata [expr {$addr + 1}] + } + + # + #------------------------------------------------------------------------- + rlc log " test 1c: random address with rblk length 2" + foreach addr {0x1 0x3 0x5 0x7 0x6 0x4 0x2 0x0 \ + 0x9 0xb 0xd 0xe 0xc 0xa 0x8} { + rlc exec \ + -wreg rm.addr $addr \ + -rblk rm.data 2 -edata [lrange $edat $addr [expr {$addr + 1}] ] \ + [lrange $emsk $addr [expr {$addr + 1}] ] \ + -rreg rm.addr -edata [expr {$addr + 2}] + } + + # + #------------------------------------------------------------------------- + rlc log " test 2a: test rreg,wreg capture (ncyc=0); ack, we flags" + set vtedata 0x4321 + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atedata $vtedata 0] \ + [list [regbld rbmoni::FLAGS ack ] $atedata $vtedata 0] + # + rbmoni::start + rlc exec \ + -wreg te.data $vtedata \ + -rreg te.data -edata $vtedata + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2b: test rreg,wreg capture (ncyc=1,4); busy flag and nbusy" + set nbusy_1 [regbld rbtest::CNTL {nbusy 1}] + set nbusy_4 [regbld rbtest::CNTL {nbusy 4}] + set vtedata 0xbeaf + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $nbusy_1 0] \ + [list [regbld rbmoni::FLAGS ack busy we] $atedata $vtedata 1] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $nbusy_4 0] \ + [list [regbld rbmoni::FLAGS ack busy ] $atedata $vtedata 4] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl 0 0] + # + rbmoni::start + rlc exec \ + -wreg te.cntl $nbusy_1 \ + -wreg te.data $vtedata \ + -wreg te.cntl $nbusy_4 \ + -rreg te.data -edata $vtedata \ + -wreg te.cntl 0 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2c: test rreg,wreg capture (timeout); busy,tout flag" + set vtecntl [regbld rbtest::CNTL {nbusy -1}] + set vtedata 0xdead + set nmax [rbtest::nbusymax] + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $vtecntl 0] \ + [list [regbld rbmoni::FLAGS ack busy tout we] $atedata $vtedata $nmax] \ + [list [regbld rbmoni::FLAGS ack busy tout ] $atedata 0x5555 $nmax] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl 0 0] + # + rbmoni::start + rlc exec \ + -wreg te.cntl $vtecntl \ + -wreg te.data $vtedata -estat [regbld rlink::STAT rbtout] \ + -rreg te.data -edata 0x5555 -estat [regbld rlink::STAT rbtout] \ + -wreg te.cntl 0 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2d: test rreg,wreg capture (prompt nak); nak flag" + set vtelnak 0xdead + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS nak we] $atelnak $vtelnak 0] \ + [list [regbld rbmoni::FLAGS nak ] $atelnak {} 0] + # + rbmoni::start + rlc exec \ + -wreg te.lnak $vtelnak -estat [regbld rlink::STAT rbnak] \ + -rreg te.lnak -estat [regbld rlink::STAT rbnak] + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2e: test rreg,wreg capture (delayed nak); nak flag" + set vtecntl [regbld rbtest::CNTL {nbusy 7}] + set vtelnak 0xdead + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $vtecntl 0] \ + [list [regbld rbmoni::FLAGS ack busy nak we] $atelnak $vtelnak 7] \ + [list [regbld rbmoni::FLAGS ack busy nak ] $atelnak {} 7] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl 0 0] + # + rbmoni::start + rlc exec \ + -wreg te.cntl $vtecntl \ + -wreg te.lnak $vtelnak -estat [regbld rlink::STAT rbnak] \ + -rreg te.lnak -estat [regbld rlink::STAT rbnak] \ + -wreg te.cntl 0 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2f: test rreg,wreg capture (prompt rbus err); err flag" + set vtefifo 0x1357 + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atefifo $vtefifo 0] \ + [list [regbld rbmoni::FLAGS ack ] $atefifo $vtefifo 0] \ + [list [regbld rbmoni::FLAGS ack err ] $atefifo {} 0] + # + rbmoni::start + rlc exec \ + -wreg te.fifo $vtefifo \ + -rreg te.fifo -edata $vtefifo \ + -rreg te.fifo -estat [regbld rlink::STAT rberr] + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 2g: test rreg,wreg capture (delayed rbus err); err flag" + set vtecntl [regbld rbtest::CNTL {nbusy 5}] + set vtefifo 0x1357 + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $vtecntl 0] \ + [list [regbld rbmoni::FLAGS ack busy we] $atefifo $vtefifo 5] \ + [list [regbld rbmoni::FLAGS ack busy ] $atefifo $vtefifo 5] \ + [list [regbld rbmoni::FLAGS ack busy err ] $atefifo {} 5] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl 0 0] + # + rbmoni::start + rlc exec \ + -wreg te.cntl $vtecntl \ + -wreg te.fifo $vtefifo \ + -rreg te.fifo -edata $vtefifo \ + -rreg te.fifo -estaterr \ + -wreg te.cntl 0x0 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 3: test init capture; init flag" + set vtecntl [regbld rbtest::CNTL {nbusy 2}] + set vteinit [regbld rbtest::INIT cntl] + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack we ] $atecntl $vtecntl 0] \ + [list [regbld rbmoni::FLAGS nak init ] $atecntl $vteinit 0] \ + [list [regbld rbmoni::FLAGS ack ] $atecntl 0 0] + # + rbmoni::start + rlc exec \ + -wreg te.cntl $vtecntl \ + -init te.cntl $vteinit \ + -rreg te.cntl -edata 0 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 4: test rblk,wblk capture (ncyc=2 on read)" + set vteinit [regbld rbtest::INIT cntl] + set nbusy_2 [regbld rbtest::CNTL {nbusy 2}] + set vtefifo {0xdead 0xbeaf 0x4711} + # build expect list: list of {eflag eaddr edata enbusy} sublists + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS nak init] $atecntl $vteinit 0] \ + [list [regbld rbmoni::FLAGS ack we] $atefifo 0xdead 0] \ + [list [regbld rbmoni::FLAGS burst ack we] $atefifo 0xbeaf 0] \ + [list [regbld rbmoni::FLAGS burst ack we] $atefifo 0x4711 0] \ + [list [regbld rbmoni::FLAGS ack we] $atecntl $nbusy_2 0] \ + [list [regbld rbmoni::FLAGS ack busy ] $atefifo 0xdead 2] \ + [list [regbld rbmoni::FLAGS burst ack busy ] $atefifo 0xbeaf 2] \ + [list [regbld rbmoni::FLAGS burst ack busy ] $atefifo 0x4711 2] \ + [list [regbld rbmoni::FLAGS nak init] $atecntl $vteinit 0] + # + rbmoni::start + rlc exec \ + -init te.cntl $vteinit \ + -wblk te.fifo $vtefifo \ + -wreg te.cntl $nbusy_2 \ + -rblk te.fifo [llength $vtefifo] -edata $vtefifo \ + -init te.cntl $vteinit + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + + # + #------------------------------------------------------------------------- + rlc log " test 5: test lolim,hilim" + # set window to te.ncyc to te.dinc, thus exclude cntl,stat,attn,fifo,lnak + rlc exec -wreg rm.lolim $atencyc \ + -wreg rm.hilim $atedinc + + # now access all regs (except attn,lnak), but only ncyc,data,dinc recorded + raw_edata edat emsk \ + [list [regbld rbmoni::FLAGS ack ] $atencyc 0x0001 0] \ + [list [regbld rbmoni::FLAGS ack we] $atedata 0x2345 0] \ + [list [regbld rbmoni::FLAGS ack ] $atedinc 0x2345 0] \ + [list [regbld rbmoni::FLAGS ack ] $atedata 0x2346 0] + # + rbmoni::start + rlc exec -rreg te.cntl \ + -rreg te.stat \ + -rreg te.ncyc \ + -wreg te.data 0x2345 \ + -wreg te.fifo 0xbeaf \ + -rreg te.dinc -edata 0x2345 \ + -rreg te.fifo -edata 0xbeaf \ + -rreg te.data -edata 0x2346 + rbmoni::stop + if {$print} {puts [print]} + raw_check $edat $emsk + rbmoni::init + + # + #------------------------------------------------------------------------- + rlc log "rbmoni::test_rbtest - cleanup:" + rbtest::init + rbmoni::init + # + incr errcnt [rlc errcnt -clear] + return $errcnt + } +} Index: rbmoni/util.tcl =================================================================== --- rbmoni/util.tcl (nonexistent) +++ rbmoni/util.tcl (revision 38) @@ -0,0 +1,259 @@ +# $Id: util.tcl 661 2015-04-03 18:28:41Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-04-03 661 3.1 drop estatdef; invert mask in raw_edata +# 2014-12-23 619 3.0 rbd_rbmon reorganized, supports now 16 bit addresses +# 2014-11-09 603 2.0 use rlink v4 address layout +# 2011-03-27 374 1.0 Initial version +# 2011-03-13 369 0.1 First draft +# + +package provide rbmoni 1.0 + +package require rutil +package require rlink + +namespace eval rbmoni { + # + # setup register descriptions for rbd_rbmon + # + regdsc CNTL {wena 2} {stop 1} {start 0} + regdsc STAT {bsize 15 3} {wrap 0} + regdsc ADDR {laddr 15 14} {waddr 1 2} + # + regdsc DAT3 {flags 15 8 "-"} {burst 15} {tout 14} {nak 13} {ack 12} \ + {busy 11} {err 10} {we 9} {init 8} {ndlymsb 7 8} + regdsc DAT2 {ndlylsb 15 6} {nbusy 9 10} + # + # 'pseudo register', describes 1st word in return list element of rbmoni::read + # same bits as DAT3(flags) (but shifted positions) plus bnext + regdsc FLAGS {bnext 8} {burst 7} {tout 6} {nak 5} {ack 4} \ + {busy 3} {err 2} {we 1} {init 0} + # + # setup: amap definitions for rbd_rbmon + # + proc setup {{base 0xffe8}} { + rlc amap -insert rm.cntl [expr {$base + 0x00}] + rlc amap -insert rm.stat [expr {$base + 0x01}] + rlc amap -insert rm.hilim [expr {$base + 0x02}] + rlc amap -insert rm.lolim [expr {$base + 0x03}] + rlc amap -insert rm.addr [expr {$base + 0x04}] + rlc amap -insert rm.data [expr {$base + 0x05}] + } + # + # init: reset rbd_rbmon (stop, reset alim) + # + proc init {} { + rlc exec \ + -wreg rm.cntl [regbld rbmoni::CNTL stop] \ + -wreg rm.hilim 0xfffb \ + -wreg rm.lolim 0x0000 \ + -wreg rm.addr 0x0000 + } + # + # start: start the rbmon + # + proc start {{wena 0}} { + rlc exec -wreg rm.cntl [regbld rbmoni::CNTL start [list wena $wena]] + } + # + # stop: stop the rbmon + # + proc stop {} { + rlc exec -wreg rm.cntl [regbld rbmoni::CNTL stop] + } + # + # read: read nent last entries (by default all) + # + proc read {{nent -1}} { + rlc exec -rreg rm.addr raddr \ + -rreg rm.stat rstat + + set bsize [regget rbmoni::STAT(bsize) $rstat] + set amax [expr {( 512 << $bsize ) - 1}] + if {$nent == -1} { set nent $amax } + + set laddr [regget rbmoni::ADDR(laddr) $raddr] + set nval $laddr + if {[regget rbmoni::STAT(wrap) $rstat]} { set nval $amax } + + if {$nent > $nval} {set nent $nval} + if {$nent == 0} { return {} } + + set caddr [expr {( $laddr - $nent ) & $amax}] + rlc exec -wreg rm.addr [regbld rbmoni::ADDR [list laddr $caddr]] + + set rval {} + + set nrest $nent + while {$nrest > 0} { + set nblk [expr {$nrest << 2}] + if {$nblk > 256} {set nblk 256} + rlc exec -rblk rm.data $nblk rawdat + + foreach {d0 d1 d2 d3} $rawdat { + set eflag [regget rbmoni::DAT3(flags) $d3] + set edelay [expr {( [regget rbmoni::DAT3(ndlymsb) $d3] << 6 ) | + [regget rbmoni::DAT2(ndlylsb) $d2] }] + set enbusy [regget rbmoni::DAT2(nbusy) $d2] + set edata $d1 + set eaddr $d0 + lappend rval [list $eflag $eaddr $edata $edelay $enbusy] + } + + set nrest [expr {$nrest - ( $nblk >> 2 ) }] + } + + rlc exec -wreg rm.addr $raddr + + set mbnext [regbld rbmoni::FLAGS bnext] + set mburst [regbld rbmoni::FLAGS burst] + + # now set bnext flag when burst is set in following entry + for {set i 1} {$i < $nent} {incr i} { + if {[lindex $rval $i 0] & int($mburst)} { + set i1 [expr {$i - 1} ] + lset rval $i1 0 [expr {[lindex $rval $i1 0] | $mbnext}] + } + } + + return $rval + } + # + # print: print rbmon data (optionally also read them) + # + proc print {{mondat -1}} { + + if {[llength $mondat] == 1} { + set ele [lindex $mondat 0] + if {[llength $ele] == 1} { + set nent [lindex $ele 0] + set mondat [read $nent] + } + } + + set rval {} + set edlymax 16383 + + set eind [expr {1 - [llength $mondat] }] + append rval \ + " ind addr data delay nbsy flags bu to na ac bs er mode" + + set mbnext [regbld rbmoni::FLAGS bnext] + set mburst [regbld rbmoni::FLAGS burst] + set mtout [regbld rbmoni::FLAGS tout ] + set mnak [regbld rbmoni::FLAGS nak ] + set mack [regbld rbmoni::FLAGS ack ] + set mbusy [regbld rbmoni::FLAGS busy ] + set merr [regbld rbmoni::FLAGS err ] + set mwe [regbld rbmoni::FLAGS we ] + set minit [regbld rbmoni::FLAGS init ] + set mblk [expr {$mbnext | $mburst}] + + foreach {ele} $mondat { + foreach {eflag eaddr edata edly enbusy} $ele { break } + + set fburst [expr {$eflag & $mburst}] + set ftout [expr {$eflag & $mtout} ] + set fnak [expr {$eflag & $mnak} ] + set fack [expr {$eflag & $mack} ] + set fbusy [expr {$eflag & $mbusy} ] + set ferr [expr {$eflag & $merr} ] + set fwe [expr {$eflag & $mwe} ] + set finit [expr {$eflag & $minit} ] + + set pburst [expr {$fburst ? "bu" : " "}] + set ptout [expr {$ftout ? "to" : " "}] + set pnak [expr {$fnak ? "na" : " "}] + set pack [expr {$fack ? "ac" : " "}] + set pbusy [expr {$fbusy ? "bs" : " "}] + set perr [expr {$ferr ? "er" : " "}] + set pmode "????" + if {$finit} { + set pmode "init" + } else { + if {$fwe} { + set pmode [expr {$eflag & $mblk ? "wblk" : "wreg"}] + } else { + set pmode [expr {$eflag & $mblk ? "rblk" : "rreg"}] + } + } + + set pedly [expr {$edly!=$edlymax ? [format "%5d" $edly] : " --"}] + set ename [format "%4.4x" $eaddr] + set comment "" + if {$ferr} {append comment " ERR=1!"} + if {!$finit && $fnak} {append comment " NAK=1!"} + if {$ftout} {append comment " TOUT=1!"} + if {[rlc amap -testaddr $eaddr]} {set ename [rlc amap -name $eaddr]} + append rval [format \ + "\n%5d %-10s %4.4x %5s %4d %s %s %s %s %s %s %s %s %s" \ + $eind $ename $edata $pedly $enbusy [pbvi b8 $eflag] \ + $pburst $ptout $pnak $pack $pbusy $perr $pmode $comment] + incr eind + } + + return $rval + } + + # + # raw_edata: prepare edata lists for raw data reads in tests + # args is list of {eflag eaddr edata enbusy} sublists + + proc raw_edata {edat emsk args} { + upvar $edat uedat + upvar $emsk uemsk + set uedat {} + set uemsk {} + + set m3 [rutil::com16 [regbld rbmoni::DAT3 {ndlymsb -1}]]; # all but ndlymsb + set m2 [rutil::com16 [regbld rbmoni::DAT2 {ndlylsb -1}]]; # all but ndlylsb + set m1 0xffff + set m0 0xffff + + foreach line $args { + foreach {eflags eaddr edata enbusy} $line { break } + set d3 [regbld rbmoni::DAT3 [list flags $eflags]] + set d2 [regbld rbmoni::DAT2 [list nbusy $enbusy]] + if {$edata ne ""} { + set m1 0xffff + set d1 $edata + } else { + set m1 0x0000 + set d1 0x0000 + } + set d0 $eaddr + + lappend uedat $d0 $d1 $d2 $d3 + lappend uemsk $m0 $m1 $m2 $m3 + } + + return "" + } + + # + # raw_check: check raw data against expect values prepared by raw_edata + # + proc raw_check {edat emsk} { + + rlc exec \ + -rreg rm.addr -edata [llength $edat] \ + -wreg rm.addr 0 \ + -rblk rm.data [llength $edat] -edata $edat $emsk \ + -rreg rm.addr -edata [llength $edat] + return "" + } + +} Index: rbmoni/.cvsignore =================================================================== --- rbmoni/.cvsignore (nonexistent) +++ rbmoni/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbmoni =================================================================== --- rbmoni (nonexistent) +++ rbmoni (revision 38)
rbmoni Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rw11util/regmap.tcl =================================================================== --- rw11util/regmap.tcl (nonexistent) +++ rw11util/regmap.tcl (revision 38) @@ -0,0 +1,97 @@ +# $Id: regmap.tcl 720 2015-12-28 14:52:45Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-28 720 1.0 Initial version +# 2015-12-26 719 0.1 First draft +# + +package provide rw11util 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11util { + + variable regmap + array set regmap {} + variable regmap_loaded 0 + + # + # regmap_add: add a register definition + # + proc regmap_add {pack name amlist} { + variable regmap + if {[info exists regmap($name)]} { + error "E-regmap_add: register '$name' already defined" + } + + set regmap($name) [list $pack $amlist] + return "" + } + + # + # regmap_get: get a register definition + # + proc regmap_get {name am} { + variable regmap + variable regmap_loaded + + if {!$regmap_loaded} {regmap_load} + + foreach key [array names regmap] { + if {[string match $key $name]} { + set dsc $regmap($key) + set pack [lindex $dsc 0] + set amlist [lindex $dsc 1] + foreach {amp reg} $amlist { + if {[string match $amp $am]} { + package require $pack + return "${pack}::${reg}" + } + } + } + } + return "" + } + + # + # regmap_txt: get text representation of a register + # + proc regmap_txt {name am val} { + set rdsc [regmap_get $name $am] + if {$rdsc eq ""} return "" + return [regtxt $rdsc $val] + } + + # + # regmap_load: load all rw11 register definitions + # + proc regmap_load {} { + variable regmap_loaded + package require rw11 + package require ibd_dl11 + package require ibd_ibmon + package require ibd_lp11 + package require ibd_pc11 + package require ibd_rhrp + package require ibd_rk11 + package require ibd_rl11 + package require ibd_tm11 + set regmap_loaded 1 + return "" + } + + +} Index: rw11util/.cvsignore =================================================================== --- rw11util/.cvsignore (nonexistent) +++ rw11util/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rw11util =================================================================== --- rw11util (nonexistent) +++ rw11util (revision 38)
rw11util Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_rhrp/util.tcl =================================================================== --- ibd_rhrp/util.tcl (nonexistent) +++ ibd_rhrp/util.tcl (revision 38) @@ -0,0 +1,207 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0.2 add regmap_add defs +# 2015-06-06 690 1.0.1 rdump: all online units now shown by default +# 2015-03-21 659 1.0 Initial version +# + +package provide ibd_rhrp 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_rhrp { + + # + # setup register descriptions for ibd_rhrp --------------------------------- + # + regdsc CS1 {sc 15} {tre 14} {dva 11} {bae 9 2} {rdy 7} {ie 6} \ + {func 5 5 "s:NOOP:UNL:SEEK:RECAL:DCLR:PORE:OFFS:RETC:PRES:PACK:FU12:FU13:SEAR:FU15:FU16:FU17:FU20:FU21:FU22:FU23:WCD:WCHD:FU26:FU27:WRITE:WHD:FU32:FU33:READ:RHD:FU36:FU37"} \ + {go 0} + variable FUNC_NOOP [bvi b5 "00000"] + variable FUNC_UNL [bvi b5 "00001"] + variable FUNC_SEEK [bvi b5 "00010"] + variable FUNC_RECAL [bvi b5 "00011"] + variable FUNC_DCLR [bvi b5 "00100"] + variable FUNC_PORE [bvi b5 "00101"] + variable FUNC_OFFS [bvi b5 "00110"] + variable FUNC_RETC [bvi b5 "00111"] + variable FUNC_PRES [bvi b5 "01000"] + variable FUNC_PACK [bvi b5 "01001"] + variable FUNC_SEAR [bvi b5 "01100"] + variable FUNC_WCD [bvi b5 "10100"] + variable FUNC_WCHD [bvi b5 "10101"] + variable FUNC_WRITE [bvi b5 "11000"] + variable FUNC_WHD [bvi b5 "11001"] + variable FUNC_READ [bvi b5 "11100"] + variable FUNC_RHD [bvi b5 "11101"] + + regdsc RCS1 {val 15 8} \ + {func 5 5 "s:FU00:WUNIT:CUNIT:DONE:WIDLY:FU05:FU06:FU07:FU10:FU11:FU12:FU13:FU14:FU15:FU16:FU17:FU20:FU21:FU22:FU23:FU24:FU25:FU26:FU27:FU30:FU31:FU32:FU33:FU34:FU35:FU36:FU37"} \ + {go 0} + variable RFUNC_WUNIT [bvi b5 "00001"] + variable RFUNC_CUNIT [bvi b5 "00010"] + variable RFUNC_DONE [bvi b5 "00011"] + variable RFUNC_WIDLY [bvi b5 "00100"] + + regdsc DA {ta 12 5 d} {sa 5 6 d} + regdsc CS2 {wce 14} {ned 12} {nem 11} {pge 10} {or 7} {ir 6} \ + {clr 5} {pat 4} {bai 3} {unit 2 3 d} + regdsc DS {ata 15} {erp 14} {pip 13} {mol 12} {wrl 11} {lbt 10} {dpr 8} \ + {dry 7} {vv 6} {om 0} + regdsc ER1 {uns 14} {iae 10} {aoe 9} {rmr 2} {ilf 0} + regdsc AS {u3 3} {u2 2} {u1 1} {u0 0} + regdsc LA {sc 11 6 d} + regdsc OF {fmt 12} {eci 11} {hci 10} {odi 7} {off 6 7} + + variable DTE_RP04 [bvi b3 "000"] + variable DTE_RP06 [bvi b3 "001"] + variable DTE_RM04 [bvi b3 "100"] + variable DTE_RM80 [bvi b3 "101"] + variable DTE_RM05 [bvi b3 "110"] + variable DTE_RP07 [bvi b3 "111"] + + variable DT_RP04 020020 + variable DT_RP06 020022 + variable DT_RM04 020024 + variable DT_RM80 020026 + variable DT_RM05 020027 + variable DT_RP07 020042 + + regdsc SN {d3 15 4 d} {d2 11 4 d} {d1 7 4 d} {d0 3 4 d} + regdsc DC {dc 9 10 d} + + regdsc CS3 {ie 6} + + rw11util::regmap_add ibd_rhrp rp?.cs1 {l? CS1 rr CS1 rw RCS1} + rw11util::regmap_add ibd_rhrp rp?.da {?? DA} + rw11util::regmap_add ibd_rhrp rp?.cs2 {?? CS2} + rw11util::regmap_add ibd_rhrp rp?.ds {?? DS} + rw11util::regmap_add ibd_rhrp rp?.er1 {?? ER1} + rw11util::regmap_add ibd_rhrp rp?.as {?? AS} + rw11util::regmap_add ibd_rhrp rp?.la {?? LA} + rw11util::regmap_add ibd_rhrp rp?.of {?? OF} + rw11util::regmap_add ibd_rhrp rp?.sn {?? SN} + rw11util::regmap_add ibd_rhrp rp?.dc {?? DC} + rw11util::regmap_add ibd_rhrp rp?.cs3 {?? CS3} + + variable ANUM 6 + + # + # setup: create controller with default attributes ------------------------- + # + proc setup {{cpu "cpu0"}} { + return [rw11::setup_cntl $cpu "rhrp" "rpa"] + } + + # + # rcs1_wunit: value for rem CS1 WUNIT function ----------------------------- + # + proc rcs1_wunit {unit} { + return [regbld ibd_rhrp::RCS1 [list val $unit] \ + [list func $ibd_rhrp::RFUNC_WUNIT] ] + } + + # + # cs1_func: value for loc CS1 function start ------------------------------- + # + proc cs1_func {func {ie 0} {bae 0}} { + return [regbld ibd_rhrp::CS1 [list bae $bae] [list ie $ie] \ + [list func $func] {go 1}] + } + + # + # rdump: register dump - rem view ------------------------------------------ + # + proc rdump {{cpu "cpu0"} {unit -1}} { + set rval {} + $cpu cp -ribr "rpa.cs1" cs1 \ + -ribr "rpa.wc" wc \ + -ribr "rpa.ba" ba \ + -ribr "rpa.cs2" cs2 \ + -ribr "rpa.bae" bae \ + -ribr "rpa.cs3" cs3 + + if {$wc} { + set fwc [format "%d" [expr {64 * 1024 - $wc}]] + } else { + set fwc "(0)" + } + + append rval "Controller registers:" + append rval [format "\n cs1: %6.6o %s" $cs1 [regtxt ibd_rhrp::CS1 $cs1]] + append rval [format "\n cs2: %6.6o %s" $cs2 [regtxt ibd_rhrp::CS2 $cs2]] + append rval [format "\n cs3: %6.6o %s" $cs3 [regtxt ibd_rhrp::CS3 $cs3]] + append rval [format "\n wc: %6.6o nw=%s" $wc $fwc] + append rval [format "\n ba: %6.6o" $ba] + append rval [format "\n bae: %6.6o ea=%8.8o" $bae [expr {($bae<<16)|$ba}] ] + + $cpu cp -wibr "rpa.cs1" [rcs1_wunit 0] \ + -ribr "rpa.ds" ds0 \ + -wibr "rpa.cs1" [rcs1_wunit 1] \ + -ribr "rpa.ds" ds1 \ + -wibr "rpa.cs1" [rcs1_wunit 2] \ + -ribr "rpa.ds" ds2 \ + -wibr "rpa.cs1" [rcs1_wunit 3] \ + -ribr "rpa.ds" ds3 + + set dslist [list $ds0 $ds1 $ds2 $ds3] + + set ulist [expr {$unit & 0x03} ] + if {$unit < 0} { set ulist {0 1 2 3} } + + foreach u $ulist { + set ds [lindex $dslist $u] + if {$u == $unit || [regget ibd_rhrp::DS(mol) $ds] } { + $cpu cp -wibr "rpa.cs1" [rcs1_wunit $u] \ + -ribr "rpa.da" da \ + -ribr "rpa.er1" er1 \ + -ribr "rpa.as" as \ + -ribr "rpa.la" la \ + -ribr "rpa.mr1" mr1 \ + -ribr "rpa.dt" dt \ + -ribr "rpa.sn" sn \ + -ribr "rpa.of" of \ + -ribr "rpa.dc" dc + + append rval "\nUnit $u registers:" + append rval [format "\n da: %6.6o %s" $da [regtxt ibd_rhrp::DA $da ]] + append rval [format "\n ds: %6.6o %s" $ds [regtxt ibd_rhrp::DS $ds ]] + append rval [format "\n er1: %6.6o %s" $er1 [regtxt ibd_rhrp::ER1 $er1]] + append rval [format "\n as: %6.6o as:%s" $as [pbvi b4 $as]] + append rval [format "\n la: %6.6o %s" $la [regtxt ibd_rhrp::LA $la ]] + append rval [format "\n mr1: %6.6o " $mr1 ] + append rval [format "\n dt: %6.6o " $dt ] + set snd3 [regget ibd_rhrp::SN(d3) $sn] + set snd2 [regget ibd_rhrp::SN(d2) $sn] + set snd1 [regget ibd_rhrp::SN(d1) $sn] + set snd0 [regget ibd_rhrp::SN(d0) $sn] + set sntxt [format "%d%d%d%d" $snd3 $snd2 $snd1 $snd0] + append rval [format "\n sn: %6.6o sn=%s" $sn $sntxt] + append rval [format "\n of: %6.6o %s" $of [regtxt ibd_rhrp::OF $of ]] + append rval [format "\n dc: %6.6o dc:%s" $dc [format "%3d" $dc]] + + } else { + append rval [format "\nUnit $u offline or disabled: mol:%d dpr:%s" \ + [regget ibd_rhrp::DS(mol) $ds] \ + [regget ibd_rhrp::DS(dpr) $ds] ] + } + } + + return $rval + } +} Index: ibd_rhrp/.cvsignore =================================================================== --- ibd_rhrp/.cvsignore (nonexistent) +++ ibd_rhrp/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_rhrp =================================================================== --- ibd_rhrp (nonexistent) +++ ibd_rhrp (revision 38)
ibd_rhrp Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rw11/defs.tcl =================================================================== --- rw11/defs.tcl (nonexistent) +++ rw11/defs.tcl (revision 38) @@ -0,0 +1,124 @@ +# $Id: defs.tcl 724 2016-01-03 22:53:53Z mueller $ +# +# Copyright 2014-2016 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-01-02 724 1.0.3 add s: defs for CP_STAT(rust) +# 2015-12-26 719 1.0.2 add regmap_add defs; add CNTRL def +# 2015-09-06 710 1.0.1 regdsc PSW: add silent n,z,v,c; *mode syms; fix tflag +# 2014-03-07 553 1.0 Initial version (extracted from util.tcl) +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp +package require rw11util + +namespace eval rw11 { + # + # setup cp interface register descriptions for w11a ----------------------- + # + regdsc CP_CNTL {func 3 0} + + regdsc CP_STAT {suspext 9} {suspint 8} \ + {rust 7 4 "s:init:halt:reset:stop:step:susp:hbpt:runs:vecfet:recrsv:s1010:s1011:sfail:vfail:s1110:s1111"} \ + {susp 3} {go 2} {merr 1} {err 0} + variable RUST_INIT [bvi b4 "0000"] + variable RUST_HALT [bvi b4 "0001"] + variable RUST_RESET [bvi b4 "0010"] + variable RUST_STOP [bvi b4 "0011"] + variable RUST_STEP [bvi b4 "0100"] + variable RUST_SUSP [bvi b4 "0101"] + variable RUST_HBPT [bvi b4 "0110"] + variable RUST_RUNS [bvi b4 "0111"] + variable RUST_VECFET [bvi b4 "1000"] + variable RUST_RECRSV [bvi b4 "1001"] + variable RUST_SFAIL [bvi b4 "1100"] + variable RUST_VFAIL [bvi b4 "1101"] + + regdsc CP_AH {ubm 7} {p22 6} {addr 5 6} + # + # setup w11a register descriptions ----------------------------------------- + # + # PSW - processor status word -------------------------------------- + set A_PSW 0177776 + regdsc PSW {cmode 15 2 "s:k:s:x:u"} {pmode 13 2 "s:k:s:x:u"} \ + {rset 11} {pri 7 3 "d"} {tflag 4} {cc 3 4} \ + {n 3 1 "-"} {z 2 1 "-"} {v 1 1 "-"} {c 0 1 "-"} + # + # SSR0 - MMU Segment Status Register #0 ---------------------------- + set A_SSR0 0177572 + regdsc SSR0 {abo_nonres 15} {abo_len 14} {abo_rd 13} \ + {trap_mmu 12} {ena_trap 9} {inst_compl 7} \ + {mode 6 2} {dspace 4} {num 3 3} {ena 0} + # + # SSR1 - MMU Segment Status Register #1 ---------------------------- + set A_SSR1 0177574 + regdsc SSR1 {delta1 15 5} {rnum1 10 3} {delta0 7 5} {rnum0 2 3} + # + # SSR2 - MMU Segment Status Register #2 ---------------------------- + set A_SSR2 0177576 + # + # SSR3 - MMU Segment Status Register #3 ---------------------------- + set A_SSR3 0172516 + regdsc SSR3 {ena_ubm 5} {ena_22bit 4} {d_km 2} {d_sm 1} {d_um 0} + # + # SAR/SDR - MMU Address/Segment Descriptor Register ---------------- + set A_SDR_KM 0172300 + set A_SAR_KM 0172340 + set A_SDR_SM 0172200 + set A_SAR_SM 0172240 + set A_SDR_UM 0177600 + set A_SAR_UM 0177640 + regdsc SDR {slf 14 7} {aia 7} {aiw 6} {ed 3} {acf 2 3} + # + # PIRQ - Program Interrupt Requests ------------------------------- + set A_PIRQ 0177772 + regdsc PIRQ {pir 15 7} {piah 7 3} {pial 3 3} + # + # CPUERR - CPU Error Register ------------------------------------- + set A_CPUERR 0177766 + regdsc CPUERR {illhlt 7} {adderr 6} {nxm 5} {iobto 4} {ysv 3} {rsv 2} + # + # CNTRL - Memory System Control Register ------------------------- + set A_CNTRL 0177746 + regdsc CNTRL {frep 5 2} {fmiss 3 2} {disutrap 1} {distrap 0} + # + # setup regmap + # + rw11util::regmap_add rw11 psw {?? PSW} + rw11util::regmap_add rw11 ssr0 {?? SSR0} + rw11util::regmap_add rw11 ssr1 {?? SSR1} + rw11util::regmap_add rw11 ssr3 {?? SSR3} + rw11util::regmap_add rw11 sdr???.? {?? SDR} + rw11util::regmap_add rw11 pirq {?? PIRQ} + rw11util::regmap_add rw11 cpuerr {?? CPUERR} + # + rw11util::regmap_add rw11 cntrl {?? CNTRL} + # + # other w11a definitions --------------------------------------------------- + # Interrupt vectors ----------------------------------------------- + # + set V_004 0000004 + set V_010 0000010 + set V_BPT 0000014 + set V_IOT 0000020 + set V_PWR 0000024 + set V_EMT 0000030 + set V_TRAP 0000034 + set V_PIRQ 0000240 + set V_FPU 0000244 + set V_MMU 0000250 + +} Index: rw11/shell.tcl =================================================================== --- rw11/shell.tcl (nonexistent) +++ rw11/shell.tcl (revision 38) @@ -0,0 +1,293 @@ +# $Id: shell.tcl 724 2016-01-03 22:53:53Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-23 717 1.1 add e,g,d commands; fix shell_tin +# 2015-07-12 700 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + variable shell_depth 0 + variable shell_cpu "cpu0" + variable shell_attnhdl_added 0 + variable shell_eofchar_save {puts {}} + + # + # shell_start: start rw11 shell -------------------------------------------- + # + proc shell_start {} { + variable shell_cpu + variable shell_attnhdl_added + variable shell_eofchar_save + global tirri_interactive + + # quit if shell already active + if {[llength [info procs ::rw11::unknown_save]] > 0} { + error "rw11 shell already started" + } + + # set unknown handler + rename ::unknown ::rw11::unknown_save + rename ::rw11::shell_forward ::unknown + + # check that attn handler is installed + if {!$shell_attnhdl_added} { + rls attn -add 0x0001 { rw11::shell_attncpu } + set shell_attnhdl_added 1 + } + + # redefine ti_rri prompt and eof handling + if { $tirri_interactive } { + # setup new prompt (save old one...) + rename ::tclreadline::prompt1 ::rw11::shell_prompt1_save + namespace eval ::tclreadline { + proc prompt1 {} { + return "${rw11::shell_cpu}> " + } + } + # disable ^D (and save old setting) + set shell_eofchar_save [::tclreadline::readline eofchar] + ::tclreadline::readline eofchar {::rw11::shell_eofchar} + } + + return "" + } + + # + # shell_stop: stop rw11 shell ---------------------------------------------- + # + proc shell_stop {} { + variable shell_eofchar_save + global tirri_interactive + + if {[llength [info procs ::rw11::unknown_save]] == 0} { + error "rw11 shell not started" + } + rename ::unknown ::rw11::shell_forward + rename ::rw11::unknown_save ::unknown + # restore ti_rri prompt and eof handling + + if { $tirri_interactive } { + rename ::tclreadline::prompt1 {} + rename ::rw11::shell_prompt1_save ::tclreadline::prompt1 + ::tclreadline::readline eofchar $shell_eofchar_save + } + + return "" + } + + # + # shell_forward: rw11 shell forwarder (will be renamed to ::unknown) ------- + # + proc shell_forward args { + uplevel 1 [list rw11::shell {*}$args] + } + + # + # shell_eofchar: eofchar handler ------------------------------------------- + # + proc shell_eofchar args { + cpu0 cp -rstat cpustat + if {[regget rw11::CP_STAT(go) $cpustat]} { + puts \ + "cpu0 running, ^D disabled. Use qq to quit shell or tirri_exit to bail out" + return "" + } + shell_stop + return "" + } + + # + # shell_attncpu: cpu attn handler ------------------------------------------ + # + proc shell_attncpu {} { + puts "CPU attention" + puts [cpu0 show -r0ps] + return "" + } + + # + # shell: rw11 shell -------------------------------------------------------- + # + proc shell args { + variable shell_depth + variable shell_cpu + set rval {} + set cname [lindex $args 0] + set cargs [lreplace $args 0 0] + + switch $cname { + + e {set rval [shell_exa {*}$cargs]} + g {set rval [shell_get {*}$cargs]} + d {set rval [shell_dep {*}$cargs]} + + c0 - + c1 - + c2 - + c3 {set rval [shell_setcpu $cname]} + + cs {set rval [shell_cs {*}$cargs]} + cr {set rval [shell_cr {*}$cargs]} + cl {set rval [shell_cll {*}$cargs]} + + bs {set rval [rw11::hb_set $shell_cpu {*}$cargs]} + br {set rval [rw11::hb_remove $shell_cpu {*}$cargs]} + bl {set rval [rw11::hb_list $shell_cpu {*}$cargs]} + + qq {set rval [rw11::shell_stop {*}$cargs]} + + . {set rval [shell_cls {*}$cargs]} + ? {set rval [shell_clb {*}$cargs]} + ( {set rval [shell_ti {*}$cargs]} + < {set rval [shell_tin {*}$cargs]} + + h {set rval [shell_help {*}$cargs]} + + default { + if {$shell_depth > 1} { + error "nested entry to shell for \"$cname\"" + } + incr shell_depth + uplevel 1 [list rw11::unknown_save {*}$args] + } + } + set shell_depth 0 + return $rval; + } + + # + # shell_setcpu: set current cpu -------------------------------------------- + # + proc shell_setcpu {cname} { + variable shell_cpu + set cpucmd "cpu[string range $cname 1 1]" + if {[llength [info commands $cpucmd]] == 0} { + error "'$cpucmd' not available" + } + set shell_cpu $cpucmd + return "" + } + + # + # shell_cs: cpu step ------------------------------------------------------- + # + proc shell_cs {{nstep 1}} { + variable shell_cpu + set rval {} + for {set i 0} {$i < $nstep} {incr i} { + rw11::hb_clear $shell_cpu + $shell_cpu cp -step + if {$i > 0} {append rval "\n"} + append rval [$shell_cpu show -pcps] + $shell_cpu cp -rstat stat + if {[regget rw11::CP_STAT(rust) $stat] != $rw11::RUST_STEP} {break} + } + return $rval + } + + # + # shell_cr: cpu resume ----------------------------------------------------- + # + proc shell_cr {} { + variable shell_cpu + rw11::hb_clear $shell_cpu + $shell_cpu cp -resume + return "" + } + + # + # shell_cls: cpu short status ---------------------------------------------- + # + proc shell_cls {} { + variable shell_cpu + return [$shell_cpu show -pcps] + } + + # + # shell_clb: cpu brief status --------------------------------------------- + # + proc shell_clb {} { + variable shell_cpu + return [$shell_cpu show -r0ps] + } + + # + # shell_cll: cpu long status ----------------------------------------------- + # + proc shell_cll {} { + variable shell_cpu + set rval [$shell_cpu show -r0ps] + append rval "\n" + append rval [$shell_cpu show -mmu] + append rval "\n" + append rval [$shell_cpu show -ubmap] + } + + # + # shell_ti: tta0 input (no cr at end) -------------------------------------- + # + proc shell_ti args { + variable shell_cpu + set str [join $args " "] + "${shell_cpu}tta0" type $str + return "" + } + + # + # shell_tin: tta0 input (with cr at end) ----------------------------------- + # + proc shell_tin args { + variable shell_cpu + set str [join $args " "] + append str "\r" + "${shell_cpu}tta0" type $str + return "" + } + + # + # shell_help: shell help text ---------------------------------------------- + # + proc shell_help args { + set rval "rw11 shell command abreviations:" + foreach i {0 1 2 3} { + if {[llength [info commands "cpu${i}"]] > 0} { + append rval "\n c${i} ; select cpu${i}" + } + } + append rval "\n e aspec ; examine memory, return as text" + append rval "\n g aspec ; get memory, return as tcl list" + append rval "\n d aspec vals ; deposit memory" + append rval "\n cs ; cpu step" + append rval "\n cr ; cpu resume" + append rval "\n cl ; full cpu state (with mmu+ubmap)" + append rval "\n bs ind typ lo hi ; set bpt" + append rval "\n br ?ind? ; remove bpt" + append rval "\n bl ; list bpt" + append rval "\n qq ; quit shell, return to ti_rri" + append rval "\n . ; short cpu state (pc+psw)" + append rval "\n ? ; brief cpu state (all regs)" + append rval "\n ( ?text? ; tta0 input without cr" + append rval "\n < ?text? ; tta0 input with cr" + append rval "\n h ; this help text" + return $rval + } + +} Index: rw11/dmhbpt.tcl =================================================================== --- rw11/dmhbpt.tcl (nonexistent) +++ rw11/dmhbpt.tcl (revision 38) @@ -0,0 +1,155 @@ +# $Id: dmhbpt.tcl 701 2015-07-19 12:58:29Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-07-17 701 1.0 Initial version +# 2015-07-05 697 0.1 First draft +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + # + # setup dmhbpt unit register descriptions for w11a ------------------------- + # + regdsc HB_CNTL {mode 5 2} {irena 2} {dwena 1} {drena 0} + regdsc HB_STAT {irseen 2} {dwseen 1} {drseen 0} + + # + # hb_set: set breakpoint + # + proc hb_set {cpu unit type lolim {hilim 0} } { + hb_ucheck $cpu $unit + if {![regexp {^[ksu]?[rwi]+$} $type]} { + error "hb_set-E: bad type '$type', only ksu and iwr allowed" + } + set irena [string match *i* $type] + set dwena [string match *w* $type] + set drena [string match *r* $type] + set mode 2 + if {[string match *k* $type]} {set mode 0} + if {[string match *s* $type]} {set mode 1} + if {[string match *u* $type]} {set mode 3} + if {$hilim < $lolim} {set hilim $lolim} + + $cpu cp -wreg "hb${unit}.cntl" \ + [regbld rw11::HB_CNTL [list mode $mode] \ + [list irena $irena] \ + [list dwena $dwena] \ + [list drena $drena] ] \ + -wreg "hb${unit}.stat" 0 \ + -wreg "hb${unit}.hilim" $hilim \ + -wreg "hb${unit}.lolim" $lolim + return "" + } + + # + # hb_remove: remove breakpoint + # + proc hb_remove {cpu {unit -1}} { + if {$unit >= 0} { + hb_ucheck $cpu $unit + set ulist [list $unit] + } else { + set ulist {} + set nmax [$cpu get hashbpt] + for {set i 0} {$i<$nmax} {incr i} {lappend ulist $i} + } + set clist {} + foreach i $ulist { + lappend clist -wreg "hb${i}.cntl" 0 + lappend clist -wreg "hb${i}.stat" 0 + lappend clist -wreg "hb${i}.hilim" 0 + lappend clist -wreg "hb${i}.lolim" 0 + } + $cpu cp {*}$clist + return "" + } + + # + # hb_clear: clear breakpoint status + # + proc hb_clear {cpu {unit -1}} { + if {$unit >= 0} { + hb_ucheck $cpu $unit + $cpu cp -wreg "hb${unit}.stat" 0 + } else { + set nbpt [$cpu get hashbpt] + if {$nbpt > 0} { + set clist {} + for {set i 0} {$i < $nbpt} {incr i} { + lappend clist -wreg "hb${i}.stat" 0 + } + $cpu cp {*}$clist + } + } + return "" + } + + # + # hb_list: list breakpoints + # + proc hb_list {cpu {unit -1}} { + set nmax [$cpu get hashbpt] + set rval "" + for {set i 0} {$i<$nmax} {incr i} { + if {$i>0} {append rval "\n"} + append rval "hb${i}: " + append rval [hb_show $cpu $i] + } + return $rval + } + + # + # hb_show: show single breakpoint + # + proc hb_show {cpu unit} { + hb_ucheck $cpu $unit + $cpu cp -rreg "hb${unit}.cntl" cntl \ + -rreg "hb${unit}.stat" stat \ + -rreg "hb${unit}.hilim" hilim \ + -rreg "hb${unit}.lolim" lolim + set p_cntl [lindex {"k" "s" " " "u"} [regget rw11::HB_CNTL(mode) $cntl] ] + if {[regget rw11::HB_CNTL(irena) $cntl]} {append p_cntl "i"} + if {[regget rw11::HB_CNTL(dwena) $cntl]} {append p_cntl "w"} + if {[regget rw11::HB_CNTL(drena) $cntl]} {append p_cntl "r"} + set p_stat "" + if {[regget rw11::HB_STAT(irseen) $stat]} {append p_stat "i"} + if {[regget rw11::HB_STAT(dwseen) $stat]} {append p_stat "w"} + if {[regget rw11::HB_STAT(drseen) $stat]} {append p_stat "r"} + set rval "" + if {$cntl == 0} { + append rval "type: off" + } else { + append rval [format "type: %-4s" $p_cntl] + append rval [format " seen: %-3s" $p_stat] + append rval [format " lim: %6.6o" $lolim] + if {$lolim!=$hilim} {append rval [format " : %6.6o" $hilim]} + } + return $rval + } + + # + # hb_check: check for valid unit number + # + proc hb_ucheck {cpu unit} { + if {$unit < 0 || $unit >= [$cpu get hashbpt]} { + error "hb_..-E: '$unit' out of range" + } + return "" + } +} Index: rw11/asm.tcl =================================================================== --- rw11/asm.tcl (nonexistent) +++ rw11/asm.tcl (revision 38) @@ -0,0 +1,118 @@ +# $Id: asm.tcl 704 2015-07-25 14:18:03Z mueller $ +# +# Copyright 2013-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-07-25 704 1.0.4 asmrun,asmtreg,asmtmem: use args in proc definition +# 2014-07-26 575 1.0.3 add asmwait_tout variable, use in asmwait +# 2014-07-10 568 1.0.2 add errcnt return for asmtreg and asmtmem +# 2014-03-01 552 1.0.1 BUGFIX: asmwait checks now pc if stop: defined +# 2013-04-26 510 1.0 Initial version (extracted from util.tcl) +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + variable asmwait_tout 10. + + # + # asmrun: run a program loaded with ldasm + # + proc asmrun {cpu symName args} { + upvar 1 $symName sym + array set opts {r0 0 r1 0 r2 0 r3 0 r4 0 r5 0} + array set opts $args + + if {![info exists opts(pc)]} { + if {[info exists sym(start)]} { + set opts(pc) $sym(start) + } else { + error "neither opts(pc) nor sym(start) given" + } + } + + if {![info exists opts(sp)]} { + if {[info exists sym(stack)]} { + set opts(sp) $sym(stack) + } elseif {[info exists sym(start)]} { + set opts(sp) $sym(start) + } else { + error "neither opts(sp) nor sym(stack) or sym(start) given" + } + } + + $cpu cp -wr0 $opts(r0) \ + -wr1 $opts(r1) \ + -wr2 $opts(r2) \ + -wr3 $opts(r3) \ + -wr4 $opts(r4) \ + -wr5 $opts(r5) \ + -wsp $opts(sp) \ + -stapc $opts(pc) + + return "" + } + + # + # asmwait: wait for completion of a program loaded with ldasm + # + proc asmwait {cpu symName {tout 0.}} { + upvar 1 $symName sym + variable asmwait_tout + if {$tout <= 0.} { # if not specified + set tout $asmwait_tout; # use default value + } + set dt [$cpu wtcpu -reset $tout] + if {$dt >= 0 && [info exists sym(stop)]} { + $cpu cp -rpc -edata $sym(stop) + } + return $dt + } + + # + # asmtreg: test registers after running a program loaded with ldasm + # + proc asmtreg {cpu args} { + array set opts $args + set clist {} + foreach key [lsort [array names opts]] { + lappend clist "-r${key}" -edata $opts($key) + } + set errbeg [rlc errcnt] + $cpu cp {*}$clist + return [expr [rlc errcnt] - $errbeg] + } + + # + # asmtmem: test memory after running a program loaded with ldasm + # + proc asmtmem {cpu args} { + set clist {} + foreach {base vlist} $args { + set nw [llength $vlist] + if {$nw == 0} { + error "asmtreg called with empty value list" + } + lappend clist -wal $base + lappend clist -brm $nw -edata $vlist + } + set errbeg [rlc errcnt] + $cpu cp {*}$clist + return [expr [rlc errcnt] - $errbeg] + } + +} Index: rw11/tbench.tcl =================================================================== --- rw11/tbench.tcl (nonexistent) +++ rw11/tbench.tcl (revision 38) @@ -0,0 +1,128 @@ +# $Id: tbench.tcl 702 2015-07-19 17:36:09Z mueller $ +# +# Copyright 2013-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-05-17 683 2.2 support sub directories and return in tests +# 2015-05-09 676 2.1 use 'rlc log -bare' instead of 'puts' +# 2014-11-30 607 2.0 use new rlink v4 iface +# 2013-04-26 510 1.0 Initial version (extracted from util.tcl) +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # tbench: driver for tbench scripts + # + proc tbench {tname} { + set fname $tname + set tbase "." + if {[string match "@*" $tname]} { + set fname [string range $tname 1 end] + } + if {![file exists $fname]} {set tbase "$::env(RETROBASE)/tools/tbench"} + + rlink::anena 1; # enable attn notify + set errcnt [tbench_list $tname $tbase] + return $errcnt + } + + # + # tbench_file: execute list of tbench steps + # + proc tbench_list {tname tbase} { + set errcnt 0 + + set rname $tname + set islist 0 + if {[string match "@*" $tname]} { + set islist 1 + set rname [string range $tname 1 end] + } + + set dname [file dirname $rname] + set fname [file tail $rname] + if {$dname ne "."} { + set tbase [file join $tbase $dname] + } + + if {![file readable "$tbase/$fname"]} { + puts "-E: file $tbase/$fname not found or readable" + error "-E: file $tbase/$fname not found or readable" + } + + if {$islist} { + set fh [open "$tbase/$fname"] + while {[gets $fh line] >= 0} { + if {[string match "#*" $line]} { + if {[string match "##*" $line]} { rlc log -bare $line } + } elseif {[string match "@*" $line]} { + incr errcnt [tbench_list $line $tbase] + } else { + incr errcnt [tbench_step $line $tbase] + } + } + close $fh + + } else { + incr errcnt [tbench_step $fname $tbase] + } + + if {$islist} { + rlc log -bare [format "%s: %s" $tname [rutil::errcnt2txt $errcnt]] + } + return $errcnt + } + + # + # tbench_step: execute single tbench step + # + proc tbench_step {fname tbase} { + if {![file readable "$tbase/$fname"]} { + error "-E: file $tbase/$fname not found or readable" + } + + # cleanup any remaining temporary procs with names tmpproc_* + foreach pname [info procs tmpproc_*] { rename $pname "" } + + rlc errcnt -clear + set cpu "cpu0" + set ecode [catch "source $tbase/$fname" resmsg] + set errcnt [rlc errcnt] + + switch $ecode { + 0 {} + 1 { puts "-E: test execution FAILED with error message:" + if {[info exists errorInfo]} {puts $errorInfo} else {puts $resmsg} + incr errcnt + } + 2 { puts "-I: test ended by return: $resmsg"} + default { + puts "-E: test execution FAILED with catch code $ecode" + incr errcnt + } + } + + # remove temporary procs with names tmpproc_* + foreach pname [info procs tmpproc_*] { rename $pname "" } + + rlc log -bare [format "%s: %s" $fname [rutil::errcnt2txt $errcnt]] + return $errcnt + } + +} Index: rw11/dasm.tcl =================================================================== --- rw11/dasm.tcl (nonexistent) +++ rw11/dasm.tcl (revision 38) @@ -0,0 +1,457 @@ +# $Id: dasm.tcl 718 2015-12-26 15:59:48Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-25 717 1.1 add dasm_inst2txt; add nriName arg in dasm_iline +# 2015-08-04 709 1.0 Initial version +# 2015-07-26 705 0.1 First draft +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + #code mask name type acinf bwf + variable dasm_opdsc { \ + {0000000 0000000 halt 0arg {} - } \ + {0000001 0000000 wait 0arg {} - } \ + {0000002 0000000 rti 0arg {po po} w } \ + {0000003 0000000 bpt 0arg {} - } \ + {0000004 0000000 iot 0arg {} - } \ + {0000005 0000000 reset 0arg {} - } \ + {0000006 0000000 rtt 0arg {po po} w } \ + {0000007 0000000 !mfpt 0arg {} - } \ + {0000100 0000077 jmp 1arg {da} w } \ + {0000200 0000007 rts 1reg {po} w } \ + {0000230 0000007 spl spl {} - } \ + {0000240 0000017 cl ccop {} - } \ + {0000260 0000017 se ccop {} - } \ + {0000300 0000077 swab 1arg {dm} w } \ + {0000400 0000377 br br {} - } \ + {0001000 0000377 bne br {} - } \ + {0001400 0000377 beq br {} - } \ + {0002000 0000377 bge br {} - } \ + {0002400 0000377 blt br {} - } \ + {0003000 0000377 bgt br {} - } \ + {0003400 0000377 ble br {} - } \ + {0004000 0000777 jsr rsrc {da pu} w } \ + {0005000 0000077 clr 1arg {dw} w } \ + {0005100 0000077 com 1arg {dm} w } \ + {0005200 0000077 inc 1arg {dm} w } \ + {0005300 0000077 dec 1arg {dm} w } \ + {0005400 0000077 neg 1arg {dm} w } \ + {0005500 0000077 adc 1arg {dm} w } \ + {0005600 0000077 sbc 1arg {dm} w } \ + {0005700 0000077 tst 1arg {dr} w } \ + {0006000 0000077 ror 1arg {dm} w } \ + {0006100 0000077 rol 1arg {dm} w } \ + {0006200 0000077 asr 1arg {dm} w } \ + {0006300 0000077 asl 1arg {dm} w } \ + {0006400 0000077 mark mark {po} w } \ + {0006500 0000077 mfpi 1arg {dr pu} w } \ + {0006600 0000077 mtpi 1arg {po dw} w } \ + {0006700 0000077 sxt 1arg {dw} w } \ + {0007000 0000077 !csm 1arg {dr pu pu pu} - } \ + {0007200 0000077 !tstset 1arg {dm} - } \ + {0007300 0000077 !wrtlck 1arg {dw} w } \ + {0010000 0007777 mov 2arg {sr dw} w } \ + {0020000 0007777 cmp 2arg {sr dr} w } \ + {0030000 0007777 bit 2arg {sr dr} w } \ + {0040000 0007777 bic 2arg {sr dm} w } \ + {0050000 0007777 bis 2arg {sr dm} w } \ + {0060000 0007777 add 2arg {sr dm} w } \ + {0070000 0000777 mul rdst {dr} w } \ + {0071000 0000777 div rdst {dr} w } \ + {0072000 0000777 ash rdst {dr} w } \ + {0073000 0000777 ashc rdst {dr} w } \ + {0074000 0000777 xor rsrc {dm} w } \ + {0077000 0000777 sob sob {} - } \ + {0100000 0000377 bpl br {} - } \ + {0100400 0000377 bmi br {} - } \ + {0101000 0000377 bhi br {} - } \ + {0101400 0000377 blos br {} - } \ + {0102000 0000377 bvc br {} - } \ + {0102400 0000377 bvs br {} - } \ + {0103000 0000377 bcc br {} - } \ + {0103400 0000377 bcs br {} - } \ + {0104000 0000377 emt trap {} - } \ + {0104400 0000377 trap trap {} - } \ + {0105000 0000077 clrb 1arg {dw} b } \ + {0105100 0000077 comb 1arg {dm} b } \ + {0105200 0000077 incb 1arg {dm} b } \ + {0105300 0000077 decb 1arg {dm} b } \ + {0105400 0000077 negb 1arg {dm} b } \ + {0105500 0000077 adcb 1arg {dm} b } \ + {0105600 0000077 sbcb 1arg {dm} b } \ + {0105700 0000077 tstb 1arg {dr} b } \ + {0106000 0000077 rorb 1arg {dm} b } \ + {0106100 0000077 rolb 1arg {dm} b } \ + {0106200 0000077 asrb 1arg {dm} b } \ + {0106300 0000077 aslb 1arg {dm} b } \ + {0106400 0000077 !mtps 1arg {} - } \ + {0106500 0000077 mfpd 1arg {dr pu} w } \ + {0106600 0000077 mtpd 1arg {po dw} w } \ + {0106700 0000077 !mfps 1arg {} - } \ + {0110000 0007777 movb 2arg {sr dw} b } \ + {0120000 0007777 cmpb 2arg {sr dr} b } \ + {0130000 0007777 bitb 2arg {sr dr} b } \ + {0140000 0007777 bicb 2arg {sr dm} b } \ + {0150000 0007777 bisb 2arg {sr dm} b } \ + {0160000 0007777 sub 2arg {sr dm} b } \ + {0170000 0000000 !cfcc 0arg {} - } \ + {0170001 0000000 !setf 0arg {} - } \ + {0170011 0000000 !setd 0arg {} - } \ + {0170002 0000000 !seti 0arg {} - } \ + {0170012 0000000 !setl 0arg {} - } \ + {0170100 0000077 !ldfps 1fpp {dr} w } \ + {0170200 0000077 !stfps 1fpp {dw} w } \ + {0170300 0000077 !stst 1fpp {dw} w } \ + {0170400 0000077 !clrf 1fpp {dw} f } \ + {0170500 0000077 !tstf 1fpp {dr} f } \ + {0170600 0000077 !absf 1fpp {dm} f } \ + {0170700 0000077 !negf 1fpp {dm} f } \ + {0171000 0000377 !mulf rfpp {dr} f } \ + {0171400 0000377 !modf rfpp {dr} f } \ + {0172000 0000377 !addf rfpp {dr} f } \ + {0172400 0000377 !ldf rfpp {dr} f } \ + {0173000 0000377 !subf rfpp {dr} f } \ + {0173400 0000377 !cmpf rfpp {dr} f } \ + {0174000 0000377 !stf rfpp {dw} f } \ + {0174400 0000377 !divf rfpp {dr} f } \ + {0175000 0000377 !stexp rfpp {dw} w } \ + {0175400 0000377 !stcif rfpp {dw} f } \ + {0176000 0000377 !stcfd rfpp {dw} f } \ + {0176400 0000377 !ldexp rfpp {dr} w } \ + {0177000 0000377 !ldcif rfpp {dr} f } \ + {0177400 0000377 !ldcdf rfpp {dr} f } \ + } + + # vector name + variable dasm_vecmap + array set dasm_vecmap { \ + 004 iit \ + 010 rit \ + 014 bpt \ + 020 iot \ + 024 pwr \ + 030 emt \ + 034 trp \ + 060 dla-r \ + 064 dla-t \ + 070 pc-r \ + 074 pc-p \ + 100 kw-l \ + 104 kw-p \ + 114 mse \ + 120 deuna \ + 160 rla \ + 200 lpa \ + 220 rka \ + 224 tma \ + 240 pir \ + 244 fpp \ + 250 mmu \ + 254 rpa \ + 260 iist \ + 300 dlb-r \ + 304 dlb-t \ + 310 dza-r \ + 314 dza-t \ + } + + # a + variable dasm_ackeymap + array set dasm_ackeymap { \ + sr:00 {} \ + sr:10 {rd} \ + sr:20 {rd} \ + sr:30 {ra rd} \ + sr:40 {rd} \ + sr:50 {ra rd} \ + sr:60 {ri rd} \ + sr:70 {ri ra rd} \ + sr:07 {} \ + sr:17 {rd} \ + sr:27 {ri} \ + sr:37 {ri rd} \ + sr:47 {rd} \ + sr:57 {ra rd} \ + sr:67 {ri rd} \ + sr:77 {ri ra rd} \ + dr:00 {} \ + dr:10 {rd} \ + dr:20 {rd} \ + dr:30 {ra rd} \ + dr:40 {rd} \ + dr:50 {ra rd} \ + dr:60 {ri rd} \ + dr:70 {ri ra rd} \ + dr:07 {} \ + dr:17 {rd} \ + dr:27 {ri} \ + dr:37 {ri rd} \ + dr:47 {rd} \ + dr:57 {ra rd} \ + dr:67 {ri rd} \ + dr:77 {ri ra rd} \ + dw:00 {} \ + dw:10 {wd} \ + dw:20 {wd} \ + dw:30 {ra wd} \ + dw:40 {wd} \ + dw:50 {ra wd} \ + dw:60 {ri wd} \ + dw:70 {ri ra wd} \ + dw:07 {} \ + dw:17 {wd} \ + dw:27 {wd} \ + dw:37 {ri wd} \ + dw:47 {wd} \ + dw:57 {ra wd} \ + dw:67 {ri wd} \ + dw:77 {ri ra wd} \ + dm:00 {} \ + dm:10 {rd md} \ + dm:20 {rd md} \ + dm:30 {ra rd md} \ + dm:40 {rd md} \ + dm:50 {ra rd md} \ + dm:60 {ri rd md} \ + dm:70 {ri ra rd md} \ + dm:07 {} \ + dm:17 {rd md} \ + dm:27 {rd md} \ + dm:37 {ri rd md} \ + dm:47 {rd md} \ + dm:57 {ra rd md} \ + dm:67 {ri rd md} \ + dm:77 {ri ra rd md} \ + da:00 {} \ + da:10 {} \ + da:20 {} \ + da:30 {rd} \ + da:40 {} \ + da:50 {rd} \ + da:60 {ri} \ + da:70 {ri rd} \ + da:07 {} \ + da:17 {} \ + da:27 {} \ + da:37 {ri} \ + da:47 {} \ + da:57 {rd} \ + da:67 {ri} \ + da:77 {ri rd} \ + } + + # + # dasm_ireg2txt: convert ireg to text + # + proc dasm_ireg2txt {ireg} { + set dsc [dasm_getdsc $ireg] + if {[llength $dsc] != 0} { + return [dasm_iline $ireg $dsc] + } + return "?[format %6.6o $ireg]?" + } + + # + # dasm_inst2txt: convert instruction to {text nwrd} + # + proc dasm_inst2txt {inst} { + set ireg [lindex $inst 0] + set rilist [lreplace $inst 0 0] + set dsc [dasm_getdsc $ireg] + if {[llength $dsc] == 0} { + return [list "?[format %6.6o $ireg]?" 1] + } + set txt [dasm_iline $ireg $dsc $rilist nri] + set nwrd [expr {$nri + 1}] + return [list $txt $nwrd] + } + + # + # dasm_vec2txt: convert vector to text + # + proc dasm_vec2txt {vec} { + variable dasm_vecmap + set vkey [format %3.3o $vec] + if {[info exists dasm_vecmap($vkey)]} {return $dasm_vecmap($vkey)} + return "" + } + + # + # dasm_getdsc: get opdsc matching an opcode + # + proc dasm_getdsc {ireg} { + variable dasm_opdsc + set ndsc [llength $dasm_opdsc] + set ibeg 0 + set iend [expr {$ndsc - 1} ] + while {$ibeg >= 0 && $iend < $ndsc && $iend >= $ibeg} { + set icur [expr {( $ibeg + $iend ) / 2}] + set cdsc [lindex $dasm_opdsc $icur] + set ccode [lindex $cdsc 0] + set cmask [lindex $cdsc 1] + set iregm [expr { $ireg & [rutil::com16 $cmask] } ] + if {$iregm == $ccode} {return $cdsc} + if {$iregm < $ccode} { + set iend [expr {$icur - 1}] + } else { + set ibeg [expr {$icur + 1}] + } + } + return {} + } + + # + # dasm_iline: convert 1-3 words; return text and word count + # + proc dasm_iline {ireg idsc {rilist {}} {nriName {}} } { + set icode [lindex $idsc 0] + set imask [lindex $idsc 1] + set imnemo [lindex $idsc 2] + set itype [lindex $idsc 3] + + set src [expr {( $ireg >> 6 ) & 077}]; # source address spec + set dst [expr { $ireg & 077}]; # dest address spec + set reg6 [expr {( $ireg >> 6 ) & 07}]; # register from 8:6 + set reg0 [expr { $ireg & 07}]; # register from 2:0 + + # Note on br and sob: offsets are expressed as ". +- nnn" + # where . represents the pc of instruction (as in assembler) + # the instruction itself holds the offset to the pc after fetch !! + switch $itype { + 0arg { set rval "$imnemo" } + 1arg { set rval "$imnemo [dasm_regmod $dst]"} + 2arg { set rval "$imnemo [dasm_regmod $src],[dasm_regmod $dst]"} + rsrc { set rval "$imnemo [dasm_regnam $reg6],[dasm_regmod $dst]"} + rdst { set rval "$imnemo [dasm_regmod $dst],[dasm_regnam $reg6]"} + 1reg { set rval "$imnemo [dasm_regnam $reg0]"} + br { if {$ireg & 0200} { + set sign "-" + set off [expr {((~$ireg) & 0177) + 1}] + set off [expr {($off - 1) * 2}] + } else { + set sign "+" + set off [expr {$ireg & 0177}] + set off [expr {($off + 1) * 2}] + } + set rval "$imnemo .${sign}${off}" + } + sob { set off [expr {$ireg & 0077}] + set off [expr {($off - 1) * 2}] + set rval "$imnemo [dasm_regnam $reg6],.-${off}" + } + trap { set off [expr {$ireg & 0377}] + set rval "$imnemo [format %3.3o $off]" + } + spl { set off [expr {$ireg & 0007}] + set rval "$imnemo $off " + } + ccop { set off [expr {$ireg & 0017}] + set del "" + set str "" + if {$ireg & 010} { append str "${del}${imnemo}n"; set del "+"} + if {$ireg & 004} { append str "${del}${imnemo}z"; set del "+"} + if {$ireg & 002} { append str "${del}${imnemo}v"; set del "+"} + if {$ireg & 001} { append str "${del}${imnemo}c"; set del "+"} + set rval $str + if {$off == 0} {set rval "nop"} + if {$ireg == 0257} {set rval "ccc"} + if {$ireg == 0277} {set rval "scc"} + } + mark { set off [expr {$ireg & 0077}] + set rval "$imnemo [format %3.3o $off]" + } + 1fpp { set rval "$imnemo [dasm_regmod $dst f]"} + rfpp { set regf [expr {( $ireg >> 6 ) & 03}]; # register from 8:6 + set rval "$imnemo f${regf},[dasm_regmod $dst f]" + } + default { return "??itype" } + } + + set nval 0 + while {1} { + set i [string first X $rval] + if {$i < 0} {break} + if {[llength $rilist] == 0} { + set rval [string replace $rval $i $i "n"] + } else { + incr nval + set rval [string replace $rval $i $i [format %6.6o [lindex $rilist 0]]] + set rilist [lreplace $rilist 0 0] + } + } + + if {$nriName ne ""} { + upvar 1 $nriName nri + set nri $nval + } + + return $rval + } + + # + # dasm_regmod: return access mode info + # + proc dasm_regmod {regmod {pref r} } { + set mod [expr {( $regmod >> 3 ) & 07}] + set reg [expr { $regmod & 07}] + set rstr [dasm_regnam $reg] + if {$mod == 0 && $pref == "f" && $reg <= 5} {set rstr "f$reg"} + switch $mod { + 0 { if {$pref == "f" && $reg <= 5} {return "f$reg"} + return "$rstr" + } + 1 { return "($rstr)"} + 2 { if {$reg!=7} {return "($rstr)+"} else {return "#X"} } + 3 { if {$reg!=7} {return "@($rstr)+"} else {return "@#X"} } + 4 {return "-($rstr)"} + 5 {return "@-($rstr)"} + 6 {return "X($rstr)"} + 7 {return "@X($rstr)"} + } + return "??regmod" + } + + # + # dasm_regnam: return register name + # + proc dasm_regnam {reg} { + set rstr "r${reg}" + if {$reg == 6} {set rstr "sp"} + if {$reg == 7} {set rstr "pc"} + return $rstr + } + + # + # dasm_acmod2aclist + # + proc dasm_acmod2aclist {acmod regmod} { + variable dasm_ackeymap + set mod [expr {( $regmod >> 3 ) & 07}] + set reg [expr { $regmod & 07}] + if {$reg != 7} {set reg 0} + set ackey [format "%s:%o%o" $acmod $mod $reg] + if {[info exists dasm_ackeymap($ackey)]} { + return $dasm_ackeymap($ackey) + } + return "??" + } + +} Index: rw11/shell_egd.tcl =================================================================== --- rw11/shell_egd.tcl (nonexistent) +++ rw11/shell_egd.tcl (revision 38) @@ -0,0 +1,515 @@ +# $Id: shell_egd.tcl 720 2015-12-28 14:52:45Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-28 720 1.0 Initial version +# 2015-12-23 717 0.1 First draft +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + variable shell_egd_lrdef "l" + variable shell_egd_amdef "p" + + # + # shell_exa: examine memory, return as text ('e' command in shell) --------- + # + proc shell_exa {aspec} { + set pspec [shell_aspec_parse $aspec] + set mspec [shell_pspec_map $pspec] + set rval [shell_mspec_get $mspec] + set rtxt [shell_mspec_txt $mspec $rval] + return $rtxt + } + + # + # shell_get: examine memory, return as list ('g' command in shell) --------- + # + proc shell_get {aspec} { + set pspec [shell_aspec_parse $aspec] + set mspec [shell_pspec_map $pspec] + set rval [shell_mspec_get $mspec] + return $rval + } + + # + # shell_dep: deposit memory ('d' command in shell) ------------------------- + # + proc shell_dep {aspec args} { + set pspec [shell_aspec_parse $aspec] + set mspec [shell_pspec_map $pspec] + set rval [shell_mspec_put $mspec $args] + return "" + } + + # + # shell_aspec_parse: ------------------------------------------------------- + # + proc shell_aspec_parse {aspec} { + variable shell_egd_lrdef + variable shell_egd_amdef + + set volist [split $aspec "/"] + set saddr [lindex $volist 0] + set opts [lreplace $volist 0 0] + + # parse options part + set opt_lr "" + set opt_am "" + set opt_fmt "o" + set opt_cnt 1 + foreach opt $opts { + switch -regexp -matchvar mvar -- $opt { + {^[lr]$} { set opt_lr $opt } + {^[cpksu][id]$} { set opt_am $opt } + {^[pe]$} { set opt_am $opt } + {^[iabodxfF]$} { set opt_fmt $opt } + {^(\d)+$} { set opt_cnt $opt } + default { error "-E: bad option: $opt"} + } + } + + # check of only options specified --> update default opts + if {$saddr eq ""} { + if {$opt_lr ne ""} {set shell_egd_lrdef $opt_lr} + if {$opt_am ne ""} {set shell_egd_amdef $opt_am} + return {} + } + + # parse symbolic address part + # use default loc/rem or address space + if {$opt_lr eq ""} {set opt_lr $shell_egd_lrdef} + if {$opt_am eq ""} {set opt_am $shell_egd_amdef} + + # Note: put regexp patterns in {} to prevent that tcl modifies them ! + switch -regexp -matchvar mvar -- $saddr { + {^([0-7]+)$} { + set paddr [list "pa" $opt_am [lindex $mvar 1]] + } + {^(r0|r1|r2|r3|r4|r5|r6|r7|sp|pc|ps)$} { + set paddr [list "reg" "" [lindex $mvar 1]] + } + {^@(r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)$} { + set paddr [list "ireg" $opt_am [lindex $mvar 1] 0] + } + {^\((r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)\)$} { + set paddr [list "ireg" $opt_am [lindex $mvar 1] 0] + } + {^([0-9].*?)\((r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)\)$} { + set paddr [list "ireg" $opt_am [lindex $mvar 2] [lindex $mvar 1]] + } + {^(.+?)\+([0-9].*)$} { + set paddr [list "name" $opt_lr [lindex $mvar 1] [lindex $mvar 2]] + } + default { + set paddr [list "name" $opt_lr $saddr 0] + } + } + + return [list $paddr $opt_cnt $opt_fmt] + } + + # + # shell_pspec_map: --------------------------------------------------------- + # + proc shell_pspec_map {pspec} { + variable shell_cpu + set paddr [lindex $pspec 0] + set cnt [lindex $pspec 1] + set fmt [lindex $pspec 2] + set mode [lindex $paddr 0] + set am [lindex $paddr 1] + set addr [lindex $paddr 2] + set off [lindex $paddr 3] + + if {$addr eq "sp"} {set addr "r6"} + if {$addr eq "pc"} {set addr "r7"} + + switch $mode { + reg { + if {$addr eq "ps"} { + if {$cnt > 1} { error "-E: for 'ps' only range count of 1 allowed" } + } else { + set rnum [string range $addr 1 1] + if {[expr {$rnum + $cnt}] > 8} { error "-E: range extends beyond r7" } + } + return [list "reg" "" $addr $cnt $fmt ] + } + + pa - + ireg { + if {$mode eq "ireg"} { + $shell_cpu cp -r$addr rval + set addr [expr {$rval + $off}] + } + set am0 [string range $am 0 0] + set am1 [string range $am 1 1] + if {$am1 ne ""} { + if {$am0 eq "c" || $am0 eq "p"} { + $shell_cpu cp -rps rval + if {$am0 eq "c"} { + set xmode [regget rw11::PSW(cmode) $rval] + } else { + set xmode [regget rw11::PSW(pmode) $rval] + } + set am0 [string range "ksxu" $xmode $xmode] + } + set segnum [expr {$addr>>13}] + set sarname "sar${am0}${am1}.${segnum}" + $shell_cpu cp -rreg $sarname sarval + set addr [expr {$addr + 64 * $sarval}] + set am "e" + } + return [list "mem" $am $addr $cnt $fmt ] + } + + name { + set addr [$shell_cpu imap $addr] + set addr [expr {$addr + $off}] + for {set i 0} {$i < $cnt} {incr i} { + set taddr [expr {$addr + 2*$i}] + if {![$shell_cpu imap -testaddr $taddr]} { + error "-E: address [format %06o $taddr] not mapped in imap" + } + } + return [list "iop" $am $addr $cnt $fmt ] + } + } + + error "-E: BUGCHECK: bad mode $mode" + + } + + # + # shell_mspec_get: --------------------------------------------------------- + # + proc shell_mspec_get {mspec} { + variable shell_cpu + set mode [lindex $mspec 0]; # reg,mem,iop + set am [lindex $mspec 1]; # l,r or p,e,[cpksu][id] + set addr [lindex $mspec 2] + set cnt [lindex $mspec 3] + set fmt [lindex $mspec 4]; # i,a,b,o,d,x,f,F + + switch $mode { + mem { + set clist {} + if {$am eq "p"} { + lappend clist -wal $addr + } else { + lappend clist -wa $addr -p22 + } + lappend clist -brm $cnt rval + $shell_cpu cp {*}$clist + return $rval + } + + reg { + set clist {} + if {$addr eq "ps"} { + lappend clist -rps cpval0 + } else { + set rbase [string range $addr 1 1] + for {set i 0} {$i < $cnt} {incr i} { + set rnum [expr {$rbase + $i}] + lappend clist -rr${rnum} cpval${i} + } + } + $shell_cpu cp {*}$clist + } + + iop { + set clist {} + if {$am eq "l"} { # loc access + lappend clist -wal $addr + for {set i 0} {$i < $cnt} {incr i} { + lappend clist -rmi cpval[format %02d $i] + incr addr 2 + } + } else { # rem access + for {set i 0} {$i < $cnt} {incr i} { + lappend clist -ribr $addr cpval[format %02d $i] + incr addr 2 + } + } + $shell_cpu cp {*}$clist + } + + default { error "-E: BUGCHECK: bad mode $mode" } + } + + set rval {} + foreach var [lsort -dictionary [info locals cpval*]] { + lappend rval [set $var] + } + + return $rval + } + + # + # shell_mspec_txt: --------------------------------------------------------- + # + proc shell_mspec_txt {mspec rval} { + variable shell_cpu + set mode [lindex $mspec 0] + set am [lindex $mspec 1] + set addr [lindex $mspec 2] + set cnt [lindex $mspec 3] + set fmt [lindex $mspec 4] + + set rtxt {} + set ind 0 + + switch $mode { + mem { + while {$ind < $cnt} { + set line [format "%08o:" [expr {$addr + 2*$ind}]] + switch $fmt { + b { + for {set i 0} {$i < 4 && $ind < $cnt} {incr i; incr ind} { + append line " " + append line [pbvi b16 [lindex $rval $ind]] + } + } + + o { + for {set i 0} {$i < 8 && $ind < $cnt} {incr i; incr ind} { + append line [format " %06o" [lindex $rval $ind]] + } + } + + d { + for {set i 0} {$i < 8 && $ind < $cnt} {incr i; incr ind} { + append line [format " %6d" [lindex $rval $ind]] + } + } + + x { + for {set i 0} {$i < 12 && $ind < $cnt} {incr i; incr ind} { + append line [format " %04x" [lindex $rval $ind]] + } + } + + a { + set blist {} + for {set i 0} {$i < 4 && $ind < $cnt} {incr i; incr ind} { + set val [lindex $rval $ind] + lappend blist [expr { $val & 0xff}] + lappend blist [expr {($val>>8) & 0xff}] + } + set linebyt "" + set lineasc "" + foreach byt $blist { + append linebyt [format " %03o" $byt] + set pmark " " + if {$byt >= 128} { + set pmark "!" + set byt [expr {$byt & 0177}] + } + if {$byt < 32} { + append lineasc " $pmark" + append lineasc [lindex {{\0} "^a" "^b" "^c" + "^d" "^e" "^f" "^g" + "BS" "^i" "LF" "VT" + "FF" "CR" "^n" "^o" + "^p" "^q" "^r" "^s" + "^t" "^u" "^v" "^w" + "^x" "^y" "^z" "ES" + "FS" "GS" "RS" "US" } $byt] + } elseif {$byt >= 32 && $byt < 127} { + append lineasc [format " %s%c" $pmark $byt] + } else { + append lineasc " ${pmark}DE" + } + } + while {[string length $linebyt] < 32} { append linebyt " "} + append line $linebyt + append line " : " + append line $lineasc + } + + i { + set inst [lrange $rval $ind [expr {$ind + 2}]] + set dsc [rw11::dasm_inst2txt $inst] + set txt [lindex $dsc 0] + set nwrd [lindex $dsc 1] + for {set i 0} {$i < 3} {incr i} { + if {$i < $nwrd} { + append line [format " %06o" [lindex $rval $ind]] + incr ind + } else { + append line " " + } + } + append line " : $txt" + } + + default { error "-E: not yet implemented format option /$fmt" } + + } + if {$rtxt ne ""} {append rtxt "\n"} + append rtxt $line + } + } + + reg { + for {set i 0} {$i < $cnt} {incr i} { + set cval [shell_conv_bodx $fmt [lindex $rval $i]] + set rnam $addr + if {$i > 0} { set rnam "r[expr {[string range $addr 1 1] + $i}]" } + if {$rtxt ne ""} {append rtxt "\n"} + append rtxt "$rnam : $cval" + } + } + + iop { + for {set i 0} {$i < $cnt} {incr i; incr addr 2} { + set val [lindex $rval $i] + set cval [shell_conv_bodx $fmt $val] + set name [$shell_cpu imap -name $addr] + set line [format "%06o %-8s : %s" $addr $name $cval] + if {[$shell_cpu imap -testaddr $addr]} { + set cnam [$shell_cpu imap -name $addr] + set ctxt [rw11util::regmap_txt $cnam "${am}r" $val] + if {$ctxt ne ""} {append line " $ctxt"} + } + if {$rtxt ne ""} {append rtxt "\n"} + append rtxt $line + } + + } + } + + return $rtxt + } + + # + # shell_mspec_put: --------------------------------------------------------- + # + proc shell_mspec_put {mspec valr} { + variable shell_cpu + set mode [lindex $mspec 0] + set am [lindex $mspec 1] + set addr [lindex $mspec 2] + set cnt [lindex $mspec 3] + set fmt [lindex $mspec 4] + + # handle conversions + # - regdsc values (as list in {k v ...} or {dsc k v ...} format) + # - 0bnnnn values + + set vals {} + foreach val $valr { + if {[llength $val] > 1} { + set rdsc "" + if {$mode eq "iop"} { + set ioaddr [expr {$addr + 2 * [llength $vals]}] + if {[$shell_cpu imap -testaddr $ioaddr]} { + set ioname [$shell_cpu imap -name $ioaddr] + set rdsc [rw11util::regmap_get $ioname "${am}w"] + } + } + if {[llength $val] & 01} { + set rdsc [lindex $val 0] + set val [lreplace $val 0 0] + } + if {$rdsc ne "" && [info exists $rdsc]} { + set val [regbldkv $rdsc {*}$val] + } else { + error "-E: missing or invalid register desciptor '$rdsc'" + } + + } else { + if {[string match "0b*" $val]} { + set val [bvi b16 [string range $val 2 end]] + } + } + lappend vals $val + } + + set nvals [llength $vals] + if {$nvals != $cnt} { + error "-E: expected $cnt write values, seen only $nvals" + } + + + switch $mode { + mem { + set clist {} + if {$am eq "p"} { + lappend clist -wal $addr + } else { + lappend clist -wa $addr -p22 + } + lappend clist -bwm $vals + $shell_cpu cp {*}$clist + return "" + } + + reg { + set clist {} + if {$addr eq "ps"} { + lappend clist -wps $vals + } else { + set rbase [string range $addr 1 1] + for {set i 0} {$i < $cnt} {incr i} { + set rnum [expr {$rbase + $i}] + lappend clist -wr${rnum} [lindex $vals $i] + } + } + $shell_cpu cp {*}$clist + } + + iop { + set clist {} + if {$am eq "l"} { # loc access + lappend clist -wal $addr + for {set i 0} {$i < $cnt} {incr i} { + lappend clist -wmi [lindex $vals $i] + incr addr 2 + } + } else { # rem access + for {set i 0} {$i < $cnt} {incr i} { + lappend clist -wibr $addr [lindex $vals $i] + incr addr 2 + } + } + $shell_cpu cp {*}$clist + } + + default { error "-E: BUGCHECK: bad mode $mode" } + } + + return "" + + } + + # + # shell_conv_bodx: --------------------------------------------------------- + # + proc shell_conv_bodx {fmt val} { + switch $fmt { + b { return [pbvi b16 $val] } + d { return [format "%6d" $val] } + x { return [format "%04x" $val] } + default { return [format "%06o" $val] } + } + } + +} Index: rw11/dmscnt.tcl =================================================================== --- rw11/dmscnt.tcl (nonexistent) +++ rw11/dmscnt.tcl (revision 38) @@ -0,0 +1,74 @@ +# $Id: dmscnt.tcl 722 2015-12-30 19:45:46Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-30 722 1.0.2 sc_start: use args2opts +# 2015-12-28 721 1.0.1 use ena instead of cnt; use regbldkv +# 2015-06-27 695 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + # + # setup dmscnt unit register descriptions for w11a ------------------------- + # + regdsc SC_CNTL {clr 1} {ena 0} + regdsc SC_ADDR {mem 10 8} {word 1 2} + + # + # sc_setup: rmap definitions for dmscnt + # + proc sc_setup {{cpu "cpu0"}} { + set base [$cpu get base] + $cpu rmap -insert sc.cntl [expr {$base + 0x40}] + $cpu rmap -insert sc.addr [expr {$base + 0x41}] + $cpu rmap -insert sc.data [expr {$base + 0x42}] + } + + # + # sc_start: start the dmscnt + # + proc sc_start {{cpu "cpu0"} args} { + args2opts opts { clr 0 } {*}$args + $cpu cp -wreg sc.cntl [regbldkv rw11::SC_CNTL ena 1 clr $opts(clr)] + } + + # + # sc_stop: stop the dmscnt + # + proc sc_stop {{cpu "cpu0"}} { + $cpu cp -wreg sc.cntl [regbldkv rw11::SC_CNTL ena 0] + } + + # + # sc_read: read dmscnt data + # + proc sc_read {{cpu "cpu0"}} { + $cpu cp -wreg sc.addr 0x0000 \ + -rblk sc.data [expr {2*3*256}] blk + set sn 0 + set rval {} + append rval "#sn . .... ...." + foreach {d0 d1 d2} $blk { + append rval [format "\n%3.3x %1.1x %4.4x %4.4x" $sn $d2 $d1 $d0] + incr sn + } + return $rval + } + +} Index: rw11/util.tcl =================================================================== --- rw11/util.tcl (nonexistent) +++ rw11/util.tcl (revision 38) @@ -0,0 +1,222 @@ +# $Id: util.tcl 722 2015-12-30 19:45:46Z mueller $ +# +# Copyright 2013-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-30 721 1.3.6 BUGFIX: setup_ostr: adopt to use args2opts +# 2015-07-25 704 1.3.5 use args2opts +# 2015-05-17 683 1.3.4 setup_sys: add TM11 +# 2015-05-15 682 1.3.3 BUGFIX: setup_cpu: fix cpu reset (now -stop -creset) +# 2015-05-08 675 1.3.2 w11a start/stop/suspend overhaul +# 2015-03-28 660 1.3.1 add setup_cntl +# 2015-03-21 659 1.3 setup_sys: add RPRM (later renamed to RHRP) +# 2015-01-09 632 1.2.3 setup_sys: use rlc set; setup_sys: add RL11 +# 2014-07-26 575 1.2.2 run_pdpcp: add tout argument +# 2014-06-27 565 1.2.1 temporarily hide RL11 +# 2014-06-08 561 1.2 setup_sys: add RL11 +# 2014-03-07 553 1.1.3 move definitions to defs.tcl +# 2013-05-09 517 1.1.2 add setup_(tt|lp|pp|ostr) device setup procs +# 2013-04-26 510 1.1.1 split, asm* and tbench* into separate files +# 2013-04-01 501 1.1 add regdsc's and asm* procs +# 2013-02-02 380 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + # + # setup register descriptions for rw11 ------------------------------------- + # + # rlink stat usage for rw11 + regdsc STAT {cmderr 7} {cmdmerr 6} {cpususp 5} {cpugo 4} \ + {attn 3} {rbtout 2} {rbnak 1} {rberr 0} + + # check cmderr and rb(tout|nak|err) + variable STAT_DEFMASK [regbld rw11::STAT cmderr rbtout rbnak rberr] + + # + # setup_cpu: create w11 cpu system ----------------------------------------- + # + proc setup_cpu {} { + rlc set baseaddr 16 + rlc set basedata 8 + rlc set basestat 2 + rlink::setup; # basic rlink defs + rw11 rlw rls w11a 1; # create 1 w11a cpu + cpu0 cp -stop -creset; # stop and reset CPU + return "" + } + + # + # setup_sys: create full system -------------------------------------------- + # + proc setup_sys {} { + if {[info commands rlw] eq ""} { + setup_cpu + } + cpu0 add dl11 + cpu0 add dl11 -base 0176500 -lam 2 + cpu0 add rk11 + cpu0 add rl11 + cpu0 add rhrp + cpu0 add tm11 + cpu0 add lp11 + cpu0 add pc11 + rlw start + return "" + } + + # + # setup_tt: setup terminals ------------------------------------------------ + # + proc setup_tt {{cpu "cpu0"} args} { + # process and check options + args2opts opt {ndl 2 dlrlim 0 ndz 0 to7bit 0 app 0 nbck 1} {*}$args + + # check option values + if {$opt(ndl) < 1 || $opt(ndl) > 2} { + error "ndl option must be 1 or 2" + } + if {$opt(ndz) != 0} { + error "ndz option must be 0 (till dz11 support is added)" + } + + # setup attach url options + set urlopt "?crlf" + if {$opt(app) != 0} { + append urlopt ";app" + } + if {$opt(nbck) != 0} { + append urlopt ";bck=$opt(nbck)" + } + + # setup list if DL11 controllers + set dllist {} + lappend dllist "tta" "8000" + if {$opt(ndl) == 2} { + lappend dllist "ttb" "8001" + } + + # handle DL11 controllers + foreach {cntl port} $dllist { + set unit "${cntl}0" + ${cpu}${unit} att "tcp:?port=${port}" + ${cpu}${unit} set log "tirri_${unit}.log${urlopt}" + if {$opt(dlrlim) != 0} { + ${cpu}${cntl} set rxrlim 7 + } + if {$opt(to7bit) != 0} { + ${cpu}${unit} set to7bit 1 + } + } + return "" + } + + # + # setup_ostr: setup Ostream device (currently lp or pp) -------------------- + # + proc setup_ostr {cpu unit args} { + # process and check options + args2opts opt {app 0 nbck 1} {*}$args + + # setup attach url options + set urloptlist {} + if {$opt(app) != 0} { + append urloptlist "app" + } + if {$opt(nbck) != 0} { + append urloptlist "bck=$opt(nbck)" + } + set urlopt "" + if {[llength $urloptlist] > 0} { + append urlopt "?" + append urlopt [join $urloptlist ";"] + } + + # handle unit + ${cpu}${unit} att "tirri_${unit}.dat${urlopt}" + return "" + } + + # + # setup_lp: setup printer -------------------------------------------------- + # + proc setup_lp {{cpu "cpu0"} args} { + # process and check options + args2opts opt {nlp 1 app 0 nbck 1} {*}$args + if {$opt(nlp) != 0} { + setup_ostr $cpu "lpa0" app $opt(app) nbck $opt(nbck) + } + } + # + # setup_pp: setup paper puncher -------------------------------------------- + # + proc setup_pp {{cpu "cpu0"} args} { + # process and check options + args2opts opt {npc 1 app 0 nbck 1} {*}$args + if {$opt(npc) != 0} { + setup_ostr $cpu "pp" app $opt(app) nbck $opt(nbck) + } + } + + # + # run_pdpcp: execute pdpcp type command file ------------------------------- + # + proc run_pdpcp {fname {tout 10.} {cpu "cpu0"}} { + rlc errcnt -clear + set code [exec ticonv_pdpcp --tout=$tout $cpu $fname] + eval $code + set errcnt [rlc errcnt] + if { $errcnt } { + puts [format "run_pdpcp: FAIL after %d errors" $errcnt] + } + return $errcnt + } + + # + # setup_cntl: setup a controller (used for I/O test benches) --------------- + # + proc setup_cntl {cpu ctype cname} { + if {![rlw get started]} { # start rlw, if needed + rlw start + rls server -stop + } + + set ccmd ${cpu}${cname}; # build controller command + if {[info commands $ccmd] eq ""} { # create controller, if needed + $cpu add $ctype + } + if {![$ccmd get started]} { # start it, if needed + $ccmd start + } + return "" + } + + # + # ps2txt: convert ps to text ----------------------------------------------- + # + proc ps2txt {ps} { + reggetkv rw11::PSW $ps "ps_" cmode pmode rset pri tflag n z v c + set p_cmode [lindex {k s ? u} $ps_cmode] + set p_pmode [lindex {k s ? u} $ps_pmode] + set p_tflag [expr {$ps_tflag ? "t" : "-"}] + set p_cc [expr {$ps_n ? "n" : "."}] + append p_cc [expr {$ps_z ? "z" : "."}] + append p_cc [expr {$ps_v ? "v" : "."}] + append p_cc [expr {$ps_c ? "c" : "."}] + return "${p_cmode}${p_pmode}${ps_rset}${ps_pri}${p_tflag}${p_cc}" + } +} Index: rw11/dmcmon.tcl =================================================================== --- rw11/dmcmon.tcl (nonexistent) +++ rw11/dmcmon.tcl (revision 38) @@ -0,0 +1,461 @@ +# $Id: dmcmon.tcl 710 2015-08-31 06:19:56Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-08-05 708 1.0 Initial version +# 2015-07-05 697 0.1 First draft +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + # + # setup dmcmon unit register descriptions for w11a ------------------------- + # + regdsc CM_CNTL {mwsup 4} {imode 3} {wena 2} {stop 1} {start 0} + regdsc CM_STAT {bsize 15 3} {malcnt 12 4} {wrap 0} + regdsc CM_ADDR {laddr 15 12} {waddr 3 4} + regdsc CM_IADDR {laddr 15 12} + + regdsc CM_D8 {xnum 7 8} {req 15} {istart 9} {idone 8} + regdsc CM_D8REQ {wacc 14} {macc 13} {cacc 12} {bytop 11} {dspace 10} + regdsc CM_D8ACK {ack 14} {err 13} {tysv 12} {tmmu 11} {mwdrop 10} + regdsc CM_D8ERR {vmerr 12 3} + + regdsc CM_D7 {pc 15 15} {idec 0} + + # D5 has bit fields like rw11::PSW plus additional ones + regdsc CM_D5 {cmode 15 2} {pmode 13 2} {rset 11} \ + {pri 7 3 d} {tflag 4} {cc 3 4 "-"} {n 3} {z 2} {v 1} {c 0} + regdsc CM_D5IM0 {dres_val 10} {ddst_we 9} {dsrc_we 8} + regdsc CM_D5IM1 {vfetch 8} + + variable CM_D8_VMERR_ODD 01 + variable CM_D8_VMERR_MMU 02 + variable CM_D8_VMERR_NXM 03 + variable CM_D8_VMERR_IOBTO 04 + variable CM_D8_VMERR_RSV 05 + + # + # cm_start: start the dmcmon + # + proc cm_start {{cpu "cpu0"} args} { + args2opts opts { mwsup 0 imode 0 wena 1 } {*}$args + $cpu cp -wreg cm.cntl [regbldkv rw11::CM_CNTL start 1 \ + mwsup $opts(mwsup) imode $opts(imode) \ + wena $opts(wena) ] + } + + # + # cm_stop: stop the dmcmon + # + proc cm_stop {{cpu "cpu0"}} { + $cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL stop] + } + + # + # cm_read: read nent last entries (by default all) + # returns a list, 1st entry descriptor, rest 9-tuples in d0,..,d8 order + # + proc cm_read {{cpu "cpu0"} {nent -1}} { + $cpu cp -rreg cm.cntl rcntl \ + -rreg cm.stat rstat \ + -rreg cm.addr raddr + + set bsize [regget rw11::CM_STAT(bsize) $rstat] + set amax [expr {( 256 << $bsize ) - 1}] + if {$nent == -1} { set nent $amax } + + set laddr [regget rw11::CM_ADDR(laddr) $raddr] + set nval $laddr + if {[regget rw11::CM_STAT(wrap) $rstat]} { set nval $amax } + + if {$nent > $nval} {set nent $nval} + if {$nent == 0} { return {} } + + set caddr [expr {( $laddr - $nent ) & $amax}] + $cpu cp -wreg cm.addr [regbld rw11::CM_ADDR [list laddr $caddr]] + + set rval {} + lappend rval [list $rcntl $rstat 0x0000] + + set nrest $nent + set nblkmax [rlc get bsizeprudent] + set ngetmax [expr {$nblkmax / 9}] + while {$nrest > 0} { + set nget $nrest + if {$nget > $ngetmax} {set nget $ngetmax} + set nblk [expr {9 * $nget}] + $cpu cp -rblk cm.data $nblk rawdat + + foreach {d0 d1 d2 d3 d4 d5 d6 d7 d8} $rawdat { + lappend rval [list $d0 $d1 $d2 $d3 $d4 $d5 $d6 $d7 $d8] + } + set nrest [expr {$nrest - $nget }] + } + + $cpu cp -wreg cm.addr $raddr + + return $rval + } + + # + # cm_print: convert raw into human readable format + # + proc cm_print {cmraw} { + set imode [regget rw11::CM_CNTL(imode) [lindex $cmraw 0 0]] + set rval {} + set line {} + if { $imode} {append line " nc"} + if {!$imode} {append line "state "} + + if {$imode} { + append line " ....pc" + } else { + append line " ....pc " + append line " ..ireg" + } + append line " cprptnzvc" + append line " ..dsrc" + append line " ..ddst" + append line " ..dres" + append line " vmaddr" + append line " vmdata" + append rval $line + + set first 1 + set cnum_last 0 + set vmracc_last 0 + set vmreq_pend 0 + set vmbytop 0 + set pc_last -1 + set ireg_last -1 + + set snum2state [cm_get_snum2state] + + foreach item [lrange $cmraw 1 end] { + set d0 [lindex $item 0] + set d1 [lindex $item 1] + set d2 [lindex $item 2] + set d3 [lindex $item 3] + set d4 [lindex $item 4] + set d5 [lindex $item 5] + set d6 [lindex $item 6] + set d7 [lindex $item 7] + set d8 [lindex $item 8] + + reggetkv rw11::CM_D8 $d8 "d8_" xnum req istart idone + reggetkv rw11::CM_D8REQ $d8 "d8_" wacc macc cacc bytop dspace + reggetkv rw11::CM_D8ACK $d8 "d8_" ack err tysv tmmu mwdrop + reggetkv rw11::CM_D8ERR $d8 "d8_" vmerr + reggetkv rw11::CM_D7 $d7 "d7_" pc idec + set d7_pc [expr {$d7_pc << 1}] + reggetkv rw11::CM_D5IM0 $d5 "d5_" dres_val ddst_we dsrc_we + reggetkv rw11::CM_D5IM1 $d5 "d5_" vfetch + + set p_iflag " " + if {$d8_istart} {set p_iflag "-"} + if {$d8_idone} {set p_iflag "|"} + if {$d8_istart && $d8_idone} {set p_iflag "+"} + + set p_vm " " + if {$d8_req} { + set vmbytop $d8_bytop + set p_vmrw [expr {$d8_wacc ? "w" : "r"}] + set p_vmmmc " " + if {$d8_macc} {set p_vmmmc "m"} + if {$d8_cacc} {set p_vmmmc "c"} + set p_vmbytop [expr {$d8_bytop ? "b" : " "}] + set p_vmspace [expr {$d8_dspace ? "d" : "i"}] + set p_vm "${p_vmrw}${p_vmmmc}${p_vmbytop}${p_vmspace}" + } elseif {$d8_ack} { + set p_mwdrop " " + set p_trap " " + if {$d8_mwdrop} {set p_mwdrop "+"} + if {$d8_tmmu} {set p_trap "mm"} + if {$d8_tysv} {set p_trap "ys"}; # ysv has precedence + set p_vm "a${p_mwdrop}${p_trap}" + } elseif {$d8_err} { + set p_err " " + if {$d8_vmerr == $rw11::CM_D8_VMERR_ODD} {set p_err "odd"} + if {$d8_vmerr == $rw11::CM_D8_VMERR_MMU} {set p_err "mmu"} + if {$d8_vmerr == $rw11::CM_D8_VMERR_NXM} {set p_err "nxm"} + if {$d8_vmerr == $rw11::CM_D8_VMERR_IOBTO} {set p_err "bto"} + if {$d8_vmerr == $rw11::CM_D8_VMERR_RSV} {set p_err "rsv"} + set p_vm "E${p_err}" + } + + set line "\n" + if {$imode} { + set ccnt [expr {$d8_xnum - $cnum_last}] + if {$ccnt < 0} {set ccnt [expr {$ccnt + 256}]} + if {$first} {set ccnt 0} + append line [format %3d $ccnt] + } else { + set snam [lindex $snum2state $d8_xnum] + append line [format %-14s $snam] + } + + if {$imode} { + append line " [cm_print_coct $d7_pc 1 1]" + } else { + append line " [cm_print_coct $d7_pc $d7_idec 1]${p_iflag}" + append line " [cm_print_coct $d6 $d7_idec 1]" + } + + append line " [rw11::ps2txt $d5]" + + append line " [cm_print_coct $d4 [expr {$d5_dsrc_we || $imode}] 1]" + append line " [cm_print_coct $d3 [expr {$d5_ddst_we || $imode}] 1]" + append line " [cm_print_coct $d2 [expr {$d5_dres_val || $imode}] 0]" + + append line " ${p_vm}" + append line " [cm_print_coct $d1 [expr {$d8_req || $imode}] $vmreq_pend]" + set p_new [expr {( $d8_req && $d8_wacc ) || \ + ( $d8_req==0 && $d8_ack && $vmracc_last ) || \ + $imode }] + append line " [cm_print_coct $d0 $p_new 0 $vmbytop]" + + if {$imode} { + if {$d5_vfetch} { + set vnam [string toupper [rw11::dasm_vec2txt $d1]] + append line " !VFETCH [format %3.3o $d1] ${vnam}" + } else { + # if vmerr and same pc,ireg as previous entry suppress dasm line + # that ensures that ifetch Eodd's will not give double dasm lines + if {$d8_req==0 && $d8_err && $d7_pc==$pc_last && $d6==$ireg_last} { + append line " !VMERR ${p_vm}" + } else { + append line " [dasm_ireg2txt $d6]" + } + } + } else { + if {$d7_idec} {append line " [dasm_ireg2txt $d6]"} + } + + append rval $line + + set cnum_last $d8_xnum + if {$d8_req} { + set vmracc_last [expr {!$d8_wacc}] + set vmreq_pend 1 + } elseif {$d8_ack || $d8_err} { + set vmreq_pend 0 + } + set first 0 + set pc_last $d7_pc + set ireg_last $d6 + } + return $rval + } + + proc cm_print_coct {data new valid {bytop 0}} { + if {$new} { + if {$bytop == 0} { + return [format %6.6o $data] + } else { + return [format " %3.3o" [expr {$data & 0xff}]] + } + } + if {$valid} {return " ..."} + return " ." + } + + # + # cm_raw2txt: converts raw data list into a storable text format + # + proc cm_raw2txt {cmraw} { + set len [llength $cmraw] + if {$len == 0} {return ""} + set rval [format "# cntl,stat,type: %6.6o %6.6o %6.6o" \ + [lindex $cmraw 0 0] [lindex $cmraw 0 1] [lindex $cmraw 0 2]] + append rval "\n# d8 ....pc ..ireg ...psw ..dsrc ..ddst ..dres vmaddr vmdata" + for {set i 1} {$i < $len} {incr i} { + append rval [format \ + "\n%4.4x %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o" \ + [lindex $cmraw $i 8] [lindex $cmraw $i 7] [lindex $cmraw $i 6] \ + [lindex $cmraw $i 5] [lindex $cmraw $i 4] [lindex $cmraw $i 3] \ + [lindex $cmraw $i 2] [lindex $cmraw $i 1] [lindex $cmraw $i 0] ] + } + return $rval + } + + # + # cm_txt2raw: converts storable text format back in raw data list + # + proc cm_txt2raw {text} { + set rval {} + set first 1 + foreach line [split $text "\n"] { + set flist [split $line] + if {$first} { + lappend rval [lrange $flist 2 end] + set first 0 + continue + } + if {[string match "#*" $line]} {continue} + set d8 "0x[lindex $flist 0]" + set d7 "0[lindex $flist 1]" + set d6 "0[lindex $flist 2]" + set d5 "0[lindex $flist 3]" + set d4 "0[lindex $flist 4]" + set d3 "0[lindex $flist 5]" + set d2 "0[lindex $flist 6]" + set d1 "0[lindex $flist 7]" + set d0 "0[lindex $flist 8]" + lappend rval [list $d0 $d1 $d2 $d3 $d4 $d5 $d6 $d7 $d8] + } + return $rval + } + + # + # cm_get_snum2state + # + proc cm_get_snum2state {} { + set retrobase $::env(RETROBASE) + set fname "$retrobase/rtl/w11a/pdp11_sequencer.vhd" + set fd [open $fname r] + + set act 0 + set smax 0 + while {[gets $fd line] >= 0} { + if {[regexp -- {^\s*-- STATE2SNUM mapper begin} $line]} { + set act 1 + continue + } + if {!$act} {continue} + if {[regexp -- {^\s*-- STATE2SNUM mapper end} $line]} {break} + if {[regexp -- {^\s*$} $line]} {continue} + #puts $line + set r [regexp -- {^\s+when\s+(\w+)\s+=>.*:=\s*x"(.*)";} $line dummy m1 m2] + if {$r} { + set snum "0x$m2" + set snam [string range $m1 2 end]; # strip leading s_ + set snam2snum($snam) $snum + if {$snum > $smax} {set smax $snum} + } + } + set rval {} + for {set i 0} {$i <= $smax} {incr i} {lappend rval {}} + foreach key [array names snam2snum] { + lset rval $snam2snum($key) $key + } + + close $fd + return $rval + } + + # + # cm_read_lint: read lint (last instruction) context + # returns list of lists + # 1. stat,ipc,ireg + # 2. mal list (CM_STAT.malcnt entries) + # 3. regs list ps,r0,...,pc (optional if $regs != 0) + # + proc cm_read_lint {{cpu "cpu0"} {regs 0}} { + set clist {} + lappend clist -rreg cm.stat rstat + lappend clist -rreg cm.ipc ripc + lappend clist -rreg cm.ireg rireg + lappend clist -rblk cm.imal 16 rimal + if {$regs} { + foreach reg {ps r0 r1 r2 r3 r4 r5 sp pc} {lappend clist -r${reg} ${reg} } + } + + $cpu cp {*}$clist + + set malcnt [regget rw11::CM_STAT(malcnt) $rstat] + set rimal [lreplace $rimal [expr {$malcnt + 1}] end]; # keep only defined + + set rval list [list $rstat $ripc $rireg] $rimal + if {$regs} {lappend rval [list $rps $rr0 $rr1 $rr2 $rr3 $rr4 $rr5 $rsp $rpc]} + + return $rval + } + + # + # cm_print_lint: print lint (last instruction) context + # + proc cm_print_lint {cmlraw} { + set stat [lindex $cmlraw 0 0] + set ipc [lindex $cmlraw 0 1] + set ireg [lindex $cmlraw 0 2] + set mal [lindex $cmlraw 1] + set nmal [llength $mal] + + set bwf "w" + set aclist {} + set dsc [dasm_getdsc $ireg] + if {[llength $dsc] != 0} { + set acinf [lindex $dsc 4] + set bwf [lindex $dsc 5] + foreach acmod $acinf { + set actyp [string range $acmod 0 0] + if {$actyp eq "s"} { + set regmod [expr {($ireg >> 6) & 077}] + lappend aclist {*}[dasm_acmod2aclist $acmod $regmod] + } elseif {$actyp eq "d"} { + set regmod [expr { $ireg & 077}] + lappend aclist {*}[dasm_acmod2aclist $acmod $regmod] + } else { + lappend aclist $acmod + } + } + + set rilist {} + set line2 "" + foreach {ma md} $mal { + set acmod [lindex $aclist 0] + set aclist [lreplace $aclist 0 0] + switch $acmod { + ri {lappend rilist $md} + ra {append line2 [format "%6.6o->" $ma]} + rd {append line2 [format "%6.6o->%6.6o; " $ma $md]} + wd {append line2 [format "%6.6o<-%6.6o; " $ma $md]} + md {set line2 [string range $line2 0 end-2] + append line2 [format "<-%6.6o; " $md]} + default {append line2 [format "%s:%6.6o:%6.6o; " $acmod $ma $md]} + } + } + + set itxt [dasm_iline $ireg $dsc $rilist] + set rval [format "pc: %6.6o ireg: %6.6o na:%2d %s" $ipc $ireg $nmal $itxt] + if {$line2 ne ""} {append rval "\n $line2"} + + } else { + set rval [format "pc: %6.6o ireg: %6.6o na:%2d" $ipc $ireg $na] + foreach {ma mv} $mal { + append rval [format "\n %6.6o : " $ma] + if {$mv ne ""} append rval [format "%6.6o" $mv] + } + } + + if {[llength $cmlraw] > 2} { + append regs [lindex $cmlraw 2] + append rval "\n ps: [rw11::ps2txt [lindex $regs 0]]" + append rval [format " rx: %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o" \ + [lindex $regs 1] [lindex $regs 2] [lindex $regs 3] + [lindex $regs 4] [lindex $regs 5] [lindex $regs 6]] + set rpc [lindex $regs 8] + set p_br ""; # FIXME !! + append vval [format " %6.6o %6.6o%s" \ + [lindex $regs 7] $rpc $p_br] + } + + return $rval + } +} Index: rw11/cpucons.tcl =================================================================== --- rw11/cpucons.tcl (nonexistent) +++ rw11/cpucons.tcl (revision 38) @@ -0,0 +1,85 @@ +# $Id: cpucons.tcl 626 2015-01-03 14:41:37Z mueller $ +# +# Copyright 2013-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-01-02 626 1.0.1 BUGFIX: proc "<": use \r to signal +# 2013-04-26 510 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # cpumon: special command environment while cpu is running + # + + variable cpucons_done 0 + + # + # cpucons: setup special console shortcut commands + # + proc cpucons {} { + variable cpucons_done + + # quit if cpucons already done + if {$cpucons_done} { + return "" + } + + namespace eval :: { + + # + # '.' show current PC and PS + # + proc "." {} { + return [cpu0 show -pcps] + } + + # + # '?' show current PC and PS and R0-R6 + # + proc "?" {} { + return [cpu0 show -r0ps] + } + + # + # '(' type some chars (no cr at end) + # + proc "(" {args} { + set str [join $args " "] + cpu0tta0 type $str + return "" + } + + # + # '<' type some chars (with cr at end) + # + proc "<" {args} { + set str [join $args " "] + append str "\r" + cpu0tta0 type $str + return "" + } + + } + + set cpucons_done 1 + return "" + } + +} Index: rw11/cpumon.tcl =================================================================== --- rw11/cpumon.tcl (nonexistent) +++ rw11/cpumon.tcl (revision 38) @@ -0,0 +1,95 @@ +# $Id: cpumon.tcl 512 2013-04-28 07:44:02Z mueller $ +# +# Copyright 2013- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2013-04-26 510 1.0 Initial version +# + +package provide rw11 1.0 + +package require rlink +package require rwxxtpp + +namespace eval rw11 { + + # + # cpumon: special command environment while cpu is running + # + + variable cpumon_active 0 + variable cpumon_prompt ">" + variable cpumon_attnhdl_added 0 + variable cpumon_eofchar_save {puts {}} + + proc cpumon {{prompt "cpumon> "} } { + variable cpumon_active + variable cpumon_prompt + variable cpumon_attnhdl_added + variable cpumon_eofchar_save + global tirri_interactive + + # quit if cpumon already active + if {$cpumon_active} { + error "cpumon already active" + } + + # check that attn handler is installed + if {!$cpumon_attnhdl_added} { + rls attn -add 0x0001 { rw11::cpumon_attncpu } + set cpumon_attnhdl_added 1 + } + + # redefine ti_rri prompt and eof handling + if { $tirri_interactive } { + # setup new prompt (save old one...) + set cpumon_prompt $prompt + rename ::tclreadline::prompt1 ::rw11::cpumon_prompt1_save + namespace eval ::tclreadline { + proc prompt1 {} { + return $rw11::cpumon_prompt + } + } + # disable ^D (and save old setting) + set cpumon_eofchar_save [::tclreadline::readline eofchar] + ::tclreadline::readline eofchar \ + {puts {^D disabled, use tirri_exit if you really want to bail-out}} + } + + set cpumon_active 1 + return "" + } + + # + # cpumon_attncpu: cpu attn handler + # + proc cpumon_attncpu {} { + variable cpumon_active + variable cpumon_eofchar_save + global tirri_interactive + + if {$cpumon_active} { + puts "CPU down attention" + puts [cpu0 show -r0ps] + # restore ti_rri prompt and eof handling + if { $tirri_interactive } { + rename ::tclreadline::prompt1 {} + rename ::rw11::cpumon_prompt1_save ::tclreadline::prompt1 + ::tclreadline::readline eofchar $cpumon_eofchar_save + } + set cpumon_active 0 + } + return "" + } + +} Index: rw11/.cvsignore =================================================================== --- rw11/.cvsignore (nonexistent) +++ rw11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rw11 =================================================================== --- rw11 (nonexistent) +++ rw11 (revision 38)
rw11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_lp11/.cvsignore =================================================================== --- ibd_lp11/.cvsignore (nonexistent) +++ ibd_lp11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_lp11/util.tcl =================================================================== --- ibd_lp11/util.tcl (nonexistent) +++ ibd_lp11/util.tcl (revision 38) @@ -0,0 +1,36 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0 Initial version +# + +package provide ibd_lp11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_lp11 { + # + # setup register descriptions for ibd_lp11 --------------------------------- + # + + regdsc CSR {err 15} {done 7} {ie 6} + + rw11util::regmap_add ibd_lp11 lp?.rcsr {?? CSR} + + variable ANUM 8 + +} Index: ibd_lp11 =================================================================== --- ibd_lp11 (nonexistent) +++ ibd_lp11 (revision 38)
ibd_lp11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_rk11/.cvsignore =================================================================== --- ibd_rk11/.cvsignore (nonexistent) +++ ibd_rk11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_rk11/util.tcl =================================================================== --- ibd_rk11/util.tcl (nonexistent) +++ ibd_rk11/util.tcl (revision 38) @@ -0,0 +1,57 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0 Initial version +# + +package provide ibd_rk11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_rk11 { + # + # setup register descriptions for ibd_rk11 --------------------------------- + # + + regdsc DS {id 15 3} {hden 11} {dru 10} {sin 9} {sok 8} {dry 7} \ + {adry 6} {wps 5} {scsa 4} {sc 3 4} + regdsc ER {dre 15} {ovr 14} {wlo 13} {pge 11} \ + {nxm 10} {nxd 7} {nxc 6} {nxs 5} {cse 1} {wce 0} + regdsc CS {err 15} {he 14} {scp 13} {maint 12} {iba 11} {fmt 10} \ + {rwa 9} {sse 8} {rdy 7} {ide 6} {mex 5 2} \ + {func 3 3 "s:CRES:WR:RD:WCHK:SEEK:RCHK:DRES:WLCK"} \ + {go 0} + regdsc DA {drsel 15 3} {cyl 12 8} {sur 4} {sc 3 4} + regdsc RMR {rid 15 3} {crdone 11} {sbclr 10} {creset 9} {fdone 8} {sdone 7 8} + + variable FUNC_CRES [bvi b3 "000"] + variable FUNC_WR [bvi b3 "001"] + variable FUNC_RD [bvi b3 "010"] + variable FUNC_WCHK [bvi b3 "011"] + variable FUNC_SEEK [bvi b3 "100"] + variable FUNC_RCHK [bvi b3 "101"] + variable FUNC_DRES [bvi b3 "110"] + variable FUNC_WLCK [bvi b3 "111"] + + rw11util::regmap_add ibd_rk11 rk?.ds {?? DS} + rw11util::regmap_add ibd_rk11 rk?.er {?? ER} + rw11util::regmap_add ibd_rk11 rk?.cs {?? CS} + rw11util::regmap_add ibd_rk11 rk?.da {?? DA} + rw11util::regmap_add ibd_rk11 rk?.mr {r? RMR} + + variable ANUM 4 +} Index: ibd_rk11 =================================================================== --- ibd_rk11 (nonexistent) +++ ibd_rk11 (revision 38)
ibd_rk11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_rl11/.cvsignore =================================================================== --- ibd_rl11/.cvsignore (nonexistent) +++ ibd_rl11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_rl11/util.tcl =================================================================== --- ibd_rl11/util.tcl (nonexistent) +++ ibd_rl11/util.tcl (revision 38) @@ -0,0 +1,47 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0 Initial version +# + +package provide ibd_rl11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_rl11 { + # + # setup register descriptions for ibd_rl11 --------------------------------- + # + + regdsc CS {err 15} {de 14} {e 13 4} {ds 9 2} {crdy 7} {ie 6} {ba 5 2} \ + {func 3 3 "s:NOOP:WCHK:GS:SEEK:RHDR:WR:RD:RNHC"} \ + {drdy 0} + regdsc RCS {mprem 15 5} {mploc 10 3} {ena_mprem 5} {ena_mploc 4} + + variable FUNC_NOOP [bvi b3 "000"] + variable FUNC_WCHK [bvi b3 "001"] + variable FUNC_GS [bvi b3 "010"] + variable FUNC_SEEK [bvi b3 "011"] + variable FUNC_RHDR [bvi b3 "100"] + variable FUNC_WR [bvi b3 "101"] + variable FUNC_RD [bvi b3 "110"] + variable FUNC_RNHC [bvi b3 "111"] + + rw11util::regmap_add ibd_rl11 rl?.cs {l? CS r? RCS} + + variable ANUM 5 +} Index: ibd_rl11 =================================================================== --- ibd_rl11 (nonexistent) +++ ibd_rl11 (revision 38)
ibd_rl11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rutil/regdsc.tcl =================================================================== --- rutil/regdsc.tcl (nonexistent) +++ rutil/regdsc.tcl (revision 38) @@ -0,0 +1,305 @@ +# $Id: regdsc.tcl 724 2016-01-03 22:53:53Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-01-03 724 1.1.1 BUGFIX: regdsc: fix variable name in error msg +# 2015-07-24 705 1.1 add regbldkv,reggetkv; regtxt: add {all 0} arg +# add s:.. ptyp to support symbolic field values +# 2015-06-26 695 1.0 Initial version (with reg* procs from util.tcl) +# + +package provide rutil 1.0 + +package require rutiltpp + +namespace eval rutil { + # + # regdsc: setup a register descriptor -------------------------------------- + # + proc regdsc {rdscName args} { + upvar $rdscName rdsc + set fbegmax -1 + set mskftot 0 + + foreach arg $args { + set nopt [llength $arg] + if {$nopt < 2 || $nopt > 4} { + error "regdsc-E: wrong number of elements in field dsc \"$arg\"" + } + set fnam [lindex $arg 0] + set fbeg [lindex $arg 1] + set flen [lindex $arg 2] + if {$nopt < 3} { set flen 1 } + set ptyp [lindex $arg 3] + if {$nopt < 4} { set ptyp "b" } + set popt {} + set plen 0 + + set mskb [expr {( 1 << $flen ) - 1}] + set mskf [expr {$mskb << ( $fbeg - ( $flen - 1 ) )}] + + if {[string match "s:*" $ptyp]} { + set popt [lrange [split $ptyp ":"] 1 end] + set ptyp "s" + if { [llength $popt] != ( 1 << $flen ) } { + error "regdsc-E: bad value count for for \"$rdscName:$fnam\"" + } + foreach nam $popt { + if {![string match {[A-Za-z]*} $nam]} { + error "regdsc-E: bad name \"$nam\" for for \"$rdscName:$fnam\"" + } + set nlen [string length $nam] + if {$nlen > $plen} {set plen $nlen} + } + lappend popt $plen + + } else { + switch $ptyp { + b {} + o - + x {set plen [string length [format "%${ptyp}" $mskb]] + set popt "%${plen}.${plen}${ptyp}"} + d {set plen [string length [format "%d" $mskb]] + set popt "%${plen}d"} + - {} + default {error "regdsc-E: bad ptyp \"$ptyp\" for \"$rdscName:$fnam\""} + } + } + + if {( $flen - 1 ) > $fbeg} { + error "regdsc-E: bad field dsc \"$arg\": length > start position" + } + + set rdsc($fnam) [list $fbeg $flen $mskb $mskf $ptyp $popt] + + if {$fbegmax < $fbeg} {set fbegmax $fbeg} + set mskftot [expr {$mskftot | $mskf}] + } + + set rdsc(-n) [lsort -decreasing -command regdsc_sort \ + [array names rdsc -regexp {^[^-]}] ] + + set rdsc(-w) [expr {$fbegmax + 1}] + set rdsc(-m) $mskftot + + return "" + } + + proc regdsc_sort {a b} { + upvar rdsc urdsc + return [expr {[lindex $urdsc($a) 0] - [lindex $urdsc($b) 0] }] + } + + # + # regdsc_print: print register descriptor ---------------------------------- + # + proc regdsc_print {rdscName} { + upvar $rdscName rdsc + set rval "" + if {! [info exists rdsc]} { + error "can't access \"$rdscName\": variable doesn't exist" + } + + set rsize $rdsc(-w) + + append rval " field bits bitmask" + + foreach fnam $rdsc(-n) { + set fdsc $rdsc($fnam) + set fbeg [lindex $fdsc 0] + set flen [lindex $fdsc 1] + set fmskf [lindex $fdsc 3] + set ptyp [lindex $fdsc 4] + set popt [lindex $fdsc 5] + set line " " + append line [format "%8s" $fnam] + if {$flen > 1} { + append line [format " %2d:%2d" $fbeg [expr {$fbeg - $flen + 1}]] + } else { + append line [format " %2d" $fbeg] + } + append line " " + append line [pbvi "b${rsize}" $fmskf] + if {$ptyp eq "s"} { + append line " " [join [lrange $popt 0 end-1] ":"] + } else { + if {$popt ne ""} {append line " $popt"} + } + append rval "\n$line" + } + return $rval + } + + # + # regbld: build a register value from list of keys or {key val} pairs ------ + # + proc regbld {rdscName args} { + upvar $rdscName rdsc + set kvl {} + foreach arg $args { + set narg [llength $arg] + if {$narg < 1 || $narg > 2} { + error "regbld-E: field specifier \"$arg\": must be 'name \[val\]'" + } + set fnam [lindex $arg 0] + if {! [info exists rdsc($fnam)] } { + error "regbld-E: field specifier \"$arg\": field unknown" + } + + set fval 1 + if {$narg == 1} { + set flen [lindex $rdsc($fnam) 1] + if {$flen > 1} { + error "regbld-E: field specifier \"$arg\": no value and flen>1" + } + } else { + set fval [lindex $arg 1] + } + lappend kvl $fnam $fval + } + return [regbldkv rdsc {*}$kvl] + } + + # + # regbldkv: build a register value from key value list --------------------- + # + proc regbldkv {rdscName args} { + upvar $rdscName rdsc + if {[llength $args] % 2 != 0} { + error "regbldkv-E: odd number of optional key value args" + } + + set rval 0 + foreach {fnam fval} $args { + if {! [info exists rdsc($fnam)] } { + error "regbldkv-E: field specifier \"$fnam\": field unknown" + } + set fbeg [lindex $rdsc($fnam) 0] + set flen [lindex $rdsc($fnam) 1] + set mskb [lindex $rdsc($fnam) 2] + set ptyp [lindex $rdsc($fnam) 4] + set popt [lindex $rdsc($fnam) 5] + + if {$ptyp eq "s" && ! [string is integer $fval]} { + set nind [lsearch [lrange $popt 0 end-1] $fval] + if {$nind < 0} { + error "regbldkv-E: \"$fval\" unknown value name for \"$fnam\"" + } + set fval $nind + } + + if {$fval >= 0} { + if {$fval > $mskb} { + error "regbldkv-E: field specifier \"$fnam\": $fval > $mskb" + } + } else { + if {$fval < [expr {- $mskb}]} { + error "regbldkv-E: field specifier \"$fnam\": $fval < -$mskb]" + } + set fval [expr {$fval & $mskb}] + } + set rval [expr {$rval | $fval << ( $fbeg - ( $flen - 1 ) )}] + + } + return $rval + } + + # + # regget: extract field from a register value ------------------------------ + # + proc regget {fdscName val} { + upvar $fdscName fdsc + if {! [info exists fdsc] } { + error "regget-E: field descriptor \"$fdscName\" unknown" + } + set fbeg [lindex $fdsc 0] + set flen [lindex $fdsc 1] + set mskb [lindex $fdsc 2] + return [expr {( $val >> ( $fbeg - ( $flen - 1 ) ) ) & $mskb}] + } + + # + # reggetkv: extract multiple fields to variables --------------------------- + # + proc reggetkv {rdscName val pref args} { + upvar $rdscName rdsc + if {[llength $args] == 0} {set args "*"} + foreach kpat $args { + set nvar 0 + foreach key [array names rdsc $kpat] { + if {[string match -* $key]} {continue} + upvar "${pref}${key}" var + set var [regget "rdsc($key)" $val] + incr nvar + } + if {$nvar == 0} { + error "reggetkv-E: no match for field name pattern \"$kpat\"" + } + } + } + + # + # regtxt: convert register value to a text string -------------------------- + # Note: mode currently only "" and "a" (show all fields) allowed + # maybe later also "th" (table head) and "tr" (table row) + # + proc regtxt {rdscName val {mode ""}} { + upvar $rdscName rdsc + set rval "" + + foreach fnam $rdsc(-n) { + set flen [lindex $rdsc($fnam) 1] + set ptyp [lindex $rdsc($fnam) 4] + set popt [lindex $rdsc($fnam) 5] + set fval [regget rdsc($fnam) $val] + + if {$ptyp eq "-" || ($ptyp ne "s" && $fval == 0 && $mode eq "")} {continue} + + if {$rval ne ""} {append rval " "} + append rval "${fnam}" + if {$ptyp eq "b" && $flen == 1 && $mode eq ""} {continue} + append rval ":" + + if {$ptyp eq "s"} { + set plen [lindex $popt end] + append rval [format "%-${plen}s" [lindex $popt $fval]] + } elseif {$ptyp eq "b"} { + append rval [pbvi b${flen} $fval] + } else { + append rval [format "${popt}" $fval] + } + } + return $rval + } + + # + # ! export reg... procs to global scope ------------------------------------ + # + + namespace export regdsc + namespace export regdsc_print + namespace export regbld + namespace export regbldkv + namespace export regget + namespace export reggetkv + namespace export regtxt +} + +namespace import rutil::regdsc +namespace import rutil::regdsc_print +namespace import rutil::regbld +namespace import rutil::regbldkv +namespace import rutil::regget +namespace import rutil::reggetkv +namespace import rutil::regtxt Index: rutil/fileio.tcl =================================================================== --- rutil/fileio.tcl (nonexistent) +++ rutil/fileio.tcl (revision 38) @@ -0,0 +1,55 @@ +# $Id: fileio.tcl 705 2015-07-26 21:25:42Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-07-17 701 1.0 Initial version +# + +package provide rutil 1.0 + +package require rutiltpp + +namespace eval rutil { + # + # tofile: write a variable to file ----------------------------------------- + # + proc tofile {fname val} { + if [catch {open $fname w} fout] { + error "Cannot open $fname for writing" + } else { + puts $fout $val + close $fout + } + return "" + } + + # + # fromfile: read a variable from file -------------------------------------- + # + proc fromfile {fname} { + if [catch {open $fname r} fin] { + error "Cannot open $fname for reading" + } else { + set rval [read -nonewline $fin] + close $fin + } + return $rval + } + + namespace export tofile + namespace export fromfile +} + +namespace import rutil::tofile +namespace import rutil::fromfile Index: rutil/util.tcl =================================================================== --- rutil/util.tcl (nonexistent) +++ rutil/util.tcl (revision 38) @@ -0,0 +1,111 @@ +# $Id: util.tcl 705 2015-07-26 21:25:42Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-07-25 704 1.1.1 rename optlist2arr->args2opts, new logic, export it +# 2015-06-26 695 1.1 move reg* proc to regdsc.tcl +# 2015-06-05 688 1.0.5 add dohook +# 2015-03-28 660 1.0.4 add com8 and com16 +# 2014-12-23 619 1.0.3 regget: add check for unknown field descriptor +# 2014-07-12 569 1.0.2 add sxt16 and sxt32 +# 2013-05-09 517 1.0.1 add optlist2arr +# 2011-03-27 374 1.0 Initial version +# 2011-03-19 372 0.1 First draft +# + +package provide rutil 1.0 + +package require rutiltpp + +namespace eval rutil { + # + # args2opts: process options arguments given as key value list ----------- + # + proc args2opts {optsName refs args} { + upvar $optsName opts + if {[llength $args] % 2 != 0} { + error "args2opts-E: odd number of optional key value args" + } + array set opts $refs + foreach {key value} $args { + if {[info exists opts($key)]} { + set opts($key) $value + } else { + error "args2opts-E: key $key not valid in optlist" + } + } + return "" + } + + # + # errcnt2txt: returns "PASS" if 0 and "FAIL" otherwise --------------------- + # + proc errcnt2txt {errcnt} { + if {$errcnt} {return "FAIL"} + return "PASS" + } + + # + # sxt16: 16 bit sign extend ------------------------------------------------ + # + proc sxt16 {val} { + if {$val & 0x8000} { # bit 15 set ? + set val [expr $val | ~ 077777]; # --> set bits 15 and higher + } + return $val + } + + # + # sxt32: 32 bit sign extend ------------------------------------------------ + # + proc sxt32 {val} { + if {$val & 0x80000000} { # bit 31 set ? + set val [expr $val | ~ 017777777777]; # --> set bits 31 and higher + } + return $val + } + + # + # com8: 8 bit complement --------------------------------------------------- + # + proc com8 {val} { + return [expr (~$val) & 0xff] + } + + # + # com16: 16 bit complement ------------------------------------------------- + # + proc com16 {val} { + return [expr (~$val) & 0xffff] + } + + # + # dohook: source a hook script if is defined ------------------------------- + # + proc dohook {name} { + set fname "${name}.tcl" + if {[file readable $fname]} { + puts "dohook: $fname" + source $fname + } + return + } + + # ! export some procs to global scope -------------------------------------- + + namespace export args2opts + +} + +namespace import rutil::args2opts Index: rutil/.cvsignore =================================================================== --- rutil/.cvsignore (nonexistent) +++ rutil/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rutil =================================================================== --- rutil (nonexistent) +++ rutil (revision 38)
rutil Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: ibd_tm11/util.tcl =================================================================== --- ibd_tm11/util.tcl (nonexistent) +++ ibd_tm11/util.tcl (revision 38) @@ -0,0 +1,122 @@ +# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ +# +# Copyright 2015- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-12-26 719 1.0.1 add regmap_add defs +# 2015-05-17 683 1.0 Initial version +# + +package provide ibd_tm11 1.0 + +package require rlink +package require rw11util +package require rw11 + +namespace eval ibd_tm11 { + # + # setup register descriptions for ibd_tm11 --------------------------------- + # + + regdsc SR {icmd 15} {eof 14} {pae 12} {eot 10} {rle 9} {bte 8} {nxm 7} \ + {onl 6} {bot 5} {wrl 2} {rew 1} {tur 0} + + regdsc CR {err 15} {den 14 2} {ini 12} {pevn 11} {unit 10 3} \ + {rdy 7} {ie 6} {ea 5 2} \ + {func 3 3 "s:UNLOAD:READ:WRITE:WEOF:SFORW:SBACK:WRTEG:REWIND"} \ + {go 0} + variable FUNC_UNLOAD [bvi b3 "000"] + variable FUNC_READ [bvi b3 "001"] + variable FUNC_WRITE [bvi b3 "010"] + variable FUNC_WEOF [bvi b3 "011"] + variable FUNC_SFORW [bvi b3 "100"] + variable FUNC_SBACK [bvi b3 "101"] + variable FUNC_WRTEG [bvi b3 "110"] + variable FUNC_REWIND [bvi b3 "111"] + + regdsc RCR {icmd 15} {pae 12} {rle 9} {bte 8} {nxm 7} {unit 5 2} \ + {func 3 3 "s:FU0:WUNIT:DONE:FU3:FU4:FU5:FU6:FU7"} \ + {go 0} + variable RFUNC_WUNIT [bvi b3 "001"] + variable RFUNC_DONE [bvi b3 "010"] + + regdsc RRL {eof 10} {eot 9} {onl 8} {bot 7} {wrl 6} {rew 5} {unit 2 2} + + rw11util::regmap_add ibd_tm11 tm?.sr {?? SR} + rw11util::regmap_add ibd_tm11 tm?.cr {l? CR rr CR rw RCR} + rw11util::regmap_add ibd_tm11 tm?.rl {r? RRL} + + variable ANUM 7 + + # + # setup: create controller with default attributes ------------------------- + # + proc setup {{cpu "cpu0"}} { + return [rw11::setup_cntl $cpu "tm11" "tma"] + } + + # + # rcr_wunit: value for rem CR WUNIT function ----------------------------- + # + proc rcr_wunit {unit} { + return [regbld ibd_tm11::RCR [list unit $unit] \ + [list func $ibd_tm11::RFUNC_WUNIT] ] + } + + # + # cr_func: value for loc CR function start ------------------------------- + # + proc cr_func {func} { + return [regbld ibd_tm11::CR \ + [list func $func] {go 1}] + } + + # + # rdump: register dump - rem view ------------------------------------------ + # + proc rdump {{cpu "cpu0"}} { + set rval {} + $cpu cp -ribr "tma.sr" sr \ + -ribr "tma.cr" cr \ + -ribr "tma.bc" bc \ + -ribr "tma.ba" ba \ + -wibr "tma.cr" [rcr_wunit 0] \ + -ribr "tma.rl" sr0 \ + -wibr "tma.cr" [rcr_wunit 1] \ + -ribr "tma.rl" sr1 \ + -wibr "tma.cr" [rcr_wunit 2] \ + -ribr "tma.rl" sr2 \ + -wibr "tma.cr" [rcr_wunit 3] \ + -ribr "tma.rl" sr3 \ + + if {$bc} { + set fbc [format "%d" [expr {64 * 1024 - $bc}]] + } else { + set fbc "(0)" + } + + append rval "Controller registers:" + append rval [format "\n sr: %6.6o %s" $sr [regtxt ibd_tm11::SR $sr]] + append rval [format "\n cr: %6.6o %s" $cr [regtxt ibd_tm11::CR $cr]] + append rval [format "\n bc: %6.6o nw=%s" $bc $fbc] + append rval [format "\n ba: %6.6o" $ba] + + append rval "\nUnit registers:" + append rval [format "\n sr0: %6.6o %s" $sr0 [regtxt ibd_tm11::RRL $sr0 ]] + append rval [format "\n sr1: %6.6o %s" $sr1 [regtxt ibd_tm11::RRL $sr1 ]] + append rval [format "\n sr2: %6.6o %s" $sr2 [regtxt ibd_tm11::RRL $sr2 ]] + append rval [format "\n sr3: %6.6o %s" $sr3 [regtxt ibd_tm11::RRL $sr3 ]] + + return $rval + } +} Index: ibd_tm11/.cvsignore =================================================================== --- ibd_tm11/.cvsignore (nonexistent) +++ ibd_tm11/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: ibd_tm11 =================================================================== --- ibd_tm11 (nonexistent) +++ ibd_tm11 (revision 38)
ibd_tm11 Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbbram/perf.tcl =================================================================== --- rbbram/perf.tcl (nonexistent) +++ rbbram/perf.tcl (revision 38) @@ -0,0 +1,181 @@ +# $Id: perf.tcl 643 2015-02-07 17:41:53Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-02-07 643 1.1.2 perf_blk(): use proper rbmax, add nmax argument +# 2014-12-27 622 1.1.1 don't use read buffers in rblk speed test +# 2014-12-06 609 1.1 test 512,1024,2000 word wblk/rbld; retra buffer cut +# 2013-01-04 469 1.0.2 perf_blk: add optional 2nd arg: trace +# 2012-12-27 465 1.0.1 adopt format, cover small ms and large kb +# 2011-04-17 376 1.0 Initial version +# + +package provide rbbram 1.0 + +namespace eval rbbram { + # + # perf_blk: determine wblk/rblk write performance + # + proc perf_blk {{tmax 1000} {trace 0} {nmax 2000}} { + set rbmax [expr {[rlc get bsizemax] - 32}] + + if {$tmax < 1} { error "-E: perf_blk: tmax argument must be >= 1" } + + set amax [regget rbbram::CNTL(addr) -1] + set rval \ +"nblk 1 wblk | 2 wblk | 4 wblk | 1 rblk | 2 rblk | 4 rblk " + append rval \ +"\n ms/r kB/s ms/r kB/s ms/r kB/s ms/r kB/s ms/r kB/s ms/r kB/s" + + # 256 512 1024 + foreach nblk {1 2 4 8 16 32 64 128 256 512 768 1024 1536 2000} { + if {$nblk > $nmax} {break} + set wbuf0 {} + set wbuf1 {} + set wbuf2 {} + set wbuf3 {} + for {set i 0} {$i < $nblk} {incr i} { + lappend wbuf0 $i + lappend wbuf1 [expr {0x1000 + $i}] + lappend wbuf2 [expr {0x2000 + $i}] + lappend wbuf3 [expr {0x3000 + $i}] + } + + set pval {} + + # single wblk + if {$trace} { puts "1 wblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -wblk br.data $wbuf0 + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + $nblk ) & $amax}] + } + lappend pval 1 $i $trun + + # double wblk + if {$trace} { puts "2 wblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -wblk br.data $wbuf0 \ + -wblk br.data $wbuf1 + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + 2 * $nblk ) & $amax}] + } + lappend pval 2 $i $trun + + # quad wblk + if {$trace} { puts "4 wblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -wblk br.data $wbuf0 \ + -wblk br.data $wbuf1 \ + -wblk br.data $wbuf2 \ + -wblk br.data $wbuf3 + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + 4 * $nblk ) & $amax}] + } + lappend pval 4 $i $trun + + # single rblk + if {$trace} { puts "1 rblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -rblk br.data $nblk + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + $nblk ) & $amax}] + } + lappend pval 1 $i $trun + + # double rblk + if {2*$nblk <= $rbmax} { + if {$trace} { puts "2 rblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -rblk br.data $nblk \ + -rblk br.data $nblk + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + 2 * $nblk ) & $amax}] + } + lappend pval 2 $i $trun + } else { + lappend pval 4 "-" "-" + } + + # quad rblk + if {4*$nblk <= $rbmax} { + if {$trace} { puts "4 rblk for $nblk" } + set tbeg [clock milliseconds] + set addr 0x0000 + for {set i 1} {1} {incr i} { + rlc exec \ + -wreg br.cntl $addr \ + -rblk br.data $nblk \ + -rblk br.data $nblk \ + -rblk br.data $nblk \ + -rblk br.data $nblk + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + set addr [expr {( $addr + 4 * $nblk ) & $amax}] + } + lappend pval 4 $i $trun + } else { + lappend pval 4 "-" "-" + } + + set oline [format "\n%4d" $nblk] + foreach {nr i trun} $pval { + if {$i ne "-"} { + set ms [expr {double($trun) / double($nr*$i)}] + set kb [expr {double(2*$nr*$i*$nblk) / double($trun)}] + if { $ms < 9.94 } { + append oline [format " %5.2f" $ms] + } else { + append oline [format " %5.1f" $ms] + } + if { $kb > 999.9 } { + append oline [format " %5.0f" $kb] + } else { + append oline [format " %5.1f" $kb] + } + } else { + append oline " - -" + } + } + + append rval $oline + } + return $rval + } +} Index: rbbram/util.tcl =================================================================== --- rbbram/util.tcl (nonexistent) +++ rbbram/util.tcl (revision 38) @@ -0,0 +1,40 @@ +# $Id: util.tcl 603 2014-11-09 22:50:26Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-11-09 603 2.0 use rlink v4 address layout +# 2011-03-19 372 1.0 Initial version +# + +package provide rbbram 1.0 + +namespace eval rbbram { + # + # setup register descriptions for rbd_bram + # + regdsc CNTL {nbusy 15 6} {addr 9 10} + # + # setup: amap definitions for rbd_bram + # + proc setup {base} { + rlc amap -insert br.cntl [expr {$base + 0x00}] + rlc amap -insert br.data [expr {$base + 0x01}] + } + # + # init: reset rbd_bram (clear cntl register) + # + proc init {} { + rlc exec -wreg br.cntl 0x0000 + } +} Index: rbbram/.cvsignore =================================================================== --- rbbram/.cvsignore (nonexistent) +++ rbbram/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbbram =================================================================== --- rbbram (nonexistent) +++ rbbram (revision 38)
rbbram Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbs3hio/util.tcl =================================================================== --- rbs3hio/util.tcl (nonexistent) +++ rbs3hio/util.tcl (revision 38) @@ -0,0 +1,143 @@ +# $Id: util.tcl 640 2015-02-01 09:56:53Z mueller $ +# +# Copyright 2011-2015 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2015-01-31 640 1.1 adopt to new register layout +# 2011-08-14 406 1.0.2 adopt to common register layout +# 2011-04-17 376 1.0.1 print: show also switch values; add proc disptest +# 2011-03-27 374 1.0 Initial version +# 2011-03-19 372 0.1 First draft +# + +package provide rbs3hio 1.0 + +package require rutil +package require rutiltpp + +namespace eval rbs3hio { + # + # setup register descriptions for s3_humanio_rbus + # + regdsc STAT {hdig 14 3} {hled 11 4} {hbtn 7 4} {hswi 3 4} + regdsc CNTL {dsp1en 4} {dsp0en 3} {dpen 2} {leden 1} {swien 0} + + # + # setup: amap definitions for s3_humanio_rbus + # + proc setup {{base 0xfef0}} { + rlc amap -insert hi.stat [expr {$base + 0x00}] + rlc amap -insert hi.cntl [expr {$base + 0x01}] + rlc amap -insert hi.btn [expr {$base + 0x02}] + rlc amap -insert hi.swi [expr {$base + 0x03}] + rlc amap -insert hi.led [expr {$base + 0x04}] + rlc amap -insert hi.dp [expr {$base + 0x05}] + rlc amap -insert hi.dsp0 [expr {$base + 0x06}] + rlc amap -insert hi.dsp1 [expr {$base + 0x07}] + } + + # + # init: reset s3_humanio_rbus (clear all enables) + # + proc init {} { + rlc exec -wreg hi.cntl 0x0000 + } + + # + # print: show status + # + proc print {} { + set rval {} + rlc exec \ + -rreg hi.stat r_stat \ + -rreg hi.cntl r_cntl \ + -rreg hi.btn r_btn \ + -rreg hi.swi r_swi \ + -rreg hi.led r_led \ + -rreg hi.dp r_dp \ + -rreg hi.dsp0 r_dsp0 \ + -rreg hi.dsp1 r_dsp1 + + set ndig [expr {[regget rbs3hio::STAT(hdig) $r_stat] + 1}] + set nled [expr {[regget rbs3hio::STAT(hled) $r_stat] + 1}] + set nbtn [expr {[regget rbs3hio::STAT(hbtn) $r_stat] + 1}] + set nswi [expr {[regget rbs3hio::STAT(hswi) $r_stat] + 1}] + + append rval [format " stat: ndig:%d nled:%d nbtn:%d nswi:%d" \ + $ndig $nled $nbtn $nswi] + append rval "\n cntl: [regtxt rbs3hio::CNTL $r_cntl]" + append rval "\n btn: [pbvi b$nbtn $r_btn]" + append rval "\n swi: [pbvi b$nswi $r_swi]" + append rval "\n led: [pbvi b$nled $r_led]" + set r_dsp [expr {( $r_dsp1 << 16 ) + $r_dsp0}] + set dspval "" + for {set i [expr {$ndig - 1}]} {$i >= 0} {incr i -1} { + set digval [expr {( $r_dsp >> ( 4 * $i ) ) & 0x0f}] + set digdp [expr {( $r_dp >> $i ) & 0x01}] + append dspval [format "%x" $digval] + if {$digdp} {append dspval "."} else {append dspval " "} + } + set ndspbit [expr {4 * $ndig}] + append rval "\n disp: [pbvi b$ndspbit $r_dsp] - [pbvi b$ndig $r_dp] -> \"$dspval\"" + return $rval + } + + # + # disptest: blink through the leds + # + proc disptest {} { + rlc exec -rreg hi.stat r_stat -rreg hi.cntl r_cntl + + set ndig [expr {[regget rbs3hio::STAT(hdig) $r_stat] + 1}] + set nled [expr {[regget rbs3hio::STAT(hled) $r_stat] + 1}] + set nbtn [expr {[regget rbs3hio::STAT(hbtn) $r_stat] + 1}] + set nswi [expr {[regget rbs3hio::STAT(hswi) $r_stat] + 1}] + + set swien [regget rbs3hio::CNTL(swien) $r_cntl] + rlc exec -wreg hi.cntl [regbld rbs3hio::CNTL dsp1en dsp0en dpen leden \ + [list swien $swien] ] + + rlc exec \ + -wreg hi.dsp1 0 \ + -wreg hi.dsp0 0 \ + -wreg hi.dp 0 \ + -wreg hi.led 0 + + puts "test LEDs + DSP0" + + foreach val {0x0000 0xaaaa 0x5555 0xffff 0x0000} { + rlc exec \ + -wreg hi.led $val \ + -wreg hi.dsp0 $val + after 250 + } + + puts "test LEDs + DSP0 + DP" + + for {set i 0} {$i <= 0xf} {incr i} { + set val [expr {( $i << 12 ) | ( $i << 8 ) | ( $i << 4 ) | $i}] + rlc exec \ + -wreg hi.led $val \ + -wreg hi.dsp0 $val \ + -wreg hi.dp $i + after 250 + } + + rlc exec \ + -wreg hi.cntl $r_cntl \ + -wreg hi.dsp1 0 \ + -wreg hi.dsp0 0 \ + -wreg hi.dp 0 \ + -wreg hi.led 0 + } +} Index: rbs3hio/.cvsignore =================================================================== --- rbs3hio/.cvsignore (nonexistent) +++ rbs3hio/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbs3hio =================================================================== --- rbs3hio (nonexistent) +++ rbs3hio (revision 38)
rbs3hio Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: tst_rlink/test_all.tcl =================================================================== --- tst_rlink/test_all.tcl (nonexistent) +++ tst_rlink/test_all.tcl (revision 38) @@ -0,0 +1,58 @@ +# $Id: test_all.tcl 618 2014-12-21 23:05:48Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-11-09 603 2.0 use rlink v4 address layout and iface +# 2013-01-04 469 1.0.2 move rbemon tests from test_all to test_all_emon +# 2011-04-17 376 1.0.1 add rbemon::test_rbtest_sim (if in sum mode) +# 2011-04-02 375 1.0 Initial version +# 2011-03-26 373 0.1 First draft +# + +package provide tst_rlink 1.0 + +package require rbtest +package require rbmoni + +namespace eval tst_rlink { + # + # Driver for all tst_rlink tests + # + proc test_all {} { + # + set errcnt 0 + incr errcnt [rbtest::test_all 0xf 0xfffc] + incr errcnt [rbmoni::test_regs] + incr errcnt [rbmoni::test_rbtest] + + puts "tst_rlink::test_all errcnt = $errcnt --> [rutil::errcnt2txt $errcnt]" + + return $errcnt + } + # + # Driver for emon based tst_rlink tests + # + proc test_all_emon {} { + # + set errcnt 0 + incr errcnt [rbemon::test_regs] + if {[rlink::issim]} { + incr errcnt [rbemon::test_rbtest_sim] + } + + puts "tst_rlink::test_all_emon errcnt = $errcnt --> [rutil::errcnt2txt $errcnt]" + + return $errcnt + } +} Index: tst_rlink/perf.tcl =================================================================== --- tst_rlink/perf.tcl (nonexistent) +++ tst_rlink/perf.tcl (revision 38) @@ -0,0 +1,57 @@ +# $Id: perf.tcl 622 2014-12-28 20:45:26Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-11-23 606 2.0 use new rlink v4 iface +# 2011-04-17 376 1.0 Initial version +# + +package provide tst_rlink 1.0 + +namespace eval tst_rlink { + # + # perf_wtlam: determine wtlam latency using timer.0 + # + proc perf_wtlam {{tmax 1000}} { + if {$tmax < 1} { error "-E: perf_wtlam: tmax argument must be >= 1" } + + set rval "delay latency" + + rlink::anena 1; # enable attn notify + + for {set dly 250} {$dly <= 10000} {incr dly 250} { + rlc exec \ + -wreg timer.0 0 \ + -wreg timer.1 0 + rlc exec -attn + + set tbeg [clock milliseconds] + rlc exec -wreg timer.0 $dly + for {set i 1} {1} {incr i} { + rlc wtlam 1. + rlc exec \ + -attn \ + -wreg timer.0 $dly + set trun [expr {[clock milliseconds] - $tbeg}] + if {$trun > $tmax} { break } + } + set ms [expr {double($trun) / double($i)}] + append rval [format "\n%5d %6.2f" $dly $ms] + } + + rlink::anena 0; # disable attn notify + + return $rval + } +} Index: tst_rlink/util.tcl =================================================================== --- tst_rlink/util.tcl (nonexistent) +++ tst_rlink/util.tcl (revision 38) @@ -0,0 +1,88 @@ +# $Id: util.tcl 603 2014-11-09 22:50:26Z mueller $ +# +# Copyright 2011-2014 by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2014-11-09 603 2.0 use rlink v4 address layout +# 2011-04-17 376 1.0.1 add proc scan_baud +# 2011-04-02 375 1.0 Initial version +# 2011-03-19 372 0.1 First draft +# + +package provide tst_rlink 1.0 + +package require rlink +package require rbtest +package require rbmoni +package require rbbram +package require rbs3hio +package require rbemon + +namespace eval tst_rlink { + # + # setup: amap definitions for tst_rlink + # + proc setup {} { + rlc amap -clear; # clear first to allow re-run + rlink::setup; + rbtest::setup 0xffe0; + rbmoni::setup 0xffe8; + rbemon::setup 0xffd0; + rbbram::setup 0xfe00; + rlc amap -insert timer.1 0xfe11; + rlc amap -insert timer.0 0xfe10; + rbs3hio::setup 0xfef0; + } + + # + # init: reset tst_rlink design to initial state + # + proc init {} { + rlink::init; # reset rlink + rbtest::init; + rbmoni::init; + rbbram::init; + rbemon::init; + rbs3hio::init; + rlink::init; # re-reset rlink + } + + # + # scan_baud: scan through baud rates, show uart clkdiv value + # + proc scan_baud {{bmax 500000}} { + if {! [rlink::isopen]} {error "-E: rlink port not open"} + set rlpath [rlc open] + regexp -- {^term:(.*)\?} $rlpath dummy rldev + if {$rldev eq ""} {error "-E: rlink not connected to a term: device"} + + set rval " baud hi.dsp clkdiv sysclk" + set blist {9600 19200 38400 57600 115200 230400 460800 + 500000 921600 1000000 2000000 3000000} + + foreach baud $blist { + if {$baud > $bmax} { break } + rlc close + rlc open "term:$rldev?baud=${baud};break" + rlc exec -rreg hi.dsp hidsp + set mhz [expr {double($baud*$hidsp) / 1.e6}] + append rval [format "\n%7d 0x%4.4x %6d %6.2f" \ + $baud $hidsp [expr {$hidsp + 1}] $mhz] + } + + rlc close + if {! [regexp -- {;break} $rlpath]} {append rlpath ";break"} + rlc open "${rlpath}" + return $rval + } +} Index: tst_rlink/.cvsignore =================================================================== --- tst_rlink/.cvsignore (nonexistent) +++ tst_rlink/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: tst_rlink =================================================================== --- tst_rlink (nonexistent) +++ tst_rlink (revision 38)
tst_rlink Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: rbsysmon/.cvsignore =================================================================== --- rbsysmon/.cvsignore (nonexistent) +++ rbsysmon/.cvsignore (revision 38) @@ -0,0 +1 @@ +pkgIndex.tcl Index: rbsysmon/util.tcl =================================================================== --- rbsysmon/util.tcl (nonexistent) +++ rbsysmon/util.tcl (revision 38) @@ -0,0 +1,306 @@ +# $Id: util.tcl 742 2016-03-13 14:40:19Z mueller $ +# +# Copyright 2016- by Walter F.J. Mueller +# +# This program is free software; you may redistribute and/or modify it under +# the terms of the GNU General Public License as published by the Free +# Software Foundation, either version 2, or at your option any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for complete details. +# +# Revision History: +# Date Rev Version Comment +# 2016-03-13 742 1.0 Initial version +# 2016-03-12 741 0.1 First draft +# + +package provide rbsysmon 1.0 + +package require rutil +package require rutiltpp + +namespace eval rbsysmon { + # + # setup register descriptions for sysmon_rbus + # + regdsc CNTL {reset 15} + regdsc STAT {jlock 3} {jmod 2} {jbusy 1} {ot 0} + regdsc ALM {vccddr 6} {vccpaux 5} {vccpint 4} \ + {vccbram 3} {vccaux 2} {vccint 1} {temp 0} + + # + # sysmon/xadc register definitions + # + variable regdef_current {} + # + variable regdef_xadc_base { + "0x00|sm.temp|t|cur temp" + "0x01|sm.vint|vs|cur Vccint" + "0x02|sm.vaux|vs|cur Vccaux" + "0x04|sm.vrefp|vs|cur Vrefp" + "0x05|sm.vrefn|vsb|cur Vrefn" + "0x06|sm.vbram|vs|cur Vccbram" + "0x08|sm.supaoff|v|supply A off" + "0x09|sm.adcaoff|vb|ADC A off" + "0x0a|sm.adcafac|g|ADC A gain" + "0x20|sm.tempma|t|max temp" + "0x21|sm.vintma|vs|max Vccint" + "0x22|sm.vauxma|vs|max Vccaux" + "0x23|sm.vbramma|vs|max Vccbram" + "0x24|sm.tempmi|t|min temp" + "0x25|sm.vintmi|vs|min Vccint" + "0x26|sm.vauxmi|vs|min Vccaux" + "0x27|sm.vbrammi|vs|min Vccbram" + "0x3f|sm.flag|b|flag reg" + "0x40|sm.conf0|b|conf 0" + "0x41|sm.conf1|b|conf 1" + "0x42|sm.conf2|b|conf 2" + "0x48|sm.seq00|b|select 0" + "0x49|sm.seq01|b|select 1" + "0x4a|sm.seq02|b|average 0" + "0x4b|sm.seq03|b|average 1" + "0x4c|sm.seq04|b|mode 0" + "0x4d|sm.seq05|b|mode 1" + "0x4e|sm.seq06|b|time 0" + "0x4f|sm.seq07|b|time 1" + "0x50|sm.alm00|t|temp up" + "0x51|sm.alm01|vs|ccint up" + "0x52|sm.alm02|vs|ccaux up" + "0x53|sm.alm03|t|ot limit" + "0x54|sm.alm04|t|temp low" + "0x55|sm.alm05|vs|ccint low" + "0x56|sm.alm06|vs|ccaux low" + "0x57|sm.alm07|t|ot reset" + "0x58|sm.alm08|vs|ccbram up" + "0x5c|sm.alm0c|vs|ccbram low" + "0x78|sm.rcntl|b|rbus cntl" + "0x79|sm.rstat|b|rbus stat" + "0x7a|sm.ralmh|b|rbus almh" + "0x7c|sm.rtemp|b|rbus temp" + "0x7d|sm.ralm|b|rbus aml" + "0x7f|sm.reos|d|rbus eos" + } + variable regdef_xadc_arty { + "0x11|sm.v01|v|cur Vaux[1]" + "0x12|sm.v02|v|cur Vaux[2]" + "0x19|sm.v09|v|cur Vaux[9]" + "0x1a|sm.v10|v|cur Vaux[10]" + } + + # + # setup_xadc + # + proc setup_xadc_base {{base 0xfb00}} { + variable regdef_current + set regdef_current $rbsysmon::regdef_xadc_base + setup_gen $base + } + + # + # setup_arty + # + proc setup_xadc_arty {{base 0xfb00}} { + variable regdef_current + set regdef_current [lsort [concat $rbsysmon::regdef_xadc_base \ + $rbsysmon::regdef_xadc_arty]] + setup_gen $base + } + + # + # setup_gen: amap definitions for sysmon_rbus + # + proc setup_gen {base} { + variable regdef_current + foreach def $regdef_current { + set defp [split $def "|"] + set off [lindex $defp 0] + set nam [lindex $defp 1] + rlc amap -insert $nam [expr {$base + $off}] + } + } + + # + # reset: reset xadc/sysmon + # + proc reset {} { + rlc exec -wreg sm.rcntl [regbld rbsysmon::CNTL reset] + } + + # + # print_raw: show all sysmon/xadc registers + # + proc print_raw {} { + variable regdef_current + set rval "name description : hex other" + foreach def $regdef_current { + set defp [split $def "|"] + set nam [lindex $defp 1] + set fmt [lindex $defp 2] + set txt [lindex $defp 3] + rlc exec -rreg $nam val + set line [format "%-10s %-20s: %4.4x " $nam $txt $val] + switch $fmt { + b { append line [pbvi b16 $val]} + d { append line [format "%6d" $val]} + t { append line [format "%6.1f deg" [conv_raw2t $val]]} + vs { append line [format "%8.3f V" [conv_raw2vs $val]]} + vsb { append line [format "%8.3f V" [conv_raw2vsb $val]]} + v { append line [format "%8.3f V" [conv_raw2v $val]]} + vb { append line [format "%8.3f V" [conv_raw2vb $val]]} + g { append line [format "%8.3f %%" [conv_raw2g $val]]} + default { append line "? $fmt ?" } + } + append rval "\n$line" + } + return $rval + } + + # + # print: nicely formatted summary + # + proc print {} { + rlc exec \ + -rreg sm.ralmh r_almh \ + -rreg sm.ralm r_alm + + set rval "Value cur val min val max val low lim high lim alarm" + rlc exec \ + -rreg sm.temp r_val \ + -rreg sm.tempma r_valma \ + -rreg sm.tempmi r_valmi \ + -rreg sm.alm00 r_valup \ + -rreg sm.alm04 r_vallo + append rval \ + [format "\ntemp %6.1f d %6.1f %6.1f %6.1f %6.1f %s" \ + [conv_raw2t $r_val] \ + [conv_raw2t $r_valmi] \ + [conv_raw2t $r_valma] \ + [conv_raw2t $r_vallo] \ + [conv_raw2t $r_valup] \ + [print_fmt_alm temp $r_alm $r_almh] ] + + rlc exec \ + -rreg sm.vint r_val \ + -rreg sm.vintma r_valma \ + -rreg sm.vintmi r_valmi \ + -rreg sm.alm01 r_valup \ + -rreg sm.alm05 r_vallo + append rval \ + [format "\nVccint %8.3f V %8.3f %8.3f %8.3f %8.3f %s" \ + [conv_raw2vs $r_val] \ + [conv_raw2vs $r_valmi] \ + [conv_raw2vs $r_valma] \ + [conv_raw2vs $r_vallo] \ + [conv_raw2vs $r_valup] \ + [print_fmt_alm vccint $r_alm $r_almh] ] + + rlc exec \ + -rreg sm.vaux r_val \ + -rreg sm.vauxma r_valma \ + -rreg sm.vauxmi r_valmi \ + -rreg sm.alm02 r_valup \ + -rreg sm.alm06 r_vallo + append rval \ + [format "\nVccaux %8.3f V %8.3f %8.3f %8.3f %8.3f %s" \ + [conv_raw2vs $r_val] \ + [conv_raw2vs $r_valmi] \ + [conv_raw2vs $r_valma] \ + [conv_raw2vs $r_vallo] \ + [conv_raw2vs $r_valup] \ + [print_fmt_alm vccaux $r_alm $r_almh] ] + + rlc exec \ + -rreg sm.vbram r_val \ + -rreg sm.vbramma r_valma \ + -rreg sm.vbrammi r_valmi \ + -rreg sm.alm08 r_valup \ + -rreg sm.alm0c r_vallo + append rval \ + [format "\nVccbram %8.3f V %8.3f %8.3f %8.3f %8.3f %s" \ + [conv_raw2vs $r_val] \ + [conv_raw2vs $r_valmi] \ + [conv_raw2vs $r_valma] \ + [conv_raw2vs $r_vallo] \ + [conv_raw2vs $r_valup] \ + [print_fmt_alm vccbram $r_alm $r_almh] ] + + if {[rlc amap -testname sm.v01]} { + rlc exec \ + -rreg sm.v01 r_v01 \ + -rreg sm.v02 r_v02 \ + -rreg sm.v09 r_v09 \ + -rreg sm.v10 r_10 + append rval \ + [format "\nV 5V0 %8.3f V" \ + [expr { 5.99 * [conv_raw2v $r_v01]} ] ] + append rval \ + [format "\nV VU %8.3f V" \ + [expr { 16.0 * [conv_raw2v $r_v02]} ] ] + append rval \ + [format "\nA 5V0 %8.3f A" \ + [expr { 4.0 * [conv_raw2v $r_v09]} ] ] + append rval \ + [format "\nA 0V95 %8.3f A" \ + [expr { 2.0 * [conv_raw2v $r_v09]} ] ] + } + + return $rval + } + + # + # helper for print + # + proc print_fmt_alm {chan alm almh} { + set cval [regget rbsysmon::ALM($chan) $alm] + set hval [regget rbsysmon::ALM($chan) $almh] + set cstr [expr {$cval ? "C!" : " "}] + set hstr [expr {$cval ? "H!" : " "}] + return "$cstr $hstr" + } + + # + # conversion procedures + # + proc conv_raw2t {val} { + return [expr {(($val / 65536.) * 503.975) - 273.14}] + } + proc conv_raw2vs {val} { + return [expr {($val / 65536.) * 3.}] + } + proc conv_raw2vsb {val} { + set val [rutil::sxt16 $val] + return [expr {($val / 65536.) * 3.}] + } + proc conv_raw2v {val} { + return [expr {$val / 65536.}] + } + proc conv_raw2vb {val} { + set val [rutil::sxt16 $val] + return [expr {$val / 65536.}] + } + proc conv_raw2g {val} { + set gmag [expr {$val & 0x3f}]; # get 6 lsbs + set gsig [expr {$val & 0x40}]; # get sign bit + set gain [expr {$gmag * 0.1}]; # unit is 0.1 % + if {$gsig == 0} {set gain [expr {-$gain}] } + return $gain + } + + # + # eosrate: returns eos rate (in Hz) + # + proc eosrate {} { + rlc exec -rreg sm.reos r_eosbeg + set tbeg [clock microseconds] + after 100 + rlc exec -rreg sm.reos r_eosend + set tend [clock microseconds] + set deos [expr {$r_eosend - $r_eosbeg}] + if {$deos < 0} {set deos [expr {$deos + 65536}]} + set dt [expr {($tend - $tbeg) * 1.e-6} ] + return [expr {$deos / $dt}] + } +} Index: rbsysmon =================================================================== --- rbsysmon (nonexistent) +++ rbsysmon (revision 38)
rbsysmon Property changes : Added: svn:ignore ## -0,0 +1,43 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb +pkgIndex.tcl Index: .tclshrc =================================================================== --- .tclshrc (nonexistent) +++ .tclshrc (revision 38) @@ -0,0 +1,18 @@ +# -*- tcl -*- +# $Id: .tclshrc 379 2011-04-22 20:56:19Z mueller $ +# +if {[info exists env(RETROBASE)]} { + lappend auto_path [file join $env(RETROBASE) tools tcl] + lappend auto_path [file join $env(RETROBASE) tools lib] +} +# +if {$tcl_interactive} { + package require tclreadline + namespace eval tclreadline { + proc prompt1 {} { + set version [info tclversion] + return "tclsh$version > " + } + } + ::tclreadline::Loop +} Index: .wishrc =================================================================== --- .wishrc (nonexistent) +++ .wishrc (revision 38) @@ -0,0 +1,18 @@ +# -*- tcl -*- +# $Id: .wishrc 379 2011-04-22 20:56:19Z mueller $ +# +if {[info exists env(RETROBASE)]} { + lappend auto_path [file join $env(RETROBASE) tools tcl] + lappend auto_path [file join $env(RETROBASE) tools lib] +} +# +if {$tcl_interactive} { + package require tclreadline + namespace eval tclreadline { + proc prompt1 {} { + set version [info tclversion] + return "tclsh$version > " + } + } + ::tclreadline::Loop +} Index: . =================================================================== --- . (nonexistent) +++ . (revision 38)
. Property changes : Added: svn:ignore ## -0,0 +1,42 ## +*.gz +*.tar +*.tgz +*.dep_* +work-obj93.cf +*.vcd +*.ghw +*.sav +*.tmp +*.exe +ise +xflow.his +*.ngc +*.ncd +*.pcf +*.bit +*.msk +*.svf +*.log +isim +*_[sfot]sim.vhd +*_tsim.sdf +rlink_cext_fifo_[rt]x +rlink_cext_conf +tmu_ofile +*.dsk +*.tap +*.lst +*.cof +.Xil +project_mflow +xsim.dir +webtalk_* +*_[sfot]sim +*_[IX]Sim +*_[IX]Sim_[sfot]sim +*.dcp +*.jou +*.pb +*.prj +*.rpt +*.wdb

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