URL
https://opencores.org/ocsvn/wbddr3/wbddr3/trunk
Subversion Repositories wbddr3
Compare Revisions
- This comparison shows the changes necessary to convert path
/wbddr3/trunk/bench
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/cpp/ddrsdramsim.cpp
122,16 → 122,17
case 3: |
m_reset_counts++; |
if (cmd != DDR_NOOP) { |
assert(m_reset_counts > 3); |
// assert(m_reset_counts > 3); |
m_reset_counts = 0; |
m_reset_state = 4; |
assert(cmd == DDR_MRSET); |
assert(ba == 1); |
assert(addr == 0x847); |
// assert(ba == 1); |
// assert(addr == 0x847); |
} break; |
case 4: |
m_reset_counts++; |
if (cmd != DDR_NOOP) { |
printf("DDR3-SDRAM::RESET-CMD[4]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr); |
assert(m_reset_counts > 3); |
m_reset_counts = 0; |
m_reset_state = 5; |
142,24 → 143,27
case 5: |
m_reset_counts++; |
if (cmd != DDR_NOOP) { |
assert(m_reset_counts > 12); |
printf("DDR3-SDRAM::RESET-CMD[5]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr); |
assert(m_reset_counts > 11); |
m_reset_counts = 0; |
m_reset_state = 6; |
assert(cmd == DDR_ZQS); |
assert(addr == 0x40); |
assert(addr == 0x400); |
} break; |
case 6: |
m_reset_counts++; |
if (cmd != DDR_NOOP) { |
printf("DDR3-SDRAM::RESET-CMD[6]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr); |
assert(m_reset_counts > 512); |
m_reset_counts = 0; |
m_reset_state = 7; |
assert(cmd == DDR_PRECHARGE); |
assert(addr == 0x40); |
assert(addr == 0x400); |
} break; |
case 7: |
m_reset_counts++; |
if (cmd != DDR_NOOP) { |
printf("DDR3-SDRAM::RESET-CMD[7]: %d:%08x[%d]@0x%04x\n", cmd, m_reset_counts, ba, addr); |
assert(m_reset_counts > 3); |
m_reset_counts = 0; |
m_reset_state = 8; |
168,8 → 172,10
case 8: |
m_reset_counts++; |
assert(cmd == DDR_NOOP); |
if (m_reset_counts > 140) |
if (m_reset_counts > 140) { |
m_reset_state = 16; |
printf("DDR3-SDRAM: Leaving reset state\n"); |
} |
break; |
default: |
break; |