URL
https://opencores.org/ocsvn/wbfmtx/wbfmtx/trunk
Subversion Repositories wbfmtx
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- This comparison shows the changes necessary to convert path
/wbfmtx/trunk
- from Rev 2 to Rev 3
- ↔ Reverse comparison
Rev 2 → Rev 3
/rtl/wbfmtxhack.v
112,24 → 112,38
// at the default reload rate (44.1 kHz, for a 100 MHz clock) |
reg [15:0] reload_value; |
initial reload_value = DEFAULT_RELOAD; |
always @(posedge i_clk) // Data write |
|
// Data write, but we use the upper 16 bits to set our sample rate. |
// If these bits are zero, we ignore the write--allowing users to |
// write samples without adjusting the sample rate. |
always @(posedge i_clk) // Set sample rate |
if ((i_wb_cyc)&&(i_wb_stb)&&(~i_wb_addr)&&(i_wb_we) |
&&(|i_wb_data[31:16])) |
reload_value <= i_wb_data[31:16]; |
always @(posedge i_clk) // Data write |
|
// Set the NCO transmit frequency |
initial nco_step = 32'h00; |
always @(posedge i_clk) |
if ((i_wb_cyc)&&(i_wb_stb)&&(i_wb_addr)&&(i_wb_we)) |
nco_step <= i_wb_data[31:0]; |
|
reg ztimer; |
reg [15:0] timer; |
initial ztimer = 1'b0; |
always @(posedge i_clk) // Be true when the timer is zero |
ztimer <= (timer[15:0] == 16'h1); |
initial timer = reload_value; |
always @(posedge i_clk) |
if (timer == 0) |
if (ztimer) |
timer <= reload_value; |
else |
timer <= timer - 16'h1; |
|
reg [15:0] next_sample, sample_out; |
initial sample_out = 16'h00; |
initial next_sample = 16'h00; |
always @(posedge i_clk) |
if (timer == 0) |
if (ztimer) |
sample_out <= next_sample; |
|
reg next_valid; |
138,17 → 152,23
always @(posedge i_clk) // Data write |
if ((i_wb_cyc)&&(i_wb_stb)&&(i_wb_we)&&(~i_wb_addr)) |
begin |
// Write with two's complement data, convert it |
// internally to binary offset |
// Write with two's complement data |
next_sample <= i_wb_data[15:0]; |
next_valid <= 1'b1; |
end else if (timer == 0) |
end else if (ztimer) |
next_valid <= 1'b0; |
|
// The interrupt line will remain high until writing a new data value |
// clears it. This design does not permit turning off this interrupt. |
// If the interrupt needs to be turned off, then ignore it in the |
// interrupt controller. |
initial o_int = 1'b0; |
always @(posedge i_clk) |
o_int <= (~next_valid); |
|
// Adjust the gain for a maximum frequency offset just greater than |
// 75 kHz. (We would've done 75kHz exactly, but it required a multiply |
// and this doesn't.) |
initial nco_phase = 32'h00; |
always @(posedge i_clk) |
nco_phase <= nco_phase + nco_step |